diff --git a/llvm/lib/Target/PowerPC/P9InstrResources.td b/llvm/lib/Target/PowerPC/P9InstrResources.td
--- a/llvm/lib/Target/PowerPC/P9InstrResources.td
+++ b/llvm/lib/Target/PowerPC/P9InstrResources.td
@@ -129,14 +129,14 @@
     (instregex "MTVSRW(A|Z)$"),
     (instregex "CMP(WI|LWI|W|LW)(8)?$"),
     (instregex "CMP(L)?D(I)?$"),
-    (instregex "SUBF(I)?C(8)?$"),
+    (instregex "SUBF(I)?C(8)?(O)?$"),
     (instregex "ANDI(S)?o(8)?$"),
-    (instregex "ADDC(8)?$"),
+    (instregex "ADDC(8)?(O)?$"),
     (instregex "ADDIC(8)?(o)?$"),
-    (instregex "ADD(8|4)(o)?$"),
-    (instregex "ADD(E|ME|ZE)(8)?(o)?$"),
-    (instregex "SUBF(E|ME|ZE)?(8)?(o)?$"),
-    (instregex "NEG(8)?(o)?$"),
+    (instregex "ADD(8|4)(O)?(o)?$"),
+    (instregex "ADD(E|ME|ZE)(8)?(O)?(o)?$"),
+    (instregex "SUBF(E|ME|ZE)?(8)?(O)?(o)?$"),
+    (instregex "NEG(8)?(O)?(o)?$"),
     (instregex "POPCNTB$"),
     (instregex "ADD(I|IS)?(8)?$"),
     (instregex "LI(S)?(8)?$"),
@@ -148,7 +148,7 @@
     (instregex "EQV(8)?(o)?$"),
     (instregex "EXTS(B|H|W)(8)?(_32)?(_64)?(o)?$"),
     (instregex "ADD(4|8)(TLS)?(_)?$"),
-    (instregex "NEG(8)?$"),
+    (instregex "NEG(8)?(O)?$"),
     (instregex "ADDI(S)?toc(HA|L)(8)?$"),
     COPY,
     MCRF,
@@ -398,7 +398,7 @@
 def : InstRW<[P9_DP_5C, IP_EXEC_1C, DISP_3SLOTS_1C],
       (instrs
     (instregex "MADD(HD|HDU|LD|LD8)$"),
-    (instregex "MUL(HD|HW|LD|LI|LI8|LW)(U)?$")
+    (instregex "MUL(HD|HW|LD|LI|LI8|LW)(U)?(O)?$")
 )>;
 
 // 7 cycle Restricted DP operation. One DP unit, one EXEC pipeline and all three
@@ -457,7 +457,7 @@
 def : InstRW<[P9_DPOpAndALUOp_7C, IP_EXEC_1C, IP_EXEC_1C,
               DISP_3SLOTS_1C, DISP_1C],
       (instrs
-    (instregex "MUL(H|L)(D|W)(U)?o$")
+    (instregex "MUL(H|L)(D|W)(U)?(O)?o$")
 )>;
 
 // 7 cycle Restricted DP operation and one 3 cycle ALU operation.
@@ -945,7 +945,9 @@
 def : InstRW<[P9_DIV_16C_8, IP_EXECO_1C, IP_EXECE_1C, DISP_EVEN_1C],
       (instrs
     DIVW,
+    DIVWO,
     DIVWU,
+    DIVWUO,
     MODSW
 )>;
 
@@ -955,9 +957,13 @@
 def : InstRW<[P9_DIV_24C_8, IP_EXECO_1C, IP_EXECE_1C, DISP_EVEN_1C],
       (instrs
     DIVWE,
+    DIVWEO,
     DIVD,
+    DIVDO,
     DIVWEU,
+    DIVWEUO,
     DIVDU,
+    DIVDUO,
     MODSD,
     MODUD,
     MODUW
@@ -969,7 +975,9 @@
 def : InstRW<[P9_DIV_40C_8, IP_EXECO_1C, IP_EXECE_1C, DISP_EVEN_1C],
       (instrs
     DIVDE,
-    DIVDEU
+    DIVDEO,
+    DIVDEU,
+    DIVDEUO
 )>;
 
 // Cracked DIV and ALU operation. Requires one full slice for the ALU operation
@@ -988,9 +996,13 @@
               DISP_EVEN_1C, DISP_1C],
       (instrs
     DIVDo,
+    DIVDOo,
     DIVDUo,
+    DIVDUOo,
     DIVWEo,
-    DIVWEUo
+    DIVWEOo,
+    DIVWEUo,
+    DIVWEUOo
 )>;
 
 // Cracked DIV and ALU operation. Requires one full slice for the ALU operation
@@ -1000,7 +1012,9 @@
               DISP_EVEN_1C, DISP_1C],
       (instrs
     DIVDEo,
-    DIVDEUo
+    DIVDEOo,
+    DIVDEUo,
+    DIVDEUOo
 )>;
 
 // CR access instructions in _BrMCR, IIC_BrMCRX.
@@ -1025,8 +1039,8 @@
 def : InstRW<[P9_ALU_2C, P9_ALU_2C, IP_EXEC_1C, IP_EXEC_1C,
               DISP_1C, DISP_1C],
       (instrs
-    (instregex "ADDC(8)?o$"),
-    (instregex "SUBFC(8)?o$")
+    (instregex "ADDC(8)?(O)?o$"),
+    (instregex "SUBFC(8)?(O)?o$")
 )>;
 
 // Cracked ALU operations.
diff --git a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
--- a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
+++ b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
@@ -497,9 +497,9 @@
                    [(set i64:$dst, (xor i64:$src1, imm16ShiftedZExt:$src2))]>;
 
 let isCommutable = 1 in
-defm ADD8  : XOForm_1r<31, 266, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
-                       "add", "$rT, $rA, $rB", IIC_IntSimple,
-                       [(set i64:$rT, (add i64:$rA, i64:$rB))]>;
+defm ADD8  : XOForm_1rx<31, 266, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
+                        "add", "$rT, $rA, $rB", IIC_IntSimple,
+                        [(set i64:$rT, (add i64:$rA, i64:$rB))]>;
 // ADD8 has a special form: reg = ADD8(reg, sym@tls) for use by the
 // initial-exec thread-local storage model.  We need to forbid r0 here -
 // while it works for add just fine, the linker can relax this to local-exec
@@ -576,9 +576,9 @@
                         "subfc", "$rT, $rA, $rB", IIC_IntGeneral,
                         [(set i64:$rT, (subc i64:$rB, i64:$rA))]>,
                         PPC970_DGroup_Cracked;
-defm SUBF8 : XOForm_1r<31, 40, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
-                       "subf", "$rT, $rA, $rB", IIC_IntGeneral,
-                       [(set i64:$rT, (sub i64:$rB, i64:$rA))]>;
+defm SUBF8 : XOForm_1rx<31, 40, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
+                        "subf", "$rT, $rA, $rB", IIC_IntGeneral,
+                        [(set i64:$rT, (sub i64:$rB, i64:$rA))]>;
 defm NEG8    : XOForm_3r<31, 104, 0, (outs g8rc:$rT), (ins g8rc:$rA),
                         "neg", "$rT, $rA", IIC_IntSimple,
                         [(set i64:$rT, (ineg i64:$rA))]>;
@@ -777,10 +777,10 @@
 defm DIVDU : XOForm_1rcr<31, 457, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
                           "divdu", "$rT, $rA, $rB", IIC_IntDivD,
                           [(set i64:$rT, (udiv i64:$rA, i64:$rB))]>, isPPC64;
-def DIVDE : XOForm_1<31, 425, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
-                     "divde $rT, $rA, $rB", IIC_IntDivD,
-                     [(set i64:$rT, (int_ppc_divde g8rc:$rA, g8rc:$rB))]>,
-                     isPPC64, Requires<[HasExtDiv]>;
+defm DIVDE : XOForm_1rcr<31, 425, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
+                         "divde", "$rT, $rA, $rB", IIC_IntDivD,
+                         [(set i64:$rT, (int_ppc_divde g8rc:$rA, g8rc:$rB))]>,
+                         isPPC64, Requires<[HasExtDiv]>;
 
 let Predicates = [IsISA3_0] in {
 def MADDHD : VAForm_1a<48, (outs g8rc :$RT), (ins g8rc:$RA, g8rc:$RB, g8rc:$RC),
@@ -815,24 +815,14 @@
                         [(set i64:$rT, (urem i64:$rA, i64:$rB))]>;
 }
 
-let Defs = [CR0] in
-def DIVDEo : XOForm_1<31, 425, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
-                      "divde. $rT, $rA, $rB", IIC_IntDivD,
-                      []>, isDOT, PPC970_DGroup_Cracked, PPC970_DGroup_First,
-                      isPPC64, Requires<[HasExtDiv]>;
-def DIVDEU : XOForm_1<31, 393, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
-                      "divdeu $rT, $rA, $rB", IIC_IntDivD,
-                      [(set i64:$rT, (int_ppc_divdeu g8rc:$rA, g8rc:$rB))]>,
-                      isPPC64, Requires<[HasExtDiv]>;
-let Defs = [CR0] in
-def DIVDEUo : XOForm_1<31, 393, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
-                       "divdeu. $rT, $rA, $rB", IIC_IntDivD,
-                       []>, isDOT, PPC970_DGroup_Cracked, PPC970_DGroup_First,
-                        isPPC64, Requires<[HasExtDiv]>;
+defm DIVDEU : XOForm_1rcr<31, 393, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
+                          "divdeu", "$rT, $rA, $rB", IIC_IntDivD,
+                          [(set i64:$rT, (int_ppc_divdeu g8rc:$rA, g8rc:$rB))]>,
+                          isPPC64, Requires<[HasExtDiv]>;
 let isCommutable = 1 in
-defm MULLD : XOForm_1r<31, 233, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
-                       "mulld", "$rT, $rA, $rB", IIC_IntMulHD,
-                       [(set i64:$rT, (mul i64:$rA, i64:$rB))]>, isPPC64;
+defm MULLD : XOForm_1rx<31, 233, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
+                        "mulld", "$rT, $rA, $rB", IIC_IntMulHD,
+                        [(set i64:$rT, (mul i64:$rA, i64:$rB))]>, isPPC64;
 let Interpretation64Bit = 1, isCodeGenOnly = 1 in
 def MULLI8 : DForm_2<7, (outs g8rc:$rD), (ins g8rc:$rA, s16imm64:$imm),
                        "mulli $rD, $rA, $imm", IIC_IntMulLI,
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -1025,6 +1025,32 @@
   }
 }
 
+//Multiclass for instructions which have a record overflow form as well
+//as a record form but no carry (i.e. mulld, mulldo, subf, subfo, etc.)
+multiclass XOForm_1rx<bits<6> opcode, bits<9> xo, bit oe, dag OOL, dag IOL,
+                      string asmbase, string asmstr, InstrItinClass itin,
+                      list<dag> pattern> {
+  let BaseName = asmbase in {
+    def NAME : XOForm_1<opcode, xo, 0, OOL, IOL,
+                        !strconcat(asmbase, !strconcat(" ", asmstr)), itin,
+                        pattern>, RecFormRel;
+    let Defs = [CR0] in
+    def o    : XOForm_1<opcode, xo, 0, OOL, IOL,
+                        !strconcat(asmbase, !strconcat(". ", asmstr)), itin,
+                        []>, isDOT, RecFormRel;
+  }
+  let BaseName = !strconcat(asmbase, "O") in {
+    let Defs = [XER] in
+    def O    : XOForm_1<opcode, xo, 1, OOL, IOL,
+                        !strconcat(asmbase, !strconcat("o ", asmstr)), itin,
+                        []>, RecFormRel;
+    let Defs = [XER, CR0] in
+    def Oo    : XOForm_1<opcode, xo, 1, OOL, IOL,
+                         !strconcat(asmbase, !strconcat("o. ", asmstr)), itin,
+                         []>, isDOT, RecFormRel;
+  }
+}
+
 // Multiclass for instructions for which the non record form is not cracked
 // and the record form is cracked (i.e. divw, mullw, etc.)
 multiclass XOForm_1rcr<bits<6> opcode, bits<9> xo, bit oe, dag OOL, dag IOL,
@@ -1040,6 +1066,16 @@
                        []>, isDOT, RecFormRel, PPC970_DGroup_First,
                        PPC970_DGroup_Cracked;
   }
+  let BaseName = !strconcat(asmbase, "O") in {
+    let Defs = [XER] in
+    def O    : XOForm_1<opcode, xo, 1, OOL, IOL,
+                        !strconcat(asmbase, !strconcat("o ", asmstr)), itin,
+                        []>, RecFormRel;
+    let Defs = [XER, CR0] in
+    def Oo   : XOForm_1<opcode, xo, 1, OOL, IOL,
+                        !strconcat(asmbase, !strconcat("o. ", asmstr)), itin,
+                        []>, isDOT, RecFormRel;
+  }
 }
 
 multiclass XOForm_1rc<bits<6> opcode, bits<9> xo, bit oe, dag OOL, dag IOL,
@@ -1055,6 +1091,16 @@
                        !strconcat(asmbase, !strconcat(". ", asmstr)), itin,
                        []>, isDOT, RecFormRel;
   }
+  let BaseName = !strconcat(asmbase, "O") in {
+    let Defs = [CARRY, XER] in
+    def O    : XOForm_1<opcode, xo, 1, OOL, IOL,
+                        !strconcat(asmbase, !strconcat("o ", asmstr)), itin,
+                        []>, RecFormRel;
+    let Defs = [CARRY, XER, CR0] in
+    def Oo   : XOForm_1<opcode, xo, 1, OOL, IOL,
+                        !strconcat(asmbase, !strconcat("o. ", asmstr)), itin,
+                        []>, isDOT, RecFormRel;
+  }
 }
 
 multiclass XOForm_3r<bits<6> opcode, bits<9> xo, bit oe, dag OOL, dag IOL,
@@ -1069,6 +1115,16 @@
                        !strconcat(asmbase, !strconcat(". ", asmstr)), itin,
                        []>, isDOT, RecFormRel;
   }
+  let BaseName = !strconcat(asmbase, "O") in {
+    let Defs = [XER] in
+    def O    : XOForm_3<opcode, xo, 1, OOL, IOL,
+                        !strconcat(asmbase, !strconcat("o ", asmstr)), itin,
+                        []>, RecFormRel;
+    let Defs = [XER, CR0] in
+    def Oo   : XOForm_3<opcode, xo, 1, OOL, IOL,
+                        !strconcat(asmbase, !strconcat("o. ", asmstr)), itin,
+                        []>, isDOT, RecFormRel;
+  }
 }
 
 multiclass XOForm_3rc<bits<6> opcode, bits<9> xo, bit oe, dag OOL, dag IOL,
@@ -1084,6 +1140,16 @@
                        !strconcat(asmbase, !strconcat(". ", asmstr)), itin,
                        []>, isDOT, RecFormRel;
   }
+  let BaseName = !strconcat(asmbase, "O") in {
+    let Defs = [CARRY, XER] in
+    def O    : XOForm_3<opcode, xo, 1, OOL, IOL,
+                        !strconcat(asmbase, !strconcat("o ", asmstr)), itin,
+                        []>, RecFormRel;
+    let Defs = [CARRY, XER, CR0] in
+    def Oo   : XOForm_3<opcode, xo, 1, OOL, IOL,
+                        !strconcat(asmbase, !strconcat("o. ", asmstr)), itin,
+                        []>, isDOT, RecFormRel;
+  }
 }
 
 multiclass MForm_2r<bits<6> opcode, dag OOL, dag IOL,
@@ -2778,9 +2844,9 @@
 let PPC970_Unit = 1, hasSideEffects = 0 in {  // FXU Operations.
 // XO-Form instructions.  Arithmetic instructions that can set overflow bit
 let isCommutable = 1 in
-defm ADD4  : XOForm_1r<31, 266, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
-                       "add", "$rT, $rA, $rB", IIC_IntSimple,
-                       [(set i32:$rT, (add i32:$rA, i32:$rB))]>;
+defm ADD4  : XOForm_1rx<31, 266, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
+                        "add", "$rT, $rA, $rB", IIC_IntSimple,
+                        [(set i32:$rT, (add i32:$rA, i32:$rB))]>;
 let isCodeGenOnly = 1 in
 def ADD4TLS  : XOForm_1<31, 266, 0, (outs gprc:$rT), (ins gprc:$rA, tlsreg32:$rB),
                        "add $rT, $rA, $rB", IIC_IntSimple,
@@ -2797,24 +2863,14 @@
 defm DIVWU : XOForm_1rcr<31, 459, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
                           "divwu", "$rT, $rA, $rB", IIC_IntDivW,
                           [(set i32:$rT, (udiv i32:$rA, i32:$rB))]>;
-def DIVWE : XOForm_1<31, 427, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
-                     "divwe $rT, $rA, $rB", IIC_IntDivW,
-                     [(set i32:$rT, (int_ppc_divwe gprc:$rA, gprc:$rB))]>,
-                     Requires<[HasExtDiv]>;
-let Defs = [CR0] in
-def DIVWEo : XOForm_1<31, 427, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
-                      "divwe. $rT, $rA, $rB", IIC_IntDivW,
-                      []>, isDOT, PPC970_DGroup_Cracked, PPC970_DGroup_First,
-                      Requires<[HasExtDiv]>;
-def DIVWEU : XOForm_1<31, 395, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
-                      "divweu $rT, $rA, $rB", IIC_IntDivW,
-                      [(set i32:$rT, (int_ppc_divweu gprc:$rA, gprc:$rB))]>,
-                      Requires<[HasExtDiv]>;
-let Defs = [CR0] in
-def DIVWEUo : XOForm_1<31, 395, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
-                       "divweu. $rT, $rA, $rB", IIC_IntDivW,
-                       []>, isDOT, PPC970_DGroup_Cracked, PPC970_DGroup_First,
-                       Requires<[HasExtDiv]>;
+defm DIVWE : XOForm_1rcr<31, 427, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
+                         "divwe", "$rT, $rA, $rB", IIC_IntDivW,
+                         [(set i32:$rT, (int_ppc_divwe gprc:$rA, gprc:$rB))]>,
+                         Requires<[HasExtDiv]>;
+defm DIVWEU : XOForm_1rcr<31, 395, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
+                          "divweu", "$rT, $rA, $rB", IIC_IntDivW,
+                          [(set i32:$rT, (int_ppc_divweu gprc:$rA, gprc:$rB))]>,
+                          Requires<[HasExtDiv]>;
 let isCommutable = 1 in {
 defm MULHW : XOForm_1r<31, 75, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
                        "mulhw", "$rT, $rA, $rB", IIC_IntMulHW,
@@ -2822,13 +2878,13 @@
 defm MULHWU : XOForm_1r<31, 11, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
                        "mulhwu", "$rT, $rA, $rB", IIC_IntMulHWU,
                        [(set i32:$rT, (mulhu i32:$rA, i32:$rB))]>;
-defm MULLW : XOForm_1r<31, 235, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
-                       "mullw", "$rT, $rA, $rB", IIC_IntMulHW,
-                       [(set i32:$rT, (mul i32:$rA, i32:$rB))]>;
+defm MULLW : XOForm_1rx<31, 235, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
+                        "mullw", "$rT, $rA, $rB", IIC_IntMulHW,
+                        [(set i32:$rT, (mul i32:$rA, i32:$rB))]>;
 } // isCommutable
-defm SUBF  : XOForm_1r<31, 40, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
-                       "subf", "$rT, $rA, $rB", IIC_IntGeneral,
-                       [(set i32:$rT, (sub i32:$rB, i32:$rA))]>;
+defm SUBF  : XOForm_1rx<31, 40, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
+                        "subf", "$rT, $rA, $rB", IIC_IntGeneral,
+                        [(set i32:$rT, (sub i32:$rB, i32:$rA))]>;
 defm SUBFC : XOForm_1rc<31, 8, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
                         "subfc", "$rT, $rA, $rB", IIC_IntGeneral,
                         [(set i32:$rT, (subc i32:$rB, i32:$rA))]>,
diff --git a/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding.txt b/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding.txt
--- a/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding.txt
+++ b/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding.txt
@@ -238,12 +238,24 @@
 # CHECK: add. 2, 3, 4                    
 0x7c 0x43 0x22 0x15
 
+# CHECK: addo 2, 3, 4
+0x7c 0x43 0x26 0x14
+
+# CHECK: addo. 2, 3, 4
+0x7c 0x43 0x26 0x15
+
 # CHECK: subf 2, 3, 4                    
 0x7c 0x43 0x20 0x50
 
 # CHECK: subf. 2, 3, 4                   
 0x7c 0x43 0x20 0x51
 
+# CHECK: subfo 2, 3, 4
+0x7c 0x43 0x24 0x50
+
+# CHECK: subfo. 2, 3, 4
+0x7c 0x43 0x24 0x51
+
 # CHECK: addic 2, 3, 128                 
 0x30 0x43 0x00 0x80
 
@@ -259,54 +271,108 @@
 # CHECK: addc. 2, 3, 4                   
 0x7c 0x43 0x20 0x15
 
+# CHECK: addco 2, 3, 4
+0x7c 0x43 0x24 0x14
+
+# CHECK: addco. 2, 3, 4
+0x7c 0x43 0x24 0x15
+
 # CHECK: subfc 2, 3, 4                   
 0x7c 0x43 0x20 0x10
 
 # CHECK: subfc 2, 3, 4                   
 0x7c 0x43 0x20 0x10
 
+# CHECK: subfco 2, 3, 4
+0x7c 0x43 0x24 0x10
+
+# CHECK: subfco. 2, 3, 4
+0x7c 0x43 0x24 0x11
+
 # CHECK: adde 2, 3, 4                    
 0x7c 0x43 0x21 0x14
 
 # CHECK: adde. 2, 3, 4                   
 0x7c 0x43 0x21 0x15
 
+# CHECK: addeo 2, 3, 4
+0x7c 0x43 0x25 0x14
+
+# CHECK: addeo. 2, 3, 4
+0x7c 0x43 0x25 0x15
+
 # CHECK: subfe 2, 3, 4                   
 0x7c 0x43 0x21 0x10
 
 # CHECK: subfe. 2, 3, 4                  
 0x7c 0x43 0x21 0x11
 
+# CHECK: subfeo 2, 3, 4
+0x7c 0x43 0x25 0x10
+
+# CHECKE: subfeo. 2, 3, 4
+0x7c 0x43 0x25 0x11
+
 # CHECK: addme 2, 3                      
 0x7c 0x43 0x01 0xd4
 
 # CHECK: addme. 2, 3                     
 0x7c 0x43 0x01 0xd5
 
+# CHECK: addmeo 2, 3
+0x7c 0x43 0x05 0xd4
+
+# CHECK: addmeo. 2, 3
+0x7c 0x43 0x05 0xd5
+
 # CHECK: subfme 2, 3                     
 0x7c 0x43 0x01 0xd0
 
 # CHECK: subfme. 2, 3                    
 0x7c 0x43 0x01 0xd1
 
+# CHECK: subfmeo 2, 3
+0x7c 0x43 0x05 0xd0
+
+# CHECK: subfmeo. 2, 3
+0x7c 0x43 0x05 0xd1
+
 # CHECK: addze 2, 3                      
 0x7c 0x43 0x01 0x94
 
 # CHECK: addze. 2, 3                     
 0x7c 0x43 0x01 0x95
 
+# CHECK: addzeo 2, 3
+0x7c 0x43 0x05 0x94
+
+# CHECK: addzeo. 2, 3
+0x7c 0x43 0x05 0x95
+
 # CHECK: subfze 2, 3                     
 0x7c 0x43 0x01 0x90
 
 # CHECK: subfze. 2, 3                    
 0x7c 0x43 0x01 0x91
 
+# CHECK: subfzeo 2, 3
+0x7c 0x43 0x05 0x90
+
+# CHECK: subfzeo. 2, 3
+0x7c 0x43 0x05 0x91
+
 # CHECK: neg 2, 3                        
 0x7c 0x43 0x00 0xd0
 
 # CHECK: neg. 2, 3                       
 0x7c 0x43 0x00 0xd1
 
+# CHECK: nego 2, 3
+0x7c 0x43 0x04 0xd0
+
+# CHECK: nego. 2, 3
+0x7c 0x43 0x04 0xd1
+
 # CHECK: mulli 2, 3, 128                 
 0x1c 0x43 0x00 0x80
 
@@ -322,6 +388,12 @@
 # CHECK: mullw. 2, 3, 4                  
 0x7c 0x43 0x21 0xd7
 
+# CHECK: mullwo 2, 3, 4
+0x7c 0x43 0x25 0xd6
+
+# CHECK: mullwo. 2, 3, 4
+0x7c 0x43 0x25 0xd7
+
 # CHECK: mulhwu 2, 3, 4                  
 0x7c 0x43 0x20 0x16
 
@@ -355,24 +427,48 @@
 # CHECK: divw. 2, 3, 4                   
 0x7c 0x43 0x23 0xd7
 
+# CHECK: divwo 2, 3, 4
+0x7c 0x43 0x27 0xd6
+
+# CHECK: divwo. 2, 3, 4
+0x7c 0x43 0x27 0xd7
+
 # CHECK: divwu 2, 3, 4                   
 0x7c 0x43 0x23 0x96
 
 # CHECK: divwu. 2, 3, 4                  
 0x7c 0x43 0x23 0x97
 
+# CHECK: divwuo 2, 3, 4
+0x7c 0x43 0x27 0x96
+
+# CHECK: divwuo. 2, 3, 4
+0x7c 0x43 0x27 0x97
+
 # CHECK: divwe 2, 3, 4
 0x7c 0x43 0x23 0x56
 
 # CHECK: divwe. 2, 3, 4
 0x7c 0x43 0x23 0x57
 
+# CHECK: divweo 2, 3, 4
+0x7c 0x43 0x27 0x56
+
+# CHECK: divweo. 2, 3, 4
+0x7c 0x43 0x27 0x57
+
 # CHECK: divweu 2, 3, 4
 0x7c 0x43 0x23 0x16
 
 # CHECK: divweu. 2, 3, 4
 0x7c 0x43 0x23 0x17
 
+# CHECK: divweuo 2, 3, 4
+0x7c 0x43 0x27 0x16
+
+# CHECK: divweuo. 2, 3, 4
+0x7c 0x43 0x27 0x17
+
 # CHECK: modsw 2, 3, 4
 0x7c 0x43 0x26 0x16
 
@@ -391,6 +487,12 @@
 # CHECK: mulld. 2, 3, 4                  
 0x7c 0x43 0x21 0xd3
 
+# CHECK: mulldo 2, 3, 4
+0x7c 0x43 0x25 0xd2
+
+# CHECK: mulldo. 2, 3, 4
+0x7c 0x43 0x25 0xd3
+
 # CHECK: mulhd 2, 3, 4                   
 0x7c 0x43 0x20 0x92
 
@@ -409,24 +511,48 @@
 # CHECK: divd. 2, 3, 4                   
 0x7c 0x43 0x23 0xd3
 
+# CHECK: divdo 2, 3, 4
+0x7c 0x43 0x27 0xd2
+
+# CHECK: divdo. 2, 3, 4
+0x7c 0x43 0x27 0xd3
+
 # CHECK: divdu 2, 3, 4                   
 0x7c 0x43 0x23 0x92
 
 # CHECK: divdu. 2, 3, 4                  
 0x7c 0x43 0x23 0x93
 
+# CHECK: divduo 2, 3, 4
+0x7c 0x43 0x27 0x92
+
+# CHECK: divduo. 2, 3, 4
+0x7c 0x43 0x27 0x93
+
 # CHECK: divde 2, 3, 4
 0x7c 0x43 0x23 0x52
 
 # CHECK: divde. 2, 3, 4
 0x7c 0x43 0x23 0x53
 
+# CHECK: divdeo 2, 3, 4
+0x7c 0x43 0x27 0x52
+
+# CHECK: divdeo. 2, 3, 4
+0x7c 0x43 0x27 0x53
+
 # CHECK: divdeu 2, 3, 4
 0x7c 0x43 0x23 0x12
 
 # CHECK: divdeu. 2, 3, 4
 0x7c 0x43 0x23 0x13
 
+# CHECK: divdeuo 2, 3, 4
+0x7c 0x43 0x27 0x12
+
+# CHECK: divdeuo. 2, 3, 4
+0x7c 0x43 0x27 0x13
+
 # CHECK: cmpdi 2, 3, 128                 
 0x2d 0x23 0x00 0x80
 
diff --git a/llvm/test/MC/Disassembler/PowerPC/ppc64le-encoding.txt b/llvm/test/MC/Disassembler/PowerPC/ppc64le-encoding.txt
--- a/llvm/test/MC/Disassembler/PowerPC/ppc64le-encoding.txt
+++ b/llvm/test/MC/Disassembler/PowerPC/ppc64le-encoding.txt
@@ -235,12 +235,24 @@
 # CHECK: add. 2, 3, 4
 0x15 0x22 0x43 0x7c
 
+# CHECK: addo 2, 3, 4
+0x14 0x26 0x43 0x7c
+
+# CHECK: addo. 2, 3, 4
+0x15 0x26 0x43 0x7c
+
 # CHECK: subf 2, 3, 4
 0x50 0x20 0x43 0x7c
 
 # CHECK: subf. 2, 3, 4
 0x51 0x20 0x43 0x7c
 
+# CHECK: subfo 2, 3, 4
+0x50 0x24 0x43 0x7c
+
+# CHECK: subfo. 2, 3, 4
+0x51 0x24 0x43 0x7c
+
 # CHECK: addic 2, 3, 128
 0x80 0x00 0x43 0x30
 
@@ -256,54 +268,108 @@
 # CHECK: addc. 2, 3, 4
 0x15 0x20 0x43 0x7c
 
+# CHECK: addco 2, 3, 4
+0x14 0x24 0x43 0x7c
+
+# CHECK: addco. 2, 3, 4
+0x15 0x24 0x43 0x7c
+
 # CHECK: subfc 2, 3, 4
 0x10 0x20 0x43 0x7c
 
 # CHECK: subfc 2, 3, 4
 0x10 0x20 0x43 0x7c
 
+# CHECK: subfco 2, 3, 4
+0x10 0x24 0x43 0x7c
+
+# CHECK: subfco. 2, 3, 4
+0x11 0x24 0x43 0x7c
+
 # CHECK: adde 2, 3, 4
 0x14 0x21 0x43 0x7c
 
 # CHECK: adde. 2, 3, 4
 0x15 0x21 0x43 0x7c
 
+# CHECK: addeo 2, 3, 4
+0x14 0x25 0x43 0x7c
+
+# CHECK: addeo. 2, 3, 4
+0x15 0x25 0x43 0x7c
+
 # CHECK: subfe 2, 3, 4
 0x10 0x21 0x43 0x7c
 
 # CHECK: subfe. 2, 3, 4
 0x11 0x21 0x43 0x7c
 
+# CHECK: subfeo 2, 3, 4
+0x10 0x25 0x43 0x7c
+
+# CHECKE: subfeo. 2, 3, 4
+0x11 0x25 0x43 0x7c
+
 # CHECK: addme 2, 3
 0xd4 0x01 0x43 0x7c
 
 # CHECK: addme. 2, 3
 0xd5 0x01 0x43 0x7c
 
+# CHECK: addmeo 2, 3
+0xd4 0x05 0x43 0x7c
+
+# CHECK: addmeo. 2, 3
+0xd5 0x05 0x43 0x7c
+
 # CHECK: subfme 2, 3
 0xd0 0x01 0x43 0x7c
 
 # CHECK: subfme. 2, 3
 0xd1 0x01 0x43 0x7c
 
+# CHECK: subfmeo 2, 3
+0xd0 0x05 0x43 0x7c
+
+# CHECK: subfmeo. 2, 3
+0xd1 0x05 0x43 0x7c
+
 # CHECK: addze 2, 3
 0x94 0x01 0x43 0x7c
 
 # CHECK: addze. 2, 3
 0x95 0x01 0x43 0x7c
 
+# CHECK: addzeo 2, 3
+0x94 0x05 0x43 0x7c
+
+# CHECK: addzeo. 2, 3
+0x95 0x05 0x43 0x7c
+
 # CHECK: subfze 2, 3
 0x90 0x01 0x43 0x7c
 
 # CHECK: subfze. 2, 3
 0x91 0x01 0x43 0x7c
 
+# CHECK: subfzeo 2, 3
+0x90 0x05 0x43 0x7c
+
+# CHECK: subfzeo. 2, 3
+0x91 0x05 0x43 0x7c
+
 # CHECK: neg 2, 3
 0xd0 0x00 0x43 0x7c
 
 # CHECK: neg. 2, 3
 0xd1 0x00 0x43 0x7c
 
+# CHECK: nego 2, 3
+0xd0 0x04 0x43 0x7c
+
+# CHECK: nego. 2, 3
+0xd1 0x04 0x43 0x7c
+
 # CHECK: mulli 2, 3, 128
 0x80 0x00 0x43 0x1c
 
@@ -319,6 +385,12 @@
 # CHECK: mullw. 2, 3, 4
 0xd7 0x21 0x43 0x7c
 
+# CHECK: mullwo 2, 3, 4
+0xd6 0x25 0x43 0x7c
+
+# CHECK: mullwo. 2, 3, 4
+0xd7 0x25 0x43 0x7c
+
 # CHECK: mulhwu 2, 3, 4
 0x16 0x20 0x43 0x7c
 
@@ -331,24 +403,48 @@
 # CHECK: divw. 2, 3, 4
 0xd7 0x23 0x43 0x7c
 
+# CHECK: divwo 2, 3, 4
+0xd6 0x27 0x43 0x7c
+
+# CHECK: divwo. 2, 3, 4
+0xd7 0x27 0x43 0x7c
+
 # CHECK: divwu 2, 3, 4
 0x96 0x23 0x43 0x7c
 
 # CHECK: divwu. 2, 3, 4
 0x97 0x23 0x43 0x7c
 
+# CHECK: divwuo 2, 3, 4
+0x96 0x27 0x43 0x7c
+
+# CHECK: divwuo. 2, 3, 4
+0x97 0x27 0x43 0x7c
+
 # CHECK: divwe 2, 3, 4
 0x56 0x23 0x43 0x7c
 
 # CHECK: divwe. 2, 3, 4
 0x57 0x23 0x43 0x7c
 
+# CHECK: divweo 2, 3, 4
+0x56 0x27 0x43 0x7c
+
+# CHECK: divweo. 2, 3, 4
+0x57 0x27 0x43 0x7c
+
 # CHECK: divweu 2, 3, 4
 0x16 0x23 0x43 0x7c
 
 # CHECK: divweu. 2, 3, 4
 0x17 0x23 0x43 0x7c
 
+# CHECK: divweuo 2, 3, 4
+0x16 0x27 0x43 0x7c
+
+# CHECK: divweuo. 2, 3, 4
+0x17 0x27 0x43 0x7c
+
 # CHECK: modsw 2, 3, 4
 0x16 0x26 0x43 0x7c
 
@@ -367,6 +463,12 @@
 # CHECK: mulld. 2, 3, 4
 0xd3 0x21 0x43 0x7c
 
+# CHECK: mulldo 2, 3, 4
+0xd2 0x25 0x43 0x7c
+
+# CHECK: mulldo. 2, 3, 4
+0xd3 0x25 0x43 0x7c
+
 # CHECK: mulhd 2, 3, 4
 0x92 0x20 0x43 0x7c
 
@@ -385,24 +487,48 @@
 # CHECK: divd. 2, 3, 4
 0xd3 0x23 0x43 0x7c
 
+# CHECK: divdo 2, 3, 4
+0xd2 0x27 0x43 0x7c
+
+# CHECK: divdo. 2, 3, 4
+0xd3 0x27 0x43 0x7c
+
 # CHECK: divdu 2, 3, 4
 0x92 0x23 0x43 0x7c
 
 # CHECK: divdu. 2, 3, 4
 0x93 0x23 0x43 0x7c
 
+# CHECK: divduo 2, 3, 4
+0x92 0x27 0x43 0x7c
+
+# CHECK: divduo. 2, 3, 4
+0x93 0x27 0x43 0x7c
+
 # CHECK: divde 2, 3, 4
 0x52 0x23 0x43 0x7c
 
 # CHECK: divde. 2, 3, 4
 0x53 0x23 0x43 0x7c
 
+# CHECK: divdeo 2, 3, 4
+0x52 0x27 0x43 0x7c
+
+# CHECK: divdeo. 2, 3, 4
+0x53 0x27 0x43 0x7c
+
 # CHECK: divdeu 2, 3, 4
 0x12 0x23 0x43 0x7c
 
 # CHECK: divdeu. 2, 3, 4
 0x13 0x23 0x43 0x7c
 
+# CHECK: divdeuo 2, 3, 4
+0x12 0x27 0x43 0x7c
+
+# CHECK: divdeuo. 2, 3, 4
+0x13 0x27 0x43 0x7c
+
 # CHECK: cmpdi 2, 3, 128
 0x80 0x00 0x23 0x2d
 
diff --git a/llvm/test/MC/PowerPC/invalid-instructions-spellcheck.s b/llvm/test/MC/PowerPC/invalid-instructions-spellcheck.s
--- a/llvm/test/MC/PowerPC/invalid-instructions-spellcheck.s
+++ b/llvm/test/MC/PowerPC/invalid-instructions-spellcheck.s
@@ -39,6 +39,6 @@
 
 adXd %r1, %r2, %r3
 
-# CHECK:      error: invalid instruction, did you mean: add, addc, adde, addi, fadd?
+# CHECK:      error: invalid instruction, did you mean: add, addc, adde, addi, addo, fadd?
 # CHECK-NEXT: adXd %r1, %r2, %r3
 # CHECK-NEXT: ^
diff --git a/llvm/test/MC/PowerPC/ppc64-encoding.s b/llvm/test/MC/PowerPC/ppc64-encoding.s
--- a/llvm/test/MC/PowerPC/ppc64-encoding.s
+++ b/llvm/test/MC/PowerPC/ppc64-encoding.s
@@ -339,16 +339,24 @@
 # CHECK-BE: add. 2, 3, 4                    # encoding: [0x7c,0x43,0x22,0x15]
 # CHECK-LE: add. 2, 3, 4                    # encoding: [0x15,0x22,0x43,0x7c]
             add. 2, 3, 4
-# FIXME:    addo 2, 3, 4
-# FIXME:    addo. 2, 3, 4
+# CHECK-BE: addo 2, 3, 4		    # encoding: [0x7c,0x43,0x26,0x14]
+# CHECK-LE: addo 2, 3, 4		    # encoding: [0x14,0x26,0x43,0x7c]
+            addo 2, 3, 4
+# CHECK-BE: addo. 2, 3, 4		    # encoding: [0x7c,0x43,0x26,0x15]
+# CHECK-LE: addo. 2, 3, 4		    # encoding: [0x15,0x26,0x43,0x7c]
+            addo. 2, 3, 4
 # CHECK-BE: subf 2, 3, 4                    # encoding: [0x7c,0x43,0x20,0x50]
 # CHECK-LE: subf 2, 3, 4                    # encoding: [0x50,0x20,0x43,0x7c]
             subf 2, 3, 4
 # CHECK-BE: subf. 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x51]
 # CHECK-LE: subf. 2, 3, 4                   # encoding: [0x51,0x20,0x43,0x7c]
             subf. 2, 3, 4
-# FIXME:    subfo 2, 3, 4
-# FIXME:    subfo. 2, 3, 4
+# CHECK-BE: subfo 2, 3, 4		    # encoding: [0x7c,0x43,0x24,0x50]
+# CHECK-LE: subfo 2, 3, 4		    # encoding: [0x50,0x24,0x43,0x7c]
+            subfo 2, 3, 4
+# CHECK-BE: subfo. 2, 3, 4		    # encoding: [0x7c,0x43,0x24,0x51]
+# CHECK-LE: subfo. 2, 3, 4		    # encoding: [0x51,0x24,0x43,0x7c]
+            subfo. 2, 3, 4
 # CHECK-BE: addic 2, 3, 128                 # encoding: [0x30,0x43,0x00,0x80]
 # CHECK-LE: addic 2, 3, 128                 # encoding: [0x80,0x00,0x43,0x30]
             addic 2, 3, 128
@@ -365,16 +373,24 @@
 # CHECK-BE: addc. 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x15]
 # CHECK-LE: addc. 2, 3, 4                   # encoding: [0x15,0x20,0x43,0x7c]
             addc. 2, 3, 4
-# FIXME:    addco 2, 3, 4
-# FIXME:    addco. 2, 3, 4
+# CHECK-BE: addco 2, 3, 4                   # encoding: [0x7c,0x43,0x24,0x14]
+# CHECK-LE: addco 2, 3, 4                   # encoding: [0x14,0x24,0x43,0x7c]
+            addco 2, 3, 4
+# CHECK-BE: addco. 2, 3, 4                  # encoding: [0x7c,0x43,0x24,0x15]
+# CHECK-LE: addco. 2, 3, 4                  # encoding: [0x15,0x24,0x43,0x7c]
+            addco. 2, 3, 4
 # CHECK-BE: subfc 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x10]
 # CHECK-LE: subfc 2, 3, 4                   # encoding: [0x10,0x20,0x43,0x7c]
             subfc 2, 3, 4
 # CHECK-BE: subfc 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x10]
 # CHECK-LE: subfc 2, 3, 4                   # encoding: [0x10,0x20,0x43,0x7c]
             subfc 2, 3, 4
-# FIXME:    subfco 2, 3, 4
-# FIXME:    subfco. 2, 3, 4
+# CHECK-BE: subfco 2, 3, 4                  # encoding: [0x7c,0x43,0x24,0x10]
+# CHECK-LE: subfco 2, 3, 4                  # encoding: [0x10,0x24,0x43,0x7c]
+            subfco 2, 3, 4
+# CHECK-BE: subfco. 2, 3, 4                 # encoding: [0x7c,0x43,0x24,0x11]
+# CHECK-LE: subfco. 2, 3, 4                 # encoding: [0x11,0x24,0x43,0x7c]
+            subfco. 2, 3, 4
 
 # CHECK-BE: adde 2, 3, 4                    # encoding: [0x7c,0x43,0x21,0x14]
 # CHECK-LE: adde 2, 3, 4                    # encoding: [0x14,0x21,0x43,0x7c]
@@ -382,16 +398,24 @@
 # CHECK-BE: adde. 2, 3, 4                   # encoding: [0x7c,0x43,0x21,0x15]
 # CHECK-LE: adde. 2, 3, 4                   # encoding: [0x15,0x21,0x43,0x7c]
             adde. 2, 3, 4
-# FIXME:    addeo 2, 3, 4
-# FIXME:    addeo. 2, 3, 4
+# CHECK-BE: addeo 2, 3, 4                   # encoding: [0x7c,0x43,0x25,0x14]
+# CHECK-LE: addeo 2, 3, 4                   # encoding: [0x14,0x25,0x43,0x7c]
+            addeo 2, 3, 4
+# CHECK-BE: addeo. 2, 3, 4                  # encoding: [0x7c,0x43,0x25,0x15]
+# CHECK-LE: addeo. 2, 3, 4                  # encoding: [0x15,0x25,0x43,0x7c]
+            addeo. 2, 3, 4
 # CHECK-BE: subfe 2, 3, 4                   # encoding: [0x7c,0x43,0x21,0x10]
 # CHECK-LE: subfe 2, 3, 4                   # encoding: [0x10,0x21,0x43,0x7c]
             subfe 2, 3, 4
 # CHECK-BE: subfe. 2, 3, 4                  # encoding: [0x7c,0x43,0x21,0x11]
 # CHECK-LE: subfe. 2, 3, 4                  # encoding: [0x11,0x21,0x43,0x7c]
             subfe. 2, 3, 4
-# FIXME:    subfeo 2, 3, 4
-# FIXME:    subfeo. 2, 3, 4
+# CHECK-BE: subfeo 2, 3, 4                  # encoding: [0x7c,0x43,0x25,0x10]
+# CHECK-LE: subfeo 2, 3, 4                  # encoding: [0x10,0x25,0x43,0x7c]
+            subfeo 2, 3, 4
+# CHECK-BE: subfeo. 2, 3, 4                 # encoding: [0x7c,0x43,0x25,0x11]
+# CHECK-LE: subfeo. 2, 3, 4                 # encoding: [0x11,0x25,0x43,0x7c]
+            subfeo. 2, 3, 4
 
 # CHECK-BE: addme 2, 3                      # encoding: [0x7c,0x43,0x01,0xd4]
 # CHECK-LE: addme 2, 3                      # encoding: [0xd4,0x01,0x43,0x7c]
@@ -399,16 +423,24 @@
 # CHECK-BE: addme. 2, 3                     # encoding: [0x7c,0x43,0x01,0xd5]
 # CHECK-LE: addme. 2, 3                     # encoding: [0xd5,0x01,0x43,0x7c]
             addme. 2, 3
-# FIXME:    addmeo 2, 3
-# FIXME:    addmeo. 2, 3
+# CHECK-BE: addmeo 2, 3                     # encoding: [0x7c,0x43,0x05,0xd4]
+# CHECK-LE: addmeo 2, 3                     # encoding: [0xd4,0x05,0x43,0x7c]
+            addmeo 2, 3
+# CHECK-BE: addmeo. 2, 3                    # encoding: [0x7c,0x43,0x05,0xd5]
+# CHECK-LE: addmeo. 2, 3                    # encoding: [0xd5,0x05,0x43,0x7c]
+            addmeo. 2, 3
 # CHECK-BE: subfme 2, 3                     # encoding: [0x7c,0x43,0x01,0xd0]
 # CHECK-LE: subfme 2, 3                     # encoding: [0xd0,0x01,0x43,0x7c]
             subfme 2, 3
 # CHECK-BE: subfme. 2, 3                    # encoding: [0x7c,0x43,0x01,0xd1]
 # CHECK-LE: subfme. 2, 3                    # encoding: [0xd1,0x01,0x43,0x7c]
             subfme. 2, 3
-# FIXME:    subfmeo 2, 3
-# FIXME:    subfmeo. 2, 3
+# CHECK-BE: subfmeo 2, 3                    # encoding: [0x7c,0x43,0x05,0xd0]
+# CHECK-LE: subfmeo 2, 3                    # encoding: [0xd0,0x05,0x43,0x7c]
+            subfmeo 2, 3
+# CHECK-BE: subfmeo. 2, 3                   # encoding: [0x7c,0x43,0x05,0xd1]
+# CHECK-LE: subfmeo. 2, 3                   # encoding: [0xd1,0x05,0x43,0x7c]
+            subfmeo. 2, 3
 
 # CHECK-BE: addze 2, 3                      # encoding: [0x7c,0x43,0x01,0x94]
 # CHECK-LE: addze 2, 3                      # encoding: [0x94,0x01,0x43,0x7c]
@@ -416,16 +448,24 @@
 # CHECK-BE: addze. 2, 3                     # encoding: [0x7c,0x43,0x01,0x95]
 # CHECK-LE: addze. 2, 3                     # encoding: [0x95,0x01,0x43,0x7c]
             addze. 2, 3
-# FIXME:    addzeo 2, 3
-# FIXME:    addzeo. 2, 3
+# CHECK-BE: addzeo 2, 3                     # encoding: [0x7c,0x43,0x05,0x94]
+# CHECK-LE: addzeo 2, 3                     # encoding: [0x94,0x05,0x43,0x7c]
+            addzeo 2, 3
+# CHECK-BE: addzeo. 2, 3                    # encoding: [0x7c,0x43,0x05,0x95]
+# CHECK-LE: addzeo. 2, 3                    # encoding: [0x95,0x05,0x43,0x7c]
+            addzeo. 2, 3
 # CHECK-BE: subfze 2, 3                     # encoding: [0x7c,0x43,0x01,0x90]
 # CHECK-LE: subfze 2, 3                     # encoding: [0x90,0x01,0x43,0x7c]
             subfze 2, 3
 # CHECK-BE: subfze. 2, 3                    # encoding: [0x7c,0x43,0x01,0x91]
 # CHECK-LE: subfze. 2, 3                    # encoding: [0x91,0x01,0x43,0x7c]
             subfze. 2, 3
-# FIXME:    subfzeo 2, 3
-# FIXME:    subfzeo. 2, 3
+# CHECK-BE: subfzeo 2, 3                    # encoding: [0x7c,0x43,0x05,0x90]
+# CHECK-LE: subfzeo 2, 3                    # encoding: [0x90,0x05,0x43,0x7c]
+            subfzeo 2, 3
+# CHECK-BE: subfzeo. 2, 3                   # encoding: [0x7c,0x43,0x05,0x91]
+# CHECK-LE: subfzeo. 2, 3                   # encoding: [0x91,0x05,0x43,0x7c]
+            subfzeo. 2, 3
 
 # CHECK-BE: neg 2, 3                        # encoding: [0x7c,0x43,0x00,0xd0]
 # CHECK-LE: neg 2, 3                        # encoding: [0xd0,0x00,0x43,0x7c]
@@ -433,8 +473,12 @@
 # CHECK-BE: neg. 2, 3                       # encoding: [0x7c,0x43,0x00,0xd1]
 # CHECK-LE: neg. 2, 3                       # encoding: [0xd1,0x00,0x43,0x7c]
             neg. 2, 3
-# FIXME:    nego 2, 3
-# FIXME:    nego. 2, 3
+# CHECK-BE: nego 2, 3                       # encoding: [0x7c,0x43,0x04,0xd0]
+# CHECK-LE: nego 2, 3                       # encoding: [0xd0,0x04,0x43,0x7c]
+            nego 2, 3
+# CHECK-BE: nego. 2, 3                      # encoding: [0x7c,0x43,0x04,0xd1]
+# CHECK-LE: nego. 2, 3                      # encoding: [0xd1,0x04,0x43,0x7c]
+            nego. 2, 3
 
 # CHECK-BE: mulli 2, 3, 128                 # encoding: [0x1c,0x43,0x00,0x80]
 # CHECK-LE: mulli 2, 3, 128                 # encoding: [0x80,0x00,0x43,0x1c]
@@ -451,8 +495,12 @@
 # CHECK-BE: mullw. 2, 3, 4                  # encoding: [0x7c,0x43,0x21,0xd7]
 # CHECK-LE: mullw. 2, 3, 4                  # encoding: [0xd7,0x21,0x43,0x7c]
             mullw. 2, 3, 4
-# FIXME:    mullwo 2, 3, 4
-# FIXME:    mullwo. 2, 3, 4
+# CHECK-BE: mullwo 2, 3, 4                  # encoding: [0x7c,0x43,0x25,0xd6]
+# CHECK-LE: mullwo 2, 3, 4                  # encoding: [0xd6,0x25,0x43,0x7c]
+            mullwo 2, 3, 4
+# CHECK-BE: mullwo. 2, 3, 4                 # encoding: [0x7c,0x43,0x25,0xd7]
+# CHECK-LE: mullwo. 2, 3, 4                 # encoding: [0xd7,0x25,0x43,0x7c]
+            mullwo. 2, 3, 4
 # CHECK-BE: mulhwu 2, 3, 4                  # encoding: [0x7c,0x43,0x20,0x16]
 # CHECK-LE: mulhwu 2, 3, 4                  # encoding: [0x16,0x20,0x43,0x7c]
             mulhwu 2, 3, 4
@@ -498,32 +546,48 @@
 # CHECK-BE: divw. 2, 3, 4                   # encoding: [0x7c,0x43,0x23,0xd7]
 # CHECK-LE: divw. 2, 3, 4                   # encoding: [0xd7,0x23,0x43,0x7c]
             divw. 2, 3, 4
-# FIXME:    divwo 2, 3, 4
-# FIXME:    divwo. 2, 3, 4
+# CHECK-BE: divwo 2, 3, 4                   # encoding: [0x7c,0x43,0x27,0xd6]
+# CHECK-LE: divwo 2, 3, 4                   # encoding: [0xd6,0x27,0x43,0x7c]
+            divwo 2, 3, 4
+# CHECK-BE: divwo. 2, 3, 4                  # encoding: [0x7c,0x43,0x27,0xd7]
+# CHECK-LE: divwo. 2, 3, 4                  # encoding: [0xd7,0x27,0x43,0x7c]
+            divwo. 2, 3, 4
 # CHECK-BE: divwu 2, 3, 4                   # encoding: [0x7c,0x43,0x23,0x96]
 # CHECK-LE: divwu 2, 3, 4                   # encoding: [0x96,0x23,0x43,0x7c]
             divwu 2, 3, 4
 # CHECK-BE: divwu. 2, 3, 4                  # encoding: [0x7c,0x43,0x23,0x97]
 # CHECK-LE: divwu. 2, 3, 4                  # encoding: [0x97,0x23,0x43,0x7c]
             divwu. 2, 3, 4
-# FIXME:    divwuo 2, 3, 4
-# FIXME:    divwuo. 2, 3, 4
+# CHECK-BE: divwuo 2, 3, 4                  # encoding: [0x7c,0x43,0x27,0x96]
+# CHECK-LE: divwuo 2, 3, 4                  # encoding: [0x96,0x27,0x43,0x7c]
+            divwuo 2, 3, 4
+# CHECK-BE: divwuo. 2, 3, 4                 # encoding: [0x7c,0x43,0x27,0x97]
+# CHECK-LE: divwuo. 2, 3, 4                 # encoding: [0x97,0x27,0x43,0x7c]
+            divwuo. 2, 3, 4
 # CHECK-BE: divwe 2, 3, 4                   # encoding: [0x7c,0x43,0x23,0x56]
 # CHECK-LE: divwe 2, 3, 4                   # encoding: [0x56,0x23,0x43,0x7c]
             divwe 2, 3, 4
 # CHECK-BE: divwe. 2, 3, 4                  # encoding: [0x7c,0x43,0x23,0x57]
 # CHECK-LE: divwe. 2, 3, 4                  # encoding: [0x57,0x23,0x43,0x7c]
             divwe. 2, 3, 4
-# FIXME:    divweo 2, 3, 4
-# FIXME:    divweo. 2, 3, 4
+# CHECK-BE: divweo 2, 3, 4                  # encoding: [0x7c,0x43,0x27,0x56]
+# CHECK-LE: divweo 2, 3, 4                  # encoding: [0x56,0x27,0x43,0x7c]
+            divweo 2, 3, 4
+# CHECK-BE: divweo. 2, 3, 4                 # encoding: [0x7c,0x43,0x27,0x57]
+# CHECK-LE: divweo. 2, 3, 4                 # encoding: [0x57,0x27,0x43,0x7c]
+            divweo. 2, 3, 4
 # CHECK-BE: divweu 2, 3, 4                  # encoding: [0x7c,0x43,0x23,0x16]
 # CHECK-LE: divweu 2, 3, 4                  # encoding: [0x16,0x23,0x43,0x7c]
             divweu 2, 3, 4
 # CHECK-BE: divweu. 2, 3, 4                 # encoding: [0x7c,0x43,0x23,0x17]
 # CHECK-LE: divweu. 2, 3, 4                 # encoding: [0x17,0x23,0x43,0x7c]
             divweu. 2, 3, 4
-# FIXME:    divweuo 2, 3, 4
-# FIXME:    divweuo. 2, 3, 4
+# CHECK-BE: divweuo 2, 3, 4                 # encoding: [0x7c,0x43,0x27,0x16]
+# CHECK-LE: divweuo 2, 3, 4                 # encoding: [0x16,0x27,0x43,0x7c]
+            divweuo 2, 3, 4
+# CHECK-BE: divweuo. 2, 3, 4                # encoding: [0x7c,0x43,0x27,0x17]
+# CHECK-LE: divweuo. 2, 3, 4                # encoding: [0x17,0x27,0x43,0x7c]
+            divweuo. 2, 3, 4
 
 # CHECK-BE: modsw 2, 3, 4                   # encoding: [0x7c,0x43,0x26,0x16]
 # CHECK-LE: modsw 2, 3, 4                   # encoding: [0x16,0x26,0x43,0x7c]
@@ -544,8 +608,12 @@
 # CHECK-BE: mulld. 2, 3, 4                  # encoding: [0x7c,0x43,0x21,0xd3]
 # CHECK-LE: mulld. 2, 3, 4                  # encoding: [0xd3,0x21,0x43,0x7c]
             mulld. 2, 3, 4
-# FIXME:    mulldo 2, 3, 4
-# FIXME:    mulldo. 2, 3, 4
+# CHECK-BE: mulldo 2, 3, 4                  # encoding: [0x7c,0x43,0x25,0xd2]
+# CHECK-LE: mulldo 2, 3, 4                  # encoding: [0xd2,0x25,0x43,0x7c]
+            mulldo 2, 3, 4
+# CHECK-BE: mulldo. 2, 3, 4                 # encoding: [0x7c,0x43,0x25,0xd3]
+# CHECK-LE: mulldo. 2, 3, 4                 # encoding: [0xd3,0x25,0x43,0x7c]
+            mulldo. 2, 3, 4
 # CHECK-BE: mulhd 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x92]
 # CHECK-LE: mulhd 2, 3, 4                   # encoding: [0x92,0x20,0x43,0x7c]
             mulhd 2, 3, 4
@@ -565,32 +633,48 @@
 # CHECK-BE: divd. 2, 3, 4                   # encoding: [0x7c,0x43,0x23,0xd3]
 # CHECK-LE: divd. 2, 3, 4                   # encoding: [0xd3,0x23,0x43,0x7c]
             divd. 2, 3, 4
-# FIXME:    divdo 2, 3, 4
-# FIXME:    divdo. 2, 3, 4
+# CHECK-BE: divdo 2, 3, 4                   # encoding: [0x7c,0x43,0x27,0xd2]
+# CHECK-LE: divdo 2, 3, 4                   # encoding: [0xd2,0x27,0x43,0x7c]
+            divdo 2, 3, 4
+# CHECK-BE: divdo. 2, 3, 4                  # encoding: [0x7c,0x43,0x27,0xd3]
+# CHECK-LE: divdo. 2, 3, 4                  # encoding: [0xd3,0x27,0x43,0x7c]
+            divdo. 2, 3, 4
 # CHECK-BE: divdu 2, 3, 4                   # encoding: [0x7c,0x43,0x23,0x92]
 # CHECK-LE: divdu 2, 3, 4                   # encoding: [0x92,0x23,0x43,0x7c]
             divdu 2, 3, 4
 # CHECK-BE: divdu. 2, 3, 4                  # encoding: [0x7c,0x43,0x23,0x93]
 # CHECK-LE: divdu. 2, 3, 4                  # encoding: [0x93,0x23,0x43,0x7c]
             divdu. 2, 3, 4
-# FIXME:    divduo 2, 3, 4
-# FIXME:    divduo. 2, 3, 4
+# CHECK-BE: divduo 2, 3, 4                  # encoding: [0x7c,0x43,0x27,0x92]
+# CHECK-LE: divduo 2, 3, 4                  # encoding: [0x92,0x27,0x43,0x7c]
+            divduo 2, 3, 4
+# CHECK-BE: divduo. 2, 3, 4                 # encoding: [0x7c,0x43,0x27,0x93]
+# CHECK-LE: divduo. 2, 3, 4                 # encoding: [0x93,0x27,0x43,0x7c]
+            divduo. 2, 3, 4
 # CHECK-BE: divde 2, 3, 4                   # encoding: [0x7c,0x43,0x23,0x52]
 # CHECK-LE: divde 2, 3, 4                   # encoding: [0x52,0x23,0x43,0x7c]
             divde 2, 3, 4
 # CHECK-BE: divde. 2, 3, 4                  # encoding: [0x7c,0x43,0x23,0x53]
 # CHECK-LE: divde. 2, 3, 4                  # encoding: [0x53,0x23,0x43,0x7c]
             divde. 2, 3, 4
-# FIXME:    divdeo 2, 3, 4
-# FIXME:    divdeo. 2, 3, 4
+# CHECK-BE: divdeo 2, 3, 4                  # encoding: [0x7c,0x43,0x27,0x52]
+# CHECK-LE: divdeo 2, 3, 4                  # encoding: [0x52,0x27,0x43,0x7c]
+            divdeo 2, 3, 4
+# CHECK-BE: divdeo. 2, 3, 4                 # encoding: [0x7c,0x43,0x27,0x53]
+# CHECK-LE: divdeo. 2, 3, 4                 # encoding: [0x53,0x27,0x43,0x7c]
+            divdeo. 2, 3, 4
 # CHECK-BE: divdeu 2, 3, 4                  # encoding: [0x7c,0x43,0x23,0x12]
 # CHECK-LE: divdeu 2, 3, 4                  # encoding: [0x12,0x23,0x43,0x7c]
             divdeu 2, 3, 4
 # CHECK-BE: divdeu. 2, 3, 4                 # encoding: [0x7c,0x43,0x23,0x13]
 # CHECK-LE: divdeu. 2, 3, 4                 # encoding: [0x13,0x23,0x43,0x7c]
             divdeu. 2, 3, 4
-# FIXME:    divdeuo 2, 3, 4
-# FIXME:    divdeuo. 2, 3, 4
+# CHECK-BE: divdeuo 2, 3, 4                 # encoding: [0x7c,0x43,0x27,0x12]
+# CHECK-LE: divdeuo 2, 3, 4                 # encoding: [0x12,0x27,0x43,0x7c]
+            divdeuo 2, 3, 4
+# CHECK-BE: divdeuo. 2, 3, 4                # encoding: [0x7c,0x43,0x27,0x13]
+# CHECK-LE: divdeuo. 2, 3, 4                # encoding: [0x13,0x27,0x43,0x7c]
+            divdeuo. 2, 3, 4
 
 # Fixed-point compare instructions