Index: llvm/trunk/lib/Target/X86/X86InstrInfo.td =================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.td +++ llvm/trunk/lib/Target/X86/X86InstrInfo.td @@ -954,11 +954,6 @@ IIC_POP_REG>, OpSize32, Requires<[Not64BitMode]>; def POP32rmm: I<0x8F, MRM0m, (outs), (ins i32mem:$dst), "pop{l}\t$dst", [], IIC_POP_MEM>, OpSize32, Requires<[Not64BitMode]>; - -def POPF16 : I<0x9D, RawFrm, (outs), (ins), "popf{w}", [], IIC_POP_F>, - OpSize16; -def POPF32 : I<0x9D, RawFrm, (outs), (ins), "popf{l|d}", [], IIC_POP_FD>, - OpSize32, Requires<[Not64BitMode]>; } // mayLoad, SchedRW let mayStore = 1, SchedRW = [WriteStore] in { @@ -987,13 +982,23 @@ def PUSHi32 : Ii32<0x68, RawFrm, (outs), (ins i32imm:$imm), "push{l}\t$imm", [], IIC_PUSH_IMM>, OpSize32, Requires<[Not64BitMode]>; +} // mayStore, SchedRW +} + +let Defs = [ESP, EFLAGS], Uses = [ESP], mayLoad = 1, hasSideEffects=0, + SchedRW = [WriteLoad] in { +def POPF16 : I<0x9D, RawFrm, (outs), (ins), "popf{w}", [], IIC_POP_F>, + OpSize16; +def POPF32 : I<0x9D, RawFrm, (outs), (ins), "popf{l|d}", [], IIC_POP_FD>, + OpSize32, Requires<[Not64BitMode]>; +} +let Defs = [ESP], Uses = [ESP, EFLAGS], mayStore = 1, hasSideEffects=0, + SchedRW = [WriteStore] in { def PUSHF16 : I<0x9C, RawFrm, (outs), (ins), "pushf{w}", [], IIC_PUSH_F>, OpSize16; def PUSHF32 : I<0x9C, RawFrm, (outs), (ins), "pushf{l|d}", [], IIC_PUSH_F>, OpSize32, Requires<[Not64BitMode]>; - -} // mayStore, SchedRW } let Defs = [RSP], Uses = [RSP], hasSideEffects=0 in { Index: llvm/trunk/test/CodeGen/X86/2012-01-16-mfence-nosse-flags.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/2012-01-16-mfence-nosse-flags.ll +++ llvm/trunk/test/CodeGen/X86/2012-01-16-mfence-nosse-flags.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=i686-linux -mattr=-sse | FileCheck %s +; RUN: llc < %s -verify-machineinstrs -mtriple=i686-linux -mattr=-sse | FileCheck %s ; PR11768 @ptr = external global i8* Index: llvm/trunk/test/CodeGen/X86/clobber-fi0.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/clobber-fi0.ll +++ llvm/trunk/test/CodeGen/X86/clobber-fi0.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s +; RUN: llc < %s -verify-machineinstrs -mcpu=generic -mtriple=x86_64-linux | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-apple-macosx10.7.0" Index: llvm/trunk/test/CodeGen/X86/cmov.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/cmov.ll +++ llvm/trunk/test/CodeGen/X86/cmov.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -disable-cgp-select2branch | FileCheck %s +; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-apple-darwin10 -disable-cgp-select2branch | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" define i32 @test1(i32 %x, i32 %n, i32 %w, i32* %vp) nounwind readnone { Index: llvm/trunk/test/CodeGen/X86/cmpxchg-clobber-flags.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/cmpxchg-clobber-flags.ll +++ llvm/trunk/test/CodeGen/X86/cmpxchg-clobber-flags.ll @@ -1,19 +1,21 @@ -; RUN: llc -mtriple=x86_64-linux-gnu %s -o - | FileCheck %s -; RUN: llc -mtriple=x86_64-linux-gnu -pre-RA-sched=fast %s -o - | FileCheck %s +; RUN: llc -verify-machineinstrs -mtriple=i386-linux-gnu %s -o - | FileCheck %s +; RUN: llc -verify-machineinstrs -mtriple=i386-linux-gnu -pre-RA-sched=fast %s -o - | FileCheck %s +; RUN: llc -verify-machineinstrs -mtriple=x86_64-linux-gnu %s -o - | FileCheck %s +; RUN: llc -verify-machineinstrs -mtriple=x86_64-linux-gnu -pre-RA-sched=fast %s -o - | FileCheck %s declare i32 @bar() define i64 @test_intervening_call(i64* %foo, i64 %bar, i64 %baz) { ; CHECK-LABEL: test_intervening_call: ; CHECK: cmpxchg -; CHECK: pushfq -; CHECK: popq [[FLAGS:%.*]] +; CHECK: pushf[[LQ:[lq]]] +; CHECK-NEXT: pop[[LQ]] [[FLAGS:%.*]] -; CHECK: callq bar +; CHECK-NEXT: call[[LQ]] bar -; CHECK: pushq [[FLAGS]] -; CHECK: popfq -; CHECK: jne +; CHECK-NEXT: push[[LQ]] [[FLAGS]] +; CHECK-NEXT: popf[[LQ]] +; CHECK-NEXT: jne %cx = cmpxchg i64* %foo, i64 %bar, i64 %baz seq_cst seq_cst %p = extractvalue { i64, i1 } %cx, 1 call i32 @bar() @@ -68,14 +70,13 @@ ; CHECK-LABEL: test_feed_cmov: ; CHECK: cmpxchg -; CHECK: pushfq -; CHECK: popq [[FLAGS:%.*]] - -; CHECK: callq bar +; CHECK: pushf[[LQ:[lq]]] +; CHECK-NEXT: pop[[LQ]] [[FLAGS:%.*]] -; CHECK: pushq [[FLAGS]] -; CHECK: popfq +; CHECK-NEXT: call[[LQ]] bar +; CHECK-NEXT: push[[LQ]] [[FLAGS]] +; CHECK-NEXT: popf[[LQ]] %res = cmpxchg i32* %addr, i32 %desired, i32 %new seq_cst seq_cst %success = extractvalue { i32, i1 } %res, 1 Index: llvm/trunk/test/CodeGen/X86/coalescer-dce.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/coalescer-dce.ll +++ llvm/trunk/test/CodeGen/X86/coalescer-dce.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -disable-fp-elim -disable-machine-dce -verify-coalescing +; RUN: llc < %s -verify-machineinstrs -disable-fp-elim -disable-machine-dce -verify-coalescing target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64-apple-macosx10.7.0" Index: llvm/trunk/test/CodeGen/X86/misched-copy.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/misched-copy.ll +++ llvm/trunk/test/CodeGen/X86/misched-copy.ll @@ -1,5 +1,5 @@ ; REQUIRES: asserts -; RUN: llc < %s -march=x86 -mcpu=core2 -pre-RA-sched=source -enable-misched -verify-misched -debug-only=misched -o - 2>&1 > /dev/null | FileCheck %s +; RUN: llc < %s -verify-machineinstrs -march=x86 -mcpu=core2 -pre-RA-sched=source -enable-misched -verify-misched -debug-only=misched -o - 2>&1 > /dev/null | FileCheck %s ; ; Test scheduling of copy instructions. ; Index: llvm/trunk/test/CodeGen/X86/misched-crash.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/misched-crash.ll +++ llvm/trunk/test/CodeGen/X86/misched-crash.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -enable-misched -verify-misched +; RUN: llc < %s -verify-machineinstrs -enable-misched -verify-misched target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-apple-macosx10" Index: llvm/trunk/test/CodeGen/X86/norex-subreg.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/norex-subreg.ll +++ llvm/trunk/test/CodeGen/X86/norex-subreg.ll @@ -1,5 +1,5 @@ -; RUN: llc -O0 < %s -; RUN: llc < %s +; RUN: llc -O0 < %s -verify-machineinstrs +; RUN: llc < %s -verify-machineinstrs target triple = "x86_64-apple-macosx10.7" ; This test case extracts a sub_8bit_hi sub-register: Index: llvm/trunk/test/CodeGen/X86/peep-test-2.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/peep-test-2.ll +++ llvm/trunk/test/CodeGen/X86/peep-test-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -verify-machineinstrs -march=x86 | FileCheck %s ; CHECK: testl Index: llvm/trunk/test/CodeGen/X86/phys_subreg_coalesce-3.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/phys_subreg_coalesce-3.ll +++ llvm/trunk/test/CodeGen/X86/phys_subreg_coalesce-3.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=corei7 | FileCheck %s +; RUN: llc < %s -verify-machineinstrs -mtriple=i386-apple-darwin -mcpu=corei7 | FileCheck %s ; rdar://5571034 ; This requires physreg joining, %vreg13 is live everywhere: Index: llvm/trunk/test/CodeGen/X86/pre-ra-sched.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/pre-ra-sched.ll +++ llvm/trunk/test/CodeGen/X86/pre-ra-sched.ll @@ -1,4 +1,4 @@ -; RUN-disabled: llc < %s -mtriple=x86_64-apple-macosx -pre-RA-sched=ilp -debug-only=pre-RA-sched \ +; RUN-disabled: llc < %s -verify-machineinstrs -mtriple=x86_64-apple-macosx -pre-RA-sched=ilp -debug-only=pre-RA-sched \ ; RUN-disabled: 2>&1 | FileCheck %s ; RUN: true ; REQUIRES: asserts Index: llvm/trunk/test/CodeGen/X86/remat-phys-dead.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/remat-phys-dead.ll +++ llvm/trunk/test/CodeGen/X86/remat-phys-dead.ll @@ -1,5 +1,5 @@ ; REQUIRES: asserts -; RUN: llc -mtriple=x86_64-apple-darwin -debug -o /dev/null < %s 2>&1 | FileCheck %s +; RUN: llc -verify-machineinstrs -mtriple=x86_64-apple-darwin -debug -o /dev/null < %s 2>&1 | FileCheck %s ; We need to make sure that rematerialization into a physical register marks the ; super- or sub-register as dead after this rematerialization since only the Index: llvm/trunk/test/CodeGen/X86/sink-hoist.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/sink-hoist.ll +++ llvm/trunk/test/CodeGen/X86/sink-hoist.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -asm-verbose=false -mtriple=x86_64-unknown-linux-gnu -mcpu=nehalem -post-RA-scheduler=true -schedmodel=false | FileCheck %s +; RUN: llc < %s -verify-machineinstrs -march=x86-64 -asm-verbose=false -mtriple=x86_64-unknown-linux-gnu -mcpu=nehalem -post-RA-scheduler=true -schedmodel=false | FileCheck %s ; Currently, floating-point selects are lowered to CFG triangles. ; This means that one side of the select is always unconditionally Index: llvm/trunk/test/CodeGen/X86/vaargs.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/vaargs.ll +++ llvm/trunk/test/CodeGen/X86/vaargs.ll @@ -1,4 +1,4 @@ -; RUN: llc -mcpu=corei7-avx %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=NO-FLAGS +; RUN: llc -verify-machineinstrs -mcpu=corei7-avx %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=NO-FLAGS target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-apple-macosx10.9.0"