diff --git a/clang/lib/Parse/ParseStmtAsm.cpp b/clang/lib/Parse/ParseStmtAsm.cpp --- a/clang/lib/Parse/ParseStmtAsm.cpp +++ b/clang/lib/Parse/ParseStmtAsm.cpp @@ -582,7 +582,10 @@ llvm::join(TO.Features.begin(), TO.Features.end(), ","); std::unique_ptr MRI(TheTarget->createMCRegInfo(TT)); - std::unique_ptr MAI(TheTarget->createMCAsmInfo(*MRI, TT)); + // FIXME: init MCOptions from sanitizer flags here. + llvm::MCTargetOptions MCOptions; + std::unique_ptr MAI( + TheTarget->createMCAsmInfo(*MRI, TT, MCOptions)); // Get the instruction descriptor. std::unique_ptr MII(TheTarget->createMCInstrInfo()); std::unique_ptr MOFI(new llvm::MCObjectFileInfo()); @@ -602,8 +605,6 @@ std::unique_ptr Parser( createMCAsmParser(TempSrcMgr, Ctx, *Str.get(), *MAI)); - // FIXME: init MCOptions from sanitizer flags here. - llvm::MCTargetOptions MCOptions; std::unique_ptr TargetParser( TheTarget->createMCAsmParser(*STI, *Parser, *MII, MCOptions)); diff --git a/clang/tools/driver/cc1as_main.cpp b/clang/tools/driver/cc1as_main.cpp --- a/clang/tools/driver/cc1as_main.cpp +++ b/clang/tools/driver/cc1as_main.cpp @@ -353,7 +353,9 @@ std::unique_ptr MRI(TheTarget->createMCRegInfo(Opts.Triple)); assert(MRI && "Unable to create target register info!"); - std::unique_ptr MAI(TheTarget->createMCAsmInfo(*MRI, Opts.Triple)); + MCTargetOptions MCOptions; + std::unique_ptr MAI( + TheTarget->createMCAsmInfo(*MRI, Opts.Triple, MCOptions)); assert(MAI && "Unable to create target asm info!"); // Ensure MCAsmInfo initialization occurs before any use, otherwise sections @@ -377,7 +379,6 @@ // MCObjectFileInfo needs a MCContext reference in order to initialize itself. std::unique_ptr MOFI(new MCObjectFileInfo()); - MCTargetOptions MCOptions; MCContext Ctx(MAI.get(), MRI.get(), MOFI.get(), &SrcMgr, &MCOptions); bool PIC = false; diff --git a/lldb/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp b/lldb/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp --- a/lldb/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp +++ b/lldb/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp @@ -20,6 +20,7 @@ #include "llvm/MC/MCInstrInfo.h" #include "llvm/MC/MCRegisterInfo.h" #include "llvm/MC/MCSubtargetInfo.h" +#include "llvm/MC/MCTargetOptions.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/ScopedPrinter.h" #include "llvm/Support/TargetRegistry.h" @@ -949,8 +950,9 @@ if (!subtarget_info_up) return Instance(); + llvm::MCTargetOptions MCOptions; std::unique_ptr asm_info_up( - curr_target->createMCAsmInfo(*reg_info_up, triple)); + curr_target->createMCAsmInfo(*reg_info_up, triple, MCOptions)); if (!asm_info_up) return Instance(); @@ -1212,7 +1214,7 @@ if (llvm_arch == llvm::Triple::arm) { std::string thumb_triple(thumb_arch.GetTriple().getTriple()); m_alternate_disasm_up = - MCDisasmInstance::Create(thumb_triple.c_str(), "", features_str.c_str(), + MCDisasmInstance::Create(thumb_triple.c_str(), "", features_str.c_str(), flavor, *this); if (!m_alternate_disasm_up) m_disasm_up.reset(); diff --git a/lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp b/lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp --- a/lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp +++ b/lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp @@ -28,6 +28,7 @@ #include "llvm/MC/MCInstrInfo.h" #include "llvm/MC/MCRegisterInfo.h" #include "llvm/MC/MCSubtargetInfo.h" +#include "llvm/MC/MCTargetOptions.h" #include "llvm/Support/TargetRegistry.h" #include "llvm/Support/TargetSelect.h" @@ -149,7 +150,9 @@ m_insn_info.reset(target->createMCInstrInfo()); assert(m_insn_info.get()); - m_asm_info.reset(target->createMCAsmInfo(*m_reg_info, triple.getTriple())); + llvm::MCTargetOptions MCOptions; + m_asm_info.reset( + target->createMCAsmInfo(*m_reg_info, triple.getTriple(), MCOptions)); m_subtype_info.reset( target->createMCSubtargetInfo(triple.getTriple(), cpu, features)); assert(m_asm_info.get() && m_subtype_info.get()); diff --git a/lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp b/lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp --- a/lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp +++ b/lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp @@ -28,6 +28,7 @@ #include "llvm/MC/MCInstrInfo.h" #include "llvm/MC/MCRegisterInfo.h" #include "llvm/MC/MCSubtargetInfo.h" +#include "llvm/MC/MCTargetOptions.h" #include "llvm/Support/TargetRegistry.h" #include "llvm/Support/TargetSelect.h" @@ -153,7 +154,9 @@ m_insn_info.reset(target->createMCInstrInfo()); assert(m_insn_info.get()); - m_asm_info.reset(target->createMCAsmInfo(*m_reg_info, triple.getTriple())); + llvm::MCTargetOptions MCOptions; + m_asm_info.reset( + target->createMCAsmInfo(*m_reg_info, triple.getTriple(), MCOptions)); m_subtype_info.reset( target->createMCSubtargetInfo(triple.getTriple(), cpu, features)); assert(m_asm_info.get() && m_subtype_info.get()); @@ -1360,7 +1363,7 @@ if (!success) return false; - if (!strcasecmp(op_name, "BEQ") || !strcasecmp(op_name, "BEQL") + if (!strcasecmp(op_name, "BEQ") || !strcasecmp(op_name, "BEQL") || !strcasecmp(op_name, "BEQ64") ) { if (rs_val == rt_val) target = pc + offset; @@ -1602,7 +1605,7 @@ target = pc + offset; else target = pc + 8; - } else if (!strcasecmp(op_name, "BLEZL") || !strcasecmp(op_name, "BLEZ") + } else if (!strcasecmp(op_name, "BLEZL") || !strcasecmp(op_name, "BLEZ") || !strcasecmp(op_name, "BLEZ64")) { if (rs_val <= 0) target = pc + offset; diff --git a/llvm/include/llvm/Support/TargetRegistry.h b/llvm/include/llvm/Support/TargetRegistry.h --- a/llvm/include/llvm/Support/TargetRegistry.h +++ b/llvm/include/llvm/Support/TargetRegistry.h @@ -128,7 +128,8 @@ using ArchMatchFnTy = bool (*)(Triple::ArchType Arch); using MCAsmInfoCtorFnTy = MCAsmInfo *(*)(const MCRegisterInfo &MRI, - const Triple &TT); + const Triple &TT, + const MCTargetOptions &Options); using MCInstrInfoCtorFnTy = MCInstrInfo *(*)(); using MCInstrAnalysisCtorFnTy = MCInstrAnalysis *(*)(const MCInstrInfo *Info); using MCRegInfoCtorFnTy = MCRegisterInfo *(*)(const Triple &TT); @@ -335,11 +336,11 @@ /// feature set; it should always be provided. Generally this should be /// either the target triple from the module, or the target triple of the /// host if that does not exist. - MCAsmInfo *createMCAsmInfo(const MCRegisterInfo &MRI, - StringRef TheTriple) const { + MCAsmInfo *createMCAsmInfo(const MCRegisterInfo &MRI, StringRef TheTriple, + const MCTargetOptions &Options) const { if (!MCAsmInfoCtorFn) return nullptr; - return MCAsmInfoCtorFn(MRI, Triple(TheTriple)); + return MCAsmInfoCtorFn(MRI, Triple(TheTriple), Options); } /// createMCInstrInfo - Create a MCInstrInfo implementation. @@ -948,9 +949,9 @@ } private: - static MCAsmInfo *Allocator(const MCRegisterInfo & /*MRI*/, - const Triple &TT) { - return new MCAsmInfoImpl(TT); + static MCAsmInfo *Allocator(const MCRegisterInfo & /*MRI*/, const Triple &TT, + const MCTargetOptions &Options) { + return new MCAsmInfoImpl(TT, Options); } }; diff --git a/llvm/lib/CodeGen/LLVMTargetMachine.cpp b/llvm/lib/CodeGen/LLVMTargetMachine.cpp --- a/llvm/lib/CodeGen/LLVMTargetMachine.cpp +++ b/llvm/lib/CodeGen/LLVMTargetMachine.cpp @@ -48,8 +48,8 @@ STI.reset(TheTarget.createMCSubtargetInfo( getTargetTriple().str(), getTargetCPU(), getTargetFeatureString())); - MCAsmInfo *TmpAsmInfo = - TheTarget.createMCAsmInfo(*MRI, getTargetTriple().str()); + MCAsmInfo *TmpAsmInfo = TheTarget.createMCAsmInfo( + *MRI, getTargetTriple().str(), Options.MCOptions); // TargetSelect.h moved to a different directory between LLVM 2.9 and 3.0, // and if the old one gets included then MCAsmInfo will be NULL and // we'll crash later. diff --git a/llvm/lib/MC/MCDisassembler/Disassembler.cpp b/llvm/lib/MC/MCDisassembler/Disassembler.cpp --- a/llvm/lib/MC/MCDisassembler/Disassembler.cpp +++ b/llvm/lib/MC/MCDisassembler/Disassembler.cpp @@ -24,6 +24,7 @@ #include "llvm/MC/MCRegisterInfo.h" #include "llvm/MC/MCSchedule.h" #include "llvm/MC/MCSubtargetInfo.h" +#include "llvm/MC/MCTargetOptions.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/FormattedStream.h" #include "llvm/Support/TargetRegistry.h" @@ -56,8 +57,10 @@ if (!MRI) return nullptr; + MCTargetOptions MCOptions; // Get the assembler info needed to setup the MCContext. - std::unique_ptr MAI(TheTarget->createMCAsmInfo(*MRI, TT)); + std::unique_ptr MAI( + TheTarget->createMCAsmInfo(*MRI, TT, MCOptions)); if (!MAI) return nullptr; diff --git a/llvm/lib/Object/ModuleSymbolTable.cpp b/llvm/lib/Object/ModuleSymbolTable.cpp --- a/llvm/lib/Object/ModuleSymbolTable.cpp +++ b/llvm/lib/Object/ModuleSymbolTable.cpp @@ -83,7 +83,8 @@ if (!MRI) return; - std::unique_ptr MAI(T->createMCAsmInfo(*MRI, TT.str())); + MCTargetOptions MCOptions; + std::unique_ptr MAI(T->createMCAsmInfo(*MRI, TT.str(), MCOptions)); if (!MAI) return; @@ -109,7 +110,6 @@ std::unique_ptr Parser( createMCAsmParser(SrcMgr, MCCtx, Streamer, *MAI)); - MCTargetOptions MCOptions; std::unique_ptr TAP( T->createMCAsmParser(*STI, *Parser, *MCII, MCOptions)); if (!TAP) diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp --- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp @@ -238,7 +238,8 @@ } static MCAsmInfo *createAArch64MCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TheTriple) { + const Triple &TheTriple, + const MCTargetOptions &Options) { MCAsmInfo *MAI; if (TheTriple.isOSBinFormatMachO()) MAI = new AArch64MCAsmInfoDarwin(TheTriple.getArch() == Triple::aarch64_32); diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.h b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.h --- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.h +++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.h @@ -25,7 +25,7 @@ // with 'L' as a local symbol. class AMDGPUMCAsmInfo : public MCAsmInfoELF { public: - explicit AMDGPUMCAsmInfo(const Triple &TT); + explicit AMDGPUMCAsmInfo(const Triple &TT, const MCTargetOptions &Options); bool shouldOmitSectionDirective(StringRef SectionName) const override; unsigned getMaxInstLength(const MCSubtargetInfo *STI) const override; }; diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp --- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp +++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp @@ -14,7 +14,9 @@ using namespace llvm; -AMDGPUMCAsmInfo::AMDGPUMCAsmInfo(const Triple &TT) : MCAsmInfoELF() { +AMDGPUMCAsmInfo::AMDGPUMCAsmInfo(const Triple &TT, + const MCTargetOptions &Options) + : MCAsmInfoELF() { CodePointerSize = (TT.getArch() == Triple::amdgcn) ? 8 : 4; StackGrowsUp = true; HasSingleParameterDotFile = false; diff --git a/llvm/lib/Target/ARC/MCTargetDesc/ARCMCTargetDesc.cpp b/llvm/lib/Target/ARC/MCTargetDesc/ARCMCTargetDesc.cpp --- a/llvm/lib/Target/ARC/MCTargetDesc/ARCMCTargetDesc.cpp +++ b/llvm/lib/Target/ARC/MCTargetDesc/ARCMCTargetDesc.cpp @@ -52,7 +52,8 @@ } static MCAsmInfo *createARCMCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TT) { + const Triple &TT, + const MCTargetOptions &Options) { MCAsmInfo *MAI = new ARCMCAsmInfo(TT); // Initial state of the frame pointer is SP. diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp @@ -187,7 +187,8 @@ } static MCAsmInfo *createARMMCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TheTriple) { + const Triple &TheTriple, + const MCTargetOptions &Options) { MCAsmInfo *MAI; if (TheTriple.isOSDarwin() || TheTriple.isOSBinFormatMachO()) MAI = new ARMMCAsmInfoDarwin(TheTriple); diff --git a/llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.h b/llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.h --- a/llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.h +++ b/llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.h @@ -22,7 +22,7 @@ /// Specifies the format of AVR assembly files. class AVRMCAsmInfo : public MCAsmInfo { public: - explicit AVRMCAsmInfo(const Triple &TT); + explicit AVRMCAsmInfo(const Triple &TT, const MCTargetOptions &Options); }; } // end namespace llvm diff --git a/llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp b/llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp --- a/llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp +++ b/llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp @@ -16,7 +16,7 @@ namespace llvm { -AVRMCAsmInfo::AVRMCAsmInfo(const Triple &TT) { +AVRMCAsmInfo::AVRMCAsmInfo(const Triple &TT, const MCTargetOptions &Options) { CodePointerSize = 2; CalleeSaveStackSlotSize = 2; CommentString = ";"; diff --git a/llvm/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h b/llvm/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h --- a/llvm/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h +++ b/llvm/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h @@ -21,7 +21,7 @@ class BPFMCAsmInfo : public MCAsmInfo { public: - explicit BPFMCAsmInfo(const Triple &TT) { + explicit BPFMCAsmInfo(const Triple &TT, const MCTargetOptions &Options) { if (TT.getArch() == Triple::bpfeb) IsLittleEndian = false; diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp --- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp +++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp @@ -219,7 +219,8 @@ } static MCAsmInfo *createHexagonMCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TT) { + const Triple &TT, + const MCTargetOptions &Options) { MCAsmInfo *MAI = new HexagonMCAsmInfo(TT); // VirtualFP = (R30 + #0). diff --git a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.h b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.h --- a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.h +++ b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.h @@ -22,7 +22,8 @@ void anchor() override; public: - explicit LanaiMCAsmInfo(const Triple &TheTriple); + explicit LanaiMCAsmInfo(const Triple &TheTriple, + const MCTargetOptions &Options); }; } // namespace llvm diff --git a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp --- a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp +++ b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp @@ -18,7 +18,8 @@ void LanaiMCAsmInfo::anchor() {} -LanaiMCAsmInfo::LanaiMCAsmInfo(const Triple & /*TheTriple*/) { +LanaiMCAsmInfo::LanaiMCAsmInfo(const Triple & /*TheTriple*/, + const MCTargetOptions &Options) { IsLittleEndian = false; PrivateGlobalPrefix = ".L"; WeakRefDirective = "\t.weak\t"; diff --git a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h --- a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h +++ b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h @@ -22,7 +22,7 @@ void anchor() override; public: - explicit MSP430MCAsmInfo(const Triple &TT); + explicit MSP430MCAsmInfo(const Triple &TT, const MCTargetOptions &Options); }; } // namespace llvm diff --git a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp --- a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp +++ b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp @@ -15,7 +15,8 @@ void MSP430MCAsmInfo::anchor() { } -MSP430MCAsmInfo::MSP430MCAsmInfo(const Triple &TT) { +MSP430MCAsmInfo::MSP430MCAsmInfo(const Triple &TT, + const MCTargetOptions &Options) { CodePointerSize = CalleeSaveStackSlotSize = 2; CommentString = ";"; diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h --- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h +++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h @@ -22,7 +22,8 @@ void anchor() override; public: - explicit MipsMCAsmInfo(const Triple &TheTriple); + explicit MipsMCAsmInfo(const Triple &TheTriple, + const MCTargetOptions &Options); }; } // namespace llvm diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp --- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp +++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp @@ -11,25 +11,27 @@ //===----------------------------------------------------------------------===// #include "MipsMCAsmInfo.h" +#include "MipsABIInfo.h" #include "llvm/ADT/Triple.h" using namespace llvm; void MipsMCAsmInfo::anchor() { } -MipsMCAsmInfo::MipsMCAsmInfo(const Triple &TheTriple) { +MipsMCAsmInfo::MipsMCAsmInfo(const Triple &TheTriple, + const MCTargetOptions &Options) { IsLittleEndian = TheTriple.isLittleEndian(); - if (TheTriple.isMIPS64() && TheTriple.getEnvironment() != Triple::GNUABIN32) + MipsABIInfo ABI = MipsABIInfo::computeTargetABI(TheTriple, "", Options); + + if (TheTriple.isMIPS64() && !ABI.IsN32()) CodePointerSize = CalleeSaveStackSlotSize = 8; - // FIXME: This condition isn't quite right but it's the best we can do until - // this object can identify the ABI. It will misbehave when using O32 - // on a mips64*-* triple. - if (TheTriple.isMIPS32()) { + if (ABI.IsO32()) PrivateGlobalPrefix = "$"; - PrivateLabelPrefix = "$"; - } + else if (ABI.IsN32() || ABI.IsN64()) + PrivateGlobalPrefix = ".L"; + PrivateLabelPrefix = PrivateGlobalPrefix; AlignmentIsInBytes = false; Data16bitsDirective = "\t.2byte\t"; diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp --- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp +++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp @@ -81,8 +81,9 @@ } static MCAsmInfo *createMipsMCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TT) { - MCAsmInfo *MAI = new MipsMCAsmInfo(TT); + const Triple &TT, + const MCTargetOptions &Options) { + MCAsmInfo *MAI = new MipsMCAsmInfo(TT, Options); unsigned SP = MRI.getDwarfRegNum(Mips::SP, true); MCCFIInstruction Inst = MCCFIInstruction::createDefCfaRegister(nullptr, SP); diff --git a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.h b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.h --- a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.h +++ b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.h @@ -23,7 +23,8 @@ virtual void anchor(); public: - explicit NVPTXMCAsmInfo(const Triple &TheTriple); + explicit NVPTXMCAsmInfo(const Triple &TheTriple, + const MCTargetOptions &Options); /// Return true if the .section directive should be omitted when /// emitting \p SectionName. For example: diff --git a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp --- a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp +++ b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp @@ -17,7 +17,8 @@ void NVPTXMCAsmInfo::anchor() {} -NVPTXMCAsmInfo::NVPTXMCAsmInfo(const Triple &TheTriple) { +NVPTXMCAsmInfo::NVPTXMCAsmInfo(const Triple &TheTriple, + const MCTargetOptions &Options) { if (TheTriple.getArch() == Triple::nvptx64) { CodePointerSize = CalleeSaveStackSlotSize = 8; } diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp --- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp +++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp @@ -76,7 +76,8 @@ } static MCAsmInfo *createPPCMCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TheTriple) { + const Triple &TheTriple, + const MCTargetOptions &Options) { bool isPPC64 = (TheTriple.getArch() == Triple::ppc64 || TheTriple.getArch() == Triple::ppc64le); diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp @@ -51,7 +51,8 @@ } static MCAsmInfo *createRISCVMCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TT) { + const Triple &TT, + const MCTargetOptions &Options) { MCAsmInfo *MAI = new RISCVMCAsmInfo(TT); Register SP = MRI.getDwarfRegNum(RISCV::X2, true); diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp --- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp +++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp @@ -33,7 +33,8 @@ #include "SparcGenRegisterInfo.inc" static MCAsmInfo *createSparcMCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TT) { + const Triple &TT, + const MCTargetOptions &Options) { MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT); unsigned Reg = MRI.getDwarfRegNum(SP::O6, true); MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 0); @@ -42,7 +43,8 @@ } static MCAsmInfo *createSparcV9MCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TT) { + const Triple &TT, + const MCTargetOptions &Options) { MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT); unsigned Reg = MRI.getDwarfRegNum(SP::O6, true); MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 2047); diff --git a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp --- a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp +++ b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp @@ -147,7 +147,8 @@ } static MCAsmInfo *createSystemZMCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TT) { + const Triple &TT, + const MCTargetOptions &Options) { MCAsmInfo *MAI = new SystemZMCAsmInfo(TT); MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, diff --git a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.h b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.h --- a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.h +++ b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.h @@ -22,7 +22,8 @@ class WebAssemblyMCAsmInfo final : public MCAsmInfoWasm { public: - explicit WebAssemblyMCAsmInfo(const Triple &T); + explicit WebAssemblyMCAsmInfo(const Triple &T, + const MCTargetOptions &Options); ~WebAssemblyMCAsmInfo() override; }; diff --git a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp --- a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp +++ b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp @@ -21,7 +21,8 @@ WebAssemblyMCAsmInfo::~WebAssemblyMCAsmInfo() = default; // anchor. -WebAssemblyMCAsmInfo::WebAssemblyMCAsmInfo(const Triple &T) { +WebAssemblyMCAsmInfo::WebAssemblyMCAsmInfo(const Triple &T, + const MCTargetOptions &Options) { CodePointerSize = CalleeSaveStackSlotSize = T.isArch64Bit() ? 8 : 4; // TODO: What should MaxInstLength be? diff --git a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp --- a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp +++ b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp @@ -35,8 +35,9 @@ #include "WebAssemblyGenRegisterInfo.inc" static MCAsmInfo *createMCAsmInfo(const MCRegisterInfo & /*MRI*/, - const Triple &TT) { - return new WebAssemblyMCAsmInfo(TT); + const Triple &TT, + const MCTargetOptions &Options) { + return new WebAssemblyMCAsmInfo(TT, Options); } static MCInstrInfo *createMCInstrInfo() { diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp --- a/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp +++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp @@ -323,7 +323,8 @@ } static MCAsmInfo *createX86MCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TheTriple) { + const Triple &TheTriple, + const MCTargetOptions &Options) { bool is64Bit = TheTriple.getArch() == Triple::x86_64; MCAsmInfo *MAI; diff --git a/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp b/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp --- a/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp +++ b/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp @@ -55,7 +55,8 @@ } static MCAsmInfo *createXCoreMCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TT) { + const Triple &TT, + const MCTargetOptions &Options) { MCAsmInfo *MAI = new XCoreMCAsmInfo(TT); // Initial state of the frame pointer is SP. diff --git a/llvm/test/CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll b/llvm/test/CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll --- a/llvm/test/CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll +++ b/llvm/test/CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll @@ -103,7 +103,7 @@ define i32 @f6(i32 %a) { ; CHECK-LABEL: f6: -; CHECK: beqzc ${{[0-9]+}}, $BB +; CHECK: beqzc ${{[0-9]+}}, {{((\$)|(\.L))}}BB %cmp = icmp eq i32 %a, 0 br i1 %cmp, label %if.then, label %if.end @@ -117,7 +117,7 @@ define i32 @f7(i32 %a) { ; CHECK-LABEL: f7: -; CHECK: bnezc ${{[0-9]+}}, $BB +; CHECK: bnezc ${{[0-9]+}}, {{((\$)|(\.L))}}BB %cmp = icmp eq i32 0, %a br i1 %cmp, label %if.then, label %if.end diff --git a/llvm/test/MC/Mips/macro-li.d.s b/llvm/test/MC/Mips/macro-li.d.s --- a/llvm/test/MC/Mips/macro-li.d.s +++ b/llvm/test/MC/Mips/macro-li.d.s @@ -18,7 +18,7 @@ li.d $4, 1.12345 # ALL: .section .rodata,"a",@progbits -# ALL-NEXT: [[LABEL:\$tmp[0-9]+]]: +# ALL-NEXT: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL-NEXT: .p2align 3 # ALL-NEXT: .8byte 4607738388174016296 # ALL-NEXT: .text @@ -62,7 +62,7 @@ li.d $4, 12345678910 # ALL: .section .rodata,"a",@progbits -# ALL-NEXT: [[LABEL:\$tmp[0-9]+]]: +# ALL-NEXT: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL-NEXT: .p2align 3 # ALL-NEXT: .8byte 4757770298180239360 # ALL-NEXT: .text @@ -94,7 +94,7 @@ li.d $4, 12345678910.0 # ALL: .section .rodata,"a",@progbits -# ALL-NEXT: [[LABEL:\$tmp[0-9]+]]: +# ALL-NEXT: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL-NEXT: .p2align 3 # ALL-NEXT: .8byte 4757770298180239360 # ALL-NEXT: .text @@ -126,7 +126,7 @@ li.d $4, 0.4 # ALL: .section .rodata,"a",@progbits -# ALL-NEXT: [[LABEL:\$tmp[0-9]+]]: +# ALL-NEXT: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL-NEXT: .p2align 3 # ALL-NEXT: .8byte 4600877379321698714 # ALL-NEXT: .text @@ -164,7 +164,7 @@ li.d $4, 12345678910.12345678910 # ALL: .section .rodata,"a",@progbits -# ALL-NEXT: [[LABEL:\$tmp[0-9]+]]: +# ALL-NEXT: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL-NEXT: .p2align 3 # ALL-NEXT: .8byte 4757770298180304087 # ALL-NEXT: .text @@ -197,7 +197,7 @@ li.d $4, 12345678910123456789.12345678910 # ALL: .section .rodata,"a",@progbits -# ALL-NEXT: [[LABEL:\$tmp[0-9]+]]: +# ALL-NEXT: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL-NEXT: .p2align 3 # ALL-NEXT: .8byte 4892433759227321879 # ALL-NEXT: .text @@ -243,7 +243,7 @@ li.d $f4, 1.12345 # ALL: .section .rodata,"a",@progbits -# ALL-NEXT: [[LABEL:\$tmp[0-9]+]]: +# ALL-NEXT: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL-NEXT: .p2align 3 # ALL-NEXT: .8byte 4607738388174016296 # ALL-NEXT: .text @@ -288,7 +288,7 @@ li.d $f4, 12345678910 # ALL: .section .rodata,"a",@progbits -# ALL-NEXT: [[LABEL:\$tmp[0-9]+]]: +# ALL-NEXT: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL-NEXT: .p2align 3 # ALL-NEXT: .8byte 4757770298180239360 # ALL-NEXT: .text @@ -311,7 +311,7 @@ li.d $f4, 12345678910.0 # ALL: .section .rodata,"a",@progbits -# ALL-NEXT: [[LABEL:\$tmp[0-9]+]]: +# ALL-NEXT: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL-NEXT: .p2align 3 # ALL-NEXT: .8byte 4757770298180239360 # ALL-NEXT: .text @@ -334,7 +334,7 @@ li.d $f4, 0.4 # ALL: .section .rodata,"a",@progbits -# ALL-NEXT: [[LABEL:\$tmp[0-9]+]]: +# ALL-NEXT: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL-NEXT: .p2align 3 # ALL-NEXT: .8byte 4600877379321698714 # ALL-NEXT: .text @@ -379,7 +379,7 @@ li.d $f4, 2.515625 # ALL: .section .rodata,"a",@progbits -# ALL-NEXT: [[LABEL:\$tmp[0-9]+]]: +# ALL-NEXT: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL-NEXT: .p2align 3 # ALL-NEXT: .8byte 4612847102706319360 # ALL-NEXT: .text @@ -402,7 +402,7 @@ li.d $f4, 12345678910.12345678910 # ALL: .section .rodata,"a",@progbits -# ALL-NEXT: [[LABEL:\$tmp[0-9]+]]: +# ALL-NEXT: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL-NEXT: .p2align 3 # ALL-NEXT: .8byte 4757770298180304087 # ALL-NEXT: .text @@ -425,7 +425,7 @@ li.d $f4, 12345678910123456789.12345678910 # ALL: .section .rodata,"a",@progbits -# ALL-NEXT: [[LABEL:\$tmp[0-9]+]]: +# ALL-NEXT: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL-NEXT: .p2align 3 # ALL-NEXT: .8byte 4892433759227321879 # ALL-NEXT: .text diff --git a/llvm/test/MC/Mips/macro-li.s.s b/llvm/test/MC/Mips/macro-li.s.s --- a/llvm/test/MC/Mips/macro-li.s.s +++ b/llvm/test/MC/Mips/macro-li.s.s @@ -52,7 +52,7 @@ li.s $f4, 1.12345 # ALL: .section .rodata,"a",@progbits -# ALL: [[LABEL:\$tmp[0-9]+]]: +# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL: .4byte 1066388790 # ALL: .text # O32-N32-PIC: lw $1, %got([[LABEL]])($gp) # encoding: [A,A,0x81,0x8f] @@ -82,7 +82,7 @@ li.s $f4, 12345678910 # ALL: .section .rodata,"a",@progbits -# ALL: [[LABEL:\$tmp[0-9]+]]: +# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL: .4byte 1345844999 # ALL: .text # O32-N32-PIC: lw $1, %got([[LABEL]])($gp) # encoding: [A,A,0x81,0x8f] @@ -104,7 +104,7 @@ li.s $f4, 12345678910.0 # ALL: .section .rodata,"a",@progbits -# ALL: [[LABEL:\$tmp[0-9]+]]: +# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL: .4byte 1345844999 # ALL: .text # O32-N32-PIC: lw $1, %got([[LABEL]])($gp) # encoding: [A,A,0x81,0x8f] @@ -127,7 +127,7 @@ li.s $f4, 0.4 # ALL: .section .rodata,"a",@progbits -# ALL: [[LABEL:\$tmp[0-9]+]]: +# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL: .4byte 1053609165 # ALL: .text # O32-N32-PIC: lw $1, %got([[LABEL]])($gp) # encoding: [A,A,0x81,0x8f] @@ -153,7 +153,7 @@ li.s $f4, 12345678910.12345678910 # ALL: .section .rodata,"a",@progbits -# ALL: [[LABEL:\$tmp[0-9]+]]: +# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL: .4byte 1345844999 # ALL: .text # O32-N32-PIC: lw $1, %got([[LABEL]])($gp) # encoding: [A,A,0x81,0x8f] @@ -175,7 +175,7 @@ li.s $f4, 12345678910123456789.12345678910 # ALL: .section .rodata,"a",@progbits -# ALL: [[LABEL:\$tmp[0-9]+]]: +# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL: .4byte 1596675242 # ALL: .text # O32-N32-PIC: lw $1, %got([[LABEL]])($gp) # encoding: [A,A,0x81,0x8f] diff --git a/llvm/test/MC/Mips/private-prefix.s b/llvm/test/MC/Mips/private-prefix.s new file mode 100644 --- /dev/null +++ b/llvm/test/MC/Mips/private-prefix.s @@ -0,0 +1,22 @@ +# RUN: llvm-mc %s -triple=mips --target-abi=o32 | FileCheck %s --check-prefix=O32 +# RUN: llvm-mc %s -triple=mips --target-abi=n32 | FileCheck %s --check-prefix=N32 +# RUN: llvm-mc %s -triple=mips --target-abi=n64 | FileCheck %s --check-prefix=N64 +# RUN: llvm-mc %s -triple=mips64 --target-abi=o32 | FileCheck %s --check-prefix=O32 +# RUN: llvm-mc %s -triple=mips64 --target-abi=n32 | FileCheck %s --check-prefix=N32 +# RUN: llvm-mc %s -triple=mips64 --target-abi=n64 | FileCheck %s --check-prefix=N64 +# RUN: llvm-mc %s -triple=mips | FileCheck %s --check-prefix=O32 +# RUN: llvm-mc %s -triple=mips-gnu | FileCheck %s --check-prefix=O32 +# RUN: llvm-mc %s -triple=mips-gnuabin32 | FileCheck %s --check-prefix=N32 +# RUN: llvm-mc %s -triple=mips-gnuabi64 | FileCheck %s --check-prefix=O32 +# RUN: llvm-mc %s -triple=mips64 | FileCheck %s --check-prefix=N64 +# RUN: llvm-mc %s -triple=mips64-gnu | FileCheck %s --check-prefix=N64 +# RUN: llvm-mc %s -triple=mips64-gnuabin32 | FileCheck %s --check-prefix=N32 +# RUN: llvm-mc %s -triple=mips64-gnuabi64 | FileCheck %s --check-prefix=N64 + +# Checks if correct private global and label prefixes are used based on target +# options. + +# O32: $tmp0: +# N32: .Ltmp0: +# N64: .Ltmp0: +li.d $4, 1.12345 diff --git a/llvm/tools/dsymutil/DwarfStreamer.cpp b/llvm/tools/dsymutil/DwarfStreamer.cpp --- a/llvm/tools/dsymutil/DwarfStreamer.cpp +++ b/llvm/tools/dsymutil/DwarfStreamer.cpp @@ -61,7 +61,8 @@ if (!MRI) return error(Twine("no register info for target ") + TripleName, Context); - MAI.reset(TheTarget->createMCAsmInfo(*MRI, TripleName)); + MCTargetOptions MCOptions = InitMCTargetOptionsFromFlags(); + MAI.reset(TheTarget->createMCAsmInfo(*MRI, TripleName, MCOptions)); if (!MAI) return error("no asm info for target " + TripleName, Context); @@ -73,7 +74,6 @@ if (!MSTI) return error("no subtarget info for target " + TripleName, Context); - MCTargetOptions MCOptions = InitMCTargetOptionsFromFlags(); MAB = TheTarget->createMCAsmBackend(*MSTI, *MRI, MCOptions); if (!MAB) return error("no asm backend for target " + TripleName, Context); diff --git a/llvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp b/llvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp --- a/llvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp +++ b/llvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp @@ -22,6 +22,7 @@ #include "llvm/MC/MCObjectFileInfo.h" #include "llvm/MC/MCRegisterInfo.h" #include "llvm/MC/MCSubtargetInfo.h" +#include "llvm/MC/MCTargetOptions.h" #include "llvm/Object/Binary.h" #include "llvm/Object/COFF.h" #include "llvm/Object/ELFObjectFile.h" @@ -387,7 +388,9 @@ return make_error( "Failed to initialise RegisterInfo."); - AsmInfo.reset(ObjectTarget->createMCAsmInfo(*RegisterInfo, TripleName)); + MCTargetOptions MCOptions; + AsmInfo.reset( + ObjectTarget->createMCAsmInfo(*RegisterInfo, TripleName, MCOptions)); if (!AsmInfo) return make_error("Failed to initialise AsmInfo."); diff --git a/llvm/tools/llvm-dwp/llvm-dwp.cpp b/llvm/tools/llvm-dwp/llvm-dwp.cpp --- a/llvm/tools/llvm-dwp/llvm-dwp.cpp +++ b/llvm/tools/llvm-dwp/llvm-dwp.cpp @@ -676,7 +676,9 @@ if (!MRI) return error(Twine("no register info for target ") + TripleName, Context); - std::unique_ptr MAI(TheTarget->createMCAsmInfo(*MRI, TripleName)); + MCTargetOptions MCOptions = InitMCTargetOptionsFromFlags(); + std::unique_ptr MAI( + TheTarget->createMCAsmInfo(*MRI, TripleName, MCOptions)); if (!MAI) return error("no asm info for target " + TripleName, Context); @@ -716,7 +718,6 @@ OS = BOS.getPointer(); } - MCTargetOptions MCOptions = InitMCTargetOptionsFromFlags(); std::unique_ptr MS(TheTarget->createMCObjectStreamer( TheTriple, MC, std::unique_ptr(MAB), MAB->createObjectWriter(*OS), std::unique_ptr(MCE), *MSTI, diff --git a/llvm/tools/llvm-exegesis/lib/Analysis.cpp b/llvm/tools/llvm-exegesis/lib/Analysis.cpp --- a/llvm/tools/llvm-exegesis/lib/Analysis.cpp +++ b/llvm/tools/llvm-exegesis/lib/Analysis.cpp @@ -10,6 +10,7 @@ #include "BenchmarkResult.h" #include "llvm/ADT/STLExtras.h" #include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCTargetOptions.h" #include "llvm/Support/FormatVariadic.h" #include #include @@ -163,7 +164,9 @@ const InstructionBenchmark &FirstPoint = Clustering.getPoints().front(); RegInfo_.reset(Target.createMCRegInfo(FirstPoint.LLVMTriple)); - AsmInfo_.reset(Target.createMCAsmInfo(*RegInfo_, FirstPoint.LLVMTriple)); + MCTargetOptions MCOptions; + AsmInfo_.reset( + Target.createMCAsmInfo(*RegInfo_, FirstPoint.LLVMTriple, MCOptions)); SubtargetInfo_.reset(Target.createMCSubtargetInfo(FirstPoint.LLVMTriple, FirstPoint.CpuName, "")); InstPrinter_.reset(Target.createMCInstPrinter( diff --git a/llvm/tools/llvm-jitlink/llvm-jitlink.cpp b/llvm/tools/llvm-jitlink/llvm-jitlink.cpp --- a/llvm/tools/llvm-jitlink/llvm-jitlink.cpp +++ b/llvm/tools/llvm-jitlink/llvm-jitlink.cpp @@ -23,6 +23,7 @@ #include "llvm/MC/MCInstrInfo.h" #include "llvm/MC/MCRegisterInfo.h" #include "llvm/MC/MCSubtargetInfo.h" +#include "llvm/MC/MCTargetOptions.h" #include "llvm/Object/COFF.h" #include "llvm/Object/MachO.h" #include "llvm/Object/ObjectFile.h" @@ -693,7 +694,9 @@ TripleName, inconvertibleErrorCode())); - std::unique_ptr MAI(TheTarget->createMCAsmInfo(*MRI, TripleName)); + MCTargetOptions MCOptions; + std::unique_ptr MAI( + TheTarget->createMCAsmInfo(*MRI, TripleName, MCOptions)); if (!MAI) ExitOnErr(make_error("Unable to create target asm info " + TripleName, diff --git a/llvm/tools/llvm-mc-assemble-fuzzer/llvm-mc-assemble-fuzzer.cpp b/llvm/tools/llvm-mc-assemble-fuzzer/llvm-mc-assemble-fuzzer.cpp --- a/llvm/tools/llvm-mc-assemble-fuzzer/llvm-mc-assemble-fuzzer.cpp +++ b/llvm/tools/llvm-mc-assemble-fuzzer/llvm-mc-assemble-fuzzer.cpp @@ -161,7 +161,9 @@ abort(); } - std::unique_ptr MAI(TheTarget->createMCAsmInfo(*MRI, TripleName)); + MCTargetOptions MCOptions = InitMCTargetOptionsFromFlags(); + std::unique_ptr MAI( + TheTarget->createMCAsmInfo(*MRI, TripleName, MCOptions)); if (!MAI) { errs() << "Unable to create target asm info!"; abort(); @@ -193,8 +195,6 @@ std::unique_ptr CE = nullptr; std::unique_ptr MAB = nullptr; - MCTargetOptions MCOptions = InitMCTargetOptionsFromFlags(); - std::string OutputString; raw_string_ostream Out(OutputString); auto FOut = std::make_unique(Out); diff --git a/llvm/tools/llvm-mc/Disassembler.h b/llvm/tools/llvm-mc/Disassembler.h --- a/llvm/tools/llvm-mc/Disassembler.h +++ b/llvm/tools/llvm-mc/Disassembler.h @@ -25,13 +25,14 @@ class MCContext; class MCSubtargetInfo; class MCStreamer; +class MCTargetOptions; class Disassembler { public: static int disassemble(const Target &T, const std::string &Triple, MCSubtargetInfo &STI, MCStreamer &Streamer, MemoryBuffer &Buffer, SourceMgr &SM, MCContext &Ctx, - raw_ostream &Out); + raw_ostream &Out, const MCTargetOptions &MCOptions); }; } // namespace llvm diff --git a/llvm/tools/llvm-mc/Disassembler.cpp b/llvm/tools/llvm-mc/Disassembler.cpp --- a/llvm/tools/llvm-mc/Disassembler.cpp +++ b/llvm/tools/llvm-mc/Disassembler.cpp @@ -133,7 +133,8 @@ int Disassembler::disassemble(const Target &T, const std::string &Triple, MCSubtargetInfo &STI, MCStreamer &Streamer, MemoryBuffer &Buffer, SourceMgr &SM, - MCContext &Ctx, raw_ostream &Out) { + MCContext &Ctx, raw_ostream &Out, + const MCTargetOptions &MCOptions) { std::unique_ptr MRI(T.createMCRegInfo(Triple)); if (!MRI) { @@ -141,7 +142,8 @@ return -1; } - std::unique_ptr MAI(T.createMCAsmInfo(*MRI, Triple)); + std::unique_ptr MAI( + T.createMCAsmInfo(*MRI, Triple, MCOptions)); if (!MAI) { errs() << "error: no assembly info for target " << Triple << "\n"; return -1; diff --git a/llvm/tools/llvm-mc/llvm-mc.cpp b/llvm/tools/llvm-mc/llvm-mc.cpp --- a/llvm/tools/llvm-mc/llvm-mc.cpp +++ b/llvm/tools/llvm-mc/llvm-mc.cpp @@ -351,7 +351,8 @@ std::unique_ptr MRI(TheTarget->createMCRegInfo(TripleName)); assert(MRI && "Unable to create target register info!"); - std::unique_ptr MAI(TheTarget->createMCAsmInfo(*MRI, TripleName)); + std::unique_ptr MAI( + TheTarget->createMCAsmInfo(*MRI, TripleName, MCOptions)); assert(MAI && "Unable to create target asm info!"); MAI->setRelaxELFRelocations(RelaxELFRel); @@ -518,7 +519,7 @@ } if (disassemble) Res = Disassembler::disassemble(*TheTarget, TripleName, *STI, *Str, *Buffer, - SrcMgr, Ctx, Out->os()); + SrcMgr, Ctx, Out->os(), MCOptions); // Keep output if no errors. if (Res == 0) { diff --git a/llvm/tools/llvm-mca/llvm-mca.cpp b/llvm/tools/llvm-mca/llvm-mca.cpp --- a/llvm/tools/llvm-mca/llvm-mca.cpp +++ b/llvm/tools/llvm-mca/llvm-mca.cpp @@ -353,7 +353,9 @@ std::unique_ptr MRI(TheTarget->createMCRegInfo(TripleName)); assert(MRI && "Unable to create target register info!"); - std::unique_ptr MAI(TheTarget->createMCAsmInfo(*MRI, TripleName)); + MCTargetOptions MCOptions = InitMCTargetOptionsFromFlags(); + std::unique_ptr MAI( + TheTarget->createMCAsmInfo(*MRI, TripleName, MCOptions)); assert(MAI && "Unable to create target asm info!"); MCObjectFileInfo MOFI; diff --git a/llvm/tools/llvm-objdump/MachODump.cpp b/llvm/tools/llvm-objdump/MachODump.cpp --- a/llvm/tools/llvm-objdump/MachODump.cpp +++ b/llvm/tools/llvm-objdump/MachODump.cpp @@ -29,6 +29,7 @@ #include "llvm/MC/MCInstrInfo.h" #include "llvm/MC/MCRegisterInfo.h" #include "llvm/MC/MCSubtargetInfo.h" +#include "llvm/MC/MCTargetOptions.h" #include "llvm/Object/MachO.h" #include "llvm/Object/MachOUniversal.h" #include "llvm/Support/Casting.h" @@ -7208,11 +7209,12 @@ FeaturesStr = Features.getString(); } + MCTargetOptions MCOptions; // Set up disassembler. std::unique_ptr MRI( TheTarget->createMCRegInfo(TripleName)); std::unique_ptr AsmInfo( - TheTarget->createMCAsmInfo(*MRI, TripleName)); + TheTarget->createMCAsmInfo(*MRI, TripleName, MCOptions)); std::unique_ptr STI( TheTarget->createMCSubtargetInfo(TripleName, MachOMCPU, FeaturesStr)); MCContext Ctx(AsmInfo.get(), MRI.get(), nullptr); @@ -7262,7 +7264,7 @@ if (ThumbTarget) { ThumbMRI.reset(ThumbTarget->createMCRegInfo(ThumbTripleName)); ThumbAsmInfo.reset( - ThumbTarget->createMCAsmInfo(*ThumbMRI, ThumbTripleName)); + ThumbTarget->createMCAsmInfo(*ThumbMRI, ThumbTripleName, MCOptions)); ThumbSTI.reset( ThumbTarget->createMCSubtargetInfo(ThumbTripleName, MachOMCPU, FeaturesStr)); @@ -7405,7 +7407,7 @@ reportError(MachDSYM.takeError(), DSYMPath); return; } - + // We need to keep the Binary alive with the buffer DbgObj = &*MachDSYM.get(); DSYMBinary = std::move(*MachDSYM); @@ -7827,7 +7829,7 @@ auto Sym = Symbols.upper_bound(Addr); if (Sym == Symbols.begin()) { // The first symbol in the object is after this reference, the best we can - // do is section-relative notation. + // do is section-relative notation. if (Expected NameOrErr = RelocSection.getName()) Name = *NameOrErr; else diff --git a/llvm/tools/llvm-objdump/llvm-objdump.cpp b/llvm/tools/llvm-objdump/llvm-objdump.cpp --- a/llvm/tools/llvm-objdump/llvm-objdump.cpp +++ b/llvm/tools/llvm-objdump/llvm-objdump.cpp @@ -37,6 +37,7 @@ #include "llvm/MC/MCObjectFileInfo.h" #include "llvm/MC/MCRegisterInfo.h" #include "llvm/MC/MCSubtargetInfo.h" +#include "llvm/MC/MCTargetOptions.h" #include "llvm/Object/Archive.h" #include "llvm/Object/COFF.h" #include "llvm/Object/COFFImportFile.h" @@ -1539,8 +1540,9 @@ "no register info for target " + TripleName); // Set up disassembler. + MCTargetOptions MCOptions; std::unique_ptr AsmInfo( - TheTarget->createMCAsmInfo(*MRI, TripleName)); + TheTarget->createMCAsmInfo(*MRI, TripleName, MCOptions)); if (!AsmInfo) reportError(Obj->getFileName(), "no assembly info for target " + TripleName); diff --git a/llvm/tools/llvm-rtdyld/llvm-rtdyld.cpp b/llvm/tools/llvm-rtdyld/llvm-rtdyld.cpp --- a/llvm/tools/llvm-rtdyld/llvm-rtdyld.cpp +++ b/llvm/tools/llvm-rtdyld/llvm-rtdyld.cpp @@ -23,6 +23,7 @@ #include "llvm/MC/MCInstrInfo.h" #include "llvm/MC/MCRegisterInfo.h" #include "llvm/MC/MCSubtargetInfo.h" +#include "llvm/MC/MCTargetOptions.h" #include "llvm/Object/SymbolSize.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/DynamicLibrary.h" @@ -749,7 +750,9 @@ if (!MRI) ErrorAndExit("Unable to create target register info!"); - std::unique_ptr MAI(TheTarget->createMCAsmInfo(*MRI, TripleName)); + MCTargetOptions MCOptions; + std::unique_ptr MAI( + TheTarget->createMCAsmInfo(*MRI, TripleName, MCOptions)); if (!MAI) ErrorAndExit("Unable to create target asm info!"); diff --git a/llvm/tools/sancov/sancov.cpp b/llvm/tools/sancov/sancov.cpp --- a/llvm/tools/sancov/sancov.cpp +++ b/llvm/tools/sancov/sancov.cpp @@ -21,6 +21,7 @@ #include "llvm/MC/MCObjectFileInfo.h" #include "llvm/MC/MCRegisterInfo.h" #include "llvm/MC/MCSubtargetInfo.h" +#include "llvm/MC/MCTargetOptions.h" #include "llvm/Object/Archive.h" #include "llvm/Object/Binary.h" #include "llvm/Object/COFF.h" @@ -717,8 +718,9 @@ TheTarget->createMCRegInfo(TripleName)); failIfEmpty(MRI, "no register info for target " + TripleName); + MCTargetOptions MCOptions; std::unique_ptr AsmInfo( - TheTarget->createMCAsmInfo(*MRI, TripleName)); + TheTarget->createMCAsmInfo(*MRI, TripleName, MCOptions)); failIfEmpty(AsmInfo, "no asm info for target " + TripleName); std::unique_ptr MOFI(new MCObjectFileInfo); diff --git a/llvm/unittests/DebugInfo/DWARF/DwarfGenerator.cpp b/llvm/unittests/DebugInfo/DWARF/DwarfGenerator.cpp --- a/llvm/unittests/DebugInfo/DWARF/DwarfGenerator.cpp +++ b/llvm/unittests/DebugInfo/DWARF/DwarfGenerator.cpp @@ -409,7 +409,8 @@ TripleName, inconvertibleErrorCode()); - MAI.reset(TheTarget->createMCAsmInfo(*MRI, TripleName)); + MCTargetOptions MCOptions = InitMCTargetOptionsFromFlags(); + MAI.reset(TheTarget->createMCAsmInfo(*MRI, TripleName, MCOptions)); if (!MAI) return make_error("no asm info for target " + TripleName, inconvertibleErrorCode()); @@ -419,7 +420,6 @@ return make_error("no subtarget info for target " + TripleName, inconvertibleErrorCode()); - MCTargetOptions MCOptions = InitMCTargetOptionsFromFlags(); MAB = TheTarget->createMCAsmBackend(*MSTI, *MRI, MCOptions); if (!MAB) return make_error("no asm backend for target " + TripleName, diff --git a/llvm/unittests/ExecutionEngine/JITLink/JITLinkTestCommon.cpp b/llvm/unittests/ExecutionEngine/JITLink/JITLinkTestCommon.cpp --- a/llvm/unittests/ExecutionEngine/JITLink/JITLinkTestCommon.cpp +++ b/llvm/unittests/ExecutionEngine/JITLink/JITLinkTestCommon.cpp @@ -10,6 +10,7 @@ #include "llvm/MC/MCCodeEmitter.h" #include "llvm/MC/MCObjectWriter.h" #include "llvm/MC/MCParser/MCTargetAsmParser.h" +#include "llvm/MC/MCTargetOptions.h" #include "llvm/Support/TargetSelect.h" using namespace llvm::jitlink; @@ -59,7 +60,8 @@ if (!MRI) report_fatal_error("Could not build MCRegisterInfo for triple"); - MAI.reset(TheTarget->createMCAsmInfo(*MRI, TT.getTriple())); + MCTargetOptions MCOptions; + MAI.reset(TheTarget->createMCAsmInfo(*MRI, TT.getTriple(), MCOptions)); if (!MAI) report_fatal_error("Could not build MCAsmInfo for triple"); diff --git a/llvm/unittests/MC/DwarfLineTables.cpp b/llvm/unittests/MC/DwarfLineTables.cpp --- a/llvm/unittests/MC/DwarfLineTables.cpp +++ b/llvm/unittests/MC/DwarfLineTables.cpp @@ -12,6 +12,7 @@ #include "llvm/MC/MCContext.h" #include "llvm/MC/MCDwarf.h" #include "llvm/MC/MCRegisterInfo.h" +#include "llvm/MC/MCTargetOptions.h" #include "llvm/Support/TargetRegistry.h" #include "llvm/Support/TargetSelect.h" #include "gtest/gtest.h" @@ -37,7 +38,8 @@ return; MRI.reset(TheTarget->createMCRegInfo(Triple)); - MAI.reset(TheTarget->createMCAsmInfo(*MRI, Triple)); + MCTargetOptions MCOptions; + MAI.reset(TheTarget->createMCAsmInfo(*MRI, Triple, MCOptions)); Ctx = std::make_unique(MAI.get(), MRI.get(), nullptr); } diff --git a/llvm/unittests/MC/MCInstPrinter.cpp b/llvm/unittests/MC/MCInstPrinter.cpp --- a/llvm/unittests/MC/MCInstPrinter.cpp +++ b/llvm/unittests/MC/MCInstPrinter.cpp @@ -9,6 +9,7 @@ #include "llvm/MC/MCInstPrinter.h" #include "llvm/MC/MCAsmInfo.h" #include "llvm/MC/MCInstrInfo.h" +#include "llvm/MC/MCTargetOptions.h" #include "llvm/Support/TargetRegistry.h" #include "llvm/Support/TargetSelect.h" #include "llvm/Target/TargetMachine.h" @@ -40,7 +41,8 @@ return; MRI.reset(TheTarget->createMCRegInfo(TripleName)); - MAI.reset(TheTarget->createMCAsmInfo(*MRI, TripleName)); + MCTargetOptions MCOptions; + MAI.reset(TheTarget->createMCAsmInfo(*MRI, TripleName, MCOptions)); MII.reset(TheTarget->createMCInstrInfo()); Printer.reset(TheTarget->createMCInstPrinter( Triple(TripleName), MAI->getAssemblerDialect(), *MAI, *MII, *MRI));