Index: include/llvm/Support/TargetRegistry.h =================================================================== --- include/llvm/Support/TargetRegistry.h +++ include/llvm/Support/TargetRegistry.h @@ -128,7 +128,8 @@ using ArchMatchFnTy = bool (*)(Triple::ArchType Arch); using MCAsmInfoCtorFnTy = MCAsmInfo *(*)(const MCRegisterInfo &MRI, - const Triple &TT); + const Triple &TT, + const MCTargetOptions *Options); using MCInstrInfoCtorFnTy = MCInstrInfo *(*)(); using MCInstrAnalysisCtorFnTy = MCInstrAnalysis *(*)(const MCInstrInfo *Info); using MCRegInfoCtorFnTy = MCRegisterInfo *(*)(const Triple &TT); @@ -335,11 +336,11 @@ /// feature set; it should always be provided. Generally this should be /// either the target triple from the module, or the target triple of the /// host if that does not exist. - MCAsmInfo *createMCAsmInfo(const MCRegisterInfo &MRI, - StringRef TheTriple) const { + MCAsmInfo *createMCAsmInfo(const MCRegisterInfo &MRI, StringRef TheTriple, + const MCTargetOptions *Options = nullptr) const { if (!MCAsmInfoCtorFn) return nullptr; - return MCAsmInfoCtorFn(MRI, Triple(TheTriple)); + return MCAsmInfoCtorFn(MRI, Triple(TheTriple), Options); } /// createMCInstrInfo - Create a MCInstrInfo implementation. @@ -948,9 +949,9 @@ } private: - static MCAsmInfo *Allocator(const MCRegisterInfo & /*MRI*/, - const Triple &TT) { - return new MCAsmInfoImpl(TT); + static MCAsmInfo *Allocator(const MCRegisterInfo & /*MRI*/, const Triple &TT, + const MCTargetOptions *Options) { + return new MCAsmInfoImpl(TT, Options); } }; Index: lib/CodeGen/LLVMTargetMachine.cpp =================================================================== --- lib/CodeGen/LLVMTargetMachine.cpp +++ lib/CodeGen/LLVMTargetMachine.cpp @@ -48,8 +48,8 @@ STI.reset(TheTarget.createMCSubtargetInfo( getTargetTriple().str(), getTargetCPU(), getTargetFeatureString())); - MCAsmInfo *TmpAsmInfo = - TheTarget.createMCAsmInfo(*MRI, getTargetTriple().str()); + MCAsmInfo *TmpAsmInfo = TheTarget.createMCAsmInfo( + *MRI, getTargetTriple().str(), &Options.MCOptions); // TargetSelect.h moved to a different directory between LLVM 2.9 and 3.0, // and if the old one gets included then MCAsmInfo will be NULL and // we'll crash later. Index: lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp =================================================================== --- lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp +++ lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp @@ -238,7 +238,8 @@ } static MCAsmInfo *createAArch64MCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TheTriple) { + const Triple &TheTriple, + const MCTargetOptions *Options) { MCAsmInfo *MAI; if (TheTriple.isOSBinFormatMachO()) MAI = new AArch64MCAsmInfoDarwin(); Index: lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.h =================================================================== --- lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.h +++ lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.h @@ -25,7 +25,7 @@ // with 'L' as a local symbol. class AMDGPUMCAsmInfo : public MCAsmInfoELF { public: - explicit AMDGPUMCAsmInfo(const Triple &TT); + explicit AMDGPUMCAsmInfo(const Triple &TT, const MCTargetOptions *Options); bool shouldOmitSectionDirective(StringRef SectionName) const override; unsigned getMaxInstLength(const MCSubtargetInfo *STI) const override; }; Index: lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp =================================================================== --- lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp +++ lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp @@ -14,7 +14,9 @@ using namespace llvm; -AMDGPUMCAsmInfo::AMDGPUMCAsmInfo(const Triple &TT) : MCAsmInfoELF() { +AMDGPUMCAsmInfo::AMDGPUMCAsmInfo(const Triple &TT, + const MCTargetOptions *Options) + : MCAsmInfoELF() { CodePointerSize = (TT.getArch() == Triple::amdgcn) ? 8 : 4; StackGrowsUp = true; HasSingleParameterDotFile = false; Index: lib/Target/ARC/MCTargetDesc/ARCMCTargetDesc.cpp =================================================================== --- lib/Target/ARC/MCTargetDesc/ARCMCTargetDesc.cpp +++ lib/Target/ARC/MCTargetDesc/ARCMCTargetDesc.cpp @@ -52,7 +52,8 @@ } static MCAsmInfo *createARCMCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TT) { + const Triple &TT, + const MCTargetOptions *Options) { MCAsmInfo *MAI = new ARCMCAsmInfo(TT); // Initial state of the frame pointer is SP. Index: lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp =================================================================== --- lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp +++ lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp @@ -187,7 +187,8 @@ } static MCAsmInfo *createARMMCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TheTriple) { + const Triple &TheTriple, + const MCTargetOptions *Options) { MCAsmInfo *MAI; if (TheTriple.isOSDarwin() || TheTriple.isOSBinFormatMachO()) MAI = new ARMMCAsmInfoDarwin(TheTriple); Index: lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.h =================================================================== --- lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.h +++ lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.h @@ -22,7 +22,7 @@ /// Specifies the format of AVR assembly files. class AVRMCAsmInfo : public MCAsmInfo { public: - explicit AVRMCAsmInfo(const Triple &TT); + explicit AVRMCAsmInfo(const Triple &TT, const MCTargetOptions *Options); }; } // end namespace llvm Index: lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp =================================================================== --- lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp +++ lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp @@ -16,7 +16,7 @@ namespace llvm { -AVRMCAsmInfo::AVRMCAsmInfo(const Triple &TT) { +AVRMCAsmInfo::AVRMCAsmInfo(const Triple &TT, const MCTargetOptions *Options) { CodePointerSize = 2; CalleeSaveStackSlotSize = 2; CommentString = ";"; Index: lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h =================================================================== --- lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h +++ lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h @@ -21,7 +21,7 @@ class BPFMCAsmInfo : public MCAsmInfo { public: - explicit BPFMCAsmInfo(const Triple &TT) { + explicit BPFMCAsmInfo(const Triple &TT, const MCTargetOptions *Options) { if (TT.getArch() == Triple::bpfeb) IsLittleEndian = false; Index: lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp =================================================================== --- lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp +++ lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp @@ -219,7 +219,8 @@ } static MCAsmInfo *createHexagonMCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TT) { + const Triple &TT, + const MCTargetOptions *Options) { MCAsmInfo *MAI = new HexagonMCAsmInfo(TT); // VirtualFP = (R30 + #0). Index: lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.h =================================================================== --- lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.h +++ lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.h @@ -22,7 +22,8 @@ void anchor() override; public: - explicit LanaiMCAsmInfo(const Triple &TheTriple); + explicit LanaiMCAsmInfo(const Triple &TheTriple, + const MCTargetOptions *Options); }; } // namespace llvm Index: lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp =================================================================== --- lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp +++ lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp @@ -18,7 +18,8 @@ void LanaiMCAsmInfo::anchor() {} -LanaiMCAsmInfo::LanaiMCAsmInfo(const Triple & /*TheTriple*/) { +LanaiMCAsmInfo::LanaiMCAsmInfo(const Triple & /*TheTriple*/, + const MCTargetOptions *Options) { IsLittleEndian = false; PrivateGlobalPrefix = ".L"; WeakRefDirective = "\t.weak\t"; Index: lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h =================================================================== --- lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h +++ lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h @@ -22,7 +22,7 @@ void anchor() override; public: - explicit MSP430MCAsmInfo(const Triple &TT); + explicit MSP430MCAsmInfo(const Triple &TT, const MCTargetOptions *Options); }; } // namespace llvm Index: lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp =================================================================== --- lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp +++ lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp @@ -15,7 +15,8 @@ void MSP430MCAsmInfo::anchor() { } -MSP430MCAsmInfo::MSP430MCAsmInfo(const Triple &TT) { +MSP430MCAsmInfo::MSP430MCAsmInfo(const Triple &TT, + const MCTargetOptions *Options) { CodePointerSize = CalleeSaveStackSlotSize = 2; CommentString = ";"; Index: lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h =================================================================== --- lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h +++ lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h @@ -22,7 +22,8 @@ void anchor() override; public: - explicit MipsMCAsmInfo(const Triple &TheTriple); + explicit MipsMCAsmInfo(const Triple &TheTriple, + const MCTargetOptions *Options); }; } // namespace llvm Index: lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp =================================================================== --- lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp +++ lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp @@ -11,25 +11,27 @@ //===----------------------------------------------------------------------===// #include "MipsMCAsmInfo.h" +#include "MipsABIInfo.h" #include "llvm/ADT/Triple.h" using namespace llvm; void MipsMCAsmInfo::anchor() { } -MipsMCAsmInfo::MipsMCAsmInfo(const Triple &TheTriple) { +MipsMCAsmInfo::MipsMCAsmInfo(const Triple &TheTriple, + const MCTargetOptions *Options) { IsLittleEndian = TheTriple.isLittleEndian(); if (TheTriple.isMIPS64() && TheTriple.getEnvironment() != Triple::GNUABIN32) CodePointerSize = CalleeSaveStackSlotSize = 8; - // FIXME: This condition isn't quite right but it's the best we can do until - // this object can identify the ABI. It will misbehave when using O32 - // on a mips64*-* triple. - if (TheTriple.isMIPS32()) { + MipsABIInfo ABI = MipsABIInfo::computeTargetABI( + TheTriple, "", Options ? *Options : MCTargetOptions()); + if (ABI.IsO32()) PrivateGlobalPrefix = "$"; - PrivateLabelPrefix = "$"; - } + else if (ABI.IsN32() || ABI.IsN64()) + PrivateGlobalPrefix = ".L"; + PrivateLabelPrefix = PrivateGlobalPrefix; AlignmentIsInBytes = false; Data16bitsDirective = "\t.2byte\t"; Index: lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp =================================================================== --- lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp +++ lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp @@ -81,8 +81,9 @@ } static MCAsmInfo *createMipsMCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TT) { - MCAsmInfo *MAI = new MipsMCAsmInfo(TT); + const Triple &TT, + const MCTargetOptions *Options) { + MCAsmInfo *MAI = new MipsMCAsmInfo(TT, Options); unsigned SP = MRI.getDwarfRegNum(Mips::SP, true); MCCFIInstruction Inst = MCCFIInstruction::createDefCfaRegister(nullptr, SP); Index: lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.h =================================================================== --- lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.h +++ lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.h @@ -23,7 +23,8 @@ virtual void anchor(); public: - explicit NVPTXMCAsmInfo(const Triple &TheTriple); + explicit NVPTXMCAsmInfo(const Triple &TheTriple, + const MCTargetOptions *Options); /// Return true if the .section directive should be omitted when /// emitting \p SectionName. For example: Index: lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp =================================================================== --- lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp +++ lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp @@ -17,7 +17,8 @@ void NVPTXMCAsmInfo::anchor() {} -NVPTXMCAsmInfo::NVPTXMCAsmInfo(const Triple &TheTriple) { +NVPTXMCAsmInfo::NVPTXMCAsmInfo(const Triple &TheTriple, + const MCTargetOptions *Options) { if (TheTriple.getArch() == Triple::nvptx64) { CodePointerSize = CalleeSaveStackSlotSize = 8; } Index: lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp =================================================================== --- lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp +++ lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp @@ -76,7 +76,8 @@ } static MCAsmInfo *createPPCMCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TheTriple) { + const Triple &TheTriple, + const MCTargetOptions *Options) { bool isPPC64 = (TheTriple.getArch() == Triple::ppc64 || TheTriple.getArch() == Triple::ppc64le); Index: lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp =================================================================== --- lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp +++ lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp @@ -50,7 +50,8 @@ } static MCAsmInfo *createRISCVMCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TT) { + const Triple &TT, + const MCTargetOptions *Options) { MCAsmInfo *MAI = new RISCVMCAsmInfo(TT); Register SP = MRI.getDwarfRegNum(RISCV::X2, true); Index: lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp =================================================================== --- lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp +++ lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp @@ -33,7 +33,8 @@ #include "SparcGenRegisterInfo.inc" static MCAsmInfo *createSparcMCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TT) { + const Triple &TT, + const MCTargetOptions *Options) { MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT); unsigned Reg = MRI.getDwarfRegNum(SP::O6, true); MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 0); @@ -42,7 +43,8 @@ } static MCAsmInfo *createSparcV9MCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TT) { + const Triple &TT, + const MCTargetOptions *Options) { MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT); unsigned Reg = MRI.getDwarfRegNum(SP::O6, true); MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 2047); Index: lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp =================================================================== --- lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp +++ lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp @@ -147,7 +147,8 @@ } static MCAsmInfo *createSystemZMCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TT) { + const Triple &TT, + const MCTargetOptions *Options) { MCAsmInfo *MAI = new SystemZMCAsmInfo(TT); MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Index: lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.h =================================================================== --- lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.h +++ lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.h @@ -22,7 +22,8 @@ class WebAssemblyMCAsmInfo final : public MCAsmInfoWasm { public: - explicit WebAssemblyMCAsmInfo(const Triple &T); + explicit WebAssemblyMCAsmInfo(const Triple &T, + const MCTargetOptions *Options); ~WebAssemblyMCAsmInfo() override; }; Index: lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp =================================================================== --- lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp +++ lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp @@ -21,7 +21,8 @@ WebAssemblyMCAsmInfo::~WebAssemblyMCAsmInfo() = default; // anchor. -WebAssemblyMCAsmInfo::WebAssemblyMCAsmInfo(const Triple &T) { +WebAssemblyMCAsmInfo::WebAssemblyMCAsmInfo(const Triple &T, + const MCTargetOptions *Options) { CodePointerSize = CalleeSaveStackSlotSize = T.isArch64Bit() ? 8 : 4; // TODO: What should MaxInstLength be? Index: lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp =================================================================== --- lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp +++ lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp @@ -35,8 +35,9 @@ #include "WebAssemblyGenRegisterInfo.inc" static MCAsmInfo *createMCAsmInfo(const MCRegisterInfo & /*MRI*/, - const Triple &TT) { - return new WebAssemblyMCAsmInfo(TT); + const Triple &TT, + const MCTargetOptions *Options) { + return new WebAssemblyMCAsmInfo(TT, Options); } static MCInstrInfo *createMCInstrInfo() { Index: lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp =================================================================== --- lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp +++ lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp @@ -323,7 +323,8 @@ } static MCAsmInfo *createX86MCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TheTriple) { + const Triple &TheTriple, + const MCTargetOptions *Options) { bool is64Bit = TheTriple.getArch() == Triple::x86_64; MCAsmInfo *MAI; Index: lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp =================================================================== --- lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp +++ lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp @@ -55,7 +55,8 @@ } static MCAsmInfo *createXCoreMCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TT) { + const Triple &TT, + const MCTargetOptions *Options) { MCAsmInfo *MAI = new XCoreMCAsmInfo(TT); // Initial state of the frame pointer is SP. Index: test/CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll =================================================================== --- test/CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll +++ test/CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll @@ -103,7 +103,7 @@ define i32 @f6(i32 %a) { ; CHECK-LABEL: f6: -; CHECK: beqzc ${{[0-9]+}}, $BB +; CHECK: beqzc ${{[0-9]+}}, {{((\$)|(\.L))}}BB %cmp = icmp eq i32 %a, 0 br i1 %cmp, label %if.then, label %if.end @@ -117,7 +117,7 @@ define i32 @f7(i32 %a) { ; CHECK-LABEL: f7: -; CHECK: bnezc ${{[0-9]+}}, $BB +; CHECK: bnezc ${{[0-9]+}}, {{((\$)|(\.L))}}BB %cmp = icmp eq i32 0, %a br i1 %cmp, label %if.then, label %if.end Index: test/MC/Mips/macro-li.d.s =================================================================== --- test/MC/Mips/macro-li.d.s +++ test/MC/Mips/macro-li.d.s @@ -18,7 +18,7 @@ li.d $4, 1.12345 # ALL: .section .rodata,"a",@progbits -# ALL: [[LABEL:\$tmp[0-9]+]]: +# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL: .4byte 1072822694 # ALL: .4byte 3037400872 # ALL: .text @@ -58,7 +58,7 @@ li.d $4, 12345678910 # ALL: .section .rodata,"a",@progbits -# ALL: [[LABEL:\$tmp[0-9]+]]: +# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL: .4byte 1107754720 # ALL: .4byte 3790602240 # ALL: .text @@ -90,7 +90,7 @@ li.d $4, 12345678910.0 # ALL: .section .rodata,"a",@progbits -# ALL: [[LABEL:\$tmp[0-9]+]]: +# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL: .4byte 1107754720 # ALL: .4byte 3790602240 # ALL: .text @@ -122,7 +122,7 @@ li.d $4, 0.4 # ALL: .section .rodata,"a",@progbits -# ALL: [[LABEL:\$tmp[0-9]+]]: +# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL: .4byte 1071225241 # ALL: .4byte 2576980378 # ALL: .text @@ -158,7 +158,7 @@ li.d $4, 12345678910.12345678910 # ALL: .section .rodata,"a",@progbits -# ALL: [[LABEL:\$tmp[0-9]+]]: +# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL: .4byte 1107754720 # ALL: .4byte 3790666967 # ALL: .text @@ -191,7 +191,7 @@ li.d $4, 12345678910123456789.12345678910 # ALL: .section .rodata,"a",@progbits -# ALL: [[LABEL:\$tmp[0-9]+]]: +# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL: .4byte 1139108501 # ALL: .4byte 836738583 # ALL: .text @@ -243,7 +243,7 @@ li.d $f4, 1.12345 # ALL: .section .rodata,"a",@progbits -# ALL: [[LABEL:\$tmp[0-9]+]]: +# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL: .4byte 1072822694 # ALL: .4byte 3037400872 # ALL: .text @@ -286,7 +286,7 @@ li.d $f4, 12345678910 # ALL: .section .rodata,"a",@progbits -# ALL: [[LABEL:\$tmp[0-9]+]]: +# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL: .4byte 1107754720 # ALL: .4byte 3790602240 # ALL: .text @@ -309,7 +309,7 @@ li.d $f4, 12345678910.0 # ALL: .section .rodata,"a",@progbits -# ALL: [[LABEL:\$tmp[0-9]+]]: +# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL: .4byte 1107754720 # ALL: .4byte 3790602240 # ALL: .text @@ -332,7 +332,7 @@ li.d $f4, 0.4 # ALL: .section .rodata,"a",@progbits -# ALL: [[LABEL:\$tmp[0-9]+]]: +# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL: .4byte 1071225241 # ALL: .4byte 2576980378 # ALL: .text @@ -375,7 +375,7 @@ li.d $f4, 2.515625 # ALL: .section .rodata,"a",@progbits -# ALL: [[LABEL:\$tmp[0-9]+]]: +# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL: .4byte 1074012160 # ALL: .4byte 0 # ALL: .text @@ -398,7 +398,7 @@ li.d $f4, 12345678910.12345678910 # ALL: .section .rodata,"a",@progbits -# ALL: [[LABEL:\$tmp[0-9]+]]: +# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL: .4byte 1107754720 # ALL: .4byte 3790666967 # ALL: .text @@ -421,7 +421,7 @@ li.d $f4, 12345678910123456789.12345678910 # ALL: .section .rodata,"a",@progbits -# ALL: [[LABEL:\$tmp[0-9]+]]: +# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL: .4byte 1139108501 # ALL: .4byte 836738583 # ALL: .text Index: test/MC/Mips/macro-li.s.s =================================================================== --- test/MC/Mips/macro-li.s.s +++ test/MC/Mips/macro-li.s.s @@ -54,7 +54,7 @@ li.s $f4, 1.12345 # ALL: .section .rodata,"a",@progbits -# ALL: [[LABEL:\$tmp[0-9]+]]: +# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL: .4byte 1066388790 # ALL: .text # O32-N32-PIC: lw $1, %got([[LABEL]])($gp) # encoding: [A,A,0x81,0x8f] @@ -84,7 +84,7 @@ li.s $f4, 12345678910 # ALL: .section .rodata,"a",@progbits -# ALL: [[LABEL:\$tmp[0-9]+]]: +# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL: .4byte 1345844999 # ALL: .text # O32-N32-PIC: lw $1, %got([[LABEL]])($gp) # encoding: [A,A,0x81,0x8f] @@ -106,7 +106,7 @@ li.s $f4, 12345678910.0 # ALL: .section .rodata,"a",@progbits -# ALL: [[LABEL:\$tmp[0-9]+]]: +# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL: .4byte 1345844999 # ALL: .text # O32-N32-PIC: lw $1, %got([[LABEL]])($gp) # encoding: [A,A,0x81,0x8f] @@ -129,7 +129,7 @@ li.s $f4, 0.4 # ALL: .section .rodata,"a",@progbits -# ALL: [[LABEL:\$tmp[0-9]+]]: +# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL: .4byte 1053609165 # ALL: .text # O32-N32-PIC: lw $1, %got([[LABEL]])($gp) # encoding: [A,A,0x81,0x8f] @@ -155,7 +155,7 @@ li.s $f4, 12345678910.12345678910 # ALL: .section .rodata,"a",@progbits -# ALL: [[LABEL:\$tmp[0-9]+]]: +# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL: .4byte 1345844999 # ALL: .text # O32-N32-PIC: lw $1, %got([[LABEL]])($gp) # encoding: [A,A,0x81,0x8f] @@ -177,7 +177,7 @@ li.s $f4, 12345678910123456789.12345678910 # ALL: .section .rodata,"a",@progbits -# ALL: [[LABEL:\$tmp[0-9]+]]: +# ALL: [[LABEL:((\$)|(\.L))tmp[0-9]+]]: # ALL: .4byte 1596675242 # ALL: .text # O32-N32-PIC: lw $1, %got([[LABEL]])($gp) # encoding: [A,A,0x81,0x8f] Index: test/MC/Mips/private-prefix.s =================================================================== --- /dev/null +++ test/MC/Mips/private-prefix.s @@ -0,0 +1,22 @@ +# RUN: llvm-mc %s -triple=mips --target-abi=o32 | FileCheck %s --check-prefix=O32 +# RUN: llvm-mc %s -triple=mips --target-abi=n32 | FileCheck %s --check-prefix=N32 +# RUN: llvm-mc %s -triple=mips --target-abi=n64 | FileCheck %s --check-prefix=N64 +# RUN: llvm-mc %s -triple=mips64 --target-abi=o32 | FileCheck %s --check-prefix=O32 +# RUN: llvm-mc %s -triple=mips64 --target-abi=n32 | FileCheck %s --check-prefix=N32 +# RUN: llvm-mc %s -triple=mips64 --target-abi=n64 | FileCheck %s --check-prefix=N64 +# RUN: llvm-mc %s -triple=mips | FileCheck %s --check-prefix=O32 +# RUN: llvm-mc %s -triple=mips-gnu | FileCheck %s --check-prefix=O32 +# RUN: llvm-mc %s -triple=mips-gnuabin32 | FileCheck %s --check-prefix=N32 +# RUN: llvm-mc %s -triple=mips-gnuabi64 | FileCheck %s --check-prefix=O32 +# RUN: llvm-mc %s -triple=mips64 | FileCheck %s --check-prefix=N64 +# RUN: llvm-mc %s -triple=mips64-gnu | FileCheck %s --check-prefix=N64 +# RUN: llvm-mc %s -triple=mips64-gnuabin32 | FileCheck %s --check-prefix=N32 +# RUN: llvm-mc %s -triple=mips64-gnuabi64 | FileCheck %s --check-prefix=N64 + +# Checks if correct private global and label prefixes are used based on target +# options. + +# O32: $tmp0: +# N32: .Ltmp0: +# N64: .Ltmp0: +li.d $4, 1.12345 Index: tools/dsymutil/DwarfStreamer.cpp =================================================================== --- tools/dsymutil/DwarfStreamer.cpp +++ tools/dsymutil/DwarfStreamer.cpp @@ -61,7 +61,8 @@ if (!MRI) return error(Twine("no register info for target ") + TripleName, Context); - MAI.reset(TheTarget->createMCAsmInfo(*MRI, TripleName)); + MCTargetOptions MCOptions = InitMCTargetOptionsFromFlags(); + MAI.reset(TheTarget->createMCAsmInfo(*MRI, TripleName, &MCOptions)); if (!MAI) return error("no asm info for target " + TripleName, Context); @@ -73,7 +74,6 @@ if (!MSTI) return error("no subtarget info for target " + TripleName, Context); - MCTargetOptions MCOptions = InitMCTargetOptionsFromFlags(); MAB = TheTarget->createMCAsmBackend(*MSTI, *MRI, MCOptions); if (!MAB) return error("no asm backend for target " + TripleName, Context); Index: tools/llvm-dwp/llvm-dwp.cpp =================================================================== --- tools/llvm-dwp/llvm-dwp.cpp +++ tools/llvm-dwp/llvm-dwp.cpp @@ -676,7 +676,9 @@ if (!MRI) return error(Twine("no register info for target ") + TripleName, Context); - std::unique_ptr MAI(TheTarget->createMCAsmInfo(*MRI, TripleName)); + MCTargetOptions MCOptions = InitMCTargetOptionsFromFlags(); + std::unique_ptr MAI( + TheTarget->createMCAsmInfo(*MRI, TripleName, &MCOptions)); if (!MAI) return error("no asm info for target " + TripleName, Context); @@ -716,7 +718,6 @@ OS = BOS.getPointer(); } - MCTargetOptions MCOptions = InitMCTargetOptionsFromFlags(); std::unique_ptr MS(TheTarget->createMCObjectStreamer( TheTriple, MC, std::unique_ptr(MAB), MAB->createObjectWriter(*OS), std::unique_ptr(MCE), *MSTI, Index: tools/llvm-mc-assemble-fuzzer/llvm-mc-assemble-fuzzer.cpp =================================================================== --- tools/llvm-mc-assemble-fuzzer/llvm-mc-assemble-fuzzer.cpp +++ tools/llvm-mc-assemble-fuzzer/llvm-mc-assemble-fuzzer.cpp @@ -161,7 +161,10 @@ abort(); } - std::unique_ptr MAI(TheTarget->createMCAsmInfo(*MRI, TripleName)); + MCTargetOptions MCOptions = InitMCTargetOptionsFromFlags(); + + std::unique_ptr MAI( + TheTarget->createMCAsmInfo(*MRI, TripleName, &MCOptions)); if (!MAI) { errs() << "Unable to create target asm info!"; abort(); @@ -193,8 +196,6 @@ std::unique_ptr CE = nullptr; std::unique_ptr MAB = nullptr; - MCTargetOptions MCOptions = InitMCTargetOptionsFromFlags(); - std::string OutputString; raw_string_ostream Out(OutputString); auto FOut = std::make_unique(Out); Index: tools/llvm-mc/Disassembler.h =================================================================== --- tools/llvm-mc/Disassembler.h +++ tools/llvm-mc/Disassembler.h @@ -24,6 +24,7 @@ class SourceMgr; class MCSubtargetInfo; class MCStreamer; +class MCTargetOptions; class Disassembler { public: @@ -33,7 +34,8 @@ MCStreamer &Streamer, MemoryBuffer &Buffer, SourceMgr &SM, - raw_ostream &Out); + raw_ostream &Out, + const MCTargetOptions &MCOptions); }; } // namespace llvm Index: tools/llvm-mc/Disassembler.cpp =================================================================== --- tools/llvm-mc/Disassembler.cpp +++ tools/llvm-mc/Disassembler.cpp @@ -135,7 +135,8 @@ MCStreamer &Streamer, MemoryBuffer &Buffer, SourceMgr &SM, - raw_ostream &Out) { + raw_ostream &Out, + const MCTargetOptions &MCOptions) { std::unique_ptr MRI(T.createMCRegInfo(Triple)); if (!MRI) { @@ -143,7 +144,8 @@ return -1; } - std::unique_ptr MAI(T.createMCAsmInfo(*MRI, Triple)); + std::unique_ptr MAI( + T.createMCAsmInfo(*MRI, Triple, &MCOptions)); if (!MAI) { errs() << "error: no assembly info for target " << Triple << "\n"; return -1; Index: tools/llvm-mc/llvm-mc.cpp =================================================================== --- tools/llvm-mc/llvm-mc.cpp +++ tools/llvm-mc/llvm-mc.cpp @@ -350,7 +350,8 @@ std::unique_ptr MRI(TheTarget->createMCRegInfo(TripleName)); assert(MRI && "Unable to create target register info!"); - std::unique_ptr MAI(TheTarget->createMCAsmInfo(*MRI, TripleName)); + std::unique_ptr MAI( + TheTarget->createMCAsmInfo(*MRI, TripleName, &MCOptions)); assert(MAI && "Unable to create target asm info!"); MAI->setRelaxELFRelocations(RelaxELFRel); @@ -514,8 +515,8 @@ break; } if (disassemble) - Res = Disassembler::disassemble(*TheTarget, TripleName, *STI, *Str, - *Buffer, SrcMgr, Out->os()); + Res = Disassembler::disassemble(*TheTarget, TripleName, *STI, *Str, *Buffer, + SrcMgr, Out->os(), MCOptions); // Keep output if no errors. if (Res == 0) {