Index: lib/CodeGen/GlobalISel/LegalizerHelper.cpp =================================================================== --- lib/CodeGen/GlobalISel/LegalizerHelper.cpp +++ lib/CodeGen/GlobalISel/LegalizerHelper.cpp @@ -2990,7 +2990,7 @@ switch (MI.getOpcode()) { case TargetOpcode::G_SHL: { // Short: ShAmt < NewBitSize - auto LoS = MIRBuilder.buildShl(HalfTy, InH, Amt); + auto LoS = MIRBuilder.buildShl(HalfTy, InL, Amt); auto OrLHS = MIRBuilder.buildShl(HalfTy, InH, Amt); auto OrRHS = MIRBuilder.buildLShr(HalfTy, InL, AmtLack); @@ -2998,7 +2998,7 @@ // Long: ShAmt >= NewBitSize auto LoL = MIRBuilder.buildConstant(HalfTy, 0); // Lo part is zero. - auto HiL = MIRBuilder.buildShl(HalfTy, InL, AmtExcess); // Hi from Lo part. + auto HiL = MIRBuilder.buildShl(HalfTy, InL, Amt); // Hi from Lo part. auto Lo = MIRBuilder.buildSelect(HalfTy, IsShort, LoS, LoL); auto Hi = MIRBuilder.buildSelect( @@ -3008,45 +3008,27 @@ ResultRegs[1] = Hi.getReg(0); break; } - case TargetOpcode::G_LSHR: { - // Short: ShAmt < NewBitSize - auto HiS = MIRBuilder.buildLShr(HalfTy, InH, Amt); - - auto OrLHS = MIRBuilder.buildLShr(HalfTy, InL, Amt); - auto OrRHS = MIRBuilder.buildShl(HalfTy, InH, AmtLack); - auto LoS = MIRBuilder.buildOr(HalfTy, OrLHS, OrRHS); - - // Long: ShAmt >= NewBitSize - auto HiL = MIRBuilder.buildConstant(HalfTy, 0); // Hi part is zero. - auto LoL = MIRBuilder.buildLShr(HalfTy, InH, AmtExcess); // Lo from Hi part. - - auto Lo = MIRBuilder.buildSelect( - HalfTy, IsZero, InL, MIRBuilder.buildSelect(HalfTy, IsShort, LoS, LoL)); - auto Hi = MIRBuilder.buildSelect(HalfTy, IsShort, HiS, HiL); - - ResultRegs[0] = Lo.getReg(0); - ResultRegs[1] = Hi.getReg(0); - break; - } + case TargetOpcode::G_LSHR: case TargetOpcode::G_ASHR: { // Short: ShAmt < NewBitSize - auto HiS = MIRBuilder.buildAShr(HalfTy, InH, Amt); - - auto OrLHS = MIRBuilder.buildLShr(HalfTy, InL, Amt); - auto OrRHS = MIRBuilder.buildLShr(HalfTy, InH, AmtLack); + auto HiS = MIRBuilder.buildInstr(MI.getOpcode(), {HalfTy}, {InH, Amt}); + auto OrLHS = MIRBuilder.buildShl(HalfTy, InH, AmtLack); + auto OrRHS = MIRBuilder.buildLShr(HalfTy, InL, Amt); auto LoS = MIRBuilder.buildOr(HalfTy, OrLHS, OrRHS); // Long: ShAmt >= NewBitSize - - // Sign of Hi part. - auto HiL = MIRBuilder.buildAShr( - HalfTy, InH, MIRBuilder.buildConstant(ShiftAmtTy, NewBitSize - 1)); - - auto LoL = MIRBuilder.buildAShr(HalfTy, InH, AmtExcess); // Lo from Hi part. + MachineInstrBuilder HiL; + if (MI.getOpcode() == TargetOpcode::G_LSHR) { + HiL = MIRBuilder.buildConstant(HalfTy, 0); // Hi part is zero. + } else { + auto ShiftAmt = MIRBuilder.buildConstant(ShiftAmtTy, NewBitSize - 1); + HiL = MIRBuilder.buildAShr(HalfTy, InH, ShiftAmt); // Sign of Hi part. + } + auto LoL = MIRBuilder.buildInstr(MI.getOpcode(), {HalfTy}, + {InH, AmtExcess}); // Lo from Hi part. auto Lo = MIRBuilder.buildSelect( HalfTy, IsZero, InL, MIRBuilder.buildSelect(HalfTy, IsShort, LoS, LoL)); - auto Hi = MIRBuilder.buildSelect(HalfTy, IsShort, HiS, HiL); ResultRegs[0] = Lo.getReg(0); Index: lib/Target/Mips/MipsLegalizerInfo.cpp =================================================================== --- lib/Target/Mips/MipsLegalizerInfo.cpp +++ lib/Target/Mips/MipsLegalizerInfo.cpp @@ -89,7 +89,8 @@ getActionDefinitionsBuilder({G_SHL, G_ASHR, G_LSHR}) .legalFor({{s32, s32}}) - .clampScalar(1, s32, s32); + .clampScalar(1, s32, s32) + .clampScalar(0, s32, s32); getActionDefinitionsBuilder(G_ICMP) .legalForCartesianProduct({s32}, {s32, p0}) Index: test/CodeGen/AArch64/GlobalISel/legalize-shift.mir =================================================================== --- test/CodeGen/AArch64/GlobalISel/legalize-shift.mir +++ test/CodeGen/AArch64/GlobalISel/legalize-shift.mir @@ -105,18 +105,17 @@ ; CHECK: [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[COPY1]](s128) ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 64 ; CHECK: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](s128) - ; CHECK: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[TRUNC]], [[C]] - ; CHECK: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[C]], [[TRUNC]] + ; CHECK: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[C]], [[TRUNC]] ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 ; CHECK: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[TRUNC]](s64), [[C]] ; CHECK: [[TRUNC1:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP]](s32) ; CHECK: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[TRUNC]](s64), [[C1]] ; CHECK: [[TRUNC2:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP1]](s32) - ; CHECK: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[TRUNC]](s64) + ; CHECK: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV]], [[TRUNC]](s64) ; CHECK: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[TRUNC]](s64) - ; CHECK: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[SUB1]](s64) + ; CHECK: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[SUB]](s64) ; CHECK: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL1]], [[LSHR]] - ; CHECK: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV]], [[SUB]](s64) + ; CHECK: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV]], [[TRUNC]](s64) ; CHECK: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC1]](s1), [[SHL]], [[C1]] ; CHECK: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC1]](s1), [[OR]], [[SHL2]] ; CHECK: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC2]](s1), [[UV1]], [[SELECT1]] @@ -147,9 +146,9 @@ ; CHECK: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[TRUNC]](s64), [[C1]] ; CHECK: [[TRUNC2:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP1]](s32) ; CHECK: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV1]], [[TRUNC]](s64) - ; CHECK: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[TRUNC]](s64) ; CHECK: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[SUB1]](s64) - ; CHECK: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR1]], [[SHL]] + ; CHECK: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[TRUNC]](s64) + ; CHECK: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR1]] ; CHECK: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[UV1]], [[SUB]](s64) ; CHECK: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC1]](s1), [[OR]], [[LSHR2]] ; CHECK: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC2]](s1), [[UV]], [[SELECT]] @@ -181,9 +180,9 @@ ; CHECK: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[TRUNC]](s64), [[C1]] ; CHECK: [[TRUNC2:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP1]](s32) ; CHECK: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[UV1]], [[TRUNC]](s64) + ; CHECK: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[SUB1]](s64) ; CHECK: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[TRUNC]](s64) - ; CHECK: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV1]], [[SUB1]](s64) - ; CHECK: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[LSHR1]] + ; CHECK: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR]] ; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 63 ; CHECK: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[UV1]], [[C2]](s64) ; CHECK: [[ASHR2:%[0-9]+]]:_(s64) = G_ASHR [[UV1]], [[SUB]](s64) Index: test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir =================================================================== --- test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir +++ test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir @@ -799,9 +799,9 @@ ; SI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C]] ; SI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] ; SI: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[UV1]], [[TRUNC]](s32) + ; SI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[SUB1]](s32) ; SI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[TRUNC]](s32) - ; SI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV1]], [[SUB1]](s32) - ; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[LSHR1]] + ; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR]] ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 63 ; SI: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[UV1]], [[C2]](s32) ; SI: [[ASHR2:%[0-9]+]]:_(s64) = G_ASHR [[UV1]], [[SUB]](s32) @@ -823,9 +823,9 @@ ; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C]] ; VI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] ; VI: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[UV1]], [[TRUNC]](s32) + ; VI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[SUB1]](s32) ; VI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[TRUNC]](s32) - ; VI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV1]], [[SUB1]](s32) - ; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[LSHR1]] + ; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR]] ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 63 ; VI: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[UV1]], [[C2]](s32) ; VI: [[ASHR2:%[0-9]+]]:_(s64) = G_ASHR [[UV1]], [[SUB]](s32) @@ -847,9 +847,9 @@ ; GFX9: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C]] ; GFX9: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] ; GFX9: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[UV1]], [[TRUNC]](s32) + ; GFX9: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[SUB1]](s32) ; GFX9: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[TRUNC]](s32) - ; GFX9: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV1]], [[SUB1]](s32) - ; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[LSHR1]] + ; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR]] ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 63 ; GFX9: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[UV1]], [[C2]](s32) ; GFX9: [[ASHR2:%[0-9]+]]:_(s64) = G_ASHR [[UV1]], [[SUB]](s32) @@ -882,9 +882,9 @@ ; SI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[COPY1]](s32), [[C]] ; SI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C1]] ; SI: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[UV1]], [[COPY1]](s32) + ; SI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[SUB1]](s32) ; SI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[COPY1]](s32) - ; SI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV1]], [[SUB1]](s32) - ; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[LSHR1]] + ; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR]] ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 63 ; SI: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[UV1]], [[C2]](s32) ; SI: [[ASHR2:%[0-9]+]]:_(s64) = G_ASHR [[UV1]], [[SUB]](s32) @@ -904,9 +904,9 @@ ; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[COPY1]](s32), [[C]] ; VI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C1]] ; VI: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[UV1]], [[COPY1]](s32) + ; VI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[SUB1]](s32) ; VI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[COPY1]](s32) - ; VI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV1]], [[SUB1]](s32) - ; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[LSHR1]] + ; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR]] ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 63 ; VI: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[UV1]], [[C2]](s32) ; VI: [[ASHR2:%[0-9]+]]:_(s64) = G_ASHR [[UV1]], [[SUB]](s32) @@ -926,9 +926,9 @@ ; GFX9: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[COPY1]](s32), [[C]] ; GFX9: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C1]] ; GFX9: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[UV1]], [[COPY1]](s32) + ; GFX9: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[SUB1]](s32) ; GFX9: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[COPY1]](s32) - ; GFX9: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV1]], [[SUB1]](s32) - ; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[LSHR1]] + ; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR]] ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 63 ; GFX9: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[UV1]], [[C2]](s32) ; GFX9: [[ASHR2:%[0-9]+]]:_(s64) = G_ASHR [[UV1]], [[SUB]](s32) @@ -1209,58 +1209,57 @@ ; SI: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C2]] ; SI: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] ; SI: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[UV3]], [[TRUNC]](s32) + ; SI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV3]], [[SUB3]](s32) ; SI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV2]], [[TRUNC]](s32) - ; SI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV3]], [[SUB3]](s32) - ; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[LSHR1]] + ; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR]] ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 63 ; SI: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[UV3]], [[C3]](s32) ; SI: [[ASHR2:%[0-9]+]]:_(s64) = G_ASHR [[UV3]], [[SUB2]](s32) ; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[OR]], [[ASHR2]] ; SI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP3]](s1), [[UV2]], [[SELECT]] ; SI: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[ASHR]], [[ASHR1]] - ; SI: [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV]](s128) - ; SI: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[C2]] - ; SI: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[TRUNC]] - ; SI: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C2]] - ; SI: [[ICMP5:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] - ; SI: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[UV5]], [[TRUNC]](s32) - ; SI: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[TRUNC]](s32) - ; SI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[SUB5]](s32) - ; SI: [[OR1:%[0-9]+]]:_(s64) = G_OR [[LSHR3]], [[SHL]] + ; SI: [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) + ; SI: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB1]] + ; SI: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[SUB1]](s32), [[C2]] + ; SI: [[ICMP5:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[SUB1]](s32), [[C1]] + ; SI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[SUB1]](s32) + ; SI: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[SUB1]](s32) + ; SI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[SUB4]](s32) + ; SI: [[OR1:%[0-9]+]]:_(s64) = G_OR [[SHL2]], [[LSHR1]] ; SI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 - ; SI: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[UV5]], [[SUB4]](s32) - ; SI: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[OR1]], [[LSHR4]] - ; SI: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[ICMP5]](s1), [[UV4]], [[SELECT3]] - ; SI: [[SELECT5:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[LSHR2]], [[C4]] - ; SI: [[UV6:%[0-9]+]]:_(s64), [[UV7:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) - ; SI: [[SUB6:%[0-9]+]]:_(s32) = G_SUB [[SUB1]], [[C2]] - ; SI: [[SUB7:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB1]] - ; SI: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[SUB1]](s32), [[C2]] - ; SI: [[ICMP7:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[SUB1]](s32), [[C1]] - ; SI: [[LSHR5:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB1]](s32) - ; SI: [[LSHR6:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[SUB1]](s32) - ; SI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[SUB7]](s32) - ; SI: [[OR2:%[0-9]+]]:_(s64) = G_OR [[LSHR6]], [[SHL1]] - ; SI: [[LSHR7:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB6]](s32) - ; SI: [[SELECT6:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[OR2]], [[LSHR7]] + ; SI: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[SUB1]](s32) + ; SI: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[SHL1]], [[C4]] + ; SI: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[OR1]], [[SHL3]] + ; SI: [[SELECT5:%[0-9]+]]:_(s64) = G_SELECT [[ICMP5]](s1), [[UV5]], [[SELECT4]] + ; SI: [[UV6:%[0-9]+]]:_(s64), [[UV7:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV]](s128) + ; SI: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[C2]] + ; SI: [[SUB6:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[TRUNC]] + ; SI: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C2]] + ; SI: [[ICMP7:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] + ; SI: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[TRUNC]](s32) + ; SI: [[SHL4:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[SUB6]](s32) + ; SI: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[TRUNC]](s32) + ; SI: [[OR2:%[0-9]+]]:_(s64) = G_OR [[SHL4]], [[LSHR3]] + ; SI: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB5]](s32) + ; SI: [[SELECT6:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[OR2]], [[LSHR4]] ; SI: [[SELECT7:%[0-9]+]]:_(s64) = G_SELECT [[ICMP7]](s1), [[UV6]], [[SELECT6]] - ; SI: [[SELECT8:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[LSHR5]], [[C4]] - ; SI: [[OR3:%[0-9]+]]:_(s64) = G_OR [[SELECT4]], [[SELECT7]] + ; SI: [[SELECT8:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[LSHR2]], [[C4]] + ; SI: [[OR3:%[0-9]+]]:_(s64) = G_OR [[SELECT3]], [[SELECT7]] ; SI: [[OR4:%[0-9]+]]:_(s64) = G_OR [[SELECT5]], [[SELECT8]] ; SI: [[UV8:%[0-9]+]]:_(s64), [[UV9:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) ; SI: [[ASHR3:%[0-9]+]]:_(s64) = G_ASHR [[UV9]], [[C3]](s32) ; SI: [[ASHR4:%[0-9]+]]:_(s64) = G_ASHR [[UV9]], [[C3]](s32) ; SI: [[UV10:%[0-9]+]]:_(s64), [[UV11:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) - ; SI: [[SUB8:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C2]] - ; SI: [[SUB9:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB]] + ; SI: [[SUB7:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C2]] + ; SI: [[SUB8:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB]] ; SI: [[ICMP8:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[SUB]](s32), [[C2]] ; SI: [[ICMP9:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[SUB]](s32), [[C1]] ; SI: [[ASHR5:%[0-9]+]]:_(s64) = G_ASHR [[UV11]], [[SUB]](s32) - ; SI: [[LSHR8:%[0-9]+]]:_(s64) = G_LSHR [[UV10]], [[SUB]](s32) - ; SI: [[LSHR9:%[0-9]+]]:_(s64) = G_LSHR [[UV11]], [[SUB9]](s32) - ; SI: [[OR5:%[0-9]+]]:_(s64) = G_OR [[LSHR8]], [[LSHR9]] + ; SI: [[SHL5:%[0-9]+]]:_(s64) = G_SHL [[UV11]], [[SUB8]](s32) + ; SI: [[LSHR5:%[0-9]+]]:_(s64) = G_LSHR [[UV10]], [[SUB]](s32) + ; SI: [[OR5:%[0-9]+]]:_(s64) = G_OR [[SHL5]], [[LSHR5]] ; SI: [[ASHR6:%[0-9]+]]:_(s64) = G_ASHR [[UV11]], [[C3]](s32) - ; SI: [[ASHR7:%[0-9]+]]:_(s64) = G_ASHR [[UV11]], [[SUB8]](s32) + ; SI: [[ASHR7:%[0-9]+]]:_(s64) = G_ASHR [[UV11]], [[SUB7]](s32) ; SI: [[SELECT9:%[0-9]+]]:_(s64) = G_SELECT [[ICMP8]](s1), [[OR5]], [[ASHR7]] ; SI: [[SELECT10:%[0-9]+]]:_(s64) = G_SELECT [[ICMP9]](s1), [[UV10]], [[SELECT9]] ; SI: [[SELECT11:%[0-9]+]]:_(s64) = G_SELECT [[ICMP8]](s1), [[ASHR5]], [[ASHR6]] @@ -1294,58 +1293,57 @@ ; VI: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C2]] ; VI: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] ; VI: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[UV3]], [[TRUNC]](s32) + ; VI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV3]], [[SUB3]](s32) ; VI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV2]], [[TRUNC]](s32) - ; VI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV3]], [[SUB3]](s32) - ; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[LSHR1]] + ; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR]] ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 63 ; VI: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[UV3]], [[C3]](s32) ; VI: [[ASHR2:%[0-9]+]]:_(s64) = G_ASHR [[UV3]], [[SUB2]](s32) ; VI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[OR]], [[ASHR2]] ; VI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP3]](s1), [[UV2]], [[SELECT]] ; VI: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[ASHR]], [[ASHR1]] - ; VI: [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV]](s128) - ; VI: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[C2]] - ; VI: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[TRUNC]] - ; VI: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C2]] - ; VI: [[ICMP5:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] - ; VI: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[UV5]], [[TRUNC]](s32) - ; VI: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[TRUNC]](s32) - ; VI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[SUB5]](s32) - ; VI: [[OR1:%[0-9]+]]:_(s64) = G_OR [[LSHR3]], [[SHL]] + ; VI: [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) + ; VI: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB1]] + ; VI: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[SUB1]](s32), [[C2]] + ; VI: [[ICMP5:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[SUB1]](s32), [[C1]] + ; VI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[SUB1]](s32) + ; VI: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[SUB1]](s32) + ; VI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[SUB4]](s32) + ; VI: [[OR1:%[0-9]+]]:_(s64) = G_OR [[SHL2]], [[LSHR1]] ; VI: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 - ; VI: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[UV5]], [[SUB4]](s32) - ; VI: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[OR1]], [[LSHR4]] - ; VI: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[ICMP5]](s1), [[UV4]], [[SELECT3]] - ; VI: [[SELECT5:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[LSHR2]], [[C4]] - ; VI: [[UV6:%[0-9]+]]:_(s64), [[UV7:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) - ; VI: [[SUB6:%[0-9]+]]:_(s32) = G_SUB [[SUB1]], [[C2]] - ; VI: [[SUB7:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB1]] - ; VI: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[SUB1]](s32), [[C2]] - ; VI: [[ICMP7:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[SUB1]](s32), [[C1]] - ; VI: [[LSHR5:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB1]](s32) - ; VI: [[LSHR6:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[SUB1]](s32) - ; VI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[SUB7]](s32) - ; VI: [[OR2:%[0-9]+]]:_(s64) = G_OR [[LSHR6]], [[SHL1]] - ; VI: [[LSHR7:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB6]](s32) - ; VI: [[SELECT6:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[OR2]], [[LSHR7]] + ; VI: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[SUB1]](s32) + ; VI: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[SHL1]], [[C4]] + ; VI: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[OR1]], [[SHL3]] + ; VI: [[SELECT5:%[0-9]+]]:_(s64) = G_SELECT [[ICMP5]](s1), [[UV5]], [[SELECT4]] + ; VI: [[UV6:%[0-9]+]]:_(s64), [[UV7:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV]](s128) + ; VI: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[C2]] + ; VI: [[SUB6:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[TRUNC]] + ; VI: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C2]] + ; VI: [[ICMP7:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] + ; VI: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[TRUNC]](s32) + ; VI: [[SHL4:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[SUB6]](s32) + ; VI: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[TRUNC]](s32) + ; VI: [[OR2:%[0-9]+]]:_(s64) = G_OR [[SHL4]], [[LSHR3]] + ; VI: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB5]](s32) + ; VI: [[SELECT6:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[OR2]], [[LSHR4]] ; VI: [[SELECT7:%[0-9]+]]:_(s64) = G_SELECT [[ICMP7]](s1), [[UV6]], [[SELECT6]] - ; VI: [[SELECT8:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[LSHR5]], [[C4]] - ; VI: [[OR3:%[0-9]+]]:_(s64) = G_OR [[SELECT4]], [[SELECT7]] + ; VI: [[SELECT8:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[LSHR2]], [[C4]] + ; VI: [[OR3:%[0-9]+]]:_(s64) = G_OR [[SELECT3]], [[SELECT7]] ; VI: [[OR4:%[0-9]+]]:_(s64) = G_OR [[SELECT5]], [[SELECT8]] ; VI: [[UV8:%[0-9]+]]:_(s64), [[UV9:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) ; VI: [[ASHR3:%[0-9]+]]:_(s64) = G_ASHR [[UV9]], [[C3]](s32) ; VI: [[ASHR4:%[0-9]+]]:_(s64) = G_ASHR [[UV9]], [[C3]](s32) ; VI: [[UV10:%[0-9]+]]:_(s64), [[UV11:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) - ; VI: [[SUB8:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C2]] - ; VI: [[SUB9:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB]] + ; VI: [[SUB7:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C2]] + ; VI: [[SUB8:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB]] ; VI: [[ICMP8:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[SUB]](s32), [[C2]] ; VI: [[ICMP9:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[SUB]](s32), [[C1]] ; VI: [[ASHR5:%[0-9]+]]:_(s64) = G_ASHR [[UV11]], [[SUB]](s32) - ; VI: [[LSHR8:%[0-9]+]]:_(s64) = G_LSHR [[UV10]], [[SUB]](s32) - ; VI: [[LSHR9:%[0-9]+]]:_(s64) = G_LSHR [[UV11]], [[SUB9]](s32) - ; VI: [[OR5:%[0-9]+]]:_(s64) = G_OR [[LSHR8]], [[LSHR9]] + ; VI: [[SHL5:%[0-9]+]]:_(s64) = G_SHL [[UV11]], [[SUB8]](s32) + ; VI: [[LSHR5:%[0-9]+]]:_(s64) = G_LSHR [[UV10]], [[SUB]](s32) + ; VI: [[OR5:%[0-9]+]]:_(s64) = G_OR [[SHL5]], [[LSHR5]] ; VI: [[ASHR6:%[0-9]+]]:_(s64) = G_ASHR [[UV11]], [[C3]](s32) - ; VI: [[ASHR7:%[0-9]+]]:_(s64) = G_ASHR [[UV11]], [[SUB8]](s32) + ; VI: [[ASHR7:%[0-9]+]]:_(s64) = G_ASHR [[UV11]], [[SUB7]](s32) ; VI: [[SELECT9:%[0-9]+]]:_(s64) = G_SELECT [[ICMP8]](s1), [[OR5]], [[ASHR7]] ; VI: [[SELECT10:%[0-9]+]]:_(s64) = G_SELECT [[ICMP9]](s1), [[UV10]], [[SELECT9]] ; VI: [[SELECT11:%[0-9]+]]:_(s64) = G_SELECT [[ICMP8]](s1), [[ASHR5]], [[ASHR6]] @@ -1379,58 +1377,57 @@ ; GFX9: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C2]] ; GFX9: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] ; GFX9: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[UV3]], [[TRUNC]](s32) + ; GFX9: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV3]], [[SUB3]](s32) ; GFX9: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV2]], [[TRUNC]](s32) - ; GFX9: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV3]], [[SUB3]](s32) - ; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[LSHR1]] + ; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR]] ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 63 ; GFX9: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[UV3]], [[C3]](s32) ; GFX9: [[ASHR2:%[0-9]+]]:_(s64) = G_ASHR [[UV3]], [[SUB2]](s32) ; GFX9: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[OR]], [[ASHR2]] ; GFX9: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP3]](s1), [[UV2]], [[SELECT]] ; GFX9: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[ASHR]], [[ASHR1]] - ; GFX9: [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV]](s128) - ; GFX9: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[C2]] - ; GFX9: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[TRUNC]] - ; GFX9: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C2]] - ; GFX9: [[ICMP5:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] - ; GFX9: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[UV5]], [[TRUNC]](s32) - ; GFX9: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[TRUNC]](s32) - ; GFX9: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[SUB5]](s32) - ; GFX9: [[OR1:%[0-9]+]]:_(s64) = G_OR [[LSHR3]], [[SHL]] + ; GFX9: [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) + ; GFX9: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB1]] + ; GFX9: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[SUB1]](s32), [[C2]] + ; GFX9: [[ICMP5:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[SUB1]](s32), [[C1]] + ; GFX9: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[SUB1]](s32) + ; GFX9: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[SUB1]](s32) + ; GFX9: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[SUB4]](s32) + ; GFX9: [[OR1:%[0-9]+]]:_(s64) = G_OR [[SHL2]], [[LSHR1]] ; GFX9: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 - ; GFX9: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[UV5]], [[SUB4]](s32) - ; GFX9: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[OR1]], [[LSHR4]] - ; GFX9: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[ICMP5]](s1), [[UV4]], [[SELECT3]] - ; GFX9: [[SELECT5:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[LSHR2]], [[C4]] - ; GFX9: [[UV6:%[0-9]+]]:_(s64), [[UV7:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) - ; GFX9: [[SUB6:%[0-9]+]]:_(s32) = G_SUB [[SUB1]], [[C2]] - ; GFX9: [[SUB7:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB1]] - ; GFX9: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[SUB1]](s32), [[C2]] - ; GFX9: [[ICMP7:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[SUB1]](s32), [[C1]] - ; GFX9: [[LSHR5:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB1]](s32) - ; GFX9: [[LSHR6:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[SUB1]](s32) - ; GFX9: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[SUB7]](s32) - ; GFX9: [[OR2:%[0-9]+]]:_(s64) = G_OR [[LSHR6]], [[SHL1]] - ; GFX9: [[LSHR7:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB6]](s32) - ; GFX9: [[SELECT6:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[OR2]], [[LSHR7]] + ; GFX9: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[SUB1]](s32) + ; GFX9: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[SHL1]], [[C4]] + ; GFX9: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[OR1]], [[SHL3]] + ; GFX9: [[SELECT5:%[0-9]+]]:_(s64) = G_SELECT [[ICMP5]](s1), [[UV5]], [[SELECT4]] + ; GFX9: [[UV6:%[0-9]+]]:_(s64), [[UV7:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV]](s128) + ; GFX9: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[C2]] + ; GFX9: [[SUB6:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[TRUNC]] + ; GFX9: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C2]] + ; GFX9: [[ICMP7:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] + ; GFX9: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[TRUNC]](s32) + ; GFX9: [[SHL4:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[SUB6]](s32) + ; GFX9: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[TRUNC]](s32) + ; GFX9: [[OR2:%[0-9]+]]:_(s64) = G_OR [[SHL4]], [[LSHR3]] + ; GFX9: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB5]](s32) + ; GFX9: [[SELECT6:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[OR2]], [[LSHR4]] ; GFX9: [[SELECT7:%[0-9]+]]:_(s64) = G_SELECT [[ICMP7]](s1), [[UV6]], [[SELECT6]] - ; GFX9: [[SELECT8:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[LSHR5]], [[C4]] - ; GFX9: [[OR3:%[0-9]+]]:_(s64) = G_OR [[SELECT4]], [[SELECT7]] + ; GFX9: [[SELECT8:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[LSHR2]], [[C4]] + ; GFX9: [[OR3:%[0-9]+]]:_(s64) = G_OR [[SELECT3]], [[SELECT7]] ; GFX9: [[OR4:%[0-9]+]]:_(s64) = G_OR [[SELECT5]], [[SELECT8]] ; GFX9: [[UV8:%[0-9]+]]:_(s64), [[UV9:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) ; GFX9: [[ASHR3:%[0-9]+]]:_(s64) = G_ASHR [[UV9]], [[C3]](s32) ; GFX9: [[ASHR4:%[0-9]+]]:_(s64) = G_ASHR [[UV9]], [[C3]](s32) ; GFX9: [[UV10:%[0-9]+]]:_(s64), [[UV11:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) - ; GFX9: [[SUB8:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C2]] - ; GFX9: [[SUB9:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB]] + ; GFX9: [[SUB7:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C2]] + ; GFX9: [[SUB8:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB]] ; GFX9: [[ICMP8:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[SUB]](s32), [[C2]] ; GFX9: [[ICMP9:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[SUB]](s32), [[C1]] ; GFX9: [[ASHR5:%[0-9]+]]:_(s64) = G_ASHR [[UV11]], [[SUB]](s32) - ; GFX9: [[LSHR8:%[0-9]+]]:_(s64) = G_LSHR [[UV10]], [[SUB]](s32) - ; GFX9: [[LSHR9:%[0-9]+]]:_(s64) = G_LSHR [[UV11]], [[SUB9]](s32) - ; GFX9: [[OR5:%[0-9]+]]:_(s64) = G_OR [[LSHR8]], [[LSHR9]] + ; GFX9: [[SHL5:%[0-9]+]]:_(s64) = G_SHL [[UV11]], [[SUB8]](s32) + ; GFX9: [[LSHR5:%[0-9]+]]:_(s64) = G_LSHR [[UV10]], [[SUB]](s32) + ; GFX9: [[OR5:%[0-9]+]]:_(s64) = G_OR [[SHL5]], [[LSHR5]] ; GFX9: [[ASHR6:%[0-9]+]]:_(s64) = G_ASHR [[UV11]], [[C3]](s32) - ; GFX9: [[ASHR7:%[0-9]+]]:_(s64) = G_ASHR [[UV11]], [[SUB8]](s32) + ; GFX9: [[ASHR7:%[0-9]+]]:_(s64) = G_ASHR [[UV11]], [[SUB7]](s32) ; GFX9: [[SELECT9:%[0-9]+]]:_(s64) = G_SELECT [[ICMP8]](s1), [[OR5]], [[ASHR7]] ; GFX9: [[SELECT10:%[0-9]+]]:_(s64) = G_SELECT [[ICMP9]](s1), [[UV10]], [[SELECT9]] ; GFX9: [[SELECT11:%[0-9]+]]:_(s64) = G_SELECT [[ICMP8]](s1), [[ASHR5]], [[ASHR6]] @@ -1471,9 +1468,9 @@ ; SI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[UV2]](s32), [[C]] ; SI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV2]](s32), [[C1]] ; SI: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[UV5]], [[UV2]](s32) + ; SI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[SUB1]](s32) ; SI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[UV2]](s32) - ; SI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV5]], [[SUB1]](s32) - ; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[LSHR1]] + ; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR]] ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 63 ; SI: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[UV5]], [[C2]](s32) ; SI: [[ASHR2:%[0-9]+]]:_(s64) = G_ASHR [[UV5]], [[SUB]](s32) @@ -1487,9 +1484,9 @@ ; SI: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[UV3]](s32), [[C]] ; SI: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV3]](s32), [[C1]] ; SI: [[ASHR3:%[0-9]+]]:_(s64) = G_ASHR [[UV7]], [[UV3]](s32) - ; SI: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[UV3]](s32) - ; SI: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB3]](s32) - ; SI: [[OR1:%[0-9]+]]:_(s64) = G_OR [[LSHR2]], [[LSHR3]] + ; SI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[SUB3]](s32) + ; SI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[UV3]](s32) + ; SI: [[OR1:%[0-9]+]]:_(s64) = G_OR [[SHL1]], [[LSHR1]] ; SI: [[ASHR4:%[0-9]+]]:_(s64) = G_ASHR [[UV7]], [[C2]](s32) ; SI: [[ASHR5:%[0-9]+]]:_(s64) = G_ASHR [[UV7]], [[SUB2]](s32) ; SI: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[OR1]], [[ASHR5]] @@ -1511,9 +1508,9 @@ ; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[UV2]](s32), [[C]] ; VI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV2]](s32), [[C1]] ; VI: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[UV5]], [[UV2]](s32) + ; VI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[SUB1]](s32) ; VI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[UV2]](s32) - ; VI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV5]], [[SUB1]](s32) - ; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[LSHR1]] + ; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR]] ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 63 ; VI: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[UV5]], [[C2]](s32) ; VI: [[ASHR2:%[0-9]+]]:_(s64) = G_ASHR [[UV5]], [[SUB]](s32) @@ -1527,9 +1524,9 @@ ; VI: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[UV3]](s32), [[C]] ; VI: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV3]](s32), [[C1]] ; VI: [[ASHR3:%[0-9]+]]:_(s64) = G_ASHR [[UV7]], [[UV3]](s32) - ; VI: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[UV3]](s32) - ; VI: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB3]](s32) - ; VI: [[OR1:%[0-9]+]]:_(s64) = G_OR [[LSHR2]], [[LSHR3]] + ; VI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[SUB3]](s32) + ; VI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[UV3]](s32) + ; VI: [[OR1:%[0-9]+]]:_(s64) = G_OR [[SHL1]], [[LSHR1]] ; VI: [[ASHR4:%[0-9]+]]:_(s64) = G_ASHR [[UV7]], [[C2]](s32) ; VI: [[ASHR5:%[0-9]+]]:_(s64) = G_ASHR [[UV7]], [[SUB2]](s32) ; VI: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[OR1]], [[ASHR5]] @@ -1551,9 +1548,9 @@ ; GFX9: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[UV2]](s32), [[C]] ; GFX9: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV2]](s32), [[C1]] ; GFX9: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[UV5]], [[UV2]](s32) + ; GFX9: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[SUB1]](s32) ; GFX9: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[UV2]](s32) - ; GFX9: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV5]], [[SUB1]](s32) - ; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[LSHR1]] + ; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR]] ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 63 ; GFX9: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[UV5]], [[C2]](s32) ; GFX9: [[ASHR2:%[0-9]+]]:_(s64) = G_ASHR [[UV5]], [[SUB]](s32) @@ -1567,9 +1564,9 @@ ; GFX9: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[UV3]](s32), [[C]] ; GFX9: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV3]](s32), [[C1]] ; GFX9: [[ASHR3:%[0-9]+]]:_(s64) = G_ASHR [[UV7]], [[UV3]](s32) - ; GFX9: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[UV3]](s32) - ; GFX9: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB3]](s32) - ; GFX9: [[OR1:%[0-9]+]]:_(s64) = G_OR [[LSHR2]], [[LSHR3]] + ; GFX9: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[SUB3]](s32) + ; GFX9: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[UV3]](s32) + ; GFX9: [[OR1:%[0-9]+]]:_(s64) = G_OR [[SHL1]], [[LSHR1]] ; GFX9: [[ASHR4:%[0-9]+]]:_(s64) = G_ASHR [[UV7]], [[C2]](s32) ; GFX9: [[ASHR5:%[0-9]+]]:_(s64) = G_ASHR [[UV7]], [[SUB2]](s32) ; GFX9: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[OR1]], [[ASHR5]] Index: test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir =================================================================== --- test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir +++ test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir @@ -780,9 +780,9 @@ ; SI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C]] ; SI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] ; SI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV1]], [[TRUNC]](s32) - ; SI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[TRUNC]](s32) ; SI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[SUB1]](s32) - ; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR1]], [[SHL]] + ; SI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[TRUNC]](s32) + ; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR1]] ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 ; SI: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[UV1]], [[SUB]](s32) ; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[OR]], [[LSHR2]] @@ -803,9 +803,9 @@ ; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C]] ; VI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] ; VI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV1]], [[TRUNC]](s32) - ; VI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[TRUNC]](s32) ; VI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[SUB1]](s32) - ; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR1]], [[SHL]] + ; VI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[TRUNC]](s32) + ; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR1]] ; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 ; VI: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[UV1]], [[SUB]](s32) ; VI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[OR]], [[LSHR2]] @@ -826,9 +826,9 @@ ; GFX9: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C]] ; GFX9: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] ; GFX9: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV1]], [[TRUNC]](s32) - ; GFX9: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[TRUNC]](s32) ; GFX9: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[SUB1]](s32) - ; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR1]], [[SHL]] + ; GFX9: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[TRUNC]](s32) + ; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR1]] ; GFX9: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 ; GFX9: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[UV1]], [[SUB]](s32) ; GFX9: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[OR]], [[LSHR2]] @@ -860,9 +860,9 @@ ; SI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[COPY1]](s32), [[C]] ; SI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C1]] ; SI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV1]], [[COPY1]](s32) - ; SI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[COPY1]](s32) ; SI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[SUB1]](s32) - ; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR1]], [[SHL]] + ; SI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[COPY1]](s32) + ; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR1]] ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 ; SI: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[UV1]], [[SUB]](s32) ; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[OR]], [[LSHR2]] @@ -881,9 +881,9 @@ ; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[COPY1]](s32), [[C]] ; VI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C1]] ; VI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV1]], [[COPY1]](s32) - ; VI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[COPY1]](s32) ; VI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[SUB1]](s32) - ; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR1]], [[SHL]] + ; VI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[COPY1]](s32) + ; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR1]] ; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 ; VI: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[UV1]], [[SUB]](s32) ; VI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[OR]], [[LSHR2]] @@ -902,9 +902,9 @@ ; GFX9: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[COPY1]](s32), [[C]] ; GFX9: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C1]] ; GFX9: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV1]], [[COPY1]](s32) - ; GFX9: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[COPY1]](s32) ; GFX9: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[SUB1]](s32) - ; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR1]], [[SHL]] + ; GFX9: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[COPY1]](s32) + ; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR1]] ; GFX9: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 ; GFX9: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[UV1]], [[SUB]](s32) ; GFX9: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[OR]], [[LSHR2]] @@ -1184,52 +1184,51 @@ ; SI: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C2]] ; SI: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] ; SI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV3]], [[TRUNC]](s32) - ; SI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV2]], [[TRUNC]](s32) ; SI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV3]], [[SUB3]](s32) - ; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR1]], [[SHL]] + ; SI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV2]], [[TRUNC]](s32) + ; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR1]] ; SI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 ; SI: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[UV3]], [[SUB2]](s32) ; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[OR]], [[LSHR2]] ; SI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP3]](s1), [[UV2]], [[SELECT]] ; SI: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[LSHR]], [[C3]] - ; SI: [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV]](s128) - ; SI: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[C2]] - ; SI: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[TRUNC]] - ; SI: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C2]] - ; SI: [[ICMP5:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] - ; SI: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[UV5]], [[TRUNC]](s32) - ; SI: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[TRUNC]](s32) - ; SI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[SUB5]](s32) - ; SI: [[OR1:%[0-9]+]]:_(s64) = G_OR [[LSHR4]], [[SHL1]] - ; SI: [[LSHR5:%[0-9]+]]:_(s64) = G_LSHR [[UV5]], [[SUB4]](s32) - ; SI: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[OR1]], [[LSHR5]] - ; SI: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[ICMP5]](s1), [[UV4]], [[SELECT3]] - ; SI: [[SELECT5:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[LSHR3]], [[C3]] - ; SI: [[UV6:%[0-9]+]]:_(s64), [[UV7:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) - ; SI: [[SUB6:%[0-9]+]]:_(s32) = G_SUB [[SUB1]], [[C2]] - ; SI: [[SUB7:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB1]] - ; SI: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[SUB1]](s32), [[C2]] - ; SI: [[ICMP7:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[SUB1]](s32), [[C1]] - ; SI: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[SUB1]](s32) - ; SI: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[SUB1]](s32) - ; SI: [[LSHR6:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[SUB7]](s32) - ; SI: [[OR2:%[0-9]+]]:_(s64) = G_OR [[SHL3]], [[LSHR6]] - ; SI: [[SHL4:%[0-9]+]]:_(s64) = G_SHL [[UV6]], [[SUB6]](s32) - ; SI: [[SELECT6:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[SHL2]], [[C3]] - ; SI: [[SELECT7:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[OR2]], [[SHL4]] - ; SI: [[SELECT8:%[0-9]+]]:_(s64) = G_SELECT [[ICMP7]](s1), [[UV7]], [[SELECT7]] - ; SI: [[OR3:%[0-9]+]]:_(s64) = G_OR [[SELECT4]], [[SELECT6]] + ; SI: [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) + ; SI: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB1]] + ; SI: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[SUB1]](s32), [[C2]] + ; SI: [[ICMP5:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[SUB1]](s32), [[C1]] + ; SI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[SUB1]](s32) + ; SI: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[SUB1]](s32) + ; SI: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[SUB4]](s32) + ; SI: [[OR1:%[0-9]+]]:_(s64) = G_OR [[SHL2]], [[LSHR3]] + ; SI: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[SUB1]](s32) + ; SI: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[SHL1]], [[C3]] + ; SI: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[OR1]], [[SHL3]] + ; SI: [[SELECT5:%[0-9]+]]:_(s64) = G_SELECT [[ICMP5]](s1), [[UV5]], [[SELECT4]] + ; SI: [[UV6:%[0-9]+]]:_(s64), [[UV7:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV]](s128) + ; SI: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[C2]] + ; SI: [[SUB6:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[TRUNC]] + ; SI: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C2]] + ; SI: [[ICMP7:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] + ; SI: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[TRUNC]](s32) + ; SI: [[SHL4:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[SUB6]](s32) + ; SI: [[LSHR5:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[TRUNC]](s32) + ; SI: [[OR2:%[0-9]+]]:_(s64) = G_OR [[SHL4]], [[LSHR5]] + ; SI: [[LSHR6:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB5]](s32) + ; SI: [[SELECT6:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[OR2]], [[LSHR6]] + ; SI: [[SELECT7:%[0-9]+]]:_(s64) = G_SELECT [[ICMP7]](s1), [[UV6]], [[SELECT6]] + ; SI: [[SELECT8:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[LSHR4]], [[C3]] + ; SI: [[OR3:%[0-9]+]]:_(s64) = G_OR [[SELECT3]], [[SELECT7]] ; SI: [[OR4:%[0-9]+]]:_(s64) = G_OR [[SELECT5]], [[SELECT8]] ; SI: [[UV8:%[0-9]+]]:_(s64), [[UV9:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) - ; SI: [[SUB8:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C2]] - ; SI: [[SUB9:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB]] + ; SI: [[SUB7:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C2]] + ; SI: [[SUB8:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB]] ; SI: [[ICMP8:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[SUB]](s32), [[C2]] ; SI: [[ICMP9:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[SUB]](s32), [[C1]] ; SI: [[LSHR7:%[0-9]+]]:_(s64) = G_LSHR [[UV9]], [[SUB]](s32) + ; SI: [[SHL5:%[0-9]+]]:_(s64) = G_SHL [[UV9]], [[SUB8]](s32) ; SI: [[LSHR8:%[0-9]+]]:_(s64) = G_LSHR [[UV8]], [[SUB]](s32) - ; SI: [[SHL5:%[0-9]+]]:_(s64) = G_SHL [[UV9]], [[SUB9]](s32) - ; SI: [[OR5:%[0-9]+]]:_(s64) = G_OR [[LSHR8]], [[SHL5]] - ; SI: [[LSHR9:%[0-9]+]]:_(s64) = G_LSHR [[UV9]], [[SUB8]](s32) + ; SI: [[OR5:%[0-9]+]]:_(s64) = G_OR [[SHL5]], [[LSHR8]] + ; SI: [[LSHR9:%[0-9]+]]:_(s64) = G_LSHR [[UV9]], [[SUB7]](s32) ; SI: [[SELECT9:%[0-9]+]]:_(s64) = G_SELECT [[ICMP8]](s1), [[OR5]], [[LSHR9]] ; SI: [[SELECT10:%[0-9]+]]:_(s64) = G_SELECT [[ICMP9]](s1), [[UV8]], [[SELECT9]] ; SI: [[SELECT11:%[0-9]+]]:_(s64) = G_SELECT [[ICMP8]](s1), [[LSHR7]], [[C3]] @@ -1263,52 +1262,51 @@ ; VI: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C2]] ; VI: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] ; VI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV3]], [[TRUNC]](s32) - ; VI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV2]], [[TRUNC]](s32) ; VI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV3]], [[SUB3]](s32) - ; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR1]], [[SHL]] + ; VI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV2]], [[TRUNC]](s32) + ; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR1]] ; VI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 ; VI: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[UV3]], [[SUB2]](s32) ; VI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[OR]], [[LSHR2]] ; VI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP3]](s1), [[UV2]], [[SELECT]] ; VI: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[LSHR]], [[C3]] - ; VI: [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV]](s128) - ; VI: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[C2]] - ; VI: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[TRUNC]] - ; VI: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C2]] - ; VI: [[ICMP5:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] - ; VI: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[UV5]], [[TRUNC]](s32) - ; VI: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[TRUNC]](s32) - ; VI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[SUB5]](s32) - ; VI: [[OR1:%[0-9]+]]:_(s64) = G_OR [[LSHR4]], [[SHL1]] - ; VI: [[LSHR5:%[0-9]+]]:_(s64) = G_LSHR [[UV5]], [[SUB4]](s32) - ; VI: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[OR1]], [[LSHR5]] - ; VI: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[ICMP5]](s1), [[UV4]], [[SELECT3]] - ; VI: [[SELECT5:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[LSHR3]], [[C3]] - ; VI: [[UV6:%[0-9]+]]:_(s64), [[UV7:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) - ; VI: [[SUB6:%[0-9]+]]:_(s32) = G_SUB [[SUB1]], [[C2]] - ; VI: [[SUB7:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB1]] - ; VI: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[SUB1]](s32), [[C2]] - ; VI: [[ICMP7:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[SUB1]](s32), [[C1]] - ; VI: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[SUB1]](s32) - ; VI: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[SUB1]](s32) - ; VI: [[LSHR6:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[SUB7]](s32) - ; VI: [[OR2:%[0-9]+]]:_(s64) = G_OR [[SHL3]], [[LSHR6]] - ; VI: [[SHL4:%[0-9]+]]:_(s64) = G_SHL [[UV6]], [[SUB6]](s32) - ; VI: [[SELECT6:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[SHL2]], [[C3]] - ; VI: [[SELECT7:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[OR2]], [[SHL4]] - ; VI: [[SELECT8:%[0-9]+]]:_(s64) = G_SELECT [[ICMP7]](s1), [[UV7]], [[SELECT7]] - ; VI: [[OR3:%[0-9]+]]:_(s64) = G_OR [[SELECT4]], [[SELECT6]] + ; VI: [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) + ; VI: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB1]] + ; VI: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[SUB1]](s32), [[C2]] + ; VI: [[ICMP5:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[SUB1]](s32), [[C1]] + ; VI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[SUB1]](s32) + ; VI: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[SUB1]](s32) + ; VI: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[SUB4]](s32) + ; VI: [[OR1:%[0-9]+]]:_(s64) = G_OR [[SHL2]], [[LSHR3]] + ; VI: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[SUB1]](s32) + ; VI: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[SHL1]], [[C3]] + ; VI: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[OR1]], [[SHL3]] + ; VI: [[SELECT5:%[0-9]+]]:_(s64) = G_SELECT [[ICMP5]](s1), [[UV5]], [[SELECT4]] + ; VI: [[UV6:%[0-9]+]]:_(s64), [[UV7:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV]](s128) + ; VI: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[C2]] + ; VI: [[SUB6:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[TRUNC]] + ; VI: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C2]] + ; VI: [[ICMP7:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] + ; VI: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[TRUNC]](s32) + ; VI: [[SHL4:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[SUB6]](s32) + ; VI: [[LSHR5:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[TRUNC]](s32) + ; VI: [[OR2:%[0-9]+]]:_(s64) = G_OR [[SHL4]], [[LSHR5]] + ; VI: [[LSHR6:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB5]](s32) + ; VI: [[SELECT6:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[OR2]], [[LSHR6]] + ; VI: [[SELECT7:%[0-9]+]]:_(s64) = G_SELECT [[ICMP7]](s1), [[UV6]], [[SELECT6]] + ; VI: [[SELECT8:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[LSHR4]], [[C3]] + ; VI: [[OR3:%[0-9]+]]:_(s64) = G_OR [[SELECT3]], [[SELECT7]] ; VI: [[OR4:%[0-9]+]]:_(s64) = G_OR [[SELECT5]], [[SELECT8]] ; VI: [[UV8:%[0-9]+]]:_(s64), [[UV9:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) - ; VI: [[SUB8:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C2]] - ; VI: [[SUB9:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB]] + ; VI: [[SUB7:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C2]] + ; VI: [[SUB8:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB]] ; VI: [[ICMP8:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[SUB]](s32), [[C2]] ; VI: [[ICMP9:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[SUB]](s32), [[C1]] ; VI: [[LSHR7:%[0-9]+]]:_(s64) = G_LSHR [[UV9]], [[SUB]](s32) + ; VI: [[SHL5:%[0-9]+]]:_(s64) = G_SHL [[UV9]], [[SUB8]](s32) ; VI: [[LSHR8:%[0-9]+]]:_(s64) = G_LSHR [[UV8]], [[SUB]](s32) - ; VI: [[SHL5:%[0-9]+]]:_(s64) = G_SHL [[UV9]], [[SUB9]](s32) - ; VI: [[OR5:%[0-9]+]]:_(s64) = G_OR [[LSHR8]], [[SHL5]] - ; VI: [[LSHR9:%[0-9]+]]:_(s64) = G_LSHR [[UV9]], [[SUB8]](s32) + ; VI: [[OR5:%[0-9]+]]:_(s64) = G_OR [[SHL5]], [[LSHR8]] + ; VI: [[LSHR9:%[0-9]+]]:_(s64) = G_LSHR [[UV9]], [[SUB7]](s32) ; VI: [[SELECT9:%[0-9]+]]:_(s64) = G_SELECT [[ICMP8]](s1), [[OR5]], [[LSHR9]] ; VI: [[SELECT10:%[0-9]+]]:_(s64) = G_SELECT [[ICMP9]](s1), [[UV8]], [[SELECT9]] ; VI: [[SELECT11:%[0-9]+]]:_(s64) = G_SELECT [[ICMP8]](s1), [[LSHR7]], [[C3]] @@ -1342,52 +1340,51 @@ ; GFX9: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C2]] ; GFX9: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] ; GFX9: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV3]], [[TRUNC]](s32) - ; GFX9: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV2]], [[TRUNC]](s32) ; GFX9: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV3]], [[SUB3]](s32) - ; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR1]], [[SHL]] + ; GFX9: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV2]], [[TRUNC]](s32) + ; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR1]] ; GFX9: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 ; GFX9: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[UV3]], [[SUB2]](s32) ; GFX9: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[OR]], [[LSHR2]] ; GFX9: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP3]](s1), [[UV2]], [[SELECT]] ; GFX9: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[LSHR]], [[C3]] - ; GFX9: [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV]](s128) - ; GFX9: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[C2]] - ; GFX9: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[TRUNC]] - ; GFX9: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C2]] - ; GFX9: [[ICMP5:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] - ; GFX9: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[UV5]], [[TRUNC]](s32) - ; GFX9: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[TRUNC]](s32) - ; GFX9: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[SUB5]](s32) - ; GFX9: [[OR1:%[0-9]+]]:_(s64) = G_OR [[LSHR4]], [[SHL1]] - ; GFX9: [[LSHR5:%[0-9]+]]:_(s64) = G_LSHR [[UV5]], [[SUB4]](s32) - ; GFX9: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[OR1]], [[LSHR5]] - ; GFX9: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[ICMP5]](s1), [[UV4]], [[SELECT3]] - ; GFX9: [[SELECT5:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[LSHR3]], [[C3]] - ; GFX9: [[UV6:%[0-9]+]]:_(s64), [[UV7:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) - ; GFX9: [[SUB6:%[0-9]+]]:_(s32) = G_SUB [[SUB1]], [[C2]] - ; GFX9: [[SUB7:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB1]] - ; GFX9: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[SUB1]](s32), [[C2]] - ; GFX9: [[ICMP7:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[SUB1]](s32), [[C1]] - ; GFX9: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[SUB1]](s32) - ; GFX9: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[SUB1]](s32) - ; GFX9: [[LSHR6:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[SUB7]](s32) - ; GFX9: [[OR2:%[0-9]+]]:_(s64) = G_OR [[SHL3]], [[LSHR6]] - ; GFX9: [[SHL4:%[0-9]+]]:_(s64) = G_SHL [[UV6]], [[SUB6]](s32) - ; GFX9: [[SELECT6:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[SHL2]], [[C3]] - ; GFX9: [[SELECT7:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[OR2]], [[SHL4]] - ; GFX9: [[SELECT8:%[0-9]+]]:_(s64) = G_SELECT [[ICMP7]](s1), [[UV7]], [[SELECT7]] - ; GFX9: [[OR3:%[0-9]+]]:_(s64) = G_OR [[SELECT4]], [[SELECT6]] + ; GFX9: [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) + ; GFX9: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB1]] + ; GFX9: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[SUB1]](s32), [[C2]] + ; GFX9: [[ICMP5:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[SUB1]](s32), [[C1]] + ; GFX9: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[SUB1]](s32) + ; GFX9: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[SUB1]](s32) + ; GFX9: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[SUB4]](s32) + ; GFX9: [[OR1:%[0-9]+]]:_(s64) = G_OR [[SHL2]], [[LSHR3]] + ; GFX9: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[SUB1]](s32) + ; GFX9: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[SHL1]], [[C3]] + ; GFX9: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[OR1]], [[SHL3]] + ; GFX9: [[SELECT5:%[0-9]+]]:_(s64) = G_SELECT [[ICMP5]](s1), [[UV5]], [[SELECT4]] + ; GFX9: [[UV6:%[0-9]+]]:_(s64), [[UV7:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV]](s128) + ; GFX9: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[C2]] + ; GFX9: [[SUB6:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[TRUNC]] + ; GFX9: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C2]] + ; GFX9: [[ICMP7:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] + ; GFX9: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[TRUNC]](s32) + ; GFX9: [[SHL4:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[SUB6]](s32) + ; GFX9: [[LSHR5:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[TRUNC]](s32) + ; GFX9: [[OR2:%[0-9]+]]:_(s64) = G_OR [[SHL4]], [[LSHR5]] + ; GFX9: [[LSHR6:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB5]](s32) + ; GFX9: [[SELECT6:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[OR2]], [[LSHR6]] + ; GFX9: [[SELECT7:%[0-9]+]]:_(s64) = G_SELECT [[ICMP7]](s1), [[UV6]], [[SELECT6]] + ; GFX9: [[SELECT8:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[LSHR4]], [[C3]] + ; GFX9: [[OR3:%[0-9]+]]:_(s64) = G_OR [[SELECT3]], [[SELECT7]] ; GFX9: [[OR4:%[0-9]+]]:_(s64) = G_OR [[SELECT5]], [[SELECT8]] ; GFX9: [[UV8:%[0-9]+]]:_(s64), [[UV9:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) - ; GFX9: [[SUB8:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C2]] - ; GFX9: [[SUB9:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB]] + ; GFX9: [[SUB7:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C2]] + ; GFX9: [[SUB8:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB]] ; GFX9: [[ICMP8:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[SUB]](s32), [[C2]] ; GFX9: [[ICMP9:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[SUB]](s32), [[C1]] ; GFX9: [[LSHR7:%[0-9]+]]:_(s64) = G_LSHR [[UV9]], [[SUB]](s32) + ; GFX9: [[SHL5:%[0-9]+]]:_(s64) = G_SHL [[UV9]], [[SUB8]](s32) ; GFX9: [[LSHR8:%[0-9]+]]:_(s64) = G_LSHR [[UV8]], [[SUB]](s32) - ; GFX9: [[SHL5:%[0-9]+]]:_(s64) = G_SHL [[UV9]], [[SUB9]](s32) - ; GFX9: [[OR5:%[0-9]+]]:_(s64) = G_OR [[LSHR8]], [[SHL5]] - ; GFX9: [[LSHR9:%[0-9]+]]:_(s64) = G_LSHR [[UV9]], [[SUB8]](s32) + ; GFX9: [[OR5:%[0-9]+]]:_(s64) = G_OR [[SHL5]], [[LSHR8]] + ; GFX9: [[LSHR9:%[0-9]+]]:_(s64) = G_LSHR [[UV9]], [[SUB7]](s32) ; GFX9: [[SELECT9:%[0-9]+]]:_(s64) = G_SELECT [[ICMP8]](s1), [[OR5]], [[LSHR9]] ; GFX9: [[SELECT10:%[0-9]+]]:_(s64) = G_SELECT [[ICMP9]](s1), [[UV8]], [[SELECT9]] ; GFX9: [[SELECT11:%[0-9]+]]:_(s64) = G_SELECT [[ICMP8]](s1), [[LSHR7]], [[C3]] @@ -1428,9 +1425,9 @@ ; SI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[UV2]](s32), [[C]] ; SI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV2]](s32), [[C1]] ; SI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV5]], [[UV2]](s32) - ; SI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[UV2]](s32) ; SI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[SUB1]](s32) - ; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR1]], [[SHL]] + ; SI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[UV2]](s32) + ; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR1]] ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 ; SI: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[UV5]], [[SUB]](s32) ; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[OR]], [[LSHR2]] @@ -1443,9 +1440,9 @@ ; SI: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[UV3]](s32), [[C]] ; SI: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV3]](s32), [[C1]] ; SI: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[UV3]](s32) - ; SI: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[UV3]](s32) ; SI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[SUB3]](s32) - ; SI: [[OR1:%[0-9]+]]:_(s64) = G_OR [[LSHR4]], [[SHL1]] + ; SI: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[UV3]](s32) + ; SI: [[OR1:%[0-9]+]]:_(s64) = G_OR [[SHL1]], [[LSHR4]] ; SI: [[LSHR5:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB2]](s32) ; SI: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[OR1]], [[LSHR5]] ; SI: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[ICMP3]](s1), [[UV6]], [[SELECT3]] @@ -1466,9 +1463,9 @@ ; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[UV2]](s32), [[C]] ; VI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV2]](s32), [[C1]] ; VI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV5]], [[UV2]](s32) - ; VI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[UV2]](s32) ; VI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[SUB1]](s32) - ; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR1]], [[SHL]] + ; VI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[UV2]](s32) + ; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR1]] ; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 ; VI: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[UV5]], [[SUB]](s32) ; VI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[OR]], [[LSHR2]] @@ -1481,9 +1478,9 @@ ; VI: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[UV3]](s32), [[C]] ; VI: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV3]](s32), [[C1]] ; VI: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[UV3]](s32) - ; VI: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[UV3]](s32) ; VI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[SUB3]](s32) - ; VI: [[OR1:%[0-9]+]]:_(s64) = G_OR [[LSHR4]], [[SHL1]] + ; VI: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[UV3]](s32) + ; VI: [[OR1:%[0-9]+]]:_(s64) = G_OR [[SHL1]], [[LSHR4]] ; VI: [[LSHR5:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB2]](s32) ; VI: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[OR1]], [[LSHR5]] ; VI: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[ICMP3]](s1), [[UV6]], [[SELECT3]] @@ -1504,9 +1501,9 @@ ; GFX9: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[UV2]](s32), [[C]] ; GFX9: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV2]](s32), [[C1]] ; GFX9: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV5]], [[UV2]](s32) - ; GFX9: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[UV2]](s32) ; GFX9: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[SUB1]](s32) - ; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR1]], [[SHL]] + ; GFX9: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[UV2]](s32) + ; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR1]] ; GFX9: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 ; GFX9: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[UV5]], [[SUB]](s32) ; GFX9: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[OR]], [[LSHR2]] @@ -1519,9 +1516,9 @@ ; GFX9: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[UV3]](s32), [[C]] ; GFX9: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV3]](s32), [[C1]] ; GFX9: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[UV3]](s32) - ; GFX9: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[UV3]](s32) ; GFX9: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[SUB3]](s32) - ; GFX9: [[OR1:%[0-9]+]]:_(s64) = G_OR [[LSHR4]], [[SHL1]] + ; GFX9: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[UV3]](s32) + ; GFX9: [[OR1:%[0-9]+]]:_(s64) = G_OR [[SHL1]], [[LSHR4]] ; GFX9: [[LSHR5:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB2]](s32) ; GFX9: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[OR1]], [[LSHR5]] ; GFX9: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[ICMP3]](s1), [[UV6]], [[SELECT3]] Index: test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir =================================================================== --- test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir +++ test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir @@ -702,12 +702,12 @@ ; CHECK: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C20]], [[TRUNC10]] ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC10]](s32), [[C20]] ; CHECK: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC10]](s32), [[C]] - ; CHECK: [[SHL15:%[0-9]+]]:_(s136) = G_SHL [[UV1]], [[TRUNC10]](s32) + ; CHECK: [[SHL15:%[0-9]+]]:_(s136) = G_SHL [[UV]], [[TRUNC10]](s32) ; CHECK: [[SHL16:%[0-9]+]]:_(s136) = G_SHL [[UV1]], [[TRUNC10]](s32) ; CHECK: [[LSHR:%[0-9]+]]:_(s136) = G_LSHR [[UV]], [[SUB1]](s32) ; CHECK: [[OR15:%[0-9]+]]:_(s136) = G_OR [[SHL16]], [[LSHR]] ; CHECK: [[C21:%[0-9]+]]:_(s136) = G_CONSTANT i136 0 - ; CHECK: [[SHL17:%[0-9]+]]:_(s136) = G_SHL [[UV]], [[SUB]](s32) + ; CHECK: [[SHL17:%[0-9]+]]:_(s136) = G_SHL [[UV]], [[TRUNC10]](s32) ; CHECK: [[SELECT:%[0-9]+]]:_(s136) = G_SELECT [[ICMP]](s1), [[SHL15]], [[C21]] ; CHECK: [[SELECT1:%[0-9]+]]:_(s136) = G_SELECT [[ICMP]](s1), [[OR15]], [[SHL17]] ; CHECK: [[EXTRACT:%[0-9]+]]:_(s64) = G_EXTRACT [[UV1]](s136), 0 Index: test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir =================================================================== --- test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir +++ test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir @@ -840,17 +840,16 @@ ; SI: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[ZEXT]](s128) ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 64 ; SI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](s128) - ; SI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[C]] - ; SI: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[TRUNC]] + ; SI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C]], [[TRUNC]] ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 ; SI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C]] ; SI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] - ; SI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[TRUNC]](s32) + ; SI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV]], [[TRUNC]](s32) ; SI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[TRUNC]](s32) - ; SI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[SUB1]](s32) + ; SI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[SUB]](s32) ; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL1]], [[LSHR]] ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 - ; SI: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV]], [[SUB]](s32) + ; SI: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV]], [[TRUNC]](s32) ; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[SHL]], [[C2]] ; SI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[OR]], [[SHL2]] ; SI: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[UV1]], [[SELECT1]] @@ -863,17 +862,16 @@ ; VI: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[ZEXT]](s128) ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 64 ; VI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](s128) - ; VI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[C]] - ; VI: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[TRUNC]] + ; VI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C]], [[TRUNC]] ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 ; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C]] ; VI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] - ; VI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[TRUNC]](s32) + ; VI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV]], [[TRUNC]](s32) ; VI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[TRUNC]](s32) - ; VI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[SUB1]](s32) + ; VI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[SUB]](s32) ; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL1]], [[LSHR]] ; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 - ; VI: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV]], [[SUB]](s32) + ; VI: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV]], [[TRUNC]](s32) ; VI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[SHL]], [[C2]] ; VI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[OR]], [[SHL2]] ; VI: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[UV1]], [[SELECT1]] @@ -886,17 +884,16 @@ ; GFX9: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[ZEXT]](s128) ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 64 ; GFX9: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](s128) - ; GFX9: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[C]] - ; GFX9: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[TRUNC]] + ; GFX9: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C]], [[TRUNC]] ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 ; GFX9: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C]] ; GFX9: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] - ; GFX9: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[TRUNC]](s32) + ; GFX9: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV]], [[TRUNC]](s32) ; GFX9: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[TRUNC]](s32) - ; GFX9: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[SUB1]](s32) + ; GFX9: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[SUB]](s32) ; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL1]], [[LSHR]] ; GFX9: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 - ; GFX9: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV]], [[SUB]](s32) + ; GFX9: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV]], [[TRUNC]](s32) ; GFX9: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[SHL]], [[C2]] ; GFX9: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[OR]], [[SHL2]] ; GFX9: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[UV1]], [[SELECT1]] @@ -920,17 +917,16 @@ ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 64 ; SI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](s128) - ; SI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY1]], [[C]] - ; SI: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY1]] + ; SI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY1]] ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 ; SI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[COPY1]](s32), [[C]] ; SI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C1]] - ; SI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[COPY1]](s32) + ; SI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV]], [[COPY1]](s32) ; SI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[COPY1]](s32) - ; SI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[SUB1]](s32) + ; SI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[SUB]](s32) ; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL1]], [[LSHR]] ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 - ; SI: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV]], [[SUB]](s32) + ; SI: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV]], [[COPY1]](s32) ; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[SHL]], [[C2]] ; SI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[OR]], [[SHL2]] ; SI: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[UV1]], [[SELECT1]] @@ -941,17 +937,16 @@ ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 64 ; VI: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](s128) - ; VI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY1]], [[C]] - ; VI: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY1]] + ; VI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY1]] ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 ; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[COPY1]](s32), [[C]] ; VI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C1]] - ; VI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[COPY1]](s32) + ; VI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV]], [[COPY1]](s32) ; VI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[COPY1]](s32) - ; VI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[SUB1]](s32) + ; VI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[SUB]](s32) ; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL1]], [[LSHR]] ; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 - ; VI: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV]], [[SUB]](s32) + ; VI: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV]], [[COPY1]](s32) ; VI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[SHL]], [[C2]] ; VI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[OR]], [[SHL2]] ; VI: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[UV1]], [[SELECT1]] @@ -962,17 +957,16 @@ ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 64 ; GFX9: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](s128) - ; GFX9: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY1]], [[C]] - ; GFX9: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY1]] + ; GFX9: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY1]] ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 ; GFX9: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[COPY1]](s32), [[C]] ; GFX9: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C1]] - ; GFX9: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[COPY1]](s32) + ; GFX9: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV]], [[COPY1]](s32) ; GFX9: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[COPY1]](s32) - ; GFX9: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[SUB1]](s32) + ; GFX9: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV]], [[SUB]](s32) ; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL1]], [[LSHR]] ; GFX9: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 - ; GFX9: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV]], [[SUB]](s32) + ; GFX9: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV]], [[COPY1]](s32) ; GFX9: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[SHL]], [[C2]] ; GFX9: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[OR]], [[SHL2]] ; GFX9: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[UV1]], [[SELECT1]] @@ -1238,64 +1232,60 @@ ; SI: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[ZEXT]](s256) ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 128 ; SI: [[UV:%[0-9]+]]:_(s128), [[UV1:%[0-9]+]]:_(s128) = G_UNMERGE_VALUES [[COPY]](s256) - ; SI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[C]] - ; SI: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[TRUNC]] + ; SI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C]], [[TRUNC]] ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 ; SI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C]] ; SI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 64 - ; SI: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) - ; SI: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[C2]] - ; SI: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[TRUNC]] + ; SI: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV]](s128) + ; SI: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[TRUNC]] ; SI: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C2]] ; SI: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] - ; SI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV3]], [[TRUNC]](s32) + ; SI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV2]], [[TRUNC]](s32) ; SI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV3]], [[TRUNC]](s32) - ; SI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV2]], [[SUB3]](s32) + ; SI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV2]], [[SUB1]](s32) ; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL1]], [[LSHR]] ; SI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 - ; SI: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV2]], [[SUB2]](s32) + ; SI: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV2]], [[TRUNC]](s32) ; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[SHL]], [[C3]] ; SI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[OR]], [[SHL2]] ; SI: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP3]](s1), [[UV3]], [[SELECT1]] ; SI: [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) - ; SI: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[C2]] - ; SI: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[TRUNC]] + ; SI: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[TRUNC]] ; SI: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C2]] ; SI: [[ICMP5:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] - ; SI: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[TRUNC]](s32) + ; SI: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[TRUNC]](s32) ; SI: [[SHL4:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[TRUNC]](s32) - ; SI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[SUB5]](s32) + ; SI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[SUB2]](s32) ; SI: [[OR1:%[0-9]+]]:_(s64) = G_OR [[SHL4]], [[LSHR1]] - ; SI: [[SHL5:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[SUB4]](s32) + ; SI: [[SHL5:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[TRUNC]](s32) ; SI: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[SHL3]], [[C3]] ; SI: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[OR1]], [[SHL5]] ; SI: [[SELECT5:%[0-9]+]]:_(s64) = G_SELECT [[ICMP5]](s1), [[UV5]], [[SELECT4]] ; SI: [[UV6:%[0-9]+]]:_(s64), [[UV7:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV]](s128) - ; SI: [[SUB6:%[0-9]+]]:_(s32) = G_SUB [[SUB1]], [[C2]] - ; SI: [[SUB7:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB1]] - ; SI: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[SUB1]](s32), [[C2]] - ; SI: [[ICMP7:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[SUB1]](s32), [[C1]] - ; SI: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB1]](s32) - ; SI: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[SUB1]](s32) - ; SI: [[SHL6:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[SUB7]](s32) - ; SI: [[OR2:%[0-9]+]]:_(s64) = G_OR [[LSHR3]], [[SHL6]] - ; SI: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB6]](s32) + ; SI: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C2]] + ; SI: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB]] + ; SI: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[SUB]](s32), [[C2]] + ; SI: [[ICMP7:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[SUB]](s32), [[C1]] + ; SI: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB]](s32) + ; SI: [[SHL6:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[SUB4]](s32) + ; SI: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[SUB]](s32) + ; SI: [[OR2:%[0-9]+]]:_(s64) = G_OR [[SHL6]], [[LSHR3]] + ; SI: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB3]](s32) ; SI: [[SELECT6:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[OR2]], [[LSHR4]] ; SI: [[SELECT7:%[0-9]+]]:_(s64) = G_SELECT [[ICMP7]](s1), [[UV6]], [[SELECT6]] ; SI: [[SELECT8:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[LSHR2]], [[C3]] ; SI: [[OR3:%[0-9]+]]:_(s64) = G_OR [[SELECT3]], [[SELECT7]] ; SI: [[OR4:%[0-9]+]]:_(s64) = G_OR [[SELECT5]], [[SELECT8]] ; SI: [[UV8:%[0-9]+]]:_(s64), [[UV9:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV]](s128) - ; SI: [[SUB8:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C2]] - ; SI: [[SUB9:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB]] - ; SI: [[ICMP8:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[SUB]](s32), [[C2]] - ; SI: [[ICMP9:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[SUB]](s32), [[C1]] - ; SI: [[SHL7:%[0-9]+]]:_(s64) = G_SHL [[UV9]], [[SUB]](s32) - ; SI: [[SHL8:%[0-9]+]]:_(s64) = G_SHL [[UV9]], [[SUB]](s32) - ; SI: [[LSHR5:%[0-9]+]]:_(s64) = G_LSHR [[UV8]], [[SUB9]](s32) + ; SI: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[TRUNC]] + ; SI: [[ICMP8:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C2]] + ; SI: [[ICMP9:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] + ; SI: [[SHL7:%[0-9]+]]:_(s64) = G_SHL [[UV8]], [[TRUNC]](s32) + ; SI: [[SHL8:%[0-9]+]]:_(s64) = G_SHL [[UV9]], [[TRUNC]](s32) + ; SI: [[LSHR5:%[0-9]+]]:_(s64) = G_LSHR [[UV8]], [[SUB5]](s32) ; SI: [[OR5:%[0-9]+]]:_(s64) = G_OR [[SHL8]], [[LSHR5]] - ; SI: [[SHL9:%[0-9]+]]:_(s64) = G_SHL [[UV8]], [[SUB8]](s32) + ; SI: [[SHL9:%[0-9]+]]:_(s64) = G_SHL [[UV8]], [[TRUNC]](s32) ; SI: [[SELECT9:%[0-9]+]]:_(s64) = G_SELECT [[ICMP8]](s1), [[SHL7]], [[C3]] ; SI: [[SELECT10:%[0-9]+]]:_(s64) = G_SELECT [[ICMP8]](s1), [[OR5]], [[SHL9]] ; SI: [[SELECT11:%[0-9]+]]:_(s64) = G_SELECT [[ICMP9]](s1), [[UV9]], [[SELECT10]] @@ -1317,64 +1307,60 @@ ; VI: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[ZEXT]](s256) ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 128 ; VI: [[UV:%[0-9]+]]:_(s128), [[UV1:%[0-9]+]]:_(s128) = G_UNMERGE_VALUES [[COPY]](s256) - ; VI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[C]] - ; VI: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[TRUNC]] + ; VI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C]], [[TRUNC]] ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 ; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C]] ; VI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 64 - ; VI: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) - ; VI: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[C2]] - ; VI: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[TRUNC]] + ; VI: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV]](s128) + ; VI: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[TRUNC]] ; VI: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C2]] ; VI: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] - ; VI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV3]], [[TRUNC]](s32) + ; VI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV2]], [[TRUNC]](s32) ; VI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV3]], [[TRUNC]](s32) - ; VI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV2]], [[SUB3]](s32) + ; VI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV2]], [[SUB1]](s32) ; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL1]], [[LSHR]] ; VI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 - ; VI: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV2]], [[SUB2]](s32) + ; VI: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV2]], [[TRUNC]](s32) ; VI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[SHL]], [[C3]] ; VI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[OR]], [[SHL2]] ; VI: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP3]](s1), [[UV3]], [[SELECT1]] ; VI: [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) - ; VI: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[C2]] - ; VI: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[TRUNC]] + ; VI: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[TRUNC]] ; VI: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C2]] ; VI: [[ICMP5:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] - ; VI: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[TRUNC]](s32) + ; VI: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[TRUNC]](s32) ; VI: [[SHL4:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[TRUNC]](s32) - ; VI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[SUB5]](s32) + ; VI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[SUB2]](s32) ; VI: [[OR1:%[0-9]+]]:_(s64) = G_OR [[SHL4]], [[LSHR1]] - ; VI: [[SHL5:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[SUB4]](s32) + ; VI: [[SHL5:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[TRUNC]](s32) ; VI: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[SHL3]], [[C3]] ; VI: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[OR1]], [[SHL5]] ; VI: [[SELECT5:%[0-9]+]]:_(s64) = G_SELECT [[ICMP5]](s1), [[UV5]], [[SELECT4]] ; VI: [[UV6:%[0-9]+]]:_(s64), [[UV7:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV]](s128) - ; VI: [[SUB6:%[0-9]+]]:_(s32) = G_SUB [[SUB1]], [[C2]] - ; VI: [[SUB7:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB1]] - ; VI: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[SUB1]](s32), [[C2]] - ; VI: [[ICMP7:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[SUB1]](s32), [[C1]] - ; VI: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB1]](s32) - ; VI: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[SUB1]](s32) - ; VI: [[SHL6:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[SUB7]](s32) - ; VI: [[OR2:%[0-9]+]]:_(s64) = G_OR [[LSHR3]], [[SHL6]] - ; VI: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB6]](s32) + ; VI: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C2]] + ; VI: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB]] + ; VI: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[SUB]](s32), [[C2]] + ; VI: [[ICMP7:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[SUB]](s32), [[C1]] + ; VI: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB]](s32) + ; VI: [[SHL6:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[SUB4]](s32) + ; VI: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[SUB]](s32) + ; VI: [[OR2:%[0-9]+]]:_(s64) = G_OR [[SHL6]], [[LSHR3]] + ; VI: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB3]](s32) ; VI: [[SELECT6:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[OR2]], [[LSHR4]] ; VI: [[SELECT7:%[0-9]+]]:_(s64) = G_SELECT [[ICMP7]](s1), [[UV6]], [[SELECT6]] ; VI: [[SELECT8:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[LSHR2]], [[C3]] ; VI: [[OR3:%[0-9]+]]:_(s64) = G_OR [[SELECT3]], [[SELECT7]] ; VI: [[OR4:%[0-9]+]]:_(s64) = G_OR [[SELECT5]], [[SELECT8]] ; VI: [[UV8:%[0-9]+]]:_(s64), [[UV9:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV]](s128) - ; VI: [[SUB8:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C2]] - ; VI: [[SUB9:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB]] - ; VI: [[ICMP8:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[SUB]](s32), [[C2]] - ; VI: [[ICMP9:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[SUB]](s32), [[C1]] - ; VI: [[SHL7:%[0-9]+]]:_(s64) = G_SHL [[UV9]], [[SUB]](s32) - ; VI: [[SHL8:%[0-9]+]]:_(s64) = G_SHL [[UV9]], [[SUB]](s32) - ; VI: [[LSHR5:%[0-9]+]]:_(s64) = G_LSHR [[UV8]], [[SUB9]](s32) + ; VI: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[TRUNC]] + ; VI: [[ICMP8:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C2]] + ; VI: [[ICMP9:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] + ; VI: [[SHL7:%[0-9]+]]:_(s64) = G_SHL [[UV8]], [[TRUNC]](s32) + ; VI: [[SHL8:%[0-9]+]]:_(s64) = G_SHL [[UV9]], [[TRUNC]](s32) + ; VI: [[LSHR5:%[0-9]+]]:_(s64) = G_LSHR [[UV8]], [[SUB5]](s32) ; VI: [[OR5:%[0-9]+]]:_(s64) = G_OR [[SHL8]], [[LSHR5]] - ; VI: [[SHL9:%[0-9]+]]:_(s64) = G_SHL [[UV8]], [[SUB8]](s32) + ; VI: [[SHL9:%[0-9]+]]:_(s64) = G_SHL [[UV8]], [[TRUNC]](s32) ; VI: [[SELECT9:%[0-9]+]]:_(s64) = G_SELECT [[ICMP8]](s1), [[SHL7]], [[C3]] ; VI: [[SELECT10:%[0-9]+]]:_(s64) = G_SELECT [[ICMP8]](s1), [[OR5]], [[SHL9]] ; VI: [[SELECT11:%[0-9]+]]:_(s64) = G_SELECT [[ICMP9]](s1), [[UV9]], [[SELECT10]] @@ -1396,64 +1382,60 @@ ; GFX9: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[ZEXT]](s256) ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 128 ; GFX9: [[UV:%[0-9]+]]:_(s128), [[UV1:%[0-9]+]]:_(s128) = G_UNMERGE_VALUES [[COPY]](s256) - ; GFX9: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[C]] - ; GFX9: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[TRUNC]] + ; GFX9: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C]], [[TRUNC]] ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 ; GFX9: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C]] ; GFX9: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 64 - ; GFX9: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) - ; GFX9: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[C2]] - ; GFX9: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[TRUNC]] + ; GFX9: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV]](s128) + ; GFX9: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[TRUNC]] ; GFX9: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C2]] ; GFX9: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] - ; GFX9: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV3]], [[TRUNC]](s32) + ; GFX9: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV2]], [[TRUNC]](s32) ; GFX9: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV3]], [[TRUNC]](s32) - ; GFX9: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV2]], [[SUB3]](s32) + ; GFX9: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV2]], [[SUB1]](s32) ; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL1]], [[LSHR]] ; GFX9: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 - ; GFX9: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV2]], [[SUB2]](s32) + ; GFX9: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV2]], [[TRUNC]](s32) ; GFX9: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[SHL]], [[C3]] ; GFX9: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[OR]], [[SHL2]] ; GFX9: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP3]](s1), [[UV3]], [[SELECT1]] ; GFX9: [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) - ; GFX9: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[C2]] - ; GFX9: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[TRUNC]] + ; GFX9: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[TRUNC]] ; GFX9: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C2]] ; GFX9: [[ICMP5:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] - ; GFX9: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[TRUNC]](s32) + ; GFX9: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[TRUNC]](s32) ; GFX9: [[SHL4:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[TRUNC]](s32) - ; GFX9: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[SUB5]](s32) + ; GFX9: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[SUB2]](s32) ; GFX9: [[OR1:%[0-9]+]]:_(s64) = G_OR [[SHL4]], [[LSHR1]] - ; GFX9: [[SHL5:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[SUB4]](s32) + ; GFX9: [[SHL5:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[TRUNC]](s32) ; GFX9: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[SHL3]], [[C3]] ; GFX9: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[OR1]], [[SHL5]] ; GFX9: [[SELECT5:%[0-9]+]]:_(s64) = G_SELECT [[ICMP5]](s1), [[UV5]], [[SELECT4]] ; GFX9: [[UV6:%[0-9]+]]:_(s64), [[UV7:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV]](s128) - ; GFX9: [[SUB6:%[0-9]+]]:_(s32) = G_SUB [[SUB1]], [[C2]] - ; GFX9: [[SUB7:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB1]] - ; GFX9: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[SUB1]](s32), [[C2]] - ; GFX9: [[ICMP7:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[SUB1]](s32), [[C1]] - ; GFX9: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB1]](s32) - ; GFX9: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[SUB1]](s32) - ; GFX9: [[SHL6:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[SUB7]](s32) - ; GFX9: [[OR2:%[0-9]+]]:_(s64) = G_OR [[LSHR3]], [[SHL6]] - ; GFX9: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB6]](s32) + ; GFX9: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C2]] + ; GFX9: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB]] + ; GFX9: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[SUB]](s32), [[C2]] + ; GFX9: [[ICMP7:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[SUB]](s32), [[C1]] + ; GFX9: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB]](s32) + ; GFX9: [[SHL6:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[SUB4]](s32) + ; GFX9: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[SUB]](s32) + ; GFX9: [[OR2:%[0-9]+]]:_(s64) = G_OR [[SHL6]], [[LSHR3]] + ; GFX9: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[UV7]], [[SUB3]](s32) ; GFX9: [[SELECT6:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[OR2]], [[LSHR4]] ; GFX9: [[SELECT7:%[0-9]+]]:_(s64) = G_SELECT [[ICMP7]](s1), [[UV6]], [[SELECT6]] ; GFX9: [[SELECT8:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[LSHR2]], [[C3]] ; GFX9: [[OR3:%[0-9]+]]:_(s64) = G_OR [[SELECT3]], [[SELECT7]] ; GFX9: [[OR4:%[0-9]+]]:_(s64) = G_OR [[SELECT5]], [[SELECT8]] ; GFX9: [[UV8:%[0-9]+]]:_(s64), [[UV9:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV]](s128) - ; GFX9: [[SUB8:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C2]] - ; GFX9: [[SUB9:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB]] - ; GFX9: [[ICMP8:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[SUB]](s32), [[C2]] - ; GFX9: [[ICMP9:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[SUB]](s32), [[C1]] - ; GFX9: [[SHL7:%[0-9]+]]:_(s64) = G_SHL [[UV9]], [[SUB]](s32) - ; GFX9: [[SHL8:%[0-9]+]]:_(s64) = G_SHL [[UV9]], [[SUB]](s32) - ; GFX9: [[LSHR5:%[0-9]+]]:_(s64) = G_LSHR [[UV8]], [[SUB9]](s32) + ; GFX9: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[TRUNC]] + ; GFX9: [[ICMP8:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C2]] + ; GFX9: [[ICMP9:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C1]] + ; GFX9: [[SHL7:%[0-9]+]]:_(s64) = G_SHL [[UV8]], [[TRUNC]](s32) + ; GFX9: [[SHL8:%[0-9]+]]:_(s64) = G_SHL [[UV9]], [[TRUNC]](s32) + ; GFX9: [[LSHR5:%[0-9]+]]:_(s64) = G_LSHR [[UV8]], [[SUB5]](s32) ; GFX9: [[OR5:%[0-9]+]]:_(s64) = G_OR [[SHL8]], [[LSHR5]] - ; GFX9: [[SHL9:%[0-9]+]]:_(s64) = G_SHL [[UV8]], [[SUB8]](s32) + ; GFX9: [[SHL9:%[0-9]+]]:_(s64) = G_SHL [[UV8]], [[TRUNC]](s32) ; GFX9: [[SELECT9:%[0-9]+]]:_(s64) = G_SELECT [[ICMP8]](s1), [[SHL7]], [[C3]] ; GFX9: [[SELECT10:%[0-9]+]]:_(s64) = G_SELECT [[ICMP8]](s1), [[OR5]], [[SHL9]] ; GFX9: [[SELECT11:%[0-9]+]]:_(s64) = G_SELECT [[ICMP9]](s1), [[UV9]], [[SELECT10]] @@ -1488,31 +1470,29 @@ ; SI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>) ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 64 ; SI: [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV]](s128) - ; SI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[UV2]], [[C]] - ; SI: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[UV2]] + ; SI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C]], [[UV2]] ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 ; SI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[UV2]](s32), [[C]] ; SI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV2]](s32), [[C1]] - ; SI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[UV2]](s32) + ; SI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[UV2]](s32) ; SI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[UV2]](s32) - ; SI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[SUB1]](s32) + ; SI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[SUB]](s32) ; SI: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL1]], [[LSHR]] ; SI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 - ; SI: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[SUB]](s32) + ; SI: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[UV2]](s32) ; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[SHL]], [[C2]] ; SI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[OR]], [[SHL2]] ; SI: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[UV5]], [[SELECT1]] ; SI: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[SELECT]](s64), [[SELECT2]](s64) ; SI: [[UV6:%[0-9]+]]:_(s64), [[UV7:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) - ; SI: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[UV3]], [[C]] - ; SI: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[C]], [[UV3]] + ; SI: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[UV3]] ; SI: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[UV3]](s32), [[C]] ; SI: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV3]](s32), [[C1]] - ; SI: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[UV3]](s32) + ; SI: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[UV6]], [[UV3]](s32) ; SI: [[SHL4:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[UV3]](s32) - ; SI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[SUB3]](s32) + ; SI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[SUB1]](s32) ; SI: [[OR1:%[0-9]+]]:_(s64) = G_OR [[SHL4]], [[LSHR1]] - ; SI: [[SHL5:%[0-9]+]]:_(s64) = G_SHL [[UV6]], [[SUB2]](s32) + ; SI: [[SHL5:%[0-9]+]]:_(s64) = G_SHL [[UV6]], [[UV3]](s32) ; SI: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[SHL3]], [[C2]] ; SI: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[OR1]], [[SHL5]] ; SI: [[SELECT5:%[0-9]+]]:_(s64) = G_SELECT [[ICMP3]](s1), [[UV7]], [[SELECT4]] @@ -1526,31 +1506,29 @@ ; VI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>) ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 64 ; VI: [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV]](s128) - ; VI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[UV2]], [[C]] - ; VI: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[UV2]] + ; VI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C]], [[UV2]] ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 ; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[UV2]](s32), [[C]] ; VI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV2]](s32), [[C1]] - ; VI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[UV2]](s32) + ; VI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[UV2]](s32) ; VI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[UV2]](s32) - ; VI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[SUB1]](s32) + ; VI: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[SUB]](s32) ; VI: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL1]], [[LSHR]] ; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 - ; VI: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[SUB]](s32) + ; VI: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[UV2]](s32) ; VI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[SHL]], [[C2]] ; VI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[OR]], [[SHL2]] ; VI: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[UV5]], [[SELECT1]] ; VI: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[SELECT]](s64), [[SELECT2]](s64) ; VI: [[UV6:%[0-9]+]]:_(s64), [[UV7:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) - ; VI: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[UV3]], [[C]] - ; VI: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[C]], [[UV3]] + ; VI: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[UV3]] ; VI: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[UV3]](s32), [[C]] ; VI: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV3]](s32), [[C1]] - ; VI: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[UV3]](s32) + ; VI: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[UV6]], [[UV3]](s32) ; VI: [[SHL4:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[UV3]](s32) - ; VI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[SUB3]](s32) + ; VI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[SUB1]](s32) ; VI: [[OR1:%[0-9]+]]:_(s64) = G_OR [[SHL4]], [[LSHR1]] - ; VI: [[SHL5:%[0-9]+]]:_(s64) = G_SHL [[UV6]], [[SUB2]](s32) + ; VI: [[SHL5:%[0-9]+]]:_(s64) = G_SHL [[UV6]], [[UV3]](s32) ; VI: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[SHL3]], [[C2]] ; VI: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[OR1]], [[SHL5]] ; VI: [[SELECT5:%[0-9]+]]:_(s64) = G_SELECT [[ICMP3]](s1), [[UV7]], [[SELECT4]] @@ -1564,31 +1542,29 @@ ; GFX9: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>) ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 64 ; GFX9: [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV]](s128) - ; GFX9: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[UV2]], [[C]] - ; GFX9: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[UV2]] + ; GFX9: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C]], [[UV2]] ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 ; GFX9: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[UV2]](s32), [[C]] ; GFX9: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV2]](s32), [[C1]] - ; GFX9: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[UV2]](s32) + ; GFX9: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[UV2]](s32) ; GFX9: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV5]], [[UV2]](s32) - ; GFX9: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[SUB1]](s32) + ; GFX9: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV4]], [[SUB]](s32) ; GFX9: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL1]], [[LSHR]] ; GFX9: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 - ; GFX9: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[SUB]](s32) + ; GFX9: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV4]], [[UV2]](s32) ; GFX9: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[SHL]], [[C2]] ; GFX9: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[OR]], [[SHL2]] ; GFX9: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[UV5]], [[SELECT1]] ; GFX9: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[SELECT]](s64), [[SELECT2]](s64) ; GFX9: [[UV6:%[0-9]+]]:_(s64), [[UV7:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[UV1]](s128) - ; GFX9: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[UV3]], [[C]] - ; GFX9: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[C]], [[UV3]] + ; GFX9: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[UV3]] ; GFX9: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[UV3]](s32), [[C]] ; GFX9: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV3]](s32), [[C1]] - ; GFX9: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[UV3]](s32) + ; GFX9: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[UV6]], [[UV3]](s32) ; GFX9: [[SHL4:%[0-9]+]]:_(s64) = G_SHL [[UV7]], [[UV3]](s32) - ; GFX9: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[SUB3]](s32) + ; GFX9: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[UV6]], [[SUB1]](s32) ; GFX9: [[OR1:%[0-9]+]]:_(s64) = G_OR [[SHL4]], [[LSHR1]] - ; GFX9: [[SHL5:%[0-9]+]]:_(s64) = G_SHL [[UV6]], [[SUB2]](s32) + ; GFX9: [[SHL5:%[0-9]+]]:_(s64) = G_SHL [[UV6]], [[UV3]](s32) ; GFX9: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[SHL3]], [[C2]] ; GFX9: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[OR1]], [[SHL5]] ; GFX9: [[SELECT5:%[0-9]+]]:_(s64) = G_SELECT [[ICMP3]](s1), [[UV7]], [[SELECT4]] Index: test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir =================================================================== --- test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir +++ test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir @@ -336,16 +336,15 @@ ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV1]](s128) ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 64 ; CHECK: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[MV]](s128) - ; CHECK: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[C3]] - ; CHECK: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C3]], [[TRUNC]] + ; CHECK: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C3]], [[TRUNC]] ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC]](s32), [[C3]] ; CHECK: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC]](s32), [[C4]] - ; CHECK: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV3]], [[TRUNC]](s32) + ; CHECK: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV2]], [[TRUNC]](s32) ; CHECK: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV3]], [[TRUNC]](s32) - ; CHECK: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV2]], [[SUB1]](s32) + ; CHECK: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[UV2]], [[SUB]](s32) ; CHECK: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL1]], [[LSHR]] - ; CHECK: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV2]], [[SUB]](s32) + ; CHECK: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[UV2]], [[TRUNC]](s32) ; CHECK: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[SHL]], [[C1]] ; CHECK: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[OR]], [[SHL2]] ; CHECK: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[UV3]], [[SELECT1]] @@ -355,15 +354,14 @@ ; CHECK: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 30 ; CHECK: [[MV2:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[C5]](s64), [[C1]](s64) ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[MV2]](s128) - ; CHECK: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[TRUNC1]], [[C3]] - ; CHECK: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[C3]], [[TRUNC1]] + ; CHECK: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C3]], [[TRUNC1]] ; CHECK: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC1]](s32), [[C3]] ; CHECK: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC1]](s32), [[C4]] - ; CHECK: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[OR2]], [[TRUNC1]](s32) + ; CHECK: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[OR1]], [[TRUNC1]](s32) ; CHECK: [[SHL4:%[0-9]+]]:_(s64) = G_SHL [[OR2]], [[TRUNC1]](s32) - ; CHECK: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[OR1]], [[SUB3]](s32) + ; CHECK: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[OR1]], [[SUB1]](s32) ; CHECK: [[OR3:%[0-9]+]]:_(s64) = G_OR [[SHL4]], [[LSHR1]] - ; CHECK: [[SHL5:%[0-9]+]]:_(s64) = G_SHL [[OR1]], [[SUB2]](s32) + ; CHECK: [[SHL5:%[0-9]+]]:_(s64) = G_SHL [[OR1]], [[TRUNC1]](s32) ; CHECK: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[SHL3]], [[C1]] ; CHECK: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[OR3]], [[SHL5]] ; CHECK: [[SELECT5:%[0-9]+]]:_(s64) = G_SELECT [[ICMP3]](s1), [[OR2]], [[SELECT4]] @@ -372,15 +370,14 @@ ; CHECK: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 45 ; CHECK: [[MV3:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[C6]](s64), [[C1]](s64) ; CHECK: [[TRUNC2:%[0-9]+]]:_(s32) = G_TRUNC [[MV3]](s128) - ; CHECK: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[TRUNC2]], [[C3]] - ; CHECK: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[C3]], [[TRUNC2]] + ; CHECK: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[C3]], [[TRUNC2]] ; CHECK: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC2]](s32), [[C3]] ; CHECK: [[ICMP5:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC2]](s32), [[C4]] - ; CHECK: [[SHL6:%[0-9]+]]:_(s64) = G_SHL [[OR5]], [[TRUNC2]](s32) + ; CHECK: [[SHL6:%[0-9]+]]:_(s64) = G_SHL [[OR4]], [[TRUNC2]](s32) ; CHECK: [[SHL7:%[0-9]+]]:_(s64) = G_SHL [[OR5]], [[TRUNC2]](s32) - ; CHECK: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[OR4]], [[SUB5]](s32) + ; CHECK: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[OR4]], [[SUB2]](s32) ; CHECK: [[OR6:%[0-9]+]]:_(s64) = G_OR [[SHL7]], [[LSHR2]] - ; CHECK: [[SHL8:%[0-9]+]]:_(s64) = G_SHL [[OR4]], [[SUB4]](s32) + ; CHECK: [[SHL8:%[0-9]+]]:_(s64) = G_SHL [[OR4]], [[TRUNC2]](s32) ; CHECK: [[SELECT6:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[SHL6]], [[C1]] ; CHECK: [[SELECT7:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[OR6]], [[SHL8]] ; CHECK: [[SELECT8:%[0-9]+]]:_(s64) = G_SELECT [[ICMP5]](s1), [[OR5]], [[SELECT7]] @@ -389,15 +386,14 @@ ; CHECK: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 60 ; CHECK: [[MV4:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[C7]](s64), [[C1]](s64) ; CHECK: [[TRUNC3:%[0-9]+]]:_(s32) = G_TRUNC [[MV4]](s128) - ; CHECK: [[SUB6:%[0-9]+]]:_(s32) = G_SUB [[TRUNC3]], [[C3]] - ; CHECK: [[SUB7:%[0-9]+]]:_(s32) = G_SUB [[C3]], [[TRUNC3]] + ; CHECK: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[C3]], [[TRUNC3]] ; CHECK: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC3]](s32), [[C3]] ; CHECK: [[ICMP7:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC3]](s32), [[C4]] - ; CHECK: [[SHL9:%[0-9]+]]:_(s64) = G_SHL [[OR8]], [[TRUNC3]](s32) + ; CHECK: [[SHL9:%[0-9]+]]:_(s64) = G_SHL [[OR7]], [[TRUNC3]](s32) ; CHECK: [[SHL10:%[0-9]+]]:_(s64) = G_SHL [[OR8]], [[TRUNC3]](s32) - ; CHECK: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[OR7]], [[SUB7]](s32) + ; CHECK: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[OR7]], [[SUB3]](s32) ; CHECK: [[OR9:%[0-9]+]]:_(s64) = G_OR [[SHL10]], [[LSHR3]] - ; CHECK: [[SHL11:%[0-9]+]]:_(s64) = G_SHL [[OR7]], [[SUB6]](s32) + ; CHECK: [[SHL11:%[0-9]+]]:_(s64) = G_SHL [[OR7]], [[TRUNC3]](s32) ; CHECK: [[SELECT9:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[SHL9]], [[C1]] ; CHECK: [[SELECT10:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[OR9]], [[SHL11]] ; CHECK: [[SELECT11:%[0-9]+]]:_(s64) = G_SELECT [[ICMP7]](s1), [[OR8]], [[SELECT10]] @@ -406,15 +402,14 @@ ; CHECK: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 75 ; CHECK: [[MV5:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[C8]](s64), [[C1]](s64) ; CHECK: [[TRUNC4:%[0-9]+]]:_(s32) = G_TRUNC [[MV5]](s128) - ; CHECK: [[SUB8:%[0-9]+]]:_(s32) = G_SUB [[TRUNC4]], [[C3]] - ; CHECK: [[SUB9:%[0-9]+]]:_(s32) = G_SUB [[C3]], [[TRUNC4]] + ; CHECK: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[C3]], [[TRUNC4]] ; CHECK: [[ICMP8:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC4]](s32), [[C3]] ; CHECK: [[ICMP9:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC4]](s32), [[C4]] - ; CHECK: [[SHL12:%[0-9]+]]:_(s64) = G_SHL [[OR11]], [[TRUNC4]](s32) + ; CHECK: [[SHL12:%[0-9]+]]:_(s64) = G_SHL [[OR10]], [[TRUNC4]](s32) ; CHECK: [[SHL13:%[0-9]+]]:_(s64) = G_SHL [[OR11]], [[TRUNC4]](s32) - ; CHECK: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[OR10]], [[SUB9]](s32) + ; CHECK: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[OR10]], [[SUB4]](s32) ; CHECK: [[OR12:%[0-9]+]]:_(s64) = G_OR [[SHL13]], [[LSHR4]] - ; CHECK: [[SHL14:%[0-9]+]]:_(s64) = G_SHL [[OR10]], [[SUB8]](s32) + ; CHECK: [[SHL14:%[0-9]+]]:_(s64) = G_SHL [[OR10]], [[TRUNC4]](s32) ; CHECK: [[SELECT12:%[0-9]+]]:_(s64) = G_SELECT [[ICMP8]](s1), [[SHL12]], [[C1]] ; CHECK: [[SELECT13:%[0-9]+]]:_(s64) = G_SELECT [[ICMP8]](s1), [[OR12]], [[SHL14]] ; CHECK: [[SELECT14:%[0-9]+]]:_(s64) = G_SELECT [[ICMP9]](s1), [[OR11]], [[SELECT13]] @@ -423,15 +418,14 @@ ; CHECK: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 90 ; CHECK: [[MV6:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[C9]](s64), [[C1]](s64) ; CHECK: [[TRUNC5:%[0-9]+]]:_(s32) = G_TRUNC [[MV6]](s128) - ; CHECK: [[SUB10:%[0-9]+]]:_(s32) = G_SUB [[TRUNC5]], [[C3]] - ; CHECK: [[SUB11:%[0-9]+]]:_(s32) = G_SUB [[C3]], [[TRUNC5]] + ; CHECK: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[C3]], [[TRUNC5]] ; CHECK: [[ICMP10:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC5]](s32), [[C3]] ; CHECK: [[ICMP11:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC5]](s32), [[C4]] - ; CHECK: [[SHL15:%[0-9]+]]:_(s64) = G_SHL [[OR14]], [[TRUNC5]](s32) + ; CHECK: [[SHL15:%[0-9]+]]:_(s64) = G_SHL [[OR13]], [[TRUNC5]](s32) ; CHECK: [[SHL16:%[0-9]+]]:_(s64) = G_SHL [[OR14]], [[TRUNC5]](s32) - ; CHECK: [[LSHR5:%[0-9]+]]:_(s64) = G_LSHR [[OR13]], [[SUB11]](s32) + ; CHECK: [[LSHR5:%[0-9]+]]:_(s64) = G_LSHR [[OR13]], [[SUB5]](s32) ; CHECK: [[OR15:%[0-9]+]]:_(s64) = G_OR [[SHL16]], [[LSHR5]] - ; CHECK: [[SHL17:%[0-9]+]]:_(s64) = G_SHL [[OR13]], [[SUB10]](s32) + ; CHECK: [[SHL17:%[0-9]+]]:_(s64) = G_SHL [[OR13]], [[TRUNC5]](s32) ; CHECK: [[SELECT15:%[0-9]+]]:_(s64) = G_SELECT [[ICMP10]](s1), [[SHL15]], [[C1]] ; CHECK: [[SELECT16:%[0-9]+]]:_(s64) = G_SELECT [[ICMP10]](s1), [[OR15]], [[SHL17]] ; CHECK: [[SELECT17:%[0-9]+]]:_(s64) = G_SELECT [[ICMP11]](s1), [[OR14]], [[SELECT16]] @@ -440,15 +434,14 @@ ; CHECK: [[C10:%[0-9]+]]:_(s64) = G_CONSTANT i64 105 ; CHECK: [[MV7:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[C10]](s64), [[C1]](s64) ; CHECK: [[TRUNC6:%[0-9]+]]:_(s32) = G_TRUNC [[MV7]](s128) - ; CHECK: [[SUB12:%[0-9]+]]:_(s32) = G_SUB [[TRUNC6]], [[C3]] - ; CHECK: [[SUB13:%[0-9]+]]:_(s32) = G_SUB [[C3]], [[TRUNC6]] + ; CHECK: [[SUB6:%[0-9]+]]:_(s32) = G_SUB [[C3]], [[TRUNC6]] ; CHECK: [[ICMP12:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[TRUNC6]](s32), [[C3]] ; CHECK: [[ICMP13:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[TRUNC6]](s32), [[C4]] - ; CHECK: [[SHL18:%[0-9]+]]:_(s64) = G_SHL [[OR17]], [[TRUNC6]](s32) + ; CHECK: [[SHL18:%[0-9]+]]:_(s64) = G_SHL [[OR16]], [[TRUNC6]](s32) ; CHECK: [[SHL19:%[0-9]+]]:_(s64) = G_SHL [[OR17]], [[TRUNC6]](s32) - ; CHECK: [[LSHR6:%[0-9]+]]:_(s64) = G_LSHR [[OR16]], [[SUB13]](s32) + ; CHECK: [[LSHR6:%[0-9]+]]:_(s64) = G_LSHR [[OR16]], [[SUB6]](s32) ; CHECK: [[OR18:%[0-9]+]]:_(s64) = G_OR [[SHL19]], [[LSHR6]] - ; CHECK: [[SHL20:%[0-9]+]]:_(s64) = G_SHL [[OR16]], [[SUB12]](s32) + ; CHECK: [[SHL20:%[0-9]+]]:_(s64) = G_SHL [[OR16]], [[TRUNC6]](s32) ; CHECK: [[SELECT18:%[0-9]+]]:_(s64) = G_SELECT [[ICMP12]](s1), [[SHL18]], [[C1]] ; CHECK: [[SELECT19:%[0-9]+]]:_(s64) = G_SELECT [[ICMP12]](s1), [[OR18]], [[SHL20]] ; CHECK: [[SELECT20:%[0-9]+]]:_(s64) = G_SELECT [[ICMP13]](s1), [[OR17]], [[SELECT19]] Index: test/CodeGen/Mips/GlobalISel/legalizer/bitwise.mir =================================================================== --- test/CodeGen/Mips/GlobalISel/legalizer/bitwise.mir +++ test/CodeGen/Mips/GlobalISel/legalizer/bitwise.mir @@ -24,6 +24,12 @@ define void @shlv(i32, i32) {entry: ret void} define void @ashrv(i32, i32) {entry: ret void} define void @lshrv(i32, i32) {entry: ret void} + define void @shl_i16() {entry: ret void} + define void @ashr_i8() {entry: ret void} + define void @lshr_i16() {entry: ret void} + define void @shl_i64() {entry: ret void} + define void @ashl_i64() {entry: ret void} + define void @lshr_i64() {entry: ret void} ... --- @@ -596,3 +602,251 @@ RetRA implicit $v0 ... +--- +name: shl_i16 +alignment: 2 +tracksRegLiveness: true +body: | + bb.1.entry: + liveins: $a0 + + ; MIPS32-LABEL: name: shl_i16 + ; MIPS32: liveins: $a0 + ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 + ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 + ; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 + ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C]](s32) + ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] + ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) + ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY2]], [[AND]](s32) + ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[SHL]](s32) + ; MIPS32: $v0 = COPY [[COPY3]](s32) + ; MIPS32: RetRA implicit $v0 + %1:_(s32) = COPY $a0 + %0:_(s16) = G_TRUNC %1(s32) + %2:_(s16) = G_CONSTANT i16 2 + %3:_(s16) = G_SHL %0, %2(s16) + %4:_(s32) = G_ANYEXT %3(s16) + $v0 = COPY %4(s32) + RetRA implicit $v0 + +... +--- +name: ashr_i8 +alignment: 2 +tracksRegLiveness: true +body: | + bb.1.entry: + liveins: $a0 + + ; MIPS32-LABEL: name: ashr_i8 + ; MIPS32: liveins: $a0 + ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 + ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 + ; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 + ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C]](s32) + ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] + ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) + ; MIPS32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 + ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY2]], [[C2]](s32) + ; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C2]](s32) + ; MIPS32: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[ASHR]], [[AND]](s32) + ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[ASHR1]](s32) + ; MIPS32: $v0 = COPY [[COPY3]](s32) + ; MIPS32: RetRA implicit $v0 + %1:_(s32) = COPY $a0 + %0:_(s8) = G_TRUNC %1(s32) + %2:_(s8) = G_CONSTANT i8 2 + %3:_(s8) = G_ASHR %0, %2(s8) + %4:_(s32) = G_ANYEXT %3(s8) + $v0 = COPY %4(s32) + RetRA implicit $v0 + +... +--- +name: lshr_i16 +alignment: 2 +tracksRegLiveness: true +body: | + bb.1.entry: + liveins: $a0 + + ; MIPS32-LABEL: name: lshr_i16 + ; MIPS32: liveins: $a0 + ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 + ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 + ; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 + ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C]](s32) + ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] + ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) + ; MIPS32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] + ; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND1]], [[AND]](s32) + ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) + ; MIPS32: $v0 = COPY [[COPY3]](s32) + ; MIPS32: RetRA implicit $v0 + %1:_(s32) = COPY $a0 + %0:_(s16) = G_TRUNC %1(s32) + %2:_(s16) = G_CONSTANT i16 2 + %3:_(s16) = G_LSHR %0, %2(s16) + %4:_(s32) = G_ANYEXT %3(s16) + $v0 = COPY %4(s32) + RetRA implicit $v0 + +... +--- +name: shl_i64 +alignment: 2 +tracksRegLiveness: true +body: | + bb.1.entry: + liveins: $a0, $a1, $a2, $a3 + + ; MIPS32-LABEL: name: shl_i64 + ; MIPS32: liveins: $a0, $a1, $a2, $a3 + ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 + ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 + ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2 + ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3 + ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) + ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32 + ; MIPS32: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY4]] + ; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 + ; MIPS32: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[COPY4]](s32), [[C]] + ; MIPS32: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY4]](s32), [[C1]] + ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[COPY4]](s32) + ; MIPS32: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[COPY4]](s32) + ; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[SUB]](s32) + ; MIPS32: [[OR:%[0-9]+]]:_(s32) = G_OR [[SHL1]], [[LSHR]] + ; MIPS32: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[COPY4]](s32) + ; MIPS32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 + ; MIPS32: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32) + ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C2]] + ; MIPS32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[SHL]], [[C1]] + ; MIPS32: [[COPY6:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32) + ; MIPS32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C2]] + ; MIPS32: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[AND1]](s32), [[OR]], [[SHL2]] + ; MIPS32: [[COPY7:%[0-9]+]]:_(s32) = COPY [[ICMP1]](s32) + ; MIPS32: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C2]] + ; MIPS32: [[SELECT2:%[0-9]+]]:_(s32) = G_SELECT [[AND2]](s32), [[COPY1]], [[SELECT1]] + ; MIPS32: $v0 = COPY [[SELECT]](s32) + ; MIPS32: $v1 = COPY [[SELECT2]](s32) + ; MIPS32: RetRA implicit $v0, implicit $v1 + %2:_(s32) = COPY $a0 + %3:_(s32) = COPY $a1 + %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32) + %4:_(s32) = COPY $a2 + %5:_(s32) = COPY $a3 + %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32) + %6:_(s64) = G_SHL %0, %1(s64) + %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64) + $v0 = COPY %7(s32) + $v1 = COPY %8(s32) + RetRA implicit $v0, implicit $v1 + +... +--- +name: ashl_i64 +alignment: 2 +tracksRegLiveness: true +body: | + bb.1.entry: + liveins: $a0, $a1, $a2, $a3 + + ; MIPS32-LABEL: name: ashl_i64 + ; MIPS32: liveins: $a0, $a1, $a2, $a3 + ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 + ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 + ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2 + ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3 + ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) + ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32 + ; MIPS32: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY4]], [[C]] + ; MIPS32: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY4]] + ; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 + ; MIPS32: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[COPY4]](s32), [[C]] + ; MIPS32: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY4]](s32), [[C1]] + ; MIPS32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY1]], [[COPY4]](s32) + ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[SUB1]](s32) + ; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[COPY4]](s32) + ; MIPS32: [[OR:%[0-9]+]]:_(s32) = G_OR [[SHL]], [[LSHR]] + ; MIPS32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 31 + ; MIPS32: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[COPY1]], [[C2]](s32) + ; MIPS32: [[ASHR2:%[0-9]+]]:_(s32) = G_ASHR [[COPY1]], [[SUB]](s32) + ; MIPS32: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 + ; MIPS32: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32) + ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] + ; MIPS32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[OR]], [[ASHR2]] + ; MIPS32: [[COPY6:%[0-9]+]]:_(s32) = COPY [[ICMP1]](s32) + ; MIPS32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] + ; MIPS32: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[AND1]](s32), [[COPY]], [[SELECT]] + ; MIPS32: [[COPY7:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32) + ; MIPS32: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] + ; MIPS32: [[SELECT2:%[0-9]+]]:_(s32) = G_SELECT [[AND2]](s32), [[ASHR]], [[ASHR1]] + ; MIPS32: $v0 = COPY [[SELECT1]](s32) + ; MIPS32: $v1 = COPY [[SELECT2]](s32) + ; MIPS32: RetRA implicit $v0, implicit $v1 + %2:_(s32) = COPY $a0 + %3:_(s32) = COPY $a1 + %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32) + %4:_(s32) = COPY $a2 + %5:_(s32) = COPY $a3 + %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32) + %6:_(s64) = G_ASHR %0, %1(s64) + %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64) + $v0 = COPY %7(s32) + $v1 = COPY %8(s32) + RetRA implicit $v0, implicit $v1 + +... +--- +name: lshr_i64 +alignment: 2 +tracksRegLiveness: true +body: | + bb.1.entry: + liveins: $a0, $a1, $a2, $a3 + + ; MIPS32-LABEL: name: lshr_i64 + ; MIPS32: liveins: $a0, $a1, $a2, $a3 + ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 + ; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1 + ; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2 + ; MIPS32: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3 + ; MIPS32: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) + ; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32 + ; MIPS32: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY4]], [[C]] + ; MIPS32: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY4]] + ; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 + ; MIPS32: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[COPY4]](s32), [[C]] + ; MIPS32: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY4]](s32), [[C1]] + ; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[COPY4]](s32) + ; MIPS32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[SUB1]](s32) + ; MIPS32: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[COPY4]](s32) + ; MIPS32: [[OR:%[0-9]+]]:_(s32) = G_OR [[SHL]], [[LSHR1]] + ; MIPS32: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[SUB]](s32) + ; MIPS32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 + ; MIPS32: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32) + ; MIPS32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C2]] + ; MIPS32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[OR]], [[LSHR2]] + ; MIPS32: [[COPY6:%[0-9]+]]:_(s32) = COPY [[ICMP1]](s32) + ; MIPS32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C2]] + ; MIPS32: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[AND1]](s32), [[COPY]], [[SELECT]] + ; MIPS32: [[COPY7:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32) + ; MIPS32: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C2]] + ; MIPS32: [[SELECT2:%[0-9]+]]:_(s32) = G_SELECT [[AND2]](s32), [[LSHR]], [[C1]] + ; MIPS32: $v0 = COPY [[SELECT1]](s32) + ; MIPS32: $v1 = COPY [[SELECT2]](s32) + ; MIPS32: RetRA implicit $v0, implicit $v1 + %2:_(s32) = COPY $a0 + %3:_(s32) = COPY $a1 + %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32) + %4:_(s32) = COPY $a2 + %5:_(s32) = COPY $a3 + %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32) + %6:_(s64) = G_LSHR %0, %1(s64) + %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64) + $v0 = COPY %7(s32) + $v1 = COPY %8(s32) + RetRA implicit $v0, implicit $v1 + +... Index: test/CodeGen/Mips/GlobalISel/llvm-ir/bitwise.ll =================================================================== --- test/CodeGen/Mips/GlobalISel/llvm-ir/bitwise.ll +++ test/CodeGen/Mips/GlobalISel/llvm-ir/bitwise.ll @@ -235,3 +235,138 @@ ret i32 %shr } +define i16 @shl_i16(i16 %a) { +; MIPS32-LABEL: shl_i16: +; MIPS32: # %bb.0: # %entry +; MIPS32-NEXT: ori $1, $zero, 2 +; MIPS32-NEXT: ori $2, $zero, 65535 +; MIPS32-NEXT: and $1, $1, $2 +; MIPS32-NEXT: sllv $2, $4, $1 +; MIPS32-NEXT: jr $ra +; MIPS32-NEXT: nop +entry: + %shl = shl i16 %a, 2 + ret i16 %shl +} + +define i8 @ashr_i8(i8 %a) { +; MIPS32-LABEL: ashr_i8: +; MIPS32: # %bb.0: # %entry +; MIPS32-NEXT: ori $1, $zero, 2 +; MIPS32-NEXT: ori $2, $zero, 255 +; MIPS32-NEXT: and $1, $1, $2 +; MIPS32-NEXT: sll $2, $4, 24 +; MIPS32-NEXT: sra $2, $2, 24 +; MIPS32-NEXT: srav $2, $2, $1 +; MIPS32-NEXT: jr $ra +; MIPS32-NEXT: nop +entry: + %0 = ashr i8 %a, 2 + ret i8 %0 +} + +define i16 @lshr_i16(i16 %a) { +; MIPS32-LABEL: lshr_i16: +; MIPS32: # %bb.0: # %entry +; MIPS32-NEXT: ori $1, $zero, 2 +; MIPS32-NEXT: ori $2, $zero, 65535 +; MIPS32-NEXT: and $1, $1, $2 +; MIPS32-NEXT: and $2, $4, $2 +; MIPS32-NEXT: srlv $2, $2, $1 +; MIPS32-NEXT: jr $ra +; MIPS32-NEXT: nop +entry: + %0 = lshr i16 %a, 2 + ret i16 %0 +} + +define i64 @shl_i64(i64 %a, i64 %b) { +; MIPS32-LABEL: shl_i64: +; MIPS32: # %bb.0: # %entry +; MIPS32-NEXT: ori $1, $zero, 32 +; MIPS32-NEXT: subu $2, $1, $6 +; MIPS32-NEXT: ori $3, $zero, 0 +; MIPS32-NEXT: sltu $1, $6, $1 +; MIPS32-NEXT: xor $8, $6, $3 +; MIPS32-NEXT: sltiu $8, $8, 1 +; MIPS32-NEXT: sllv $9, $4, $6 +; MIPS32-NEXT: sllv $10, $5, $6 +; MIPS32-NEXT: srlv $2, $4, $2 +; MIPS32-NEXT: or $2, $10, $2 +; MIPS32-NEXT: sllv $4, $4, $6 +; MIPS32-NEXT: ori $6, $zero, 1 +; MIPS32-NEXT: and $10, $1, $6 +; MIPS32-NEXT: movn $3, $9, $10 +; MIPS32-NEXT: and $1, $1, $6 +; MIPS32-NEXT: movn $4, $2, $1 +; MIPS32-NEXT: and $1, $8, $6 +; MIPS32-NEXT: movn $4, $5, $1 +; MIPS32-NEXT: move $2, $3 +; MIPS32-NEXT: move $3, $4 +; MIPS32-NEXT: jr $ra +; MIPS32-NEXT: nop +entry: + %shl = shl i64 %a, %b + ret i64 %shl +} + +define i64 @ashl_i64(i64 %a, i64 %b) { +; MIPS32-LABEL: ashl_i64: +; MIPS32: # %bb.0: # %entry +; MIPS32-NEXT: ori $1, $zero, 32 +; MIPS32-NEXT: subu $2, $6, $1 +; MIPS32-NEXT: subu $3, $1, $6 +; MIPS32-NEXT: ori $8, $zero, 0 +; MIPS32-NEXT: sltu $1, $6, $1 +; MIPS32-NEXT: xor $8, $6, $8 +; MIPS32-NEXT: sltiu $8, $8, 1 +; MIPS32-NEXT: srav $9, $5, $6 +; MIPS32-NEXT: sllv $3, $5, $3 +; MIPS32-NEXT: srlv $6, $4, $6 +; MIPS32-NEXT: or $3, $3, $6 +; MIPS32-NEXT: sra $6, $5, 31 +; MIPS32-NEXT: srav $2, $5, $2 +; MIPS32-NEXT: ori $5, $zero, 1 +; MIPS32-NEXT: and $10, $1, $5 +; MIPS32-NEXT: movn $2, $3, $10 +; MIPS32-NEXT: and $3, $8, $5 +; MIPS32-NEXT: movn $2, $4, $3 +; MIPS32-NEXT: and $1, $1, $5 +; MIPS32-NEXT: movn $6, $9, $1 +; MIPS32-NEXT: move $3, $6 +; MIPS32-NEXT: jr $ra +; MIPS32-NEXT: nop +entry: + %shr = ashr i64 %a, %b + ret i64 %shr +} + +define i64 @lshr_i64(i64 %a, i64 %b) { +; MIPS32-LABEL: lshr_i64: +; MIPS32: # %bb.0: # %entry +; MIPS32-NEXT: ori $1, $zero, 32 +; MIPS32-NEXT: subu $2, $6, $1 +; MIPS32-NEXT: subu $3, $1, $6 +; MIPS32-NEXT: ori $8, $zero, 0 +; MIPS32-NEXT: sltu $1, $6, $1 +; MIPS32-NEXT: xor $9, $6, $8 +; MIPS32-NEXT: sltiu $9, $9, 1 +; MIPS32-NEXT: srlv $10, $5, $6 +; MIPS32-NEXT: sllv $3, $5, $3 +; MIPS32-NEXT: srlv $6, $4, $6 +; MIPS32-NEXT: or $3, $3, $6 +; MIPS32-NEXT: srlv $2, $5, $2 +; MIPS32-NEXT: ori $5, $zero, 1 +; MIPS32-NEXT: and $6, $1, $5 +; MIPS32-NEXT: movn $2, $3, $6 +; MIPS32-NEXT: and $3, $9, $5 +; MIPS32-NEXT: movn $2, $4, $3 +; MIPS32-NEXT: and $1, $1, $5 +; MIPS32-NEXT: movn $8, $10, $1 +; MIPS32-NEXT: move $3, $8 +; MIPS32-NEXT: jr $ra +; MIPS32-NEXT: nop +entry: + %shr = lshr i64 %a, %b + ret i64 %shr +}