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Differential D66196

AMDGPU/GlobalISel: Restore insert point when getting aperture
ClosedPublic

Authored by arsenm on Aug 13 2019, 11:03 PM.

Details

Reviewers
tstellar
nhaehnle
kzhuravl
rampitec
kerbowa
Summary

Avoids SSA violations in a future patch.

Diff Detail

Revision Contents

Diff 215028

lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

Show First 20 Lines • Show All 1,255 Lines • ▼ Show 20 Lines if (Arg->isMasked()) {
auto LShr = B.buildLShr(S32, LiveIn, ShiftAmt); auto LShr = B.buildLShr(S32, LiveIn, ShiftAmt);
B.buildAnd(DstReg, LShr, B.buildConstant(S32, Mask >> Shift)); B.buildAnd(DstReg, LShr, B.buildConstant(S32, Mask >> Shift));
} else } else
B.buildCopy(DstReg, LiveIn); B.buildCopy(DstReg, LiveIn);
// Insert the argument copy if it doens't already exist. // Insert the argument copy if it doens't already exist.
// FIXME: It seems EmitLiveInCopies isn't called anywhere? // FIXME: It seems EmitLiveInCopies isn't called anywhere?
if (!MRI.getVRegDef(LiveIn)) { if (!MRI.getVRegDef(LiveIn)) {
// FIXME: Should have scoped insert pt
MachineBasicBlock &OrigInsBB = B.getMBB();
auto OrigInsPt = B.getInsertPt();
MachineBasicBlock &EntryMBB = B.getMF().front(); MachineBasicBlock &EntryMBB = B.getMF().front();
EntryMBB.addLiveIn(Arg->getRegister()); EntryMBB.addLiveIn(Arg->getRegister());
B.setInsertPt(EntryMBB, EntryMBB.begin()); B.setInsertPt(EntryMBB, EntryMBB.begin());
B.buildCopy(LiveIn, Arg->getRegister()); B.buildCopy(LiveIn, Arg->getRegister());
B.setInsertPt(OrigInsBB, OrigInsPt);
} }
return true; return true;
} }
bool AMDGPULegalizerInfo::legalizePreloadedArgIntrin( bool AMDGPULegalizerInfo::legalizePreloadedArgIntrin(
MachineInstr &MI, MachineInstr &MI,
MachineRegisterInfo &MRI, MachineRegisterInfo &MRI,
▲ Show 20 Lines • Show All 180 Lines • Show Last 20 Lines

test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir

Show First 20 Lines • Show All 141 Lines • ▼ Show 20 LinesmachineFunctionInfo:
argumentInfo: argumentInfo:
queuePtr: { reg: '$sgpr4_sgpr5' } queuePtr: { reg: '$sgpr4_sgpr5' }
body: | body: |
bb.0: bb.0:
liveins: $vgpr0 liveins: $vgpr0
; VI-LABEL: name: test_addrspacecast_p5_to_p0 ; VI-LABEL: name: test_addrspacecast_p5_to_p0
; VI: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr4_sgpr5 ; VI: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr4_sgpr5
; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 68
; VI: [[GEP:%[0-9]+]]:_(p4) = G_GEP %4, [[C]](s64)
; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[GEP]](p4) :: (dereferenceable invariant load 4 from `i8 addrspace(4)* undef` + 68, addrspace 4)
; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), %0(p5), %2
; VI: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT %0(p5)
; VI: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[PTRTOINT]](s32), [[LOAD]](s32)
; VI: [[SELECT:%[0-9]+]]:_(p0) = G_SELECT [[ICMP]](s1), [[MV]], %3
; VI: [[COPY1:%[0-9]+]]:_(p5) = COPY $vgpr0 ; VI: [[COPY1:%[0-9]+]]:_(p5) = COPY $vgpr0
; VI: [[C1:%[0-9]+]]:_(p5) = G_CONSTANT i32 0 ; VI: [[C:%[0-9]+]]:_(p5) = G_CONSTANT i32 0
; VI: [[C2:%[0-9]+]]:_(p0) = G_CONSTANT i64 0 ; VI: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
; VI: [[COPY2:%[0-9]+]]:_(p4) = COPY [[COPY]](p4) ; VI: [[COPY2:%[0-9]+]]:_(p4) = COPY [[COPY]](p4)
; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 68
; VI: [[GEP:%[0-9]+]]:_(p4) = G_GEP [[COPY2]], [[C2]](s64)
; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[GEP]](p4) :: (dereferenceable invariant load 4 from `i8 addrspace(4)* undef` + 68, addrspace 4)
; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[COPY1]](p5), [[C]]
; VI: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT [[COPY1]](p5)
; VI: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[PTRTOINT]](s32), [[LOAD]](s32)
; VI: [[SELECT:%[0-9]+]]:_(p0) = G_SELECT [[ICMP]](s1), [[MV]], [[C1]]
; VI: $vgpr0_vgpr1 = COPY [[SELECT]](p0) ; VI: $vgpr0_vgpr1 = COPY [[SELECT]](p0)
; GFX9-LABEL: name: test_addrspacecast_p5_to_p0 ; GFX9-LABEL: name: test_addrspacecast_p5_to_p0
; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0
; GFX9: [[C:%[0-9]+]]:_(p5) = G_CONSTANT i32 0 ; GFX9: [[C:%[0-9]+]]:_(p5) = G_CONSTANT i32 0
; GFX9: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 0 ; GFX9: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
; GFX9: [[S_GETREG_B32_:%[0-9]+]]:sreg_32(s32) = S_GETREG_B32 30735 ; GFX9: [[S_GETREG_B32_:%[0-9]+]]:sreg_32(s32) = S_GETREG_B32 30735
; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[S_GETREG_B32_]], [[C2]](s32) ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[S_GETREG_B32_]], [[C2]](s32)
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines argumentInfo:
queuePtr: { reg: '$sgpr4_sgpr5' } queuePtr: { reg: '$sgpr4_sgpr5' }
body: | body: |
bb.0: bb.0:
liveins: $vgpr0 liveins: $vgpr0
; VI-LABEL: name: test_addrspacecast_p3_to_p0 ; VI-LABEL: name: test_addrspacecast_p3_to_p0
; VI: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr4_sgpr5 ; VI: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr4_sgpr5
; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 68
; VI: [[GEP:%[0-9]+]]:_(p4) = G_GEP %4, [[C]](s64)
; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[GEP]](p4) :: (dereferenceable invariant load 4 from `i8 addrspace(4)* undef` + 68, addrspace 4)
; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), %0(p3), %2
; VI: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT %0(p3)
; VI: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[PTRTOINT]](s32), [[LOAD]](s32)
; VI: [[SELECT:%[0-9]+]]:_(p0) = G_SELECT [[ICMP]](s1), [[MV]], %3
; VI: [[COPY1:%[0-9]+]]:_(p3) = COPY $vgpr0 ; VI: [[COPY1:%[0-9]+]]:_(p3) = COPY $vgpr0
; VI: [[C1:%[0-9]+]]:_(p3) = G_CONSTANT i32 -1 ; VI: [[C:%[0-9]+]]:_(p3) = G_CONSTANT i32 -1
; VI: [[C2:%[0-9]+]]:_(p0) = G_CONSTANT i64 0 ; VI: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
; VI: [[COPY2:%[0-9]+]]:_(p4) = COPY [[COPY]](p4) ; VI: [[COPY2:%[0-9]+]]:_(p4) = COPY [[COPY]](p4)
; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 68
; VI: [[GEP:%[0-9]+]]:_(p4) = G_GEP [[COPY2]], [[C2]](s64)
; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[GEP]](p4) :: (dereferenceable invariant load 4 from `i8 addrspace(4)* undef` + 68, addrspace 4)
; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[COPY1]](p3), [[C]]
; VI: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT [[COPY1]](p3)
; VI: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[PTRTOINT]](s32), [[LOAD]](s32)
; VI: [[SELECT:%[0-9]+]]:_(p0) = G_SELECT [[ICMP]](s1), [[MV]], [[C1]]
; VI: $vgpr0_vgpr1 = COPY [[SELECT]](p0) ; VI: $vgpr0_vgpr1 = COPY [[SELECT]](p0)
; GFX9-LABEL: name: test_addrspacecast_p3_to_p0 ; GFX9-LABEL: name: test_addrspacecast_p3_to_p0
; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 ; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0
; GFX9: [[C:%[0-9]+]]:_(p3) = G_CONSTANT i32 -1 ; GFX9: [[C:%[0-9]+]]:_(p3) = G_CONSTANT i32 -1
; GFX9: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 0 ; GFX9: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
; GFX9: [[S_GETREG_B32_:%[0-9]+]]:sreg_32(s32) = S_GETREG_B32 30735 ; GFX9: [[S_GETREG_B32_:%[0-9]+]]:sreg_32(s32) = S_GETREG_B32 30735
; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[S_GETREG_B32_]], [[C2]](s32) ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[S_GETREG_B32_]], [[C2]](s32)
▲ Show 20 Lines • Show All 139 Lines • ▼ Show 20 LinesmachineFunctionInfo:
argumentInfo: argumentInfo:
queuePtr: { reg: '$sgpr4_sgpr5' } queuePtr: { reg: '$sgpr4_sgpr5' }
body: | body: |
bb.0: bb.0:
liveins: $vgpr0_vgpr1 liveins: $vgpr0_vgpr1
; VI-LABEL: name: test_addrspacecast_v2p3_to_v2p0 ; VI-LABEL: name: test_addrspacecast_v2p3_to_v2p0
; VI: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr4_sgpr5 ; VI: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr4_sgpr5
; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 68
; VI: [[GEP:%[0-9]+]]:_(p4) = G_GEP %8, [[C]](s64)
; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[GEP]](p4) :: (dereferenceable invariant load 4 from `i8 addrspace(4)* undef` + 68, addrspace 4)
; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), %3(p3), %6
; VI: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT %3(p3)
; VI: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[PTRTOINT]](s32), [[LOAD]](s32)
; VI: [[SELECT:%[0-9]+]]:_(p0) = G_SELECT [[ICMP]](s1), [[MV]], %7
; VI: [[COPY1:%[0-9]+]]:_(<2 x p3>) = COPY $vgpr0_vgpr1 ; VI: [[COPY1:%[0-9]+]]:_(<2 x p3>) = COPY $vgpr0_vgpr1
; VI: [[UV:%[0-9]+]]:_(p3), [[UV1:%[0-9]+]]:_(p3) = G_UNMERGE_VALUES [[COPY1]](<2 x p3>) ; VI: [[UV:%[0-9]+]]:_(p3), [[UV1:%[0-9]+]]:_(p3) = G_UNMERGE_VALUES [[COPY1]](<2 x p3>)
; VI: [[C1:%[0-9]+]]:_(p3) = G_CONSTANT i32 -1 ; VI: [[C:%[0-9]+]]:_(p3) = G_CONSTANT i32 -1
; VI: [[C2:%[0-9]+]]:_(p0) = G_CONSTANT i64 0 ; VI: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
; VI: [[COPY2:%[0-9]+]]:_(p4) = COPY [[COPY]](p4) ; VI: [[COPY2:%[0-9]+]]:_(p4) = COPY [[COPY]](p4)
; VI: [[GEP1:%[0-9]+]]:_(p4) = G_GEP [[COPY2]], [[C]](s64) ; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 68
; VI: [[GEP:%[0-9]+]]:_(p4) = G_GEP [[COPY2]], [[C2]](s64)
; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[GEP]](p4) :: (dereferenceable invariant load 4 from `i8 addrspace(4)* undef` + 68, addrspace 4)
; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV]](p3), [[C]]
; VI: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT [[UV]](p3)
; VI: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[PTRTOINT]](s32), [[LOAD]](s32)
; VI: [[SELECT:%[0-9]+]]:_(p0) = G_SELECT [[ICMP]](s1), [[MV]], [[C1]]
; VI: [[COPY3:%[0-9]+]]:_(p4) = COPY [[COPY]](p4)
; VI: [[GEP1:%[0-9]+]]:_(p4) = G_GEP [[COPY3]], [[C2]](s64)
; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[GEP1]](p4) :: (dereferenceable invariant load 4 from `i8 addrspace(4)* undef` + 68, addrspace 4) ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[GEP1]](p4) :: (dereferenceable invariant load 4 from `i8 addrspace(4)* undef` + 68, addrspace 4)
; VI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV]](p3), [[C1]] ; VI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV1]](p3), [[C]]
; VI: [[PTRTOINT1:%[0-9]+]]:_(s32) = G_PTRTOINT [[UV]](p3) ; VI: [[PTRTOINT1:%[0-9]+]]:_(s32) = G_PTRTOINT [[UV1]](p3)
; VI: [[MV1:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[PTRTOINT1]](s32), [[LOAD1]](s32) ; VI: [[MV1:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[PTRTOINT1]](s32), [[LOAD1]](s32)
; VI: [[SELECT1:%[0-9]+]]:_(p0) = G_SELECT [[ICMP1]](s1), [[MV1]], [[C2]] ; VI: [[SELECT1:%[0-9]+]]:_(p0) = G_SELECT [[ICMP1]](s1), [[MV1]], [[C1]]
; VI: [[COPY3:%[0-9]+]]:_(p4) = COPY [[COPY]](p4) ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p0>) = G_BUILD_VECTOR [[SELECT]](p0), [[SELECT1]](p0)
; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p0>) = G_BUILD_VECTOR [[SELECT1]](p0), [[SELECT]](p0)
; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x p0>) ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x p0>)
; GFX9-LABEL: name: test_addrspacecast_v2p3_to_v2p0 ; GFX9-LABEL: name: test_addrspacecast_v2p3_to_v2p0
; GFX9: [[COPY:%[0-9]+]]:_(<2 x p3>) = COPY $vgpr0_vgpr1 ; GFX9: [[COPY:%[0-9]+]]:_(<2 x p3>) = COPY $vgpr0_vgpr1
; GFX9: [[UV:%[0-9]+]]:_(p3), [[UV1:%[0-9]+]]:_(p3) = G_UNMERGE_VALUES [[COPY]](<2 x p3>) ; GFX9: [[UV:%[0-9]+]]:_(p3), [[UV1:%[0-9]+]]:_(p3) = G_UNMERGE_VALUES [[COPY]](<2 x p3>)
; GFX9: [[C:%[0-9]+]]:_(p3) = G_CONSTANT i32 -1 ; GFX9: [[C:%[0-9]+]]:_(p3) = G_CONSTANT i32 -1
; GFX9: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 0 ; GFX9: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
; GFX9: [[S_GETREG_B32_:%[0-9]+]]:sreg_32(s32) = S_GETREG_B32 30735 ; GFX9: [[S_GETREG_B32_:%[0-9]+]]:sreg_32(s32) = S_GETREG_B32 30735
; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
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