Index: llvm/lib/Target/X86/X86.td =================================================================== --- llvm/lib/Target/X86/X86.td +++ llvm/lib/Target/X86/X86.td @@ -499,6 +499,7 @@ include "X86SchedBroadwell.td" include "X86ScheduleSLM.td" include "X86ScheduleZnver1.td" +include "X86ScheduleZnver2.td" include "X86ScheduleBdVer2.td" include "X86ScheduleBtVer2.td" include "X86SchedSkylakeClient.td" @@ -1188,7 +1189,7 @@ def : Proc<"bdver4", ProcessorFeatures.BdVer4Features>; def : ProcessorModel<"znver1", Znver1Model, ProcessorFeatures.ZNFeatures>; -def : ProcessorModel<"znver2", Znver1Model, ProcessorFeatures.ZN2Features>; +def : ProcessorModel<"znver2", Znver2Model, ProcessorFeatures.ZN2Features>; def : Proc<"geode", [FeatureX87, FeatureSlowUAMem16, FeatureCMPXCHG8B, Feature3DNowA]>; Index: llvm/lib/Target/X86/X86InstrInfo.td =================================================================== --- llvm/lib/Target/X86/X86InstrInfo.td +++ llvm/lib/Target/X86/X86InstrInfo.td @@ -2845,7 +2845,7 @@ //===----------------------------------------------------------------------===// // CLZERO Instruction // -let SchedRW = [WriteSystem] in { +let SchedRW = [WriteLoad] in { let Uses = [EAX] in def CLZERO32r : I<0x01, MRM_FC, (outs), (ins), "clzero", []>, TB, Requires<[HasCLZERO, Not64BitMode]>; Index: llvm/lib/Target/X86/X86ScheduleZnver2.td =================================================================== --- llvm/lib/Target/X86/X86ScheduleZnver2.td +++ llvm/lib/Target/X86/X86ScheduleZnver2.td @@ -0,0 +1,1548 @@ +//=- X86ScheduleZnver2.td - X86 Znver2 Scheduling -------------*- tablegen -*-=// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file defines the machine model for Znver2 to support instruction +// scheduling and other instruction cost heuristics. +// +//===----------------------------------------------------------------------===// + +def Znver2Model : SchedMachineModel { + // Zen can decode 4 instructions per cycle. + let IssueWidth = 4; + // Based on the reorder buffer we define MicroOpBufferSize + let MicroOpBufferSize = 224; + let LoadLatency = 4; + let MispredictPenalty = 17; + let HighLatency = 25; + let PostRAScheduler = 1; + + // FIXME: This variable is required for incomplete model. + // We haven't catered all instructions. + // So, we reset the value of this variable so as to + // say that the model is incomplete. + let CompleteModel = 0; +} + +let SchedModel = Znver2Model in { + +// Zen can issue micro-ops to 10 different units in one cycle. +// These are +// * Four integer ALU units (ZALU0, ZALU1, ZALU2, ZALU3) +// * Three AGU units (ZAGU0, ZAGU1, ZAGU2) +// * Four FPU units (ZFPU0, ZFPU1, ZFPU2, ZFPU3) +// AGUs feed load store queues @two loads and 1 store per cycle. + +// Four ALU units are defined below +def Zn2ALU0 : ProcResource<1>; +def Zn2ALU1 : ProcResource<1>; +def Zn2ALU2 : ProcResource<1>; +def Zn2ALU3 : ProcResource<1>; + +// Two AGU units are defined below +def Zn2AGU0 : ProcResource<1>; +def Zn2AGU1 : ProcResource<1>; +def Zn2AGU2 : ProcResource<1>; + +// Four FPU units are defined below +def Zn2FPU0 : ProcResource<1>; +def Zn2FPU1 : ProcResource<1>; +def Zn2FPU2 : ProcResource<1>; +def Zn2FPU3 : ProcResource<1>; + +// FPU grouping +def Zn2FPU013 : ProcResGroup<[Zn2FPU0, Zn2FPU1, Zn2FPU3]>; +def Zn2FPU01 : ProcResGroup<[Zn2FPU0, Zn2FPU1]>; +def Zn2FPU12 : ProcResGroup<[Zn2FPU1, Zn2FPU2]>; +def Zn2FPU13 : ProcResGroup<[Zn2FPU1, Zn2FPU3]>; +def Zn2FPU23 : ProcResGroup<[Zn2FPU2, Zn2FPU3]>; +def Zn2FPU02 : ProcResGroup<[Zn2FPU0, Zn2FPU2]>; +def Zn2FPU03 : ProcResGroup<[Zn2FPU0, Zn2FPU3]>; + +// Below are the grouping of the units. +// Micro-ops to be issued to multiple units are tackled this way. + +// ALU grouping +// Zn2ALU03 - 0,3 grouping +def Zn2ALU03: ProcResGroup<[Zn2ALU0, Zn2ALU3]>; + +// 64 Entry (16x4 entries) Int Scheduler +def Zn2ALU : ProcResGroup<[Zn2ALU0, Zn2ALU1, Zn2ALU2, Zn2ALU3]> { + let BufferSize=64; +} + +// 28 Entry (14x2) AGU group. AGUs can't be used for all ALU operations +// but are relevant for some instructions +def Zn2AGU : ProcResGroup<[Zn2AGU0, Zn2AGU1, Zn2AGU2]> { + let BufferSize=28; +} + +// Integer Multiplication issued on ALU1. +def Zn2Multiplier : ProcResource<1>; + +// Integer division issued on ALU2. +def Zn2Divider : ProcResource<1>; + +// 5 Cycles load-to use Latency is captured +def : ReadAdvance; + +// 8 Cycles vector load-to use Latency is captured +def : ReadAdvance; +def : ReadAdvance; +def : ReadAdvance; + +def : ReadAdvance; + +// The Integer PRF for Zen is 168 entries, and it holds the architectural and +// speculative version of the 64-bit integer registers. +// Reference: "Software Optimization Guide for AMD Family 17h Processors" +def Zn2IntegerPRF : RegisterFile<168, [GR64, CCR]>; + +// 36 Entry (9x4 entries) floating-point Scheduler +def Zn2FPU : ProcResGroup<[Zn2FPU0, Zn2FPU1, Zn2FPU2, Zn2FPU3]> { + let BufferSize=36; +} + +// The Zen FP Retire Queue renames SIMD and FP uOps onto a pool of 160 128-bit +// registers. Operations on 256-bit data types are cracked into two COPs. +// Reference: "Software Optimization Guide for AMD Family 17h Processors" +def Zn2FpuPRF: RegisterFile<160, [VR64, VR128, VR256], [1, 1, 2]>; + +// The unit can track up to 192 macro ops in-flight. +// The retire unit handles in-order commit of up to 8 macro ops per cycle. +// Reference: "Software Optimization Guide for AMD Family 17h Processors" +// To be noted, the retire unit is shared between integer and FP ops. +// In SMT mode it is 96 entry per thread. But, we do not use the conservative +// value here because there is currently no way to fully mode the SMT mode, +// so there is no point in trying. +def Zn2RCU : RetireControlUnit<192, 8>; + +// (a folded load is an instruction that loads and does some operation) +// Ex: ADDPD xmm,[mem]-> This instruction has two micro-ops +// Instructions with folded loads are usually micro-fused, so they only appear +// as two micro-ops. +// a. load and +// b. addpd +// This multiclass is for folded loads for integer units. +multiclass Zn2WriteResPair ExePorts, + int Lat, list Res = [], int UOps = 1, + int LoadLat = 4, int LoadUOps = 1> { + // Register variant takes 1-cycle on Execution Port. + def : WriteRes { + let Latency = Lat; + let ResourceCycles = Res; + let NumMicroOps = UOps; + } + + // Memory variant also uses a cycle on Zn2AGU + // adds LoadLat cycles to the latency (default = 4). + def : WriteRes { + let Latency = !add(Lat, LoadLat); + let ResourceCycles = !if(!empty(Res), [], !listconcat([1], Res)); + let NumMicroOps = !add(UOps, LoadUOps); + } +} + +// This multiclass is for folded loads for floating point units. +multiclass Zn2WriteResFpuPair ExePorts, + int Lat, list Res = [], int UOps = 1, + int LoadLat = 7, int LoadUOps = 0> { + // Register variant takes 1-cycle on Execution Port. + def : WriteRes { + let Latency = Lat; + let ResourceCycles = Res; + let NumMicroOps = UOps; + } + + // Memory variant also uses a cycle on Zn2AGU + // adds LoadLat cycles to the latency (default = 7). + def : WriteRes { + let Latency = !add(Lat, LoadLat); + let ResourceCycles = !if(!empty(Res), [], !listconcat([1], Res)); + let NumMicroOps = !add(UOps, LoadUOps); + } +} + +// WriteRMW is set for instructions with Memory write +// operation in codegen +def : WriteRes; + +def : WriteRes; +def : WriteRes; +def : WriteRes; +def : WriteRes { let Latency = 8; } + +def : WriteRes; +def : WriteRes; +defm : Zn2WriteResPair; +defm : Zn2WriteResPair; + +defm : Zn2WriteResPair; + +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; + +defm : Zn2WriteResPair; +defm : Zn2WriteResPair; +defm : Zn2WriteResPair; +defm : Zn2WriteResPair; + +defm : X86WriteRes; +defm : X86WriteResUnsupported; +defm : X86WriteResUnsupported; +defm : X86WriteResUnsupported; + +defm : Zn2WriteResPair; +defm : Zn2WriteResFpuPair; + +defm : Zn2WriteResPair; +def : WriteRes; +def : WriteRes; +defm : X86WriteRes; + +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; + +// Bit counts. +defm : Zn2WriteResPair; +defm : Zn2WriteResPair; +defm : Zn2WriteResPair; +defm : Zn2WriteResPair; +defm : Zn2WriteResPair; + +// Treat misc copies as a move. +def : InstRW<[WriteMove], (instrs COPY)>; + +// BMI1 BEXTR, BMI2 BZHI +defm : Zn2WriteResPair; +defm : Zn2WriteResPair; + +// IDIV +defm : Zn2WriteResPair; +defm : Zn2WriteResPair; +defm : Zn2WriteResPair; +defm : Zn2WriteResPair; +defm : Zn2WriteResPair; +defm : Zn2WriteResPair; +defm : Zn2WriteResPair; +defm : Zn2WriteResPair; + +// IMULH +def : WriteRes{ + let Latency = 4; +} + +// Floating point operations +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; + +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; + +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; + +// Vector integer operations which uses FPU units +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; +defm : X86WriteRes; + +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; +defm : Zn2WriteResFpuPair; + +// Vector Shift Operations +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : X86WriteResPairUnsupported; + +// Vector insert/extract operations. +defm : Zn2WriteResFpuPair; + +def : WriteRes { + let Latency = 2; + let ResourceCycles = [1, 2]; +} +def : WriteRes { + let Latency = 5; + let NumMicroOps = 2; + let ResourceCycles = [1, 2, 3]; +} + +// MOVMSK Instructions. +def : WriteRes; +def : WriteRes; +def : WriteRes; + +def : WriteRes { + let NumMicroOps = 2; + let Latency = 2; + let ResourceCycles = [2]; +} + +// AES Instructions. +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; + +def : WriteRes; +def : WriteRes; + +// Following instructions with latency=100 are microcoded. +// We set long latency so as to block the entire pipeline. +defm : Zn2WriteResFpuPair; +defm : Zn2WriteResFpuPair; + +// Microcoded Instructions +def Zn2WriteMicrocoded : SchedWriteRes<[]> { + let Latency = 100; +} + +def : SchedAlias; +def : SchedAlias; +def : SchedAlias; +def : SchedAlias; +def : SchedAlias; +def : SchedAlias; +def : SchedAlias; +def : SchedAlias; +def : SchedAlias; +def : SchedAlias; +def : SchedAlias; +def : SchedAlias; +def : SchedAlias; +def : SchedAlias; +def : SchedAlias; +def : SchedAlias; +def : SchedAlias; +def : SchedAlias; +def : SchedAlias; + +//=== Regex based InstRW ===// +// Notation: +// - r: register. +// - m = memory. +// - i = immediate +// - mm: 64 bit mmx register. +// - x = 128 bit xmm register. +// - (x)mm = mmx or xmm register. +// - y = 256 bit ymm register. +// - v = any vector register. + +//=== Integer Instructions ===// +//-- Move instructions --// +// MOV. +// r16,m. +def : InstRW<[WriteALULd, ReadAfterLd], (instregex "MOV16rm")>; + +// MOVSX, MOVZX. +// r,m. +def : InstRW<[WriteLoad], (instregex "MOV(S|Z)X32rm(8|16)")>; + +// XCHG. +// r,r. +def Zn2WriteXCHG : SchedWriteRes<[Zn2ALU]> { + let NumMicroOps = 2; +} + +def : InstRW<[Zn2WriteXCHG], (instregex "XCHG(8|16|32|64)rr", "XCHG(16|32|64)ar")>; + +// r,m. +def Zn2WriteXCHGrm : SchedWriteRes<[Zn2AGU, Zn2ALU]> { + let Latency = 5; + let NumMicroOps = 2; +} +def : InstRW<[Zn2WriteXCHGrm, ReadAfterLd], (instregex "XCHG(8|16|32|64)rm")>; + +def : InstRW<[WriteMicrocoded], (instrs XLAT)>; + +// POP16. +// r. +def Zn2WritePop16r : SchedWriteRes<[Zn2AGU]>{ + let Latency = 5; + let NumMicroOps = 2; +} +def : InstRW<[Zn2WritePop16r], (instregex "POP16rmm")>; +def : InstRW<[WriteMicrocoded], (instregex "POPF(16|32)")>; +def : InstRW<[WriteMicrocoded], (instregex "POPA(16|32)")>; + + +// PUSH. +// r. Has default values. +// m. +def Zn2WritePUSH : SchedWriteRes<[Zn2AGU]>{ + let Latency = 4; +} +def : InstRW<[Zn2WritePUSH], (instregex "PUSH(16|32)rmm")>; + +//PUSHF +def : InstRW<[WriteMicrocoded], (instregex "PUSHF(16|32)")>; + +// PUSHA. +def Zn2WritePushA : SchedWriteRes<[Zn2AGU]> { + let Latency = 8; +} +def : InstRW<[Zn2WritePushA], (instregex "PUSHA(16|32)")>; + +//LAHF +def : InstRW<[WriteMicrocoded], (instrs LAHF)>; + +// MOVBE. +// r,m. +def Zn2WriteMOVBE : SchedWriteRes<[Zn2AGU, Zn2ALU]> { + let Latency = 5; +} +def : InstRW<[Zn2WriteMOVBE, ReadAfterLd], (instregex "MOVBE(16|32|64)rm")>; + +// m16,r16. +def : InstRW<[Zn2WriteMOVBE], (instregex "MOVBE(16|32|64)mr")>; + +//-- Arithmetic instructions --// + +// ADD SUB. +// m,r/i. +def : InstRW<[WriteALULd], (instregex "(ADD|SUB)(8|16|32|64)m(r|i)", + "(ADD|SUB)(8|16|32|64)mi8", + "(ADD|SUB)64mi32")>; + +// ADC SBB. +// m,r/i. +def : InstRW<[WriteALULd], + (instregex "(ADC|SBB)(8|16|32|64)m(r|i)", + "(ADC|SBB)(16|32|64)mi8", + "(ADC|SBB)64mi32")>; + +// INC DEC NOT NEG. +// m. +def : InstRW<[WriteALULd], + (instregex "(INC|DEC|NOT|NEG)(8|16|32|64)m")>; + +// MUL IMUL. +// r16. +def Zn2WriteMul16 : SchedWriteRes<[Zn2ALU1, Zn2Multiplier]> { + let Latency = 3; +} +def : SchedAlias; +def : SchedAlias; +def : SchedAlias; + +// m16. +def Zn2WriteMul16Ld : SchedWriteRes<[Zn2AGU, Zn2ALU1, Zn2Multiplier]> { + let Latency = 8; +} +def : SchedAlias; +def : SchedAlias; +def : SchedAlias; + +// r32. +def Zn2WriteMul32 : SchedWriteRes<[Zn2ALU1, Zn2Multiplier]> { + let Latency = 3; +} +def : SchedAlias; +def : SchedAlias; +def : SchedAlias; + +// m32. +def Zn2WriteMul32Ld : SchedWriteRes<[Zn2AGU, Zn2ALU1, Zn2Multiplier]> { + let Latency = 8; +} +def : SchedAlias; +def : SchedAlias; +def : SchedAlias; + +// r64. +def Zn2WriteMul64 : SchedWriteRes<[Zn2ALU1, Zn2Multiplier]> { + let Latency = 4; + let NumMicroOps = 2; +} +def : SchedAlias; +def : SchedAlias; +def : SchedAlias; + +// m64. +def Zn2WriteMul64Ld : SchedWriteRes<[Zn2AGU, Zn2ALU1, Zn2Multiplier]> { + let Latency = 9; + let NumMicroOps = 2; +} +def : SchedAlias; +def : SchedAlias; +def : SchedAlias; + +// MULX. +// r32,r32,r32. +def Zn2WriteMulX32 : SchedWriteRes<[Zn2ALU1, Zn2Multiplier]> { + let Latency = 3; + let ResourceCycles = [1, 2]; +} +def : InstRW<[Zn2WriteMulX32], (instrs MULX32rr)>; + +// r32,r32,m32. +def Zn2WriteMulX32Ld : SchedWriteRes<[Zn2AGU, Zn2ALU1, Zn2Multiplier]> { + let Latency = 8; + let ResourceCycles = [1, 2, 2]; +} +def : InstRW<[Zn2WriteMulX32Ld, ReadAfterLd], (instrs MULX32rm)>; + +// r64,r64,r64. +def Zn2WriteMulX64 : SchedWriteRes<[Zn2ALU1]> { + let Latency = 3; +} +def : InstRW<[Zn2WriteMulX64], (instrs MULX64rr)>; + +// r64,r64,m64. +def Zn2WriteMulX64Ld : SchedWriteRes<[Zn2AGU, Zn2ALU1, Zn2Multiplier]> { + let Latency = 8; +} +def : InstRW<[Zn2WriteMulX64Ld, ReadAfterLd], (instrs MULX64rm)>; + +//-- Control transfer instructions --// + +// J(E|R)CXZ. +def Zn2WriteJCXZ : SchedWriteRes<[Zn2ALU03]>; +def : InstRW<[Zn2WriteJCXZ], (instrs JCXZ, JECXZ, JRCXZ)>; + +// INTO +def : InstRW<[WriteMicrocoded], (instrs INTO)>; + +// LOOP. +def Zn2WriteLOOP : SchedWriteRes<[Zn2ALU03]>; +def : InstRW<[Zn2WriteLOOP], (instrs LOOP)>; + +// LOOP(N)E, LOOP(N)Z +def Zn2WriteLOOPE : SchedWriteRes<[Zn2ALU03]>; +def : InstRW<[Zn2WriteLOOPE], (instrs LOOPE, LOOPNE)>; + +// CALL. +// r. +def Zn2WriteCALLr : SchedWriteRes<[Zn2AGU, Zn2ALU03]>; +def : InstRW<[Zn2WriteCALLr], (instregex "CALL(16|32)r")>; + +def : InstRW<[WriteMicrocoded], (instregex "CALL(16|32)m")>; + +// RET. +def Zn2WriteRET : SchedWriteRes<[Zn2ALU03]> { + let NumMicroOps = 2; +} +def : InstRW<[Zn2WriteRET], (instregex "RET(L|Q|W)", "LRET(L|Q|W)", + "IRET(16|32|64)")>; + +//-- Logic instructions --// + +// AND OR XOR. +// m,r/i. +def : InstRW<[WriteALULd], + (instregex "(AND|OR|XOR)(8|16|32|64)m(r|i)", + "(AND|OR|XOR)(8|16|32|64)mi8", "(AND|OR|XOR)64mi32")>; + +// Define ALU latency variants +def Zn2WriteALULat2 : SchedWriteRes<[Zn2ALU]> { + let Latency = 2; +} +def Zn2WriteALULat2Ld : SchedWriteRes<[Zn2AGU, Zn2ALU]> { + let Latency = 6; +} + +// BT. +// m,i. +def : InstRW<[WriteShiftLd], (instregex "BT(16|32|64)mi8")>; + +// BTR BTS BTC. +// r,r,i. +def Zn2WriteBTRSC : SchedWriteRes<[Zn2ALU]> { + let Latency = 2; + let NumMicroOps = 2; +} +def : InstRW<[Zn2WriteBTRSC], (instregex "BT(R|S|C)(16|32|64)r(r|i8)")>; + +// m,r,i. +def Zn2WriteBTRSCm : SchedWriteRes<[Zn2AGU, Zn2ALU]> { + let Latency = 6; + let NumMicroOps = 2; +} +// m,r,i. +def : SchedAlias; +def : SchedAlias; + +// BLSI BLSMSK BLSR. +// r,r. +def : SchedAlias; +// r,m. +def : SchedAlias; + +// CLD STD. +def : InstRW<[WriteALU], (instrs STD, CLD)>; + +// PDEP PEXT. +// r,r,r. +def : InstRW<[WriteMicrocoded], (instregex "PDEP(32|64)rr", "PEXT(32|64)rr")>; +// r,r,m. +def : InstRW<[WriteMicrocoded], (instregex "PDEP(32|64)rm", "PEXT(32|64)rm")>; + +// RCR RCL. +// m,i. +def : InstRW<[WriteMicrocoded], (instregex "RC(R|L)(8|16|32|64)m(1|i|CL)")>; + +// SHR SHL SAR. +// m,i. +def : InstRW<[WriteShiftLd], (instregex "S(A|H)(R|L)(8|16|32|64)m(i|1)")>; + +// SHRD SHLD. +// m,r +def : InstRW<[WriteShiftLd], (instregex "SH(R|L)D(16|32|64)mri8")>; + +// r,r,cl. +def : InstRW<[WriteMicrocoded], (instregex "SH(R|L)D(16|32|64)rrCL")>; + +// m,r,cl. +def : InstRW<[WriteMicrocoded], (instregex "SH(R|L)D(16|32|64)mrCL")>; + +//-- Misc instructions --// +// CMPXCHG8B. +def Zn2WriteCMPXCHG8B : SchedWriteRes<[Zn2AGU, Zn2ALU]> { + let NumMicroOps = 18; +} +def : InstRW<[Zn2WriteCMPXCHG8B], (instrs CMPXCHG8B)>; + +def : InstRW<[WriteMicrocoded], (instrs CMPXCHG16B)>; + +// LEAVE +def Zn2WriteLEAVE : SchedWriteRes<[Zn2ALU, Zn2AGU]> { + let Latency = 8; + let NumMicroOps = 2; +} +def : InstRW<[Zn2WriteLEAVE], (instregex "LEAVE")>; + +// PAUSE. +def : InstRW<[WriteMicrocoded], (instrs PAUSE)>; + +// RDTSC. +def : InstRW<[WriteMicrocoded], (instregex "RDTSC")>; + +// RDPMC. +def : InstRW<[WriteMicrocoded], (instrs RDPMC)>; + +// RDRAND. +def : InstRW<[WriteMicrocoded], (instregex "RDRAND(16|32|64)r")>; + +// XGETBV. +def : InstRW<[WriteMicrocoded], (instregex "XGETBV")>; + +//-- String instructions --// +// CMPS. +def : InstRW<[WriteMicrocoded], (instregex "CMPS(B|L|Q|W)")>; + +// LODSB/W. +def : InstRW<[WriteMicrocoded], (instregex "LODS(B|W)")>; + +// LODSD/Q. +def : InstRW<[WriteMicrocoded], (instregex "LODS(L|Q)")>; + +// MOVS. +def : InstRW<[WriteMicrocoded], (instregex "MOVS(B|L|Q|W)")>; + +// SCAS. +def : InstRW<[WriteMicrocoded], (instregex "SCAS(B|W|L|Q)")>; + +// STOS +def : InstRW<[WriteMicrocoded], (instregex "STOS(B|L|Q|W)")>; + +// XADD. +def Zn2XADD : SchedWriteRes<[Zn2ALU]>; +def : InstRW<[Zn2XADD], (instregex "XADD(8|16|32|64)rr")>; +def : InstRW<[WriteMicrocoded], (instregex "XADD(8|16|32|64)rm")>; + +//=== Floating Point x87 Instructions ===// +//-- Move instructions --// + +def Zn2WriteFLDr : SchedWriteRes<[Zn2FPU13]> ; + +def Zn2WriteSTr: SchedWriteRes<[Zn2FPU23]> { + let Latency = 5; + let NumMicroOps = 2; +} + +// LD_F. +// r. +def : InstRW<[Zn2WriteFLDr], (instregex "LD_Frr")>; + +// m. +def Zn2WriteLD_F80m : SchedWriteRes<[Zn2AGU, Zn2FPU13]> { + let NumMicroOps = 2; +} +def : InstRW<[Zn2WriteLD_F80m], (instregex "LD_F80m")>; + +// FBLD. +def : InstRW<[WriteMicrocoded], (instregex "FBLDm")>; + +// FST(P). +// r. +def : InstRW<[Zn2WriteSTr], (instregex "ST_(F|FP)rr")>; + +// m80. +def Zn2WriteST_FP80m : SchedWriteRes<[Zn2AGU, Zn2FPU23]> { + let Latency = 5; +} +def : InstRW<[Zn2WriteST_FP80m], (instregex "ST_FP80m")>; + +// FBSTP. +// m80. +def : InstRW<[WriteMicrocoded], (instregex "FBSTPm")>; + +def Zn2WriteFXCH : SchedWriteRes<[Zn2FPU]>; + +// FXCHG. +def : InstRW<[Zn2WriteFXCH], (instrs XCH_F)>; + +// FILD. +def Zn2WriteFILD : SchedWriteRes<[Zn2AGU, Zn2FPU3]> { + let Latency = 11; + let NumMicroOps = 2; +} +def : InstRW<[Zn2WriteFILD], (instregex "ILD_F(16|32|64)m")>; + +// FIST(P) FISTTP. +def Zn2WriteFIST : SchedWriteRes<[Zn2AGU, Zn2FPU23]> { + let Latency = 12; +} +def : InstRW<[Zn2WriteFIST], (instregex "IS(T|TT)_(F|FP)(16|32|64)m")>; + +def Zn2WriteFPU13 : SchedWriteRes<[Zn2AGU, Zn2FPU13]> { + let Latency = 8; +} + +def Zn2WriteFPU3 : SchedWriteRes<[Zn2AGU, Zn2FPU3]> { + let Latency = 11; +} + +// FLDZ. +def : SchedAlias; + +// FLD1. +def : SchedAlias; + +// FLDPI FLDL2E etc. +def : SchedAlias; + +// FNSTSW. +// AX. +def : InstRW<[WriteMicrocoded], (instrs FNSTSW16r)>; + +// m16. +def : InstRW<[WriteMicrocoded], (instrs FNSTSWm)>; + +// FLDCW. +def : InstRW<[WriteMicrocoded], (instrs FLDCW16m)>; + +// FNSTCW. +def : InstRW<[WriteMicrocoded], (instrs FNSTCW16m)>; + +// FINCSTP FDECSTP. +def : InstRW<[Zn2WriteFPU3], (instrs FINCSTP, FDECSTP)>; + +// FFREE. +def : InstRW<[Zn2WriteFPU3], (instregex "FFREE")>; + +// FNSAVE. +def : InstRW<[WriteMicrocoded], (instregex "FSAVEm")>; + +// FRSTOR. +def : InstRW<[WriteMicrocoded], (instregex "FRSTORm")>; + +//-- Arithmetic instructions --// + +def Zn2WriteFPU3Lat1 : SchedWriteRes<[Zn2FPU3]> ; + +def Zn2WriteFPU0Lat1 : SchedWriteRes<[Zn2FPU0]> ; + +def Zn2WriteFPU0Lat1Ld : SchedWriteRes<[Zn2AGU, Zn2FPU0]> { + let Latency = 8; +} + +// FCHS. +def : InstRW<[Zn2WriteFPU3Lat1], (instregex "CHS_F")>; + +// FCOM(P) FUCOM(P). +// r. +def : InstRW<[Zn2WriteFPU0Lat1], (instregex "COM(P?)_FST0r", "UCOM_F(P?)r")>; +// m. +def : InstRW<[Zn2WriteFPU0Lat1Ld], (instregex "FCOM(P?)(32|64)m")>; + +// FCOMPP FUCOMPP. +// r. +def : InstRW<[Zn2WriteFPU0Lat1], (instrs FCOMPP, UCOM_FPPr)>; + +def Zn2WriteFPU02 : SchedWriteRes<[Zn2AGU, Zn2FPU02]> +{ + let Latency = 9; +} + +// FCOMI(P) FUCOMI(P). +// m. +def : InstRW<[Zn2WriteFPU02], (instrs COM_FIPr, COM_FIr, UCOM_FIPr, UCOM_FIr)>; + +def Zn2WriteFPU03 : SchedWriteRes<[Zn2AGU, Zn2FPU03]> +{ + let Latency = 12; + let NumMicroOps = 2; + let ResourceCycles = [1,3]; +} + +// FICOM(P). +def : InstRW<[Zn2WriteFPU03], (instregex "FICOM(P?)(16|32)m")>; + +// FTST. +def : InstRW<[Zn2WriteFPU0Lat1], (instregex "TST_F")>; + +// FXAM. +def : InstRW<[Zn2WriteFPU3Lat1], (instrs FXAM)>; + +// FPREM. +def : InstRW<[WriteMicrocoded], (instrs FPREM)>; + +// FPREM1. +def : InstRW<[WriteMicrocoded], (instrs FPREM1)>; + +// FRNDINT. +def : InstRW<[WriteMicrocoded], (instrs FRNDINT)>; + +// FSCALE. +def : InstRW<[WriteMicrocoded], (instrs FSCALE)>; + +// FXTRACT. +def : InstRW<[WriteMicrocoded], (instrs FXTRACT)>; + +// FNOP. +def : InstRW<[Zn2WriteFPU0Lat1], (instrs FNOP)>; + +// WAIT. +def : InstRW<[Zn2WriteFPU0Lat1], (instrs WAIT)>; + +// FNCLEX. +def : InstRW<[WriteMicrocoded], (instrs FNCLEX)>; + +// FNINIT. +def : InstRW<[WriteMicrocoded], (instrs FNINIT)>; + +//=== Integer MMX and XMM Instructions ===// + +// PACKSSWB/DW. +// mm <- mm. +def Zn2WriteFPU12 : SchedWriteRes<[Zn2FPU12]> ; +def Zn2WriteFPU12Y : SchedWriteRes<[Zn2FPU12]> { + let NumMicroOps = 2; +} +def Zn2WriteFPU12m : SchedWriteRes<[Zn2AGU, Zn2FPU12]> ; +def Zn2WriteFPU12Ym : SchedWriteRes<[Zn2AGU, Zn2FPU12]> { + let Latency = 8; + let NumMicroOps = 2; +} + +def : InstRW<[Zn2WriteFPU12], (instrs MMX_PACKSSDWirr, + MMX_PACKSSWBirr, + MMX_PACKUSWBirr)>; +def : InstRW<[Zn2WriteFPU12m], (instrs MMX_PACKSSDWirm, + MMX_PACKSSWBirm, + MMX_PACKUSWBirm)>; + +// VPMOVSX/ZX BW BD BQ WD WQ DQ. +// y <- x. +def : InstRW<[Zn2WriteFPU12Y], (instregex "VPMOV(SX|ZX)(BW|BD|BQ|WD|WQ|DQ)Yrr")>; +def : InstRW<[Zn2WriteFPU12Ym], (instregex "VPMOV(SX|ZX)(BW|BD|BQ|WD|WQ|DQ)Yrm")>; + +def Zn2WriteFPU013 : SchedWriteRes<[Zn2FPU013]> ; +def Zn2WriteFPU013Y : SchedWriteRes<[Zn2FPU013]> ; +def Zn2WriteFPU013m : SchedWriteRes<[Zn2AGU, Zn2FPU013]> { + let Latency = 8; + let NumMicroOps = 2; +} +def Zn2WriteFPU013Ld : SchedWriteRes<[Zn2AGU, Zn2FPU013]> { + let Latency = 8; + let NumMicroOps = 2; +} +def Zn2WriteFPU013LdY : SchedWriteRes<[Zn2AGU, Zn2FPU013]> { + let Latency = 8; + let NumMicroOps = 2; +} + +// PBLENDW. +// x,x,i / v,v,v,i +def : InstRW<[Zn2WriteFPU013], (instregex "(V?)PBLENDWrri")>; +// ymm +def : InstRW<[Zn2WriteFPU013Y], (instrs VPBLENDWYrri)>; + +// x,m,i / v,v,m,i +def : InstRW<[Zn2WriteFPU013Ld], (instregex "(V?)PBLENDWrmi")>; +// y,m,i +def : InstRW<[Zn2WriteFPU013LdY], (instrs VPBLENDWYrmi)>; + +def Zn2WriteFPU01 : SchedWriteRes<[Zn2FPU01]> ; +def Zn2WriteFPU01Y : SchedWriteRes<[Zn2FPU01]> { + let NumMicroOps = 2; +} + +// VPBLENDD. +// v,v,v,i. +def : InstRW<[Zn2WriteFPU01], (instrs VPBLENDDrri)>; +// ymm +def : InstRW<[Zn2WriteFPU01Y], (instrs VPBLENDDYrri)>; + +// v,v,m,i +def Zn2WriteFPU01Op2 : SchedWriteRes<[Zn2AGU, Zn2FPU01]> { + let NumMicroOps = 2; + let Latency = 8; + let ResourceCycles = [1, 2]; +} +def Zn2WriteFPU01Op2Y : SchedWriteRes<[Zn2AGU, Zn2FPU01]> { + let NumMicroOps = 2; + let Latency = 9; + let ResourceCycles = [1, 3]; +} +def : InstRW<[Zn2WriteFPU01Op2], (instrs VPBLENDDrmi)>; +def : InstRW<[Zn2WriteFPU01Op2Y], (instrs VPBLENDDYrmi)>; + +// MASKMOVQ. +def : InstRW<[WriteMicrocoded], (instregex "MMX_MASKMOVQ(64)?")>; + +// MASKMOVDQU. +def : InstRW<[WriteMicrocoded], (instregex "(V?)MASKMOVDQU(64)?")>; + +// VPMASKMOVD. +// ymm +def : InstRW<[WriteMicrocoded], + (instregex "VPMASKMOVD(Y?)rm")>; +// m, v,v. +def : InstRW<[WriteMicrocoded], (instregex "VPMASKMOV(D|Q)(Y?)mr")>; + +// VPBROADCAST B/W. +// x, m8/16. +def Zn2WriteVPBROADCAST128Ld : SchedWriteRes<[Zn2AGU, Zn2FPU12]> { + let Latency = 8; + let NumMicroOps = 2; + let ResourceCycles = [1, 2]; +} +def : InstRW<[Zn2WriteVPBROADCAST128Ld], + (instregex "VPBROADCAST(B|W)rm")>; + +// y, m8/16 +def Zn2WriteVPBROADCAST256Ld : SchedWriteRes<[Zn2AGU, Zn2FPU1]> { + let Latency = 8; + let NumMicroOps = 2; + let ResourceCycles = [1, 2]; +} +def : InstRW<[Zn2WriteVPBROADCAST256Ld], + (instregex "VPBROADCAST(B|W)Yrm")>; + +// VPGATHER. +def : InstRW<[WriteMicrocoded], (instregex "VPGATHER(Q|D)(Q|D)(Y?)rm")>; + +//-- Arithmetic instructions --// + +// HADD, HSUB PS/PD +// PHADD|PHSUB (S) W/D. +def : SchedAlias; +def : SchedAlias; +def : SchedAlias; +def : SchedAlias; +def : SchedAlias; +def : SchedAlias; + +// PCMPGTQ. +def Zn2WritePCMPGTQr : SchedWriteRes<[Zn2FPU03]>; +def : InstRW<[Zn2WritePCMPGTQr], (instregex "(V?)PCMPGTQ(Y?)rr")>; + +// x <- x,m. +def Zn2WritePCMPGTQm : SchedWriteRes<[Zn2AGU, Zn2FPU03]> { + let Latency = 8; +} +// ymm. +def Zn2WritePCMPGTQYm : SchedWriteRes<[Zn2AGU, Zn2FPU03]> { + let Latency = 8; +} +def : InstRW<[Zn2WritePCMPGTQm], (instregex "(V?)PCMPGTQrm")>; +def : InstRW<[Zn2WritePCMPGTQYm], (instrs VPCMPGTQYrm)>; + +//-- Logic instructions --// + +// PSLL,PSRL,PSRA W/D/Q. +// x,x / v,v,x. +def Zn2WritePShift : SchedWriteRes<[Zn2FPU2]> ; +def Zn2WritePShiftY : SchedWriteRes<[Zn2FPU2]> ; + +// PSLL,PSRL DQ. +def : InstRW<[Zn2WritePShift], (instregex "(V?)PS(R|L)LDQri")>; +def : InstRW<[Zn2WritePShiftY], (instregex "(V?)PS(R|L)LDQYri")>; + +//=== Floating Point XMM and YMM Instructions ===// +//-- Move instructions --// + +// VPERM2F128. +def : InstRW<[WriteMicrocoded], (instrs VPERM2F128rr)>; +def : InstRW<[WriteMicrocoded], (instrs VPERM2F128rm)>; + +def Zn2WriteBROADCAST : SchedWriteRes<[Zn2AGU, Zn2FPU13]> { + let NumMicroOps = 2; + let Latency = 8; +} +// VBROADCASTF128. +def : InstRW<[Zn2WriteBROADCAST], (instrs VBROADCASTF128)>; + +// EXTRACTPS. +// r32,x,i. +def Zn2WriteEXTRACTPSr : SchedWriteRes<[Zn2FPU12, Zn2FPU2]> { + let Latency = 2; + let ResourceCycles = [1, 2]; +} +def : InstRW<[Zn2WriteEXTRACTPSr], (instregex "(V?)EXTRACTPSrr")>; + +def Zn2WriteEXTRACTPSm : SchedWriteRes<[Zn2AGU,Zn2FPU12, Zn2FPU2]> { + let Latency = 5; + let NumMicroOps = 2; + let ResourceCycles = [5, 1, 2]; +} +// m32,x,i. +def : InstRW<[Zn2WriteEXTRACTPSm], (instregex "(V?)EXTRACTPSmr")>; + +// VEXTRACTF128. +// x,y,i. +def : InstRW<[Zn2WriteFPU013], (instrs VEXTRACTF128rr)>; + +// m128,y,i. +def : InstRW<[Zn2WriteFPU013m], (instrs VEXTRACTF128mr)>; + +def Zn2WriteVINSERT128r: SchedWriteRes<[Zn2FPU013]> { + let Latency = 2; +// let ResourceCycles = [2]; +} +def Zn2WriteVINSERT128Ld: SchedWriteRes<[Zn2AGU,Zn2FPU013]> { + let Latency = 9; + let NumMicroOps = 2; +} +// VINSERTF128. +// y,y,x,i. +def : InstRW<[Zn2WriteVINSERT128r], (instrs VINSERTF128rr)>; +def : InstRW<[Zn2WriteVINSERT128Ld], (instrs VINSERTF128rm)>; + +// VGATHER. +def : InstRW<[WriteMicrocoded], (instregex "VGATHER(Q|D)(PD|PS)(Y?)rm")>; + +//-- Conversion instructions --// +def Zn2WriteCVTPD2PSr: SchedWriteRes<[Zn2FPU3]> { + let Latency = 3; +} +def Zn2WriteCVTPD2PSYr: SchedWriteRes<[Zn2FPU3]> { + let Latency = 3; +} + +// CVTPD2PS. +// x,x. +def : SchedAlias; +// y,y. +def : SchedAlias; +// z,z. +defm : X86WriteResUnsupported; + +def Zn2WriteCVTPD2PSLd: SchedWriteRes<[Zn2AGU,Zn2FPU03]> { + let Latency = 10; + let NumMicroOps = 2; +} +// x,m128. +def : SchedAlias; + +// x,m256. +def Zn2WriteCVTPD2PSYLd : SchedWriteRes<[Zn2AGU, Zn2FPU3]> { + let Latency = 10; +} +def : SchedAlias; +// z,m512 +defm : X86WriteResUnsupported; + +// CVTSD2SS. +// x,x. +// Same as WriteCVTPD2PSr +def : SchedAlias; + +// x,m64. +def : SchedAlias; + +// CVTPS2PD. +// x,x. +def Zn2WriteCVTPS2PDr : SchedWriteRes<[Zn2FPU3]> { + let Latency = 3; +} +def : SchedAlias; + +// x,m64. +// y,m128. +def Zn2WriteCVTPS2PDLd : SchedWriteRes<[Zn2AGU, Zn2FPU3]> { + let Latency = 10; + let NumMicroOps = 2; +} +def : SchedAlias; +def : SchedAlias; +defm : X86WriteResUnsupported; + +// y,x. +def Zn2WriteVCVTPS2PDY : SchedWriteRes<[Zn2FPU3]> { + let Latency = 3; +} +def : SchedAlias; +defm : X86WriteResUnsupported; + +// CVTSS2SD. +// x,x. +def Zn2WriteCVTSS2SDr : SchedWriteRes<[Zn2FPU3]> { + let Latency = 3; +} +def : SchedAlias; + +// x,m32. +def Zn2WriteCVTSS2SDLd : SchedWriteRes<[Zn2AGU, Zn2FPU3]> { + let Latency = 10; + let NumMicroOps = 2; + let ResourceCycles = [1, 2]; +} +def : SchedAlias; + +def Zn2WriteCVTDQ2PDr: SchedWriteRes<[Zn2FPU12,Zn2FPU3]> { + let Latency = 3; +} +// CVTDQ2PD. +// x,x. +def : InstRW<[Zn2WriteCVTDQ2PDr], (instregex "(V)?CVTDQ2PDrr")>; + +// Same as xmm +// y,x. +def : InstRW<[Zn2WriteCVTDQ2PDr], (instrs VCVTDQ2PDYrr)>; +def : InstRW<[Zn2WriteCVTDQ2PDr], (instrs VCVTDQ2PSYrr)>; + +def Zn2WriteCVTPD2DQr: SchedWriteRes<[Zn2FPU12, Zn2FPU3]> { + let Latency = 3; +} +// CVT(T)PD2DQ. +// x,x. +def : InstRW<[Zn2WriteCVTPD2DQr], (instregex "(V?)CVT(T?)PD2DQrr")>; + +def Zn2WriteCVTPD2DQLd: SchedWriteRes<[Zn2AGU,Zn2FPU12,Zn2FPU3]> { + let Latency = 10; + let NumMicroOps = 2; +} +// x,m128. +def : InstRW<[Zn2WriteCVTPD2DQLd], (instregex "(V?)CVT(T?)PD2DQrm")>; +// same as xmm handling +// x,y. +def : InstRW<[Zn2WriteCVTPD2DQr], (instregex "VCVT(T?)PD2DQYrr")>; +// x,m256. +def : InstRW<[Zn2WriteCVTPD2DQLd], (instregex "VCVT(T?)PD2DQYrm")>; + +def Zn2WriteCVTPS2PIr: SchedWriteRes<[Zn2FPU3]> { + let Latency = 4; +} +// CVT(T)PS2PI. +// mm,x. +def : InstRW<[Zn2WriteCVTPS2PIr], (instregex "MMX_CVT(T?)PS2PIirr")>; + +// CVTPI2PD. +// x,mm. +def : InstRW<[Zn2WriteCVTPS2PDr], (instrs MMX_CVTPI2PDirr)>; + +// CVT(T)PD2PI. +// mm,x. +def : InstRW<[Zn2WriteCVTPS2PIr], (instregex "MMX_CVT(T?)PD2PIirr")>; + +def Zn2WriteCVSTSI2SSr: SchedWriteRes<[Zn2FPU3]> { + let Latency = 4; +} + +// same as CVTPD2DQr +// CVT(T)SS2SI. +// r32,x. +def : InstRW<[Zn2WriteCVTPD2DQr], (instregex "(V?)CVT(T?)SS2SI(64)?rr")>; +// same as CVTPD2DQm +// r32,m32. +def : InstRW<[Zn2WriteCVTPD2DQLd], (instregex "(V?)CVT(T?)SS2SI(64)?rm")>; + +def Zn2WriteCVSTSI2SDr: SchedWriteRes<[Zn2FPU013, Zn2FPU3]> { + let Latency = 4; +} +// CVTSI2SD. +// x,r32/64. +def : InstRW<[Zn2WriteCVSTSI2SDr], (instregex "(V?)CVTSI(64)?2SDrr")>; + + +def Zn2WriteCVSTSI2SIr: SchedWriteRes<[Zn2FPU3, Zn2FPU2]> { + let Latency = 4; +} +def Zn2WriteCVSTSI2SILd: SchedWriteRes<[Zn2AGU, Zn2FPU3, Zn2FPU2]> { + let Latency = 11; +} +// CVTSD2SI. +// r32/64 +def : InstRW<[Zn2WriteCVSTSI2SIr], (instregex "(V?)CVT(T?)SD2SI(64)?rr")>; +// r32,m32. +def : InstRW<[Zn2WriteCVSTSI2SILd], (instregex "(V?)CVT(T?)SD2SI(64)?rm")>; + +// VCVTPS2PH. +// x,v,i. +def : SchedAlias; +def : SchedAlias; +defm : X86WriteResUnsupported; +// m,v,i. +def : SchedAlias; +def : SchedAlias; +defm : X86WriteResUnsupported; + +// VCVTPH2PS. +// v,x. +def : SchedAlias; +def : SchedAlias; +defm : X86WriteResUnsupported; +// v,m. +def : SchedAlias; +def : SchedAlias; +defm : X86WriteResUnsupported; + +//-- SSE4A instructions --// +// EXTRQ +def Zn2WriteEXTRQ: SchedWriteRes<[Zn2FPU12, Zn2FPU2]> { + let Latency = 2; +} +def : InstRW<[Zn2WriteEXTRQ], (instregex "EXTRQ")>; + +// INSERTQ +def Zn2WriteINSERTQ: SchedWriteRes<[Zn2FPU03,Zn2FPU1]> { + let Latency = 4; +} +def : InstRW<[Zn2WriteINSERTQ], (instregex "INSERTQ")>; + +//-- SHA instructions --// +// SHA256MSG2 +def : InstRW<[WriteMicrocoded], (instregex "SHA256MSG2(Y?)r(r|m)")>; + +// SHA1MSG1, SHA256MSG1 +// x,x. +def Zn2WriteSHA1MSG1r : SchedWriteRes<[Zn2FPU12]> { + let Latency = 2; +} +def : InstRW<[Zn2WriteSHA1MSG1r], (instregex "SHA(1|256)MSG1rr")>; +// x,m. +def Zn2WriteSHA1MSG1Ld : SchedWriteRes<[Zn2AGU, Zn2FPU12]> { + let Latency = 9; +} +def : InstRW<[Zn2WriteSHA1MSG1Ld], (instregex "SHA(1|256)MSG1rm")>; + +// SHA1MSG2 +// x,x. +def Zn2WriteSHA1MSG2r : SchedWriteRes<[Zn2FPU12]> ; +def : InstRW<[Zn2WriteSHA1MSG2r], (instregex "SHA1MSG2rr")>; +// x,m. +def Zn2WriteSHA1MSG2Ld : SchedWriteRes<[Zn2AGU, Zn2FPU12]> { + let Latency = 8; +} +def : InstRW<[Zn2WriteSHA1MSG2Ld], (instregex "SHA1MSG2rm")>; + +// SHA1NEXTE +// x,x. +def Zn2WriteSHA1NEXTEr : SchedWriteRes<[Zn2FPU1]> ; +def : InstRW<[Zn2WriteSHA1NEXTEr], (instregex "SHA1NEXTErr")>; +// x,m. +def Zn2WriteSHA1NEXTELd : SchedWriteRes<[Zn2AGU, Zn2FPU1]> { + let Latency = 8; +} +def : InstRW<[Zn2WriteSHA1NEXTELd], (instregex "SHA1NEXTErm")>; + +// SHA1RNDS4 +// x,x. +def Zn2WriteSHA1RNDS4r : SchedWriteRes<[Zn2FPU1]> { + let Latency = 6; +} +def : InstRW<[Zn2WriteSHA1RNDS4r], (instregex "SHA1RNDS4rr")>; +// x,m. +def Zn2WriteSHA1RNDS4Ld : SchedWriteRes<[Zn2AGU, Zn2FPU1]> { + let Latency = 13; +} +def : InstRW<[Zn2WriteSHA1RNDS4Ld], (instregex "SHA1RNDS4rm")>; + +// SHA256RNDS2 +// x,x. +def Zn2WriteSHA256RNDS2r : SchedWriteRes<[Zn2FPU1]> { + let Latency = 4; +} +def : InstRW<[Zn2WriteSHA256RNDS2r], (instregex "SHA256RNDS2rr")>; +// x,m. +def Zn2WriteSHA256RNDS2Ld : SchedWriteRes<[Zn2AGU, Zn2FPU1]> { + let Latency = 11; +} +def : InstRW<[Zn2WriteSHA256RNDS2Ld], (instregex "SHA256RNDS2rm")>; + +//-- Arithmetic instructions --// + +// HADD, HSUB PS/PD +def : SchedAlias; +def : SchedAlias; +def : SchedAlias; +def : SchedAlias; + +// VDIVPS. +// TODO - convert to Zn2WriteResFpuPair +// y,y,y. +def Zn2WriteVDIVPSYr : SchedWriteRes<[Zn2FPU3]> { + let Latency = 10; + let ResourceCycles = [10]; +} +def : SchedAlias; + +// y,y,m256. +def Zn2WriteVDIVPSYLd : SchedWriteRes<[Zn2AGU, Zn2FPU3]> { + let Latency = 17; + let NumMicroOps = 2; + let ResourceCycles = [1, 17]; +} +def : SchedAlias; + +// VDIVPD. +// TODO - convert to Zn2WriteResFpuPair +// y,y,y. +def Zn2WriteVDIVPDY : SchedWriteRes<[Zn2FPU3]> { + let Latency = 13; + let ResourceCycles = [13]; +} +def : SchedAlias; + +// y,y,m256. +def Zn2WriteVDIVPDYLd : SchedWriteRes<[Zn2AGU, Zn2FPU3]> { + let Latency = 20; + let NumMicroOps = 2; + let ResourceCycles = [1,20]; +} +def : SchedAlias; + +// DPPS. +// x,x,i / v,v,v,i. +def : SchedAlias; +def : SchedAlias; + +// x,m,i / v,v,m,i. +def : SchedAlias; +def : SchedAlias; + +// DPPD. +// x,x,i. +def : SchedAlias; + +// x,m,i. +def : SchedAlias; + +// RSQRTSS +// TODO - convert to Zn2WriteResFpuPair +// x,x. +def Zn2WriteRSQRTSSr : SchedWriteRes<[Zn2FPU02]> { + let Latency = 5; +} +def : SchedAlias; + +// x,m128. +def Zn2WriteRSQRTSSLd: SchedWriteRes<[Zn2AGU, Zn2FPU02]> { + let Latency = 12; + let NumMicroOps = 2; + let ResourceCycles = [1,2]; +} +def : SchedAlias; + +// RSQRTPS +// TODO - convert to Zn2WriteResFpuPair +// y,y. +def Zn2WriteRSQRTPSYr : SchedWriteRes<[Zn2FPU01]> { + let Latency = 5; + let NumMicroOps = 2; + let ResourceCycles = [2]; +} +def : SchedAlias; + +// y,m256. +def Zn2WriteRSQRTPSYLd : SchedWriteRes<[Zn2AGU, Zn2FPU01]> { + let Latency = 12; + let NumMicroOps = 2; +} +def : SchedAlias; + +//-- Other instructions --// + +// VZEROUPPER. +def : InstRW<[WriteALU], (instrs VZEROUPPER)>; + +// VZEROALL. +def : InstRW<[WriteMicrocoded], (instrs VZEROALL)>; + +} // SchedModel Index: llvm/test/MC/X86/x86_long_nop.s =================================================================== --- llvm/test/MC/X86/x86_long_nop.s +++ llvm/test/MC/X86/x86_long_nop.s @@ -13,6 +13,8 @@ # RUN: llvm-mc -filetype=obj -arch=x86 -triple=i686-pc-linux-gnu %s -mcpu=btver2 | llvm-objdump -d -no-show-raw-insn - | FileCheck %s --check-prefix=LNOP15 # RUN: llvm-mc -filetype=obj -arch=x86 -triple=x86_64-pc-linux-gnu -mcpu=znver1 %s | llvm-objdump -d -no-show-raw-insn - | FileCheck %s --check-prefix=LNOP15 # RUN: llvm-mc -filetype=obj -arch=x86 -triple=i686-pc-linux-gnu %s -mcpu=znver1 | llvm-objdump -d -no-show-raw-insn - | FileCheck %s --check-prefix=LNOP15 +# RUN: llvm-mc -filetype=obj -arch=x86 -triple=x86_64-pc-linux-gnu -mcpu=znver2 %s | llvm-objdump -d -no-show-raw-insn - | FileCheck %s --check-prefix=LNOP15 +# RUN: llvm-mc -filetype=obj -arch=x86 -triple=i686-pc-linux-gnu %s -mcpu=znver2 | llvm-objdump -d -no-show-raw-insn - | FileCheck %s --check-prefix=LNOP15 # Ensure alignment directives also emit sequences of 10, 11 and 15-byte NOPs on processors # capable of using long NOPs. Index: llvm/test/tools/llvm-mca/X86/Generic/resources-clzero.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Generic/resources-clzero.s +++ llvm/test/tools/llvm-mca/X86/Generic/resources-clzero.s @@ -12,7 +12,7 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 100 0.33 U clzero +# CHECK-NEXT: 1 5 0.50 U clzero # CHECK: Resources: # CHECK-NEXT: [0] - SBDivider @@ -26,8 +26,8 @@ # CHECK: Resource pressure per iteration: # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - +# CHECK-NEXT: - - - - - - 0.50 0.50 # CHECK: Resource pressure by instruction: # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: -# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - clzero +# CHECK-NEXT: - - - - - - 0.50 0.50 clzero Index: llvm/test/tools/llvm-mca/X86/Znver1/resources-clzero.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver1/resources-clzero.s +++ llvm/test/tools/llvm-mca/X86/Znver1/resources-clzero.s @@ -12,7 +12,7 @@ # CHECK-NEXT: [6]: HasSideEffects (U) # CHECK: [1] [2] [3] [4] [5] [6] Instructions: -# CHECK-NEXT: 1 100 0.25 U clzero +# CHECK-NEXT: 1 8 0.50 U clzero # CHECK: Resources: # CHECK-NEXT: [0] - ZnAGU0 @@ -30,8 +30,8 @@ # CHECK: Resource pressure per iteration: # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] -# CHECK-NEXT: - - - - - - - - - - - - +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - # CHECK: Resource pressure by instruction: # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] Instructions: -# CHECK-NEXT: - - - - - - - - - - - - clzero +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - clzero Index: llvm/test/tools/llvm-mca/X86/Znver2/partial-reg-update-2.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/partial-reg-update-2.s +++ llvm/test/tools/llvm-mca/X86/Znver2/partial-reg-update-2.s @@ -0,0 +1,47 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -iterations=1 -resource-pressure=false -timeline < %s | FileCheck %s + +imul %rax, %rbx +lzcnt %ax, %bx +add %ecx, %ebx + +# CHECK: Iterations: 1 +# CHECK-NEXT: Instructions: 3 +# CHECK-NEXT: Total Cycles: 9 +# CHECK-NEXT: Total uOps: 4 + +# CHECK: Dispatch Width: 4 +# CHECK-NEXT: uOps Per Cycle: 0.44 +# CHECK-NEXT: IPC: 0.33 +# CHECK-NEXT: Block RThroughput: 1.0 + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 2 4 1.00 imulq %rax, %rbx +# CHECK-NEXT: 1 1 0.25 lzcntw %ax, %bx +# CHECK-NEXT: 1 1 0.25 addl %ecx, %ebx + +# CHECK: Timeline view: +# CHECK-NEXT: Index 012345678 + +# CHECK: [0,0] DeeeeER . imulq %rax, %rbx +# CHECK-NEXT: [0,1] D====eER. lzcntw %ax, %bx +# CHECK-NEXT: [0,2] D=====eER addl %ecx, %ebx + +# CHECK: Average Wait times (based on the timeline view): +# CHECK-NEXT: [0]: Executions +# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue +# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready +# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage + +# CHECK: [0] [1] [2] [3] +# CHECK-NEXT: 0. 1 1.0 1.0 0.0 imulq %rax, %rbx +# CHECK-NEXT: 1. 1 5.0 0.0 0.0 lzcntw %ax, %bx +# CHECK-NEXT: 2. 1 6.0 0.0 0.0 addl %ecx, %ebx Index: llvm/test/tools/llvm-mca/X86/Znver2/partial-reg-update-3.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/partial-reg-update-3.s +++ llvm/test/tools/llvm-mca/X86/Znver2/partial-reg-update-3.s @@ -0,0 +1,91 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -iterations=1500 -timeline -timeline-max-iterations=6 < %s | FileCheck %s + +# The ILP is limited by the false dependency on %dx. So, the mov cannot execute +# in parallel with the add. + +add %cx, %dx +mov %ax, %dx +xor %bx, %dx + +# CHECK: Iterations: 1500 +# CHECK-NEXT: Instructions: 4500 +# CHECK-NEXT: Total Cycles: 4503 +# CHECK-NEXT: Total uOps: 4500 + +# CHECK: Dispatch Width: 4 +# CHECK-NEXT: uOps Per Cycle: 1.00 +# CHECK-NEXT: IPC: 1.00 +# CHECK-NEXT: Block RThroughput: 0.8 + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.25 addw %cx, %dx +# CHECK-NEXT: 1 1 0.25 movw %ax, %dx +# CHECK-NEXT: 1 1 0.25 xorw %bx, %dx + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: - - - 0.75 0.75 0.75 0.75 - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - addw %cx, %dx +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - movw %ax, %dx +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - xorw %bx, %dx + +# CHECK: Timeline view: +# CHECK-NEXT: 0123456789 +# CHECK-NEXT: Index 0123456789 0 + +# CHECK: [0,0] DeER . . . . addw %cx, %dx +# CHECK-NEXT: [0,1] D=eER. . . . movw %ax, %dx +# CHECK-NEXT: [0,2] D==eER . . . xorw %bx, %dx +# CHECK-NEXT: [1,0] D===eER . . . addw %cx, %dx +# CHECK-NEXT: [1,1] .D===eER . . . movw %ax, %dx +# CHECK-NEXT: [1,2] .D====eER . . . xorw %bx, %dx +# CHECK-NEXT: [2,0] .D=====eER. . . addw %cx, %dx +# CHECK-NEXT: [2,1] .D======eER . . movw %ax, %dx +# CHECK-NEXT: [2,2] . D======eER . . xorw %bx, %dx +# CHECK-NEXT: [3,0] . D=======eER . . addw %cx, %dx +# CHECK-NEXT: [3,1] . D========eER . . movw %ax, %dx +# CHECK-NEXT: [3,2] . D=========eER. . xorw %bx, %dx +# CHECK-NEXT: [4,0] . D=========eER . addw %cx, %dx +# CHECK-NEXT: [4,1] . D==========eER . movw %ax, %dx +# CHECK-NEXT: [4,2] . D===========eER . xorw %bx, %dx +# CHECK-NEXT: [5,0] . D============eER . addw %cx, %dx +# CHECK-NEXT: [5,1] . D============eER. movw %ax, %dx +# CHECK-NEXT: [5,2] . D=============eER xorw %bx, %dx + +# CHECK: Average Wait times (based on the timeline view): +# CHECK-NEXT: [0]: Executions +# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue +# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready +# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage + +# CHECK: [0] [1] [2] [3] +# CHECK-NEXT: 0. 6 7.0 0.2 0.0 addw %cx, %dx +# CHECK-NEXT: 1. 6 7.7 0.0 0.0 movw %ax, %dx +# CHECK-NEXT: 2. 6 8.5 0.0 0.0 xorw %bx, %dx Index: llvm/test/tools/llvm-mca/X86/Znver2/partial-reg-update-4.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/partial-reg-update-4.s +++ llvm/test/tools/llvm-mca/X86/Znver2/partial-reg-update-4.s @@ -0,0 +1,94 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -iterations=1500 -timeline -timeline-max-iterations=7 < %s | FileCheck %s + +# The lzcnt cannot execute in parallel with the imul because there is a false +# dependency on %bx. + +imul %ax, %bx +lzcnt %ax, %bx +add %cx, %bx + +# CHECK: Iterations: 1500 +# CHECK-NEXT: Instructions: 4500 +# CHECK-NEXT: Total Cycles: 7503 +# CHECK-NEXT: Total uOps: 4500 + +# CHECK: Dispatch Width: 4 +# CHECK-NEXT: uOps Per Cycle: 0.60 +# CHECK-NEXT: IPC: 0.60 +# CHECK-NEXT: Block RThroughput: 1.0 + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 3 1.00 imulw %ax, %bx +# CHECK-NEXT: 1 1 0.25 lzcntw %ax, %bx +# CHECK-NEXT: 1 1 0.25 addw %cx, %bx + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: - - 0.67 1.00 0.67 0.67 - - - - - 1.00 + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - 1.00 - - - - - - - 1.00 imulw %ax, %bx +# CHECK-NEXT: - - 0.33 - 0.33 0.33 - - - - - - lzcntw %ax, %bx +# CHECK-NEXT: - - 0.33 - 0.33 0.33 - - - - - - addw %cx, %bx + +# CHECK: Timeline view: +# CHECK-NEXT: 0123456789 01234567 +# CHECK-NEXT: Index 0123456789 0123456789 + +# CHECK: [0,0] DeeeER . . . . . . . imulw %ax, %bx +# CHECK-NEXT: [0,1] D===eER . . . . . . . lzcntw %ax, %bx +# CHECK-NEXT: [0,2] D====eER . . . . . . . addw %cx, %bx +# CHECK-NEXT: [1,0] D=====eeeER . . . . . . imulw %ax, %bx +# CHECK-NEXT: [1,1] .D=======eER . . . . . . lzcntw %ax, %bx +# CHECK-NEXT: [1,2] .D========eER . . . . . . addw %cx, %bx +# CHECK-NEXT: [2,0] .D=========eeeER . . . . . imulw %ax, %bx +# CHECK-NEXT: [2,1] .D============eER . . . . . lzcntw %ax, %bx +# CHECK-NEXT: [2,2] . D============eER . . . . . addw %cx, %bx +# CHECK-NEXT: [3,0] . D=============eeeER . . . . imulw %ax, %bx +# CHECK-NEXT: [3,1] . D================eER . . . . lzcntw %ax, %bx +# CHECK-NEXT: [3,2] . D=================eER . . . . addw %cx, %bx +# CHECK-NEXT: [4,0] . D=================eeeER . . . imulw %ax, %bx +# CHECK-NEXT: [4,1] . D====================eER . . . lzcntw %ax, %bx +# CHECK-NEXT: [4,2] . D=====================eER . . . addw %cx, %bx +# CHECK-NEXT: [5,0] . D======================eeeER . . imulw %ax, %bx +# CHECK-NEXT: [5,1] . D========================eER . . lzcntw %ax, %bx +# CHECK-NEXT: [5,2] . D=========================eER . . addw %cx, %bx +# CHECK-NEXT: [6,0] . D==========================eeeER . imulw %ax, %bx +# CHECK-NEXT: [6,1] . D=============================eER. lzcntw %ax, %bx +# CHECK-NEXT: [6,2] . D=============================eER addw %cx, %bx + +# CHECK: Average Wait times (based on the timeline view): +# CHECK-NEXT: [0]: Executions +# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue +# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready +# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage + +# CHECK: [0] [1] [2] [3] +# CHECK-NEXT: 0. 7 14.1 0.1 0.0 imulw %ax, %bx +# CHECK-NEXT: 1. 7 16.9 0.0 0.0 lzcntw %ax, %bx +# CHECK-NEXT: 2. 7 17.6 0.0 0.0 addw %cx, %bx Index: llvm/test/tools/llvm-mca/X86/Znver2/partial-reg-update-5.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/partial-reg-update-5.s +++ llvm/test/tools/llvm-mca/X86/Znver2/partial-reg-update-5.s @@ -0,0 +1,70 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -iterations=1500 -timeline -timeline-max-iterations=8 < %s | FileCheck %s + +lzcnt %ax, %bx ## partial register stall. + +# CHECK: Iterations: 1500 +# CHECK-NEXT: Instructions: 1500 +# CHECK-NEXT: Total Cycles: 1503 +# CHECK-NEXT: Total uOps: 1500 + +# CHECK: Dispatch Width: 4 +# CHECK-NEXT: uOps Per Cycle: 1.00 +# CHECK-NEXT: IPC: 1.00 +# CHECK-NEXT: Block RThroughput: 0.3 + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.25 lzcntw %ax, %bx + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - lzcntw %ax, %bx + +# CHECK: Timeline view: +# CHECK-NEXT: 0 +# CHECK-NEXT: Index 0123456789 + +# CHECK: [0,0] DeER . . lzcntw %ax, %bx +# CHECK-NEXT: [1,0] D=eER. . lzcntw %ax, %bx +# CHECK-NEXT: [2,0] D==eER . lzcntw %ax, %bx +# CHECK-NEXT: [3,0] D===eER . lzcntw %ax, %bx +# CHECK-NEXT: [4,0] .D===eER . lzcntw %ax, %bx +# CHECK-NEXT: [5,0] .D====eER . lzcntw %ax, %bx +# CHECK-NEXT: [6,0] .D=====eER. lzcntw %ax, %bx +# CHECK-NEXT: [7,0] .D======eER lzcntw %ax, %bx + +# CHECK: Average Wait times (based on the timeline view): +# CHECK-NEXT: [0]: Executions +# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue +# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready +# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage + +# CHECK: [0] [1] [2] [3] +# CHECK-NEXT: 0. 8 4.0 0.1 0.0 lzcntw %ax, %bx Index: llvm/test/tools/llvm-mca/X86/Znver2/partial-reg-update-6.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/partial-reg-update-6.s +++ llvm/test/tools/llvm-mca/X86/Znver2/partial-reg-update-6.s @@ -0,0 +1,88 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -iterations=1500 -timeline -timeline-max-iterations=4 < %s | FileCheck %s + +# Each lzcnt has a false dependency on %ecx; the first lzcnt has to wait on the +# imul. However, the folded load can start immediately. +# The last lzcnt has a false dependency on %cx. However, even in this case, the +# folded load can start immediately. + +imul %edx, %ecx +lzcnt (%rsp), %cx +lzcnt 2(%rsp), %cx + +# CHECK: Iterations: 1500 +# CHECK-NEXT: Instructions: 4500 +# CHECK-NEXT: Total Cycles: 9003 +# CHECK-NEXT: Total uOps: 7500 + +# CHECK: Dispatch Width: 4 +# CHECK-NEXT: uOps Per Cycle: 0.83 +# CHECK-NEXT: IPC: 0.50 +# CHECK-NEXT: Block RThroughput: 1.3 + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 3 1.00 imull %edx, %ecx +# CHECK-NEXT: 2 5 0.33 * lzcntw (%rsp), %cx +# CHECK-NEXT: 2 5 0.33 * lzcntw 2(%rsp), %cx + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: 0.67 0.67 0.67 0.67 1.00 0.67 0.67 - - - - - 1.00 + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - - 1.00 - - - - - - - 1.00 imull %edx, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 0.33 - 0.33 0.33 - - - - - - lzcntw (%rsp), %cx +# CHECK-NEXT: 0.33 0.33 0.33 0.33 - 0.33 0.33 - - - - - - lzcntw 2(%rsp), %cx + +# CHECK: Timeline view: +# CHECK-NEXT: 0123456789 +# CHECK-NEXT: Index 0123456789 0123456 + +# CHECK: [0,0] DeeeER . . . .. imull %edx, %ecx +# CHECK-NEXT: [0,1] DeeeeeER . . . .. lzcntw (%rsp), %cx +# CHECK-NEXT: [0,2] .DeeeeeER . . . .. lzcntw 2(%rsp), %cx +# CHECK-NEXT: [1,0] .D=====eeeER . . .. imull %edx, %ecx +# CHECK-NEXT: [1,1] . D====eeeeeER . . .. lzcntw (%rsp), %cx +# CHECK-NEXT: [1,2] . D=====eeeeeER. . .. lzcntw 2(%rsp), %cx +# CHECK-NEXT: [2,0] . D=========eeeER . .. imull %edx, %ecx +# CHECK-NEXT: [2,1] . D=========eeeeeER. .. lzcntw (%rsp), %cx +# CHECK-NEXT: [2,2] . D=========eeeeeER .. lzcntw 2(%rsp), %cx +# CHECK-NEXT: [3,0] . D==============eeeER .. imull %edx, %ecx +# CHECK-NEXT: [3,1] . D=============eeeeeER. lzcntw (%rsp), %cx +# CHECK-NEXT: [3,2] . D==============eeeeeER lzcntw 2(%rsp), %cx + + +# CHECK: Average Wait times (based on the timeline view): +# CHECK-NEXT: [0]: Executions +# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue +# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready +# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage + +# CHECK: [0] [1] [2] [3] +# CHECK-NEXT: 0. 4 8.0 0.3 0.0 imull %edx, %ecx +# CHECK-NEXT: 1. 4 7.5 0.0 0.0 lzcntw (%rsp), %cx +# CHECK-NEXT: 2. 4 8.0 0.0 0.0 lzcntw 2(%rsp), %cx Index: llvm/test/tools/llvm-mca/X86/Znver2/partial-reg-update-7.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/partial-reg-update-7.s +++ llvm/test/tools/llvm-mca/X86/Znver2/partial-reg-update-7.s @@ -0,0 +1,51 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -iterations=1 -resource-pressure=false -timeline < %s | FileCheck %s + +# An instruction that writes to a 32-bit register will not have any false +# dependence on the corresponding 64-bit register because the upper part of +# the 64-bit register is set to zero + +imulq %rax, %rcx +addl %edx, %ecx +addq %rcx, %rdx + +# CHECK: Iterations: 1 +# CHECK-NEXT: Instructions: 3 +# CHECK-NEXT: Total Cycles: 9 +# CHECK-NEXT: Total uOps: 4 + +# CHECK: Dispatch Width: 4 +# CHECK-NEXT: uOps Per Cycle: 0.44 +# CHECK-NEXT: IPC: 0.33 +# CHECK-NEXT: Block RThroughput: 1.0 + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 2 4 1.00 imulq %rax, %rcx +# CHECK-NEXT: 1 1 0.25 addl %edx, %ecx +# CHECK-NEXT: 1 1 0.25 addq %rcx, %rdx + +# CHECK: Timeline view: +# CHECK-NEXT: Index 012345678 + +# CHECK: [0,0] DeeeeER . imulq %rax, %rcx +# CHECK-NEXT: [0,1] D====eER. addl %edx, %ecx +# CHECK-NEXT: [0,2] D=====eER addq %rcx, %rdx + +# CHECK: Average Wait times (based on the timeline view): +# CHECK-NEXT: [0]: Executions +# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue +# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready +# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage + +# CHECK: [0] [1] [2] [3] +# CHECK-NEXT: 0. 1 1.0 1.0 0.0 imulq %rax, %rcx +# CHECK-NEXT: 1. 1 5.0 0.0 0.0 addl %edx, %ecx +# CHECK-NEXT: 2. 1 6.0 0.0 0.0 addq %rcx, %rdx Index: llvm/test/tools/llvm-mca/X86/Znver2/partial-reg-update.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/partial-reg-update.s +++ llvm/test/tools/llvm-mca/X86/Znver2/partial-reg-update.s @@ -0,0 +1,47 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -iterations=1 -resource-pressure=false -timeline < %s | FileCheck %s + +imul %ax, %cx +add %al, %cl +add %ecx, %ebx + +# CHECK: Iterations: 1 +# CHECK-NEXT: Instructions: 3 +# CHECK-NEXT: Total Cycles: 8 +# CHECK-NEXT: Total uOps: 3 + +# CHECK: Dispatch Width: 4 +# CHECK-NEXT: uOps Per Cycle: 0.38 +# CHECK-NEXT: IPC: 0.38 +# CHECK-NEXT: Block RThroughput: 1.0 + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 3 1.00 imulw %ax, %cx +# CHECK-NEXT: 1 1 0.25 addb %al, %cl +# CHECK-NEXT: 1 1 0.25 addl %ecx, %ebx + +# CHECK: Timeline view: +# CHECK-NEXT: Index 01234567 + +# CHECK: [0,0] DeeeER . imulw %ax, %cx +# CHECK-NEXT: [0,1] D===eER. addb %al, %cl +# CHECK-NEXT: [0,2] D====eER addl %ecx, %ebx + +# CHECK: Average Wait times (based on the timeline view): +# CHECK-NEXT: [0]: Executions +# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue +# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready +# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage + +# CHECK: [0] [1] [2] [3] +# CHECK-NEXT: 0. 1 1.0 1.0 0.0 imulw %ax, %cx +# CHECK-NEXT: 1. 1 4.0 0.0 0.0 addb %al, %cl +# CHECK-NEXT: 2. 1 5.0 0.0 0.0 addl %ecx, %ebx Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-adx.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-adx.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-adx.s @@ -0,0 +1,61 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +adcx %ebx, %ecx +adcx (%rbx), %ecx +adcx %rbx, %rcx +adcx (%rbx), %rcx + +adox %ebx, %ecx +adox (%rbx), %ecx +adox %rbx, %rcx +adox (%rbx), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.25 adcxl %ebx, %ecx +# CHECK-NEXT: 2 5 0.33 * adcxl (%rbx), %ecx +# CHECK-NEXT: 1 1 0.25 adcxq %rbx, %rcx +# CHECK-NEXT: 2 5 0.33 * adcxq (%rbx), %rcx +# CHECK-NEXT: 1 1 0.25 adoxl %ebx, %ecx +# CHECK-NEXT: 2 5 0.33 * adoxl (%rbx), %ecx +# CHECK-NEXT: 1 1 0.25 adoxq %rbx, %rcx +# CHECK-NEXT: 2 5 0.33 * adoxq (%rbx), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: 1.33 1.33 1.33 2.00 2.00 2.00 2.00 - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - adcxl %ebx, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - adcxl (%rbx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - adcxq %rbx, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - adcxq (%rbx), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - adoxl %ebx, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - adoxl (%rbx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - adoxq %rbx, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - adoxq (%rbx), %rcx + Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-aes.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-aes.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-aes.s @@ -0,0 +1,76 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +aesdec %xmm0, %xmm2 +aesdec (%rax), %xmm2 + +aesdeclast %xmm0, %xmm2 +aesdeclast (%rax), %xmm2 + +aesenc %xmm0, %xmm2 +aesenc (%rax), %xmm2 + +aesenclast %xmm0, %xmm2 +aesenclast (%rax), %xmm2 + +aesimc %xmm0, %xmm2 +aesimc (%rax), %xmm2 + +aeskeygenassist $22, %xmm0, %xmm2 +aeskeygenassist $22, (%rax), %xmm2 + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 4 0.50 aesdec %xmm0, %xmm2 +# CHECK-NEXT: 1 11 0.50 * aesdec (%rax), %xmm2 +# CHECK-NEXT: 1 4 0.50 aesdeclast %xmm0, %xmm2 +# CHECK-NEXT: 1 11 0.50 * aesdeclast (%rax), %xmm2 +# CHECK-NEXT: 1 4 0.50 aesenc %xmm0, %xmm2 +# CHECK-NEXT: 1 11 0.50 * aesenc (%rax), %xmm2 +# CHECK-NEXT: 1 4 0.50 aesenclast %xmm0, %xmm2 +# CHECK-NEXT: 1 11 0.50 * aesenclast (%rax), %xmm2 +# CHECK-NEXT: 1 4 0.50 aesimc %xmm0, %xmm2 +# CHECK-NEXT: 1 11 0.50 * aesimc (%rax), %xmm2 +# CHECK-NEXT: 1 4 0.50 aeskeygenassist $22, %xmm0, %xmm2 +# CHECK-NEXT: 1 11 0.50 * aeskeygenassist $22, (%rax), %xmm2 + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: 2.00 2.00 - - - - - 6.00 6.00 - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - aesdec %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - aesdec (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - aesdeclast %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - aesdeclast (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - aesenc %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - aesenc (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - aesenclast %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - aesenclast (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - aesimc %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - aesimc (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - aeskeygenassist $22, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - aeskeygenassist $22, (%rax), %xmm2 Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-avx1.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-avx1.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-avx1.s @@ -0,0 +1,2436 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +vaddpd %xmm0, %xmm1, %xmm2 +vaddpd (%rax), %xmm1, %xmm2 + +vaddpd %ymm0, %ymm1, %ymm2 +vaddpd (%rax), %ymm1, %ymm2 + +vaddps %xmm0, %xmm1, %xmm2 +vaddps (%rax), %xmm1, %xmm2 + +vaddps %ymm0, %ymm1, %ymm2 +vaddps (%rax), %ymm1, %ymm2 + +vaddsd %xmm0, %xmm1, %xmm2 +vaddsd (%rax), %xmm1, %xmm2 + +vaddss %xmm0, %xmm1, %xmm2 +vaddss (%rax), %xmm1, %xmm2 + +vaddsubpd %xmm0, %xmm1, %xmm2 +vaddsubpd (%rax), %xmm1, %xmm2 + +vaddsubpd %ymm0, %ymm1, %ymm2 +vaddsubpd (%rax), %ymm1, %ymm2 + +vaddsubps %xmm0, %xmm1, %xmm2 +vaddsubps (%rax), %xmm1, %xmm2 + +vaddsubps %ymm0, %ymm1, %ymm2 +vaddsubps (%rax), %ymm1, %ymm2 + +vaesdec %xmm0, %xmm1, %xmm2 +vaesdec (%rax), %xmm1, %xmm2 + +vaesdeclast %xmm0, %xmm1, %xmm2 +vaesdeclast (%rax), %xmm1, %xmm2 + +vaesenc %xmm0, %xmm1, %xmm2 +vaesenc (%rax), %xmm1, %xmm2 + +vaesenclast %xmm0, %xmm1, %xmm2 +vaesenclast (%rax), %xmm1, %xmm2 + +vaesimc %xmm0, %xmm2 +vaesimc (%rax), %xmm2 + +vaeskeygenassist $22, %xmm0, %xmm2 +vaeskeygenassist $22, (%rax), %xmm2 + +vandnpd %xmm0, %xmm1, %xmm2 +vandnpd (%rax), %xmm1, %xmm2 + +vandnpd %ymm0, %ymm1, %ymm2 +vandnpd (%rax), %ymm1, %ymm2 + +vandnps %xmm0, %xmm1, %xmm2 +vandnps (%rax), %xmm1, %xmm2 + +vandnps %ymm0, %ymm1, %ymm2 +vandnps (%rax), %ymm1, %ymm2 + +vandpd %xmm0, %xmm1, %xmm2 +vandpd (%rax), %xmm1, %xmm2 + +vandpd %ymm0, %ymm1, %ymm2 +vandpd (%rax), %ymm1, %ymm2 + +vandps %xmm0, %xmm1, %xmm2 +vandps (%rax), %xmm1, %xmm2 + +vandps %ymm0, %ymm1, %ymm2 +vandps (%rax), %ymm1, %ymm2 + +vblendpd $11, %xmm0, %xmm1, %xmm2 +vblendpd $11, (%rax), %xmm1, %xmm2 + +vblendpd $11, %ymm0, %ymm1, %ymm2 +vblendpd $11, (%rax), %ymm1, %ymm2 + +vblendps $11, %xmm0, %xmm1, %xmm2 +vblendps $11, (%rax), %xmm1, %xmm2 + +vblendps $11, %ymm0, %ymm1, %ymm2 +vblendps $11, (%rax), %ymm1, %ymm2 + +vblendvpd %xmm3, %xmm0, %xmm1, %xmm2 +vblendvpd %xmm3, (%rax), %xmm1, %xmm2 + +vblendvpd %ymm3, %ymm0, %ymm1, %ymm2 +vblendvpd %ymm3, (%rax), %ymm1, %ymm2 + +vblendvps %xmm3, %xmm0, %xmm1, %xmm2 +vblendvps %xmm3, (%rax), %xmm1, %xmm2 + +vblendvps %ymm3, %ymm0, %ymm1, %ymm2 +vblendvps %ymm3, (%rax), %ymm1, %ymm2 + +vbroadcastf128 (%rax), %ymm2 + +vbroadcastsd (%rax), %ymm2 + +vbroadcastss (%rax), %xmm2 +vbroadcastss (%rax), %ymm2 + +vcmppd $0, %xmm0, %xmm1, %xmm2 +vcmppd $0, (%rax), %xmm1, %xmm2 + +vcmppd $0, %ymm0, %ymm1, %ymm2 +vcmppd $0, (%rax), %ymm1, %ymm2 + +vcmpps $0, %xmm0, %xmm1, %xmm2 +vcmpps $0, (%rax), %xmm1, %xmm2 + +vcmpps $0, %ymm0, %ymm1, %ymm2 +vcmpps $0, (%rax), %ymm1, %ymm2 + +vcmpsd $0, %xmm0, %xmm1, %xmm2 +vcmpsd $0, (%rax), %xmm1, %xmm2 + +vcmpss $0, %xmm0, %xmm1, %xmm2 +vcmpss $0, (%rax), %xmm1, %xmm2 + +vcomisd %xmm0, %xmm1 +vcomisd (%rax), %xmm1 + +vcomiss %xmm0, %xmm1 +vcomiss (%rax), %xmm1 + +vcvtdq2pd %xmm0, %xmm2 +vcvtdq2pd (%rax), %xmm2 + +vcvtdq2pd %xmm0, %ymm2 +vcvtdq2pd (%rax), %ymm2 + +vcvtdq2ps %xmm0, %xmm2 +vcvtdq2ps (%rax), %xmm2 + +vcvtdq2ps %ymm0, %ymm2 +vcvtdq2ps (%rax), %ymm2 + +vcvtpd2dqx %xmm0, %xmm2 +vcvtpd2dqx (%rax), %xmm2 + +vcvtpd2dqy %ymm0, %xmm2 +vcvtpd2dqy (%rax), %xmm2 + +vcvtpd2psx %xmm0, %xmm2 +vcvtpd2psx (%rax), %xmm2 + +vcvtpd2psy %ymm0, %xmm2 +vcvtpd2psy (%rax), %xmm2 + +vcvtps2dq %xmm0, %xmm2 +vcvtps2dq (%rax), %xmm2 + +vcvtps2dq %ymm0, %ymm2 +vcvtps2dq (%rax), %ymm2 + +vcvtps2pd %xmm0, %xmm2 +vcvtps2pd (%rax), %xmm2 + +vcvtps2pd %xmm0, %ymm2 +vcvtps2pd (%rax), %ymm2 + +vcvtsd2si %xmm0, %ecx +vcvtsd2si %xmm0, %rcx +vcvtsd2si (%rax), %ecx +vcvtsd2si (%rax), %rcx + +vcvtsd2ss %xmm0, %xmm1, %xmm2 +vcvtsd2ss (%rax), %xmm1, %xmm2 + +vcvtsi2sdl %ecx, %xmm0, %xmm2 +vcvtsi2sdq %rcx, %xmm0, %xmm2 +vcvtsi2sdl (%rax), %xmm0, %xmm2 +vcvtsi2sdq (%rax), %xmm0, %xmm2 + +vcvtsi2ssl %ecx, %xmm0, %xmm2 +vcvtsi2ssq %rcx, %xmm0, %xmm2 +vcvtsi2ssl (%rax), %xmm0, %xmm2 +vcvtsi2ssq (%rax), %xmm0, %xmm2 + +vcvtss2sd %xmm0, %xmm1, %xmm2 +vcvtss2sd (%rax), %xmm1, %xmm2 + +vcvtss2si %xmm0, %ecx +vcvtss2si %xmm0, %rcx +vcvtss2si (%rax), %ecx +vcvtss2si (%rax), %rcx + +vcvttpd2dqx %xmm0, %xmm2 +vcvttpd2dqx (%rax), %xmm2 + +vcvttpd2dqy %ymm0, %xmm2 +vcvttpd2dqy (%rax), %xmm2 + +vcvttps2dq %xmm0, %xmm2 +vcvttps2dq (%rax), %xmm2 + +vcvttps2dq %ymm0, %ymm2 +vcvttps2dq (%rax), %ymm2 + +vcvttsd2si %xmm0, %ecx +vcvttsd2si %xmm0, %rcx +vcvttsd2si (%rax), %ecx +vcvttsd2si (%rax), %rcx + +vcvttss2si %xmm0, %ecx +vcvttss2si %xmm0, %rcx +vcvttss2si (%rax), %ecx +vcvttss2si (%rax), %rcx + +vdivpd %xmm0, %xmm1, %xmm2 +vdivpd (%rax), %xmm1, %xmm2 + +vdivpd %ymm0, %ymm1, %ymm2 +vdivpd (%rax), %ymm1, %ymm2 + +vdivps %xmm0, %xmm1, %xmm2 +vdivps (%rax), %xmm1, %xmm2 + +vdivps %ymm0, %ymm1, %ymm2 +vdivps (%rax), %ymm1, %ymm2 + +vdivsd %xmm0, %xmm1, %xmm2 +vdivsd (%rax), %xmm1, %xmm2 + +vdivss %xmm0, %xmm1, %xmm2 +vdivss (%rax), %xmm1, %xmm2 + +vdppd $22, %xmm0, %xmm1, %xmm2 +vdppd $22, (%rax), %xmm1, %xmm2 + +vdpps $22, %xmm0, %xmm1, %xmm2 +vdpps $22, (%rax), %xmm1, %xmm2 + +vdpps $22, %ymm0, %ymm1, %ymm2 +vdpps $22, (%rax), %ymm1, %ymm2 + +vextractf128 $1, %ymm0, %xmm2 +vextractf128 $1, %ymm0, (%rax) + +vextractps $1, %xmm0, %rcx +vextractps $1, %xmm0, (%rax) + +vhaddpd %xmm0, %xmm1, %xmm2 +vhaddpd (%rax), %xmm1, %xmm2 + +vhaddpd %ymm0, %ymm1, %ymm2 +vhaddpd (%rax), %ymm1, %ymm2 + +vhaddps %xmm0, %xmm1, %xmm2 +vhaddps (%rax), %xmm1, %xmm2 + +vhaddps %ymm0, %ymm1, %ymm2 +vhaddps (%rax), %ymm1, %ymm2 + +vhsubpd %xmm0, %xmm1, %xmm2 +vhsubpd (%rax), %xmm1, %xmm2 + +vhsubpd %ymm0, %ymm1, %ymm2 +vhsubpd (%rax), %ymm1, %ymm2 + +vhsubps %xmm0, %xmm1, %xmm2 +vhsubps (%rax), %xmm1, %xmm2 + +vhsubps %ymm0, %ymm1, %ymm2 +vhsubps (%rax), %ymm1, %ymm2 + +vinsertf128 $1, %xmm0, %ymm1, %ymm2 +vinsertf128 $1, (%rax), %ymm1, %ymm2 + +vinsertps $1, %xmm0, %xmm1, %xmm2 +vinsertps $1, (%rax), %xmm1, %xmm2 + +vlddqu (%rax), %xmm2 +vlddqu (%rax), %ymm2 + +vldmxcsr (%rax) + +vmaskmovdqu %xmm0, %xmm1 + +vmaskmovpd (%rax), %xmm0, %xmm2 +vmaskmovpd (%rax), %ymm0, %ymm2 + +vmaskmovpd %xmm0, %xmm1, (%rax) +vmaskmovpd %ymm0, %ymm1, (%rax) + +vmaskmovps (%rax), %xmm0, %xmm2 +vmaskmovps (%rax), %ymm0, %ymm2 + +vmaskmovps %xmm0, %xmm1, (%rax) +vmaskmovps %ymm0, %ymm1, (%rax) + +vmaxpd %xmm0, %xmm1, %xmm2 +vmaxpd (%rax), %xmm1, %xmm2 + +vmaxpd %ymm0, %ymm1, %ymm2 +vmaxpd (%rax), %ymm1, %ymm2 + +vmaxps %xmm0, %xmm1, %xmm2 +vmaxps (%rax), %xmm1, %xmm2 + +vmaxps %ymm0, %ymm1, %ymm2 +vmaxps (%rax), %ymm1, %ymm2 + +vmaxsd %xmm0, %xmm1, %xmm2 +vmaxsd (%rax), %xmm1, %xmm2 + +vmaxss %xmm0, %xmm1, %xmm2 +vmaxss (%rax), %xmm1, %xmm2 + +vminpd %xmm0, %xmm1, %xmm2 +vminpd (%rax), %xmm1, %xmm2 + +vminpd %ymm0, %ymm1, %ymm2 +vminpd (%rax), %ymm1, %ymm2 + +vminps %xmm0, %xmm1, %xmm2 +vminps (%rax), %xmm1, %xmm2 + +vminps %ymm0, %ymm1, %ymm2 +vminps (%rax), %ymm1, %ymm2 + +vminsd %xmm0, %xmm1, %xmm2 +vminsd (%rax), %xmm1, %xmm2 + +vminss %xmm0, %xmm1, %xmm2 +vminss (%rax), %xmm1, %xmm2 + +vmovapd %xmm0, %xmm2 +vmovapd %xmm0, (%rax) +vmovapd (%rax), %xmm2 + +vmovapd %ymm0, %ymm2 +vmovapd %ymm0, (%rax) +vmovapd (%rax), %ymm2 + +vmovaps %xmm0, %xmm2 +vmovaps %xmm0, (%rax) +vmovaps (%rax), %xmm2 + +vmovaps %ymm0, %ymm2 +vmovaps %ymm0, (%rax) +vmovaps (%rax), %ymm2 + +vmovd %eax, %xmm2 +vmovd (%rax), %xmm2 + +vmovd %xmm0, %ecx +vmovd %xmm0, (%rax) + +vmovddup %xmm0, %xmm2 +vmovddup (%rax), %xmm2 + +vmovddup %ymm0, %ymm2 +vmovddup (%rax), %ymm2 + +vmovdqa %xmm0, %xmm2 +vmovdqa %xmm0, (%rax) +vmovdqa (%rax), %xmm2 + +vmovdqa %ymm0, %ymm2 +vmovdqa %ymm0, (%rax) +vmovdqa (%rax), %ymm2 + +vmovdqu %xmm0, %xmm2 +vmovdqu %xmm0, (%rax) +vmovdqu (%rax), %xmm2 + +vmovdqu %ymm0, %ymm2 +vmovdqu %ymm0, (%rax) +vmovdqu (%rax), %ymm2 + +vmovhlps %xmm0, %xmm1, %xmm2 +vmovlhps %xmm0, %xmm1, %xmm2 + +vmovhpd %xmm0, (%rax) +vmovhpd (%rax), %xmm1, %xmm2 + +vmovhps %xmm0, (%rax) +vmovhps (%rax), %xmm1, %xmm2 + +vmovlpd %xmm0, (%rax) +vmovlpd (%rax), %xmm1, %xmm2 + +vmovlps %xmm0, (%rax) +vmovlps (%rax), %xmm1, %xmm2 + +vmovmskpd %xmm0, %rcx +vmovmskpd %ymm0, %rcx + +vmovmskps %xmm0, %rcx +vmovmskps %ymm0, %rcx + +vmovntdq %xmm0, (%rax) +vmovntdq %ymm0, (%rax) + +vmovntdqa (%rax), %xmm2 +vmovntdqa (%rax), %ymm2 + +vmovntpd %xmm0, (%rax) +vmovntpd %ymm0, (%rax) + +vmovntps %xmm0, (%rax) +vmovntps %ymm0, (%rax) + +vmovq %xmm0, %xmm2 + +vmovq %rax, %xmm2 +vmovq (%rax), %xmm2 + +vmovq %xmm0, %rcx +vmovq %xmm0, (%rax) + +vmovsd %xmm0, %xmm1, %xmm2 +vmovsd %xmm0, (%rax) +vmovsd (%rax), %xmm2 + +vmovshdup %xmm0, %xmm2 +vmovshdup (%rax), %xmm2 + +vmovshdup %ymm0, %ymm2 +vmovshdup (%rax), %ymm2 + +vmovsldup %xmm0, %xmm2 +vmovsldup (%rax), %xmm2 + +vmovsldup %ymm0, %ymm2 +vmovsldup (%rax), %ymm2 + +vmovss %xmm0, %xmm1, %xmm2 +vmovss %xmm0, (%rax) +vmovss (%rax), %xmm2 + +vmovupd %xmm0, %xmm2 +vmovupd %xmm0, (%rax) +vmovupd (%rax), %xmm2 + +vmovupd %ymm0, %ymm2 +vmovupd %ymm0, (%rax) +vmovupd (%rax), %ymm2 + +vmovups %xmm0, %xmm2 +vmovups %xmm0, (%rax) +vmovups (%rax), %xmm2 + +vmovups %ymm0, %ymm2 +vmovups %ymm0, (%rax) +vmovups (%rax), %ymm2 + +vmpsadbw $1, %xmm0, %xmm1, %xmm2 +vmpsadbw $1, (%rax), %xmm1, %xmm2 + +vmulpd %xmm0, %xmm1, %xmm2 +vmulpd (%rax), %xmm1, %xmm2 + +vmulpd %ymm0, %ymm1, %ymm2 +vmulpd (%rax), %ymm1, %ymm2 + +vmulps %xmm0, %xmm1, %xmm2 +vmulps (%rax), %xmm1, %xmm2 + +vmulps %ymm0, %ymm1, %ymm2 +vmulps (%rax), %ymm1, %ymm2 + +vmulsd %xmm0, %xmm1, %xmm2 +vmulsd (%rax), %xmm1, %xmm2 + +vmulss %xmm0, %xmm1, %xmm2 +vmulss (%rax), %xmm1, %xmm2 + +vorpd %xmm0, %xmm1, %xmm2 +vorpd (%rax), %xmm1, %xmm2 + +vorpd %ymm0, %ymm1, %ymm2 +vorpd (%rax), %ymm1, %ymm2 + +vorps %xmm0, %xmm1, %xmm2 +vorps (%rax), %xmm1, %xmm2 + +vorps %ymm0, %ymm1, %ymm2 +vorps (%rax), %ymm1, %ymm2 + +vpabsb %xmm0, %xmm2 +vpabsb (%rax), %xmm2 + +vpabsd %xmm0, %xmm2 +vpabsd (%rax), %xmm2 + +vpabsw %xmm0, %xmm2 +vpabsw (%rax), %xmm2 + +vpackssdw %xmm0, %xmm1, %xmm2 +vpackssdw (%rax), %xmm1, %xmm2 + +vpacksswb %xmm0, %xmm1, %xmm2 +vpacksswb (%rax), %xmm1, %xmm2 + +vpackusdw %xmm0, %xmm1, %xmm2 +vpackusdw (%rax), %xmm1, %xmm2 + +vpackuswb %xmm0, %xmm1, %xmm2 +vpackuswb (%rax), %xmm1, %xmm2 + +vpaddb %xmm0, %xmm1, %xmm2 +vpaddb (%rax), %xmm1, %xmm2 + +vpaddd %xmm0, %xmm1, %xmm2 +vpaddd (%rax), %xmm1, %xmm2 + +vpaddq %xmm0, %xmm1, %xmm2 +vpaddq (%rax), %xmm1, %xmm2 + +vpaddsb %xmm0, %xmm1, %xmm2 +vpaddsb (%rax), %xmm1, %xmm2 + +vpaddsw %xmm0, %xmm1, %xmm2 +vpaddsw (%rax), %xmm1, %xmm2 + +vpaddusb %xmm0, %xmm1, %xmm2 +vpaddusb (%rax), %xmm1, %xmm2 + +vpaddusw %xmm0, %xmm1, %xmm2 +vpaddusw (%rax), %xmm1, %xmm2 + +vpaddw %xmm0, %xmm1, %xmm2 +vpaddw (%rax), %xmm1, %xmm2 + +vpalignr $1, %xmm0, %xmm1, %xmm2 +vpalignr $1, (%rax), %xmm1, %xmm2 + +vpand %xmm0, %xmm1, %xmm2 +vpand (%rax), %xmm1, %xmm2 + +vpandn %xmm0, %xmm1, %xmm2 +vpandn (%rax), %xmm1, %xmm2 + +vpavgb %xmm0, %xmm1, %xmm2 +vpavgb (%rax), %xmm1, %xmm2 + +vpavgw %xmm0, %xmm1, %xmm2 +vpavgw (%rax), %xmm1, %xmm2 + +vpblendvb %xmm3, %xmm0, %xmm1, %xmm2 +vpblendvb %xmm3, (%rax), %xmm1, %xmm2 + +vpblendw $11, %xmm0, %xmm1, %xmm2 +vpblendw $11, (%rax), %xmm1, %xmm2 + +vpclmulqdq $11, %xmm0, %xmm1, %xmm2 +vpclmulqdq $11, (%rax), %xmm1, %xmm2 + +vpcmpeqb %xmm0, %xmm1, %xmm2 +vpcmpeqb (%rax), %xmm1, %xmm2 + +vpcmpeqd %xmm0, %xmm1, %xmm2 +vpcmpeqd (%rax), %xmm1, %xmm2 + +vpcmpeqq %xmm0, %xmm1, %xmm2 +vpcmpeqq (%rax), %xmm1, %xmm2 + +vpcmpeqw %xmm0, %xmm1, %xmm2 +vpcmpeqw (%rax), %xmm1, %xmm2 + +vpcmpestri $1, %xmm0, %xmm2 +vpcmpestri $1, (%rax), %xmm2 + +vpcmpestrm $1, %xmm0, %xmm2 +vpcmpestrm $1, (%rax), %xmm2 + +vpcmpgtb %xmm0, %xmm1, %xmm2 +vpcmpgtb (%rax), %xmm1, %xmm2 + +vpcmpgtd %xmm0, %xmm1, %xmm2 +vpcmpgtd (%rax), %xmm1, %xmm2 + +vpcmpgtq %xmm0, %xmm1, %xmm2 +vpcmpgtq (%rax), %xmm1, %xmm2 + +vpcmpgtw %xmm0, %xmm1, %xmm2 +vpcmpgtw (%rax), %xmm1, %xmm2 + +vpcmpistri $1, %xmm0, %xmm2 +vpcmpistri $1, (%rax), %xmm2 + +vpcmpistrm $1, %xmm0, %xmm2 +vpcmpistrm $1, (%rax), %xmm2 + +vperm2f128 $1, %ymm0, %ymm1, %ymm2 +vperm2f128 $1, (%rax), %ymm1, %ymm2 + +vpermilpd $1, %xmm0, %xmm2 +vpermilpd $1, (%rax), %xmm2 +vpermilpd %xmm0, %xmm1, %xmm2 +vpermilpd (%rax), %xmm1, %xmm2 + +vpermilpd $1, %ymm0, %ymm2 +vpermilpd $1, (%rax), %ymm2 +vpermilpd %ymm0, %ymm1, %ymm2 +vpermilpd (%rax), %ymm1, %ymm2 + +vpermilps $1, %xmm0, %xmm2 +vpermilps $1, (%rax), %xmm2 +vpermilps %xmm0, %xmm1, %xmm2 +vpermilps (%rax), %xmm1, %xmm2 + +vpermilps $1, %ymm0, %ymm2 +vpermilps $1, (%rax), %ymm2 +vpermilps %ymm0, %ymm1, %ymm2 +vpermilps (%rax), %ymm1, %ymm2 + +vpextrb $1, %xmm0, %ecx +vpextrb $1, %xmm0, (%rax) + +vpextrd $1, %xmm0, %ecx +vpextrd $1, %xmm0, (%rax) + +vpextrq $1, %xmm0, %rcx +vpextrq $1, %xmm0, (%rax) + +vpextrw $1, %xmm0, %ecx +vpextrw $1, %xmm0, (%rax) + +vphaddd %xmm0, %xmm1, %xmm2 +vphaddd (%rax), %xmm1, %xmm2 + +vphaddsw %xmm0, %xmm1, %xmm2 +vphaddsw (%rax), %xmm1, %xmm2 + +vphaddw %xmm0, %xmm1, %xmm2 +vphaddw (%rax), %xmm1, %xmm2 + +vphminposuw %xmm0, %xmm2 +vphminposuw (%rax), %xmm2 + +vphsubd %xmm0, %xmm1, %xmm2 +vphsubd (%rax), %xmm1, %xmm2 + +vphsubsw %xmm0, %xmm1, %xmm2 +vphsubsw (%rax), %xmm1, %xmm2 + +vphsubw %xmm0, %xmm1, %xmm2 +vphsubw (%rax), %xmm1, %xmm2 + +vpinsrb $1, %eax, %xmm1, %xmm2 +vpinsrb $1, (%rax), %xmm1, %xmm2 + +vpinsrd $1, %eax, %xmm1, %xmm2 +vpinsrd $1, (%rax), %xmm1, %xmm2 + +vpinsrq $1, %rax, %xmm1, %xmm2 +vpinsrq $1, (%rax), %xmm1, %xmm2 + +vpinsrw $1, %eax, %xmm1, %xmm2 +vpinsrw $1, (%rax), %xmm1, %xmm2 + +vpmaddubsw %xmm0, %xmm1, %xmm2 +vpmaddubsw (%rax), %xmm1, %xmm2 + +vpmaddwd %xmm0, %xmm1, %xmm2 +vpmaddwd (%rax), %xmm1, %xmm2 + +vpmaxsb %xmm0, %xmm1, %xmm2 +vpmaxsb (%rax), %xmm1, %xmm2 + +vpmaxsd %xmm0, %xmm1, %xmm2 +vpmaxsd (%rax), %xmm1, %xmm2 + +vpmaxsw %xmm0, %xmm1, %xmm2 +vpmaxsw (%rax), %xmm1, %xmm2 + +vpmaxub %xmm0, %xmm1, %xmm2 +vpmaxub (%rax), %xmm1, %xmm2 + +vpmaxud %xmm0, %xmm1, %xmm2 +vpmaxud (%rax), %xmm1, %xmm2 + +vpmaxuw %xmm0, %xmm1, %xmm2 +vpmaxuw (%rax), %xmm1, %xmm2 + +vpminsb %xmm0, %xmm1, %xmm2 +vpminsb (%rax), %xmm1, %xmm2 + +vpminsd %xmm0, %xmm1, %xmm2 +vpminsd (%rax), %xmm1, %xmm2 + +vpminsw %xmm0, %xmm1, %xmm2 +vpminsw (%rax), %xmm1, %xmm2 + +vpminub %xmm0, %xmm1, %xmm2 +vpminub (%rax), %xmm1, %xmm2 + +vpminud %xmm0, %xmm1, %xmm2 +vpminud (%rax), %xmm1, %xmm2 + +vpminuw %xmm0, %xmm1, %xmm2 +vpminuw (%rax), %xmm1, %xmm2 + +vpmovmskb %xmm0, %rcx + +vpmovsxbd %xmm0, %xmm2 +vpmovsxbd (%rax), %xmm2 + +vpmovsxbq %xmm0, %xmm2 +vpmovsxbq (%rax), %xmm2 + +vpmovsxbw %xmm0, %xmm2 +vpmovsxbw (%rax), %xmm2 + +vpmovsxdq %xmm0, %xmm2 +vpmovsxdq (%rax), %xmm2 + +vpmovsxwd %xmm0, %xmm2 +vpmovsxwd (%rax), %xmm2 + +vpmovsxwq %xmm0, %xmm2 +vpmovsxwq (%rax), %xmm2 + +vpmovzxbd %xmm0, %xmm2 +vpmovzxbd (%rax), %xmm2 + +vpmovzxbq %xmm0, %xmm2 +vpmovzxbq (%rax), %xmm2 + +vpmovzxbw %xmm0, %xmm2 +vpmovzxbw (%rax), %xmm2 + +vpmovzxdq %xmm0, %xmm2 +vpmovzxdq (%rax), %xmm2 + +vpmovzxwd %xmm0, %xmm2 +vpmovzxwd (%rax), %xmm2 + +vpmovzxwq %xmm0, %xmm2 +vpmovzxwq (%rax), %xmm2 + +vpmuldq %xmm0, %xmm1, %xmm2 +vpmuldq (%rax), %xmm1, %xmm2 + +vpmulhrsw %xmm0, %xmm1, %xmm2 +vpmulhrsw (%rax), %xmm1, %xmm2 + +vpmulhuw %xmm0, %xmm1, %xmm2 +vpmulhuw (%rax), %xmm1, %xmm2 + +vpmulhw %xmm0, %xmm1, %xmm2 +vpmulhw (%rax), %xmm1, %xmm2 + +vpmulld %xmm0, %xmm1, %xmm2 +vpmulld (%rax), %xmm1, %xmm2 + +vpmullw %xmm0, %xmm1, %xmm2 +vpmullw (%rax), %xmm1, %xmm2 + +vpmuludq %xmm0, %xmm1, %xmm2 +vpmuludq (%rax), %xmm1, %xmm2 + +vpor %xmm0, %xmm1, %xmm2 +vpor (%rax), %xmm1, %xmm2 + +vpsadbw %xmm0, %xmm1, %xmm2 +vpsadbw (%rax), %xmm1, %xmm2 + +vpshufb %xmm0, %xmm1, %xmm2 +vpshufb (%rax), %xmm1, %xmm2 + +vpshufd $1, %xmm0, %xmm2 +vpshufd $1, (%rax), %xmm2 + +vpshufhw $1, %xmm0, %xmm2 +vpshufhw $1, (%rax), %xmm2 + +vpshuflw $1, %xmm0, %xmm2 +vpshuflw $1, (%rax), %xmm2 + +vpsignb %xmm0, %xmm1, %xmm2 +vpsignb (%rax), %xmm1, %xmm2 + +vpsignd %xmm0, %xmm1, %xmm2 +vpsignd (%rax), %xmm1, %xmm2 + +vpsignw %xmm0, %xmm1, %xmm2 +vpsignw (%rax), %xmm1, %xmm2 + +vpslld $1, %xmm0, %xmm2 +vpslld %xmm0, %xmm1, %xmm2 +vpslld (%rax), %xmm1, %xmm2 + +vpslldq $1, %xmm1, %xmm2 + +vpsllq $1, %xmm0, %xmm2 +vpsllq %xmm0, %xmm1, %xmm2 +vpsllq (%rax), %xmm1, %xmm2 + +vpsllw $1, %xmm0, %xmm2 +vpsllw %xmm0, %xmm1, %xmm2 +vpsllw (%rax), %xmm1, %xmm2 + +vpsrad $1, %xmm0, %xmm2 +vpsrad %xmm0, %xmm1, %xmm2 +vpsrad (%rax), %xmm1, %xmm2 + +vpsraw $1, %xmm0, %xmm2 +vpsraw %xmm0, %xmm1, %xmm2 +vpsraw (%rax), %xmm1, %xmm2 + +vpsrld $1, %xmm0, %xmm2 +vpsrld %xmm0, %xmm1, %xmm2 +vpsrld (%rax), %xmm1, %xmm2 + +vpsrldq $1, %xmm1, %xmm2 + +vpsrlq $1, %xmm0, %xmm2 +vpsrlq %xmm0, %xmm1, %xmm2 +vpsrlq (%rax), %xmm1, %xmm2 + +vpsrlw $1, %xmm0, %xmm2 +vpsrlw %xmm0, %xmm1, %xmm2 +vpsrlw (%rax), %xmm1, %xmm2 + +vpsubb %xmm0, %xmm1, %xmm2 +vpsubb (%rax), %xmm1, %xmm2 + +vpsubd %xmm0, %xmm1, %xmm2 +vpsubd (%rax), %xmm1, %xmm2 + +vpsubq %xmm0, %xmm1, %xmm2 +vpsubq (%rax), %xmm1, %xmm2 + +vpsubsb %xmm0, %xmm1, %xmm2 +vpsubsb (%rax), %xmm1, %xmm2 + +vpsubsw %xmm0, %xmm1, %xmm2 +vpsubsw (%rax), %xmm1, %xmm2 + +vpsubusb %xmm0, %xmm1, %xmm2 +vpsubusb (%rax), %xmm1, %xmm2 + +vpsubusw %xmm0, %xmm1, %xmm2 +vpsubusw (%rax), %xmm1, %xmm2 + +vpsubw %xmm0, %xmm1, %xmm2 +vpsubw (%rax), %xmm1, %xmm2 + +vptest %xmm0, %xmm1 +vptest (%rax), %xmm1 + +vptest %ymm0, %ymm1 +vptest (%rax), %ymm1 + +vpunpckhbw %xmm0, %xmm1, %xmm2 +vpunpckhbw (%rax), %xmm1, %xmm2 + +vpunpckhdq %xmm0, %xmm1, %xmm2 +vpunpckhdq (%rax), %xmm1, %xmm2 + +vpunpckhqdq %xmm0, %xmm1, %xmm2 +vpunpckhqdq (%rax), %xmm1, %xmm2 + +vpunpckhwd %xmm0, %xmm1, %xmm2 +vpunpckhwd (%rax), %xmm1, %xmm2 + +vpunpcklbw %xmm0, %xmm1, %xmm2 +vpunpcklbw (%rax), %xmm1, %xmm2 + +vpunpckldq %xmm0, %xmm1, %xmm2 +vpunpckldq (%rax), %xmm1, %xmm2 + +vpunpcklqdq %xmm0, %xmm1, %xmm2 +vpunpcklqdq (%rax), %xmm1, %xmm2 + +vpunpcklwd %xmm0, %xmm1, %xmm2 +vpunpcklwd (%rax), %xmm1, %xmm2 + +vpxor %xmm0, %xmm1, %xmm2 +vpxor (%rax), %xmm1, %xmm2 + +vrcpps %xmm0, %xmm2 +vrcpps (%rax), %xmm2 + +vrcpps %ymm0, %ymm2 +vrcpps (%rax), %ymm2 + +vrcpss %xmm0, %xmm1, %xmm2 +vrcpss (%rax), %xmm1, %xmm2 + +vroundpd $1, %xmm0, %xmm2 +vroundpd $1, (%rax), %xmm2 + +vroundpd $1, %ymm0, %ymm2 +vroundpd $1, (%rax), %ymm2 + +vroundps $1, %xmm0, %xmm2 +vroundps $1, (%rax), %xmm2 + +vroundps $1, %ymm0, %ymm2 +vroundps $1, (%rax), %ymm2 + +vroundsd $1, %xmm0, %xmm1, %xmm2 +vroundsd $1, (%rax), %xmm1, %xmm2 + +vroundss $1, %xmm0, %xmm1, %xmm2 +vroundss $1, (%rax), %xmm1, %xmm2 + +vrsqrtps %xmm0, %xmm2 +vrsqrtps (%rax), %xmm2 + +vrsqrtps %ymm0, %ymm2 +vrsqrtps (%rax), %ymm2 + +vrsqrtss %xmm0, %xmm1, %xmm2 +vrsqrtss (%rax), %xmm1, %xmm2 + +vshufpd $1, %xmm0, %xmm1, %xmm2 +vshufpd $1, (%rax), %xmm1, %xmm2 + +vshufpd $1, %ymm0, %ymm1, %ymm2 +vshufpd $1, (%rax), %ymm1, %ymm2 + +vshufps $1, %xmm0, %xmm1, %xmm2 +vshufps $1, (%rax), %xmm1, %xmm2 + +vshufps $1, %ymm0, %ymm1, %ymm2 +vshufps $1, (%rax), %ymm1, %ymm2 + +vsqrtpd %xmm0, %xmm2 +vsqrtpd (%rax), %xmm2 + +vsqrtpd %ymm0, %ymm2 +vsqrtpd (%rax), %ymm2 + +vsqrtps %xmm0, %xmm2 +vsqrtps (%rax), %xmm2 + +vsqrtps %ymm0, %ymm2 +vsqrtps (%rax), %ymm2 + +vsqrtsd %xmm0, %xmm1, %xmm2 +vsqrtsd (%rax), %xmm1, %xmm2 + +vsqrtss %xmm0, %xmm1, %xmm2 +vsqrtss (%rax), %xmm1, %xmm2 + +vstmxcsr (%rax) + +vsubpd %xmm0, %xmm1, %xmm2 +vsubpd (%rax), %xmm1, %xmm2 + +vsubpd %ymm0, %ymm1, %ymm2 +vsubpd (%rax), %ymm1, %ymm2 + +vsubps %xmm0, %xmm1, %xmm2 +vsubps (%rax), %xmm1, %xmm2 + +vsubps %ymm0, %ymm1, %ymm2 +vsubps (%rax), %ymm1, %ymm2 + +vsubsd %xmm0, %xmm1, %xmm2 +vsubsd (%rax), %xmm1, %xmm2 + +vsubss %xmm0, %xmm1, %xmm2 +vsubss (%rax), %xmm1, %xmm2 + +vtestpd %xmm0, %xmm1 +vtestpd (%rax), %xmm1 + +vtestpd %ymm0, %ymm1 +vtestpd (%rax), %ymm1 + +vtestps %xmm0, %xmm1 +vtestps (%rax), %xmm1 + +vtestps %ymm0, %ymm1 +vtestps (%rax), %ymm1 + +vucomisd %xmm0, %xmm1 +vucomisd (%rax), %xmm1 + +vucomiss %xmm0, %xmm1 +vucomiss (%rax), %xmm1 + +vunpckhpd %xmm0, %xmm1, %xmm2 +vunpckhpd (%rax), %xmm1, %xmm2 + +vunpckhpd %ymm0, %ymm1, %ymm2 +vunpckhpd (%rax), %ymm1, %ymm2 + +vunpckhps %xmm0, %xmm1, %xmm2 +vunpckhps (%rax), %xmm1, %xmm2 + +vunpckhps %ymm0, %ymm1, %ymm2 +vunpckhps (%rax), %ymm1, %ymm2 + +vunpcklpd %xmm0, %xmm1, %xmm2 +vunpcklpd (%rax), %xmm1, %xmm2 + +vunpcklpd %ymm0, %ymm1, %ymm2 +vunpcklpd (%rax), %ymm1, %ymm2 + +vunpcklps %xmm0, %xmm1, %xmm2 +vunpcklps (%rax), %xmm1, %xmm2 + +vunpcklps %ymm0, %ymm1, %ymm2 +vunpcklps (%rax), %ymm1, %ymm2 + +vxorpd %xmm0, %xmm1, %xmm2 +vxorpd (%rax), %xmm1, %xmm2 + +vxorpd %ymm0, %ymm1, %ymm2 +vxorpd (%rax), %ymm1, %ymm2 + +vxorps %xmm0, %xmm1, %xmm2 +vxorps (%rax), %xmm1, %xmm2 + +vxorps %ymm0, %ymm1, %ymm2 +vxorps (%rax), %ymm1, %ymm2 + +vzeroall +vzeroupper + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 3 1.00 vaddpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vaddpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 3 1.00 vaddpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 10 1.00 * vaddpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vaddps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 3 1.00 vaddps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 10 1.00 * vaddps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 3 1.00 vaddsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vaddsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 3 1.00 vaddss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vaddss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 3 1.00 vaddsubpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vaddsubpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 3 1.00 vaddsubpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 10 1.00 * vaddsubpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 3 1.00 vaddsubps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vaddsubps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 3 1.00 vaddsubps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 10 1.00 * vaddsubps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 4 0.50 vaesdec %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 11 0.50 * vaesdec (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 4 0.50 vaesdeclast %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 11 0.50 * vaesdeclast (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 4 0.50 vaesenc %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 11 0.50 * vaesenc (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 4 0.50 vaesenclast %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 11 0.50 * vaesenclast (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 4 0.50 vaesimc %xmm0, %xmm2 +# CHECK-NEXT: 1 11 0.50 * vaesimc (%rax), %xmm2 +# CHECK-NEXT: 1 4 0.50 vaeskeygenassist $22, %xmm0, %xmm2 +# CHECK-NEXT: 1 11 0.50 * vaeskeygenassist $22, (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 vandnpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vandnpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vandnpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vandnpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vandnps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vandnps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vandnps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vandnps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vandpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vandpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vandpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vandpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vandps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vandps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vandps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vandps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.50 vblendpd $11, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vblendpd $11, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.50 vblendpd $11, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.50 * vblendpd $11, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.50 vblendps $11, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vblendps $11, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.50 vblendps $11, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.50 * vblendps $11, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.50 vblendvpd %xmm3, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vblendvpd %xmm3, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.50 vblendvpd %ymm3, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.50 * vblendvpd %ymm3, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.50 vblendvps %xmm3, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vblendvps %xmm3, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.50 vblendvps %ymm3, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.50 * vblendvps %ymm3, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 2 8 0.50 * vbroadcastf128 (%rax), %ymm2 +# CHECK-NEXT: 1 8 0.50 * vbroadcastsd (%rax), %ymm2 +# CHECK-NEXT: 1 8 0.50 * vbroadcastss (%rax), %xmm2 +# CHECK-NEXT: 1 8 0.50 * vbroadcastss (%rax), %ymm2 +# CHECK-NEXT: 1 3 1.00 vcmpeqpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vcmpeqpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 3 1.00 vcmpeqpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 10 1.00 * vcmpeqpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 3 1.00 vcmpeqps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vcmpeqps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 3 1.00 vcmpeqps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 10 1.00 * vcmpeqps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 3 1.00 vcmpeqsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vcmpeqsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 3 1.00 vcmpeqss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vcmpeqss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 3 1.00 vcomisd %xmm0, %xmm1 +# CHECK-NEXT: 1 10 1.00 * vcomisd (%rax), %xmm1 +# CHECK-NEXT: 1 3 1.00 vcomiss %xmm0, %xmm1 +# CHECK-NEXT: 1 10 1.00 * vcomiss (%rax), %xmm1 +# CHECK-NEXT: 1 3 1.00 vcvtdq2pd %xmm0, %xmm2 +# CHECK-NEXT: 1 12 1.00 * vcvtdq2pd (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 vcvtdq2pd %xmm0, %ymm2 +# CHECK-NEXT: 1 12 1.00 * vcvtdq2pd (%rax), %ymm2 +# CHECK-NEXT: 1 5 1.00 vcvtdq2ps %xmm0, %xmm2 +# CHECK-NEXT: 1 12 1.00 * vcvtdq2ps (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 vcvtdq2ps %ymm0, %ymm2 +# CHECK-NEXT: 1 12 1.00 * vcvtdq2ps (%rax), %ymm2 +# CHECK-NEXT: 1 3 1.00 vcvtpd2dq %xmm0, %xmm2 +# CHECK-NEXT: 2 10 1.00 * vcvtpd2dqx (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 vcvtpd2dq %ymm0, %xmm2 +# CHECK-NEXT: 2 10 1.00 * vcvtpd2dqy (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 vcvtpd2ps %xmm0, %xmm2 +# CHECK-NEXT: 2 10 0.50 * vcvtpd2psx (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 vcvtpd2ps %ymm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vcvtpd2psy (%rax), %xmm2 +# CHECK-NEXT: 1 5 1.00 vcvtps2dq %xmm0, %xmm2 +# CHECK-NEXT: 1 12 1.00 * vcvtps2dq (%rax), %xmm2 +# CHECK-NEXT: 1 5 1.00 vcvtps2dq %ymm0, %ymm2 +# CHECK-NEXT: 1 12 1.00 * vcvtps2dq (%rax), %ymm2 +# CHECK-NEXT: 1 3 1.00 vcvtps2pd %xmm0, %xmm2 +# CHECK-NEXT: 2 10 1.00 * vcvtps2pd (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 vcvtps2pd %xmm0, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vcvtps2pd (%rax), %ymm2 +# CHECK-NEXT: 1 4 1.00 vcvtsd2si %xmm0, %ecx +# CHECK-NEXT: 1 4 1.00 vcvtsd2si %xmm0, %rcx +# CHECK-NEXT: 1 11 1.00 * vcvtsd2si (%rax), %ecx +# CHECK-NEXT: 1 11 1.00 * vcvtsd2si (%rax), %rcx +# CHECK-NEXT: 1 3 1.00 vcvtsd2ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 2 10 0.50 * vcvtsd2ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 4 1.00 vcvtsi2sd %ecx, %xmm0, %xmm2 +# CHECK-NEXT: 1 4 1.00 vcvtsi2sd %rcx, %xmm0, %xmm2 +# CHECK-NEXT: 1 12 1.00 * vcvtsi2sdl (%rax), %xmm0, %xmm2 +# CHECK-NEXT: 1 12 1.00 * vcvtsi2sdq (%rax), %xmm0, %xmm2 +# CHECK-NEXT: 1 5 1.00 vcvtsi2ss %ecx, %xmm0, %xmm2 +# CHECK-NEXT: 1 5 1.00 vcvtsi2ss %rcx, %xmm0, %xmm2 +# CHECK-NEXT: 1 12 1.00 * vcvtsi2ssl (%rax), %xmm0, %xmm2 +# CHECK-NEXT: 1 12 1.00 * vcvtsi2ssq (%rax), %xmm0, %xmm2 +# CHECK-NEXT: 1 3 1.00 vcvtss2sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 2 10 2.00 * vcvtss2sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 3 1.00 vcvtss2si %xmm0, %ecx +# CHECK-NEXT: 1 3 1.00 vcvtss2si %xmm0, %rcx +# CHECK-NEXT: 2 10 1.00 * vcvtss2si (%rax), %ecx +# CHECK-NEXT: 2 10 1.00 * vcvtss2si (%rax), %rcx +# CHECK-NEXT: 1 3 1.00 vcvttpd2dq %xmm0, %xmm2 +# CHECK-NEXT: 2 10 1.00 * vcvttpd2dqx (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 vcvttpd2dq %ymm0, %xmm2 +# CHECK-NEXT: 2 10 1.00 * vcvttpd2dqy (%rax), %xmm2 +# CHECK-NEXT: 1 5 1.00 vcvttps2dq %xmm0, %xmm2 +# CHECK-NEXT: 1 12 1.00 * vcvttps2dq (%rax), %xmm2 +# CHECK-NEXT: 1 5 1.00 vcvttps2dq %ymm0, %ymm2 +# CHECK-NEXT: 1 12 1.00 * vcvttps2dq (%rax), %ymm2 +# CHECK-NEXT: 1 4 1.00 vcvttsd2si %xmm0, %ecx +# CHECK-NEXT: 1 4 1.00 vcvttsd2si %xmm0, %rcx +# CHECK-NEXT: 1 11 1.00 * vcvttsd2si (%rax), %ecx +# CHECK-NEXT: 1 11 1.00 * vcvttsd2si (%rax), %rcx +# CHECK-NEXT: 1 3 1.00 vcvttss2si %xmm0, %ecx +# CHECK-NEXT: 1 3 1.00 vcvttss2si %xmm0, %rcx +# CHECK-NEXT: 2 10 1.00 * vcvttss2si (%rax), %ecx +# CHECK-NEXT: 2 10 1.00 * vcvttss2si (%rax), %rcx +# CHECK-NEXT: 1 15 1.00 vdivpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 22 1.00 * vdivpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 13 13.00 vdivpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 20 20.00 * vdivpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 15 1.00 vdivps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 22 1.00 * vdivps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 10 10.00 vdivps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 17 17.00 * vdivps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 15 1.00 vdivsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 22 1.00 * vdivsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 15 1.00 vdivss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 22 1.00 * vdivss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 100 0.25 vdppd $22, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 100 0.25 * vdppd $22, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 100 0.25 vdpps $22, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 100 0.25 * vdpps $22, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 100 0.25 vdpps $22, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 100 0.25 * vdpps $22, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.33 vextractf128 $1, %ymm0, %xmm2 +# CHECK-NEXT: 2 8 0.33 * vextractf128 $1, %ymm0, (%rax) +# CHECK-NEXT: 1 2 2.00 vextractps $1, %xmm0, %ecx +# CHECK-NEXT: 2 5 2.00 * vextractps $1, %xmm0, (%rax) +# CHECK-NEXT: 1 100 0.25 vhaddpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 100 0.25 * vhaddpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 100 0.25 vhaddpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 100 0.25 * vhaddpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 100 0.25 vhaddps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 100 0.25 * vhaddps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 100 0.25 vhaddps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 100 0.25 * vhaddps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 100 0.25 vhsubpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 100 0.25 * vhsubpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 100 0.25 vhsubpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 100 0.25 * vhsubpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 100 0.25 vhsubps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 100 0.25 * vhsubps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 100 0.25 vhsubps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 100 0.25 * vhsubps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 0.33 vinsertf128 $1, %xmm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 9 0.33 * vinsertf128 $1, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.50 vinsertps $1, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vinsertps $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vlddqu (%rax), %xmm2 +# CHECK-NEXT: 1 8 0.33 * vlddqu (%rax), %ymm2 +# CHECK-NEXT: 1 100 0.25 * U vldmxcsr (%rax) +# CHECK-NEXT: 1 100 0.25 * * U vmaskmovdqu %xmm0, %xmm1 +# CHECK-NEXT: 1 8 0.50 * vmaskmovpd (%rax), %xmm0, %xmm2 +# CHECK-NEXT: 2 8 0.50 * vmaskmovpd (%rax), %ymm0, %ymm2 +# CHECK-NEXT: 1 4 0.50 * * vmaskmovpd %xmm0, %xmm1, (%rax) +# CHECK-NEXT: 2 5 1.00 * * vmaskmovpd %ymm0, %ymm1, (%rax) +# CHECK-NEXT: 1 8 0.50 * vmaskmovps (%rax), %xmm0, %xmm2 +# CHECK-NEXT: 2 8 0.50 * vmaskmovps (%rax), %ymm0, %ymm2 +# CHECK-NEXT: 1 4 0.50 * * vmaskmovps %xmm0, %xmm1, (%rax) +# CHECK-NEXT: 2 5 1.00 * * vmaskmovps %ymm0, %ymm1, (%rax) +# CHECK-NEXT: 1 3 1.00 vmaxpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vmaxpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 3 1.00 vmaxpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 10 1.00 * vmaxpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 3 1.00 vmaxps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vmaxps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 3 1.00 vmaxps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 10 1.00 * vmaxps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 3 1.00 vmaxsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vmaxsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 3 1.00 vmaxss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vmaxss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 3 1.00 vminpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vminpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 3 1.00 vminpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 10 1.00 * vminpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 3 1.00 vminps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vminps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 3 1.00 vminps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 10 1.00 * vminps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 3 1.00 vminsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vminsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 3 1.00 vminss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vminss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vmovapd %xmm0, %xmm2 +# CHECK-NEXT: 1 1 0.33 * vmovapd %xmm0, (%rax) +# CHECK-NEXT: 1 8 0.33 * vmovapd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 vmovapd %ymm0, %ymm2 +# CHECK-NEXT: 1 1 0.33 * vmovapd %ymm0, (%rax) +# CHECK-NEXT: 1 8 0.33 * vmovapd (%rax), %ymm2 +# CHECK-NEXT: 1 1 0.25 vmovaps %xmm0, %xmm2 +# CHECK-NEXT: 1 1 0.33 * vmovaps %xmm0, (%rax) +# CHECK-NEXT: 1 8 0.33 * vmovaps (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 vmovaps %ymm0, %ymm2 +# CHECK-NEXT: 1 1 0.33 * vmovaps %ymm0, (%rax) +# CHECK-NEXT: 1 8 0.33 * vmovaps (%rax), %ymm2 +# CHECK-NEXT: 1 3 1.00 vmovd %eax, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vmovd (%rax), %xmm2 +# CHECK-NEXT: 1 2 1.00 vmovd %xmm0, %ecx +# CHECK-NEXT: 1 1 0.33 * vmovd %xmm0, (%rax) +# CHECK-NEXT: 1 1 0.50 vmovddup %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vmovddup (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.50 vmovddup %ymm0, %ymm2 +# CHECK-NEXT: 1 8 0.50 * vmovddup (%rax), %ymm2 +# CHECK-NEXT: 1 1 0.25 vmovdqa %xmm0, %xmm2 +# CHECK-NEXT: 1 1 0.33 * vmovdqa %xmm0, (%rax) +# CHECK-NEXT: 1 8 0.33 * vmovdqa (%rax), %xmm2 +# CHECK-NEXT: 2 2 0.25 vmovdqa %ymm0, %ymm2 +# CHECK-NEXT: 1 1 0.33 * vmovdqa %ymm0, (%rax) +# CHECK-NEXT: 1 8 0.33 * vmovdqa (%rax), %ymm2 +# CHECK-NEXT: 1 1 0.25 vmovdqu %xmm0, %xmm2 +# CHECK-NEXT: 1 1 0.33 * vmovdqu %xmm0, (%rax) +# CHECK-NEXT: 1 8 0.33 * vmovdqu (%rax), %xmm2 +# CHECK-NEXT: 2 2 0.25 vmovdqu %ymm0, %ymm2 +# CHECK-NEXT: 1 1 0.33 * vmovdqu %ymm0, (%rax) +# CHECK-NEXT: 1 8 0.33 * vmovdqu (%rax), %ymm2 +# CHECK-NEXT: 1 1 0.50 vmovhlps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.50 vmovlhps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.33 * vmovhpd %xmm0, (%rax) +# CHECK-NEXT: 1 8 0.50 * vmovhpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.33 * vmovhps %xmm0, (%rax) +# CHECK-NEXT: 1 8 0.50 * vmovhps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.33 * vmovlpd %xmm0, (%rax) +# CHECK-NEXT: 1 8 0.50 * vmovlpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.33 * vmovlps %xmm0, (%rax) +# CHECK-NEXT: 1 8 0.50 * vmovlps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 1.00 vmovmskpd %xmm0, %ecx +# CHECK-NEXT: 1 1 1.00 vmovmskpd %ymm0, %ecx +# CHECK-NEXT: 1 1 1.00 vmovmskps %xmm0, %ecx +# CHECK-NEXT: 1 1 1.00 vmovmskps %ymm0, %ecx +# CHECK-NEXT: 1 1 0.33 * vmovntdq %xmm0, (%rax) +# CHECK-NEXT: 1 1 0.33 * vmovntdq %ymm0, (%rax) +# CHECK-NEXT: 1 8 0.33 * vmovntdqa (%rax), %xmm2 +# CHECK-NEXT: 1 8 0.33 * vmovntdqa (%rax), %ymm2 +# CHECK-NEXT: 1 1 0.33 * vmovntpd %xmm0, (%rax) +# CHECK-NEXT: 1 1 0.33 * vmovntpd %ymm0, (%rax) +# CHECK-NEXT: 1 1 0.33 * vmovntps %xmm0, (%rax) +# CHECK-NEXT: 1 1 0.33 * vmovntps %ymm0, (%rax) +# CHECK-NEXT: 1 1 0.25 vmovq %xmm0, %xmm2 +# CHECK-NEXT: 1 3 1.00 vmovq %rax, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vmovq (%rax), %xmm2 +# CHECK-NEXT: 1 2 1.00 vmovq %xmm0, %rcx +# CHECK-NEXT: 1 1 0.33 * vmovq %xmm0, (%rax) +# CHECK-NEXT: 1 1 0.50 vmovsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.33 * vmovsd %xmm0, (%rax) +# CHECK-NEXT: 1 8 0.33 * vmovsd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.50 vmovshdup %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vmovshdup (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.50 vmovshdup %ymm0, %ymm2 +# CHECK-NEXT: 1 8 0.50 * vmovshdup (%rax), %ymm2 +# CHECK-NEXT: 1 1 0.50 vmovsldup %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vmovsldup (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.50 vmovsldup %ymm0, %ymm2 +# CHECK-NEXT: 1 8 0.50 * vmovsldup (%rax), %ymm2 +# CHECK-NEXT: 1 1 0.50 vmovss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.33 * vmovss %xmm0, (%rax) +# CHECK-NEXT: 1 8 0.33 * vmovss (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 vmovupd %xmm0, %xmm2 +# CHECK-NEXT: 1 1 0.33 * vmovupd %xmm0, (%rax) +# CHECK-NEXT: 1 8 0.33 * vmovupd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 vmovupd %ymm0, %ymm2 +# CHECK-NEXT: 1 1 0.33 * vmovupd %ymm0, (%rax) +# CHECK-NEXT: 1 8 0.33 * vmovupd (%rax), %ymm2 +# CHECK-NEXT: 1 1 0.25 vmovups %xmm0, %xmm2 +# CHECK-NEXT: 1 1 0.33 * vmovups %xmm0, (%rax) +# CHECK-NEXT: 1 8 0.33 * vmovups (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 vmovups %ymm0, %ymm2 +# CHECK-NEXT: 1 1 0.33 * vmovups %ymm0, (%rax) +# CHECK-NEXT: 1 8 0.33 * vmovups (%rax), %ymm2 +# CHECK-NEXT: 1 100 0.25 vmpsadbw $1, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 100 0.25 * vmpsadbw $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 3 0.50 vmulpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 2 10 0.50 * vmulpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 4 0.50 vmulpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 11 0.50 * vmulpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 3 0.50 vmulps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 2 10 0.50 * vmulps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 4 0.50 vmulps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 11 0.50 * vmulps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 3 0.50 vmulsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 2 10 0.50 * vmulsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 3 0.50 vmulss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 2 10 0.50 * vmulss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vorpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vorpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vorpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vorpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vorps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vorps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vorps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vorps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpabsb %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpabsb (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 vpabsd %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpabsd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 vpabsw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpabsw (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 vpackssdw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpackssdw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpacksswb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpacksswb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpackusdw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpackusdw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpackuswb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpackuswb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpaddb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpaddb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpaddd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpaddd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpaddq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpaddq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpaddsb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpaddsb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpaddsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpaddsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpaddusb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpaddusb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpaddusw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpaddusw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpaddw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpaddw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpalignr $1, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpalignr $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpand %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpand (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpandn %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpandn (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpavgb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpavgb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpavgw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpavgw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 1.00 vpblendvb %xmm3, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 1.00 * vpblendvb %xmm3, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.33 vpblendw $11, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 2 8 0.33 * vpblendw $11, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 100 0.25 vpclmulqdq $11, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 100 0.25 * vpclmulqdq $11, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpcmpeqb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpcmpeqb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpcmpeqd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpcmpeqd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpcmpeqq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpcmpeqq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpcmpeqw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpcmpeqw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 100 0.25 vpcmpestri $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 100 0.25 * vpcmpestri $1, (%rax), %xmm2 +# CHECK-NEXT: 1 100 0.25 vpcmpestrm $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 100 0.25 * vpcmpestrm $1, (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 vpcmpgtb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpcmpgtb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpcmpgtd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpcmpgtd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.50 vpcmpgtq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vpcmpgtq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpcmpgtw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpcmpgtw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 100 0.25 vpcmpistri $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 100 0.25 * vpcmpistri $1, (%rax), %xmm2 +# CHECK-NEXT: 1 100 0.25 vpcmpistrm $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 100 0.25 * vpcmpistrm $1, (%rax), %xmm2 +# CHECK-NEXT: 1 100 0.25 vperm2f128 $1, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 100 0.25 * vperm2f128 $1, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.50 vpermilpd $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vpermilpd $1, (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.50 vpermilpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vpermilpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.50 vpermilpd $1, %ymm0, %ymm2 +# CHECK-NEXT: 1 8 0.50 * vpermilpd $1, (%rax), %ymm2 +# CHECK-NEXT: 1 1 0.50 vpermilpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.50 * vpermilpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.50 vpermilps $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vpermilps $1, (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.50 vpermilps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vpermilps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.50 vpermilps $1, %ymm0, %ymm2 +# CHECK-NEXT: 1 8 0.50 * vpermilps $1, (%rax), %ymm2 +# CHECK-NEXT: 1 1 0.50 vpermilps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.50 * vpermilps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 2.00 vpextrb $1, %xmm0, %ecx +# CHECK-NEXT: 2 5 3.00 * vpextrb $1, %xmm0, (%rax) +# CHECK-NEXT: 1 2 2.00 vpextrd $1, %xmm0, %ecx +# CHECK-NEXT: 2 5 3.00 * vpextrd $1, %xmm0, (%rax) +# CHECK-NEXT: 1 2 2.00 vpextrq $1, %xmm0, %rcx +# CHECK-NEXT: 2 5 3.00 * vpextrq $1, %xmm0, (%rax) +# CHECK-NEXT: 1 2 2.00 vpextrw $1, %xmm0, %ecx +# CHECK-NEXT: 2 5 3.00 * vpextrw $1, %xmm0, (%rax) +# CHECK-NEXT: 1 100 0.25 vphaddd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 100 0.25 * vphaddd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 100 0.25 vphaddsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 100 0.25 * vphaddsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 100 0.25 vphaddw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 100 0.25 * vphaddw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 4 1.00 vphminposuw %xmm0, %xmm2 +# CHECK-NEXT: 1 11 1.00 * vphminposuw (%rax), %xmm2 +# CHECK-NEXT: 1 100 0.25 vphsubd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 100 0.25 * vphsubd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 100 0.25 vphsubsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 100 0.25 * vphsubsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 100 0.25 vphsubw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 100 0.25 * vphsubw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpinsrb $1, %eax, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpinsrb $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpinsrd $1, %eax, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpinsrd $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpinsrq $1, %rax, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpinsrq $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpinsrw $1, %eax, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpinsrw $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 4 1.00 vpmaddubsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 11 1.00 * vpmaddubsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 4 1.00 vpmaddwd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 11 1.00 * vpmaddwd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpmaxsb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpmaxsb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpmaxsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpmaxsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpmaxsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpmaxsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpmaxub %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpmaxub (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpmaxud %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpmaxud (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpmaxuw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpmaxuw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpminsb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpminsb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpminsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpminsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpminsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpminsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpminub %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpminub (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpminud %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpminud (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpminuw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpminuw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 1.00 vpmovmskb %xmm0, %ecx +# CHECK-NEXT: 1 1 0.25 vpmovsxbd %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpmovsxbd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 vpmovsxbq %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpmovsxbq (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 vpmovsxbw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpmovsxbw (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 vpmovsxdq %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpmovsxdq (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 vpmovsxwd %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpmovsxwd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 vpmovsxwq %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpmovsxwq (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 vpmovzxbd %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpmovzxbd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 vpmovzxbq %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpmovzxbq (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 vpmovzxbw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpmovzxbw (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 vpmovzxdq %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpmovzxdq (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 vpmovzxwd %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpmovzxwd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 vpmovzxwq %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpmovzxwq (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 vpmuldq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 11 1.00 * vpmuldq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 4 1.00 vpmulhrsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 11 1.00 * vpmulhrsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 4 1.00 vpmulhuw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 11 1.00 * vpmulhuw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 4 1.00 vpmulhw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 11 1.00 * vpmulhw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 4 1.00 vpmulld %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 2 11 1.00 * vpmulld (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 4 1.00 vpmullw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 11 1.00 * vpmullw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 4 1.00 vpmuludq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 11 1.00 * vpmuludq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpor %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpor (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 3 1.00 vpsadbw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vpsadbw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpshufb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpshufb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpshufd $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpshufd $1, (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 vpshufhw $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpshufhw $1, (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 vpshuflw $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpshuflw $1, (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 vpsignb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpsignb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpsignd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpsignd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpsignw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpsignw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpslld $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 1 1.00 vpslld %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 1.00 * vpslld (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 1.00 vpslldq $1, %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpsllq $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 1 1.00 vpsllq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 1.00 * vpsllq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpsllw $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 1 1.00 vpsllw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 1.00 * vpsllw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpsrad $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 1 1.00 vpsrad %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 1.00 * vpsrad (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpsraw $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 1 1.00 vpsraw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 1.00 * vpsraw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpsrld $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 1 1.00 vpsrld %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 1.00 * vpsrld (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 1.00 vpsrldq $1, %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpsrlq $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 1 1.00 vpsrlq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 1.00 * vpsrlq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpsrlw $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 1 1.00 vpsrlw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 1.00 * vpsrlw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpsubb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpsubb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpsubd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpsubd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpsubq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpsubq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpsubsb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpsubsb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpsubsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpsubsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpsubusb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpsubusb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpsubusw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpsubusw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpsubw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpsubw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 1.00 vptest %xmm0, %xmm1 +# CHECK-NEXT: 2 8 1.00 * vptest (%rax), %xmm1 +# CHECK-NEXT: 1 1 1.00 vptest %ymm0, %ymm1 +# CHECK-NEXT: 2 8 1.00 * vptest (%rax), %ymm1 +# CHECK-NEXT: 1 1 0.25 vpunpckhbw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpunpckhbw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpunpckhdq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpunpckhdq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpunpckhqdq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpunpckhqdq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpunpckhwd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpunpckhwd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpunpcklbw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpunpcklbw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpunpckldq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpunpckldq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpunpcklqdq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpunpcklqdq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpunpcklwd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpunpcklwd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vpxor %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vpxor (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vrcpps %xmm0, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vrcpps (%rax), %xmm2 +# CHECK-NEXT: 1 5 0.50 vrcpps %ymm0, %ymm2 +# CHECK-NEXT: 3 12 0.50 * vrcpps (%rax), %ymm2 +# CHECK-NEXT: 1 5 0.50 vrcpss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vrcpss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 4 1.00 vroundpd $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 11 1.00 * vroundpd $1, (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 vroundpd $1, %ymm0, %ymm2 +# CHECK-NEXT: 1 11 1.00 * vroundpd $1, (%rax), %ymm2 +# CHECK-NEXT: 1 4 1.00 vroundps $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 11 1.00 * vroundps $1, (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 vroundps $1, %ymm0, %ymm2 +# CHECK-NEXT: 1 11 1.00 * vroundps $1, (%rax), %ymm2 +# CHECK-NEXT: 1 4 1.00 vroundsd $1, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 11 1.00 * vroundsd $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 4 1.00 vroundss $1, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 11 1.00 * vroundss $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vrsqrtps %xmm0, %xmm2 +# CHECK-NEXT: 2 12 0.50 * vrsqrtps (%rax), %xmm2 +# CHECK-NEXT: 2 5 1.00 vrsqrtps %ymm0, %ymm2 +# CHECK-NEXT: 2 12 0.50 * vrsqrtps (%rax), %ymm2 +# CHECK-NEXT: 1 5 0.50 vrsqrtss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 2 12 1.00 * vrsqrtss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.50 vshufpd $1, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vshufpd $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.50 vshufpd $1, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.50 * vshufpd $1, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.50 vshufps $1, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vshufps $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.50 vshufps $1, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.50 * vshufps $1, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 20 20.00 vsqrtpd %xmm0, %xmm2 +# CHECK-NEXT: 1 27 20.00 * vsqrtpd (%rax), %xmm2 +# CHECK-NEXT: 1 20 20.00 vsqrtpd %ymm0, %ymm2 +# CHECK-NEXT: 2 27 20.00 * vsqrtpd (%rax), %ymm2 +# CHECK-NEXT: 1 20 20.00 vsqrtps %xmm0, %xmm2 +# CHECK-NEXT: 1 27 20.00 * vsqrtps (%rax), %xmm2 +# CHECK-NEXT: 1 28 28.00 vsqrtps %ymm0, %ymm2 +# CHECK-NEXT: 2 35 28.00 * vsqrtps (%rax), %ymm2 +# CHECK-NEXT: 1 20 20.00 vsqrtsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 27 20.00 * vsqrtsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 20 20.00 vsqrtss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 27 20.00 * vsqrtss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 100 0.25 * U vstmxcsr (%rax) +# CHECK-NEXT: 1 3 1.00 vsubpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vsubpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 3 1.00 vsubpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 10 1.00 * vsubpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 3 1.00 vsubps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vsubps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 3 1.00 vsubps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 10 1.00 * vsubps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 3 1.00 vsubsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vsubsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 3 1.00 vsubss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 10 1.00 * vsubss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vtestpd %xmm0, %xmm1 +# CHECK-NEXT: 1 8 0.33 * vtestpd (%rax), %xmm1 +# CHECK-NEXT: 1 1 0.25 vtestpd %ymm0, %ymm1 +# CHECK-NEXT: 1 8 0.33 * vtestpd (%rax), %ymm1 +# CHECK-NEXT: 1 1 0.25 vtestps %xmm0, %xmm1 +# CHECK-NEXT: 1 8 0.33 * vtestps (%rax), %xmm1 +# CHECK-NEXT: 1 1 0.25 vtestps %ymm0, %ymm1 +# CHECK-NEXT: 1 8 0.33 * vtestps (%rax), %ymm1 +# CHECK-NEXT: 1 3 1.00 vucomisd %xmm0, %xmm1 +# CHECK-NEXT: 1 10 1.00 * vucomisd (%rax), %xmm1 +# CHECK-NEXT: 1 3 1.00 vucomiss %xmm0, %xmm1 +# CHECK-NEXT: 1 10 1.00 * vucomiss (%rax), %xmm1 +# CHECK-NEXT: 1 1 0.50 vunpckhpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vunpckhpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.50 vunpckhpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.50 * vunpckhpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.50 vunpckhps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vunpckhps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.50 vunpckhps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.50 * vunpckhps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.50 vunpcklpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vunpcklpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.50 vunpcklpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.50 * vunpcklpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.50 vunpcklps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vunpcklps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.50 vunpcklps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.50 * vunpcklps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vxorpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vxorpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vxorpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vxorpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vxorps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.33 * vxorps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.25 vxorps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vxorps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 100 0.25 * * U vzeroall +# CHECK-NEXT: 1 1 0.25 * * U vzeroupper + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: 112.00 112.00 112.00 0.25 0.25 0.25 0.25 - 191.92 141.92 168.75 455.42 - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vaddpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vaddpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vaddpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vaddpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vaddps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vaddps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vaddps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vaddps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vaddsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vaddsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vaddss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vaddss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vaddsubpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vaddsubpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vaddsubpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vaddsubpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vaddsubps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vaddsubps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vaddsubps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vaddsubps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - vaesdec %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vaesdec (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - vaesdeclast %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vaesdeclast (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - vaesenc %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vaesenc (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - vaesenclast %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vaesenclast (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - vaesimc %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vaesimc (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - vaeskeygenassist $22, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vaeskeygenassist $22, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vandnpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vandnpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vandnpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vandnpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vandnps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vandnps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vandnps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vandnps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vandpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vandpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vandpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vandpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vandps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vandps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vandps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vandps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - vblendpd $11, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vblendpd $11, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - vblendpd $11, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vblendpd $11, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - vblendps $11, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vblendps $11, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - vblendps $11, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vblendps $11, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - vblendvpd %xmm3, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vblendvpd %xmm3, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - vblendvpd %ymm3, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vblendvpd %ymm3, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - vblendvps %xmm3, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vblendvps %xmm3, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - vblendvps %ymm3, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vblendvps %ymm3, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 - 0.50 - vbroadcastf128 (%rax), %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vbroadcastsd (%rax), %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vbroadcastss (%rax), %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vbroadcastss (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vcmpeqpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vcmpeqpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vcmpeqpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vcmpeqpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vcmpeqps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vcmpeqps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vcmpeqps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vcmpeqps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vcmpeqsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vcmpeqsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vcmpeqss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vcmpeqss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vcomisd %xmm0, %xmm1 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vcomisd (%rax), %xmm1 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vcomiss %xmm0, %xmm1 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vcomiss (%rax), %xmm1 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 1.00 - vcvtdq2pd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - vcvtdq2pd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 1.00 - vcvtdq2pd %xmm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - vcvtdq2pd (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - vcvtdq2ps %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - vcvtdq2ps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 1.00 - vcvtdq2ps %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - vcvtdq2ps (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 1.00 - vcvtpd2dq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 1.00 - vcvtpd2dqx (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 1.00 - vcvtpd2dq %ymm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 1.00 - vcvtpd2dqy (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - vcvtpd2ps %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vcvtpd2psx (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - vcvtpd2ps %ymm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - vcvtpd2psy (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - vcvtps2dq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - vcvtps2dq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - vcvtps2dq %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - vcvtps2dq (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - vcvtps2pd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - vcvtps2pd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - vcvtps2pd %xmm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - vcvtps2pd (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - vcvtsd2si %xmm0, %ecx +# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - vcvtsd2si %xmm0, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 1.00 - vcvtsd2si (%rax), %ecx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 1.00 - vcvtsd2si (%rax), %rcx +# CHECK-NEXT: - - - - - - - - - - - 1.00 - vcvtsd2ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vcvtsd2ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.33 0.33 - 1.33 - vcvtsi2sd %ecx, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.33 0.33 - 1.33 - vcvtsi2sd %rcx, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - vcvtsi2sdl (%rax), %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - vcvtsi2sdq (%rax), %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - vcvtsi2ss %ecx, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - vcvtsi2ss %rcx, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - vcvtsi2ssl (%rax), %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - vcvtsi2ssq (%rax), %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - vcvtss2sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 2.00 - vcvtss2sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 1.00 - vcvtss2si %xmm0, %ecx +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 1.00 - vcvtss2si %xmm0, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 1.00 - vcvtss2si (%rax), %ecx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 1.00 - vcvtss2si (%rax), %rcx +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 1.00 - vcvttpd2dq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 1.00 - vcvttpd2dqx (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 1.00 - vcvttpd2dq %ymm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 1.00 - vcvttpd2dqy (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - vcvttps2dq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - vcvttps2dq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - vcvttps2dq %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - vcvttps2dq (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - vcvttsd2si %xmm0, %ecx +# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - vcvttsd2si %xmm0, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 1.00 - vcvttsd2si (%rax), %ecx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 1.00 - vcvttsd2si (%rax), %rcx +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 1.00 - vcvttss2si %xmm0, %ecx +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 1.00 - vcvttss2si %xmm0, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 1.00 - vcvttss2si (%rax), %ecx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 1.00 - vcvttss2si (%rax), %rcx +# CHECK-NEXT: - - - - - - - - - - - 1.00 - vdivpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - vdivpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 13.00 - vdivpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 20.00 - vdivpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - vdivps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - vdivps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 10.00 - vdivps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 17.00 - vdivps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - vdivsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - vdivsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - vdivss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - vdivss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vdppd $22, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vdppd $22, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vdpps $22, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vdpps $22, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vdpps $22, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vdpps $22, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.33 0.33 - 0.33 - vextractf128 $1, %ymm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.33 0.33 - 0.33 - vextractf128 $1, %ymm0, (%rax) +# CHECK-NEXT: - - - - - - - - - 0.50 2.50 - - vextractps $1, %xmm0, %ecx +# CHECK-NEXT: 1.67 1.67 1.67 - - - - - - 0.50 2.50 - - vextractps $1, %xmm0, (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - vhaddpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vhaddpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vhaddpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vhaddpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vhaddps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vhaddps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vhaddps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vhaddps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vhsubpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vhsubpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vhsubpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vhsubpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vhsubps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vhsubps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vhsubps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vhsubps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.33 0.33 - 0.33 - vinsertf128 $1, %xmm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.33 0.33 - 0.33 - vinsertf128 $1, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vinsertps $1, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vinsertps $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vlddqu (%rax), %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vlddqu (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vldmxcsr (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - vmaskmovdqu %xmm0, %xmm1 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vmaskmovpd (%rax), %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vmaskmovpd (%rax), %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vmaskmovpd %xmm0, %xmm1, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 1.00 - - - vmaskmovpd %ymm0, %ymm1, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vmaskmovps (%rax), %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vmaskmovps (%rax), %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vmaskmovps %xmm0, %xmm1, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 1.00 - - - vmaskmovps %ymm0, %ymm1, (%rax) +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vmaxpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vmaxpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vmaxpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vmaxpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vmaxps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vmaxps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vmaxps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vmaxps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vmaxsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vmaxsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vmaxss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vmaxss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vminpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vminpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vminpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vminpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vminps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vminps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vminps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vminps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vminsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vminsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vminss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vminss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vmovapd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovapd %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovapd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vmovapd %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovapd %ymm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovapd (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vmovaps %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovaps %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovaps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vmovaps %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovaps %ymm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovaps (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - vmovd %eax, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - vmovd %xmm0, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovd %xmm0, (%rax) +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vmovddup %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vmovddup (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vmovddup %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vmovddup (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vmovdqa %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovdqa %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovdqa (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vmovdqa %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovdqa %ymm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovdqa (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vmovdqu %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovdqu %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovdqu (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vmovdqu %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovdqu %ymm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovdqu (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vmovhlps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vmovlhps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovhpd %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vmovhpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovhps %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vmovhps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovlpd %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vmovlpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovlps %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vmovlps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - vmovmskpd %xmm0, %ecx +# CHECK-NEXT: - - - - - - - - - - 1.00 - - vmovmskpd %ymm0, %ecx +# CHECK-NEXT: - - - - - - - - - - 1.00 - - vmovmskps %xmm0, %ecx +# CHECK-NEXT: - - - - - - - - - - 1.00 - - vmovmskps %ymm0, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovntdq %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovntdq %ymm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovntdqa (%rax), %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovntdqa (%rax), %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovntpd %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovntpd %ymm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovntps %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovntps %ymm0, (%rax) +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vmovq %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - vmovq %rax, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - vmovq %xmm0, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovq %xmm0, (%rax) +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vmovsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovsd %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovsd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vmovshdup %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vmovshdup (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vmovshdup %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vmovshdup (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vmovsldup %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vmovsldup (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vmovsldup %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vmovsldup (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vmovss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovss %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovss (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vmovupd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovupd %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovupd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vmovupd %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovupd %ymm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovupd (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vmovups %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovups %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovups (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vmovups %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovups %ymm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovups (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vmpsadbw $1, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vmpsadbw $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - vmulpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vmulpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - vmulpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vmulpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - vmulps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vmulps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - vmulps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vmulps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - vmulsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vmulsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - vmulss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vmulss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vorpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vorpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vorpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vorpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vorps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vorps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vorps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vorps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpabsb %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpabsb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpabsd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpabsd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpabsw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpabsw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpackssdw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpackssdw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpacksswb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpacksswb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpackusdw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpackusdw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpackuswb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpackuswb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpaddb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpaddb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpaddd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpaddd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpaddq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpaddq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpaddsb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpaddsb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpaddsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpaddsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpaddusb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpaddusb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpaddusw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpaddusw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpaddw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpaddw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpalignr $1, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpalignr $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpand %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpand (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpandn %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpandn (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpavgb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpavgb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpavgw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpavgw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vpblendvb %xmm3, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vpblendvb %xmm3, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.33 0.33 - 0.33 - vpblendw $11, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.33 0.33 - 0.33 - vpblendw $11, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vpclmulqdq $11, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vpclmulqdq $11, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpcmpeqb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpcmpeqb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpcmpeqd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpcmpeqd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpcmpeqq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpcmpeqq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpcmpeqw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpcmpeqw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vpcmpestri $1, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vpcmpestri $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vpcmpestrm $1, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vpcmpestrm $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpcmpgtb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpcmpgtb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpcmpgtd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpcmpgtd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vpcmpgtq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vpcmpgtq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpcmpgtw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpcmpgtw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vpcmpistri $1, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vpcmpistri $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vpcmpistrm $1, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vpcmpistrm $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vperm2f128 $1, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vperm2f128 $1, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpermilpd $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpermilpd $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpermilpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpermilpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpermilpd $1, %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpermilpd $1, (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpermilpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpermilpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpermilps $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpermilps $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpermilps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpermilps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpermilps $1, %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpermilps $1, (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpermilps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpermilps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 2.50 - - vpextrb $1, %xmm0, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 1.00 4.00 - - vpextrb $1, %xmm0, (%rax) +# CHECK-NEXT: - - - - - - - - - 0.50 2.50 - - vpextrd $1, %xmm0, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 1.00 4.00 - - vpextrd $1, %xmm0, (%rax) +# CHECK-NEXT: - - - - - - - - - 0.50 2.50 - - vpextrq $1, %xmm0, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 1.00 4.00 - - vpextrq $1, %xmm0, (%rax) +# CHECK-NEXT: - - - - - - - - - 0.50 2.50 - - vpextrw $1, %xmm0, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 1.00 4.00 - - vpextrw $1, %xmm0, (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - vphaddd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vphaddd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vphaddsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vphaddsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vphaddw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vphaddw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vphminposuw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vphminposuw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vphsubd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vphsubd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vphsubsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vphsubsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vphsubw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vphsubw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpinsrb $1, %eax, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpinsrb $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpinsrd $1, %eax, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpinsrd $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpinsrq $1, %rax, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpinsrq $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpinsrw $1, %eax, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpinsrw $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vpmaddubsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vpmaddubsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vpmaddwd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vpmaddwd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpmaxsb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpmaxsb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpmaxsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpmaxsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpmaxsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpmaxsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpmaxub %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpmaxub (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpmaxud %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpmaxud (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpmaxuw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpmaxuw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpminsb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpminsb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpminsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpminsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpminsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpminsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpminub %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpminub (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpminud %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpminud (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpminuw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpminuw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - vpmovmskb %xmm0, %ecx +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpmovsxbd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpmovsxbd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpmovsxbq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpmovsxbq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpmovsxbw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpmovsxbw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpmovsxdq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpmovsxdq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpmovsxwd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpmovsxwd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpmovsxwq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpmovsxwq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpmovzxbd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpmovzxbd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpmovzxbq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpmovzxbq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpmovzxbw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpmovzxbw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpmovzxdq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpmovzxdq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpmovzxwd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpmovzxwd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpmovzxwq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpmovzxwq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vpmuldq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vpmuldq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vpmulhrsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vpmulhrsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vpmulhuw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vpmulhuw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vpmulhw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vpmulhw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vpmulld %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vpmulld (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vpmullw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vpmullw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vpmuludq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vpmuludq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpor %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpor (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vpsadbw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vpsadbw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpshufb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpshufb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpshufd $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpshufd $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpshufhw $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpshufhw $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpshuflw $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpshuflw $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsignb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpsignb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsignd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpsignd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsignw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpsignw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpslld $1, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - vpslld %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 - - vpslld (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - vpslldq $1, %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsllq $1, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - vpsllq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 - - vpsllq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsllw $1, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - vpsllw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 - - vpsllw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsrad $1, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - vpsrad %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 - - vpsrad (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsraw $1, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - vpsraw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 - - vpsraw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsrld $1, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - vpsrld %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 - - vpsrld (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - vpsrldq $1, %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsrlq $1, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - vpsrlq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 - - vpsrlq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsrlw $1, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - vpsrlw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 - - vpsrlw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsubb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpsubb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsubd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpsubd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsubq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpsubq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsubsb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpsubsb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsubsw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpsubsw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsubusb %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpsubusb (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsubusw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpsubusw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsubw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpsubw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - 1.00 1.00 - - vptest %xmm0, %xmm1 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 1.00 1.00 - - vptest (%rax), %xmm1 +# CHECK-NEXT: - - - - - - - - - 1.00 1.00 - - vptest %ymm0, %ymm1 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 1.00 1.00 - - vptest (%rax), %ymm1 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpunpckhbw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpunpckhbw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpunpckhdq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpunpckhdq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpunpckhqdq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpunpckhqdq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpunpckhwd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpunpckhwd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpunpcklbw %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpunpcklbw (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpunpckldq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpunpckldq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpunpcklqdq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpunpcklqdq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpunpcklwd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpunpcklwd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpxor %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpxor (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - vrcpps %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vrcpps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - vrcpps %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vrcpps (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - vrcpss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vrcpss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - vroundpd $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - vroundpd $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - vroundpd $1, %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - vroundpd $1, (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - vroundps $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - vroundps $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - vroundps $1, %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - vroundps $1, (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - vroundsd $1, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - vroundsd $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - vroundss $1, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - vroundss $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - vrsqrtps %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vrsqrtps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - - vrsqrtps %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - vrsqrtps (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - 0.50 - - vrsqrtss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - 1.00 - - vrsqrtss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vshufpd $1, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vshufpd $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vshufpd $1, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vshufpd $1, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vshufps $1, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vshufps $1, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vshufps $1, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vshufps $1, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - 20.00 - vsqrtpd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 20.00 - vsqrtpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 20.00 - vsqrtpd %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 20.00 - vsqrtpd (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - - - 20.00 - vsqrtps %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 20.00 - vsqrtps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 28.00 - vsqrtps %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 28.00 - vsqrtps (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - - - 20.00 - vsqrtsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 20.00 - vsqrtsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 20.00 - vsqrtss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 20.00 - vsqrtss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vstmxcsr (%rax) +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vsubpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vsubpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vsubpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vsubpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vsubps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vsubps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vsubps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vsubps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vsubsd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vsubsd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vsubss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vsubss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vtestpd %xmm0, %xmm1 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vtestpd (%rax), %xmm1 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vtestpd %ymm0, %ymm1 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vtestpd (%rax), %ymm1 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vtestps %xmm0, %xmm1 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vtestps (%rax), %xmm1 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vtestps %ymm0, %ymm1 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vtestps (%rax), %ymm1 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vucomisd %xmm0, %xmm1 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vucomisd (%rax), %xmm1 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vucomiss %xmm0, %xmm1 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vucomiss (%rax), %xmm1 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vunpckhpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vunpckhpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vunpckhpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vunpckhpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vunpckhps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vunpckhps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vunpckhps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vunpckhps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vunpcklpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vunpcklpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vunpcklpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vunpcklpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vunpcklps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vunpcklps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vunpcklps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vunpcklps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vxorpd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vxorpd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vxorpd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vxorpd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vxorps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vxorps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vxorps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vxorps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vzeroall +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - vzeroupper Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-avx2.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-avx2.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-avx2.s @@ -0,0 +1,1086 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +vbroadcasti128 (%rax), %ymm0 + +vbroadcastsd %xmm0, %ymm0 +vbroadcastss %xmm0, %ymm0 + +vextracti128 $1, %ymm0, %xmm2 +vextracti128 $1, %ymm0, (%rax) + +vgatherdpd %xmm0, (%rax,%xmm1,2), %xmm2 +vgatherdpd %ymm0, (%rax,%xmm1,2), %ymm2 + +vgatherdps %xmm0, (%rax,%xmm1,2), %xmm2 +vgatherdps %ymm0, (%rax,%ymm1,2), %ymm2 + +vgatherqpd %xmm0, (%rax,%xmm1,2), %xmm2 +vgatherqpd %ymm0, (%rax,%ymm1,2), %ymm2 + +vgatherqps %xmm0, (%rax,%xmm1,2), %xmm2 +vgatherqps %xmm0, (%rax,%ymm1,2), %xmm2 + +vinserti128 $1, %xmm0, %ymm1, %ymm2 +vinserti128 $1, (%rax), %ymm1, %ymm2 + +vmovntdqa (%rax), %ymm0 + +vmpsadbw $1, %ymm0, %ymm1, %ymm2 +vmpsadbw $1, (%rax), %ymm1, %ymm2 + +vpabsb %ymm0, %ymm2 +vpabsb (%rax), %ymm2 + +vpabsd %ymm0, %ymm2 +vpabsd (%rax), %ymm2 + +vpabsw %ymm0, %ymm2 +vpabsw (%rax), %ymm2 + +vpackssdw %ymm0, %ymm1, %ymm2 +vpackssdw (%rax), %ymm1, %ymm2 + +vpacksswb %ymm0, %ymm1, %ymm2 +vpacksswb (%rax), %ymm1, %ymm2 + +vpackusdw %ymm0, %ymm1, %ymm2 +vpackusdw (%rax), %ymm1, %ymm2 + +vpackuswb %ymm0, %ymm1, %ymm2 +vpackuswb (%rax), %ymm1, %ymm2 + +vpaddb %ymm0, %ymm1, %ymm2 +vpaddb (%rax), %ymm1, %ymm2 + +vpaddd %ymm0, %ymm1, %ymm2 +vpaddd (%rax), %ymm1, %ymm2 + +vpaddq %ymm0, %ymm1, %ymm2 +vpaddq (%rax), %ymm1, %ymm2 + +vpaddsb %ymm0, %ymm1, %ymm2 +vpaddsb (%rax), %ymm1, %ymm2 + +vpaddsw %ymm0, %ymm1, %ymm2 +vpaddsw (%rax), %ymm1, %ymm2 + +vpaddusb %ymm0, %ymm1, %ymm2 +vpaddusb (%rax), %ymm1, %ymm2 + +vpaddusw %ymm0, %ymm1, %ymm2 +vpaddusw (%rax), %ymm1, %ymm2 + +vpaddw %ymm0, %ymm1, %ymm2 +vpaddw (%rax), %ymm1, %ymm2 + +vpalignr $1, %ymm0, %ymm1, %ymm2 +vpalignr $1, (%rax), %ymm1, %ymm2 + +vpand %ymm0, %ymm1, %ymm2 +vpand (%rax), %ymm1, %ymm2 + +vpandn %ymm0, %ymm1, %ymm2 +vpandn (%rax), %ymm1, %ymm2 + +vpavgb %ymm0, %ymm1, %ymm2 +vpavgb (%rax), %ymm1, %ymm2 + +vpavgw %ymm0, %ymm1, %ymm2 +vpavgw (%rax), %ymm1, %ymm2 + +vpblendd $11, %xmm0, %xmm1, %xmm2 +vpblendd $11, (%rax), %xmm1, %xmm2 + +vpblendd $11, %ymm0, %ymm1, %ymm2 +vpblendd $11, (%rax), %ymm1, %ymm2 + +vpblendvb %ymm3, %ymm0, %ymm1, %ymm2 +vpblendvb %ymm3, (%rax), %ymm1, %ymm2 + +vpblendw $11, %ymm0, %ymm1, %ymm2 +vpblendw $11, (%rax), %ymm1, %ymm2 + +vpbroadcastb %xmm0, %xmm0 +vpbroadcastb (%rax), %xmm0 + +vpbroadcastb %xmm0, %ymm0 +vpbroadcastb (%rax), %ymm0 + +vpbroadcastd %xmm0, %xmm0 +vpbroadcastd (%rax), %xmm0 + +vpbroadcastd %xmm0, %ymm0 +vpbroadcastd (%rax), %ymm0 + +vpbroadcastq %xmm0, %xmm0 +vpbroadcastq (%rax), %xmm0 + +vpbroadcastq %xmm0, %ymm0 +vpbroadcastq (%rax), %ymm0 + +vpbroadcastw %xmm0, %xmm0 +vpbroadcastw (%rax), %xmm0 + +vpbroadcastw %xmm0, %ymm0 +vpbroadcastw (%rax), %ymm0 + +vpcmpeqb %ymm0, %ymm1, %ymm2 +vpcmpeqb (%rax), %ymm1, %ymm2 + +vpcmpeqd %ymm0, %ymm1, %ymm2 +vpcmpeqd (%rax), %ymm1, %ymm2 + +vpcmpeqq %ymm0, %ymm1, %ymm2 +vpcmpeqq (%rax), %ymm1, %ymm2 + +vpcmpeqw %ymm0, %ymm1, %ymm2 +vpcmpeqw (%rax), %ymm1, %ymm2 + +vpcmpgtb %ymm0, %ymm1, %ymm2 +vpcmpgtb (%rax), %ymm1, %ymm2 + +vpcmpgtd %ymm0, %ymm1, %ymm2 +vpcmpgtd (%rax), %ymm1, %ymm2 + +vpcmpgtq %ymm0, %ymm1, %ymm2 +vpcmpgtq (%rax), %ymm1, %ymm2 + +vpcmpgtw %ymm0, %ymm1, %ymm2 +vpcmpgtw (%rax), %ymm1, %ymm2 + +vperm2i128 $1, %ymm0, %ymm1, %ymm2 +vperm2i128 $1, (%rax), %ymm1, %ymm2 + +vpermd %ymm0, %ymm1, %ymm2 +vpermd (%rax), %ymm1, %ymm2 + +vpermpd $1, %ymm0, %ymm2 +vpermpd $1, (%rax), %ymm2 + +vpermps %ymm0, %ymm1, %ymm2 +vpermps (%rax), %ymm1, %ymm2 + +vpermq $1, %ymm0, %ymm2 +vpermq $1, (%rax), %ymm2 + +vpgatherdd %xmm0, (%rax,%xmm1,2), %xmm2 +vpgatherdd %ymm0, (%rax,%ymm1,2), %ymm2 + +vpgatherdq %xmm0, (%rax,%xmm1,2), %xmm2 +vpgatherdq %ymm0, (%rax,%xmm1,2), %ymm2 + +vpgatherqd %xmm0, (%rax,%xmm1,2), %xmm2 +vpgatherqd %xmm0, (%rax,%ymm1,2), %xmm2 + +vpgatherqq %xmm0, (%rax,%xmm1,2), %xmm2 +vpgatherqq %ymm0, (%rax,%ymm1,2), %ymm2 + +vphaddd %ymm0, %ymm1, %ymm2 +vphaddd (%rax), %ymm1, %ymm2 + +vphaddsw %ymm0, %ymm1, %ymm2 +vphaddsw (%rax), %ymm1, %ymm2 + +vphaddw %ymm0, %ymm1, %ymm2 +vphaddw (%rax), %ymm1, %ymm2 + +vphsubd %ymm0, %ymm1, %ymm2 +vphsubd (%rax), %ymm1, %ymm2 + +vphsubsw %ymm0, %ymm1, %ymm2 +vphsubsw (%rax), %ymm1, %ymm2 + +vphsubw %ymm0, %ymm1, %ymm2 +vphsubw (%rax), %ymm1, %ymm2 + +vpmaddubsw %ymm0, %ymm1, %ymm2 +vpmaddubsw (%rax), %ymm1, %ymm2 + +vpmaddwd %ymm0, %ymm1, %ymm2 +vpmaddwd (%rax), %ymm1, %ymm2 + +vpmaskmovd (%rax), %xmm0, %xmm2 +vpmaskmovd (%rax), %ymm0, %ymm2 + +vpmaskmovd %xmm0, %xmm1, (%rax) +vpmaskmovd %ymm0, %ymm1, (%rax) + +vpmaskmovq (%rax), %xmm0, %xmm2 +vpmaskmovq (%rax), %ymm0, %ymm2 + +vpmaskmovq %xmm0, %xmm1, (%rax) +vpmaskmovq %ymm0, %ymm1, (%rax) + +vpmaxsb %ymm0, %ymm1, %ymm2 +vpmaxsb (%rax), %ymm1, %ymm2 + +vpmaxsd %ymm0, %ymm1, %ymm2 +vpmaxsd (%rax), %ymm1, %ymm2 + +vpmaxsw %ymm0, %ymm1, %ymm2 +vpmaxsw (%rax), %ymm1, %ymm2 + +vpmaxub %ymm0, %ymm1, %ymm2 +vpmaxub (%rax), %ymm1, %ymm2 + +vpmaxud %ymm0, %ymm1, %ymm2 +vpmaxud (%rax), %ymm1, %ymm2 + +vpmaxuw %ymm0, %ymm1, %ymm2 +vpmaxuw (%rax), %ymm1, %ymm2 + +vpminsb %ymm0, %ymm1, %ymm2 +vpminsb (%rax), %ymm1, %ymm2 + +vpminsd %ymm0, %ymm1, %ymm2 +vpminsd (%rax), %ymm1, %ymm2 + +vpminsw %ymm0, %ymm1, %ymm2 +vpminsw (%rax), %ymm1, %ymm2 + +vpminub %ymm0, %ymm1, %ymm2 +vpminub (%rax), %ymm1, %ymm2 + +vpminud %ymm0, %ymm1, %ymm2 +vpminud (%rax), %ymm1, %ymm2 + +vpminuw %ymm0, %ymm1, %ymm2 +vpminuw (%rax), %ymm1, %ymm2 + +vpmovmskb %ymm0, %rcx + +vpmovsxbd %xmm0, %ymm2 +vpmovsxbd (%rax), %ymm2 + +vpmovsxbq %xmm0, %ymm2 +vpmovsxbq (%rax), %ymm2 + +vpmovsxbw %xmm0, %ymm2 +vpmovsxbw (%rax), %ymm2 + +vpmovsxdq %xmm0, %ymm2 +vpmovsxdq (%rax), %ymm2 + +vpmovsxwd %xmm0, %ymm2 +vpmovsxwd (%rax), %ymm2 + +vpmovsxwq %xmm0, %ymm2 +vpmovsxwq (%rax), %ymm2 + +vpmovzxbd %xmm0, %ymm2 +vpmovzxbd (%rax), %ymm2 + +vpmovzxbq %xmm0, %ymm2 +vpmovzxbq (%rax), %ymm2 + +vpmovzxbw %xmm0, %ymm2 +vpmovzxbw (%rax), %ymm2 + +vpmovzxdq %xmm0, %ymm2 +vpmovzxdq (%rax), %ymm2 + +vpmovzxwd %xmm0, %ymm2 +vpmovzxwd (%rax), %ymm2 + +vpmovzxwq %xmm0, %ymm2 +vpmovzxwq (%rax), %ymm2 + +vpmuldq %ymm0, %ymm1, %ymm2 +vpmuldq (%rax), %ymm1, %ymm2 + +vpmulhrsw %ymm0, %ymm1, %ymm2 +vpmulhrsw (%rax), %ymm1, %ymm2 + +vpmulhuw %ymm0, %ymm1, %ymm2 +vpmulhuw (%rax), %ymm1, %ymm2 + +vpmulhw %ymm0, %ymm1, %ymm2 +vpmulhw (%rax), %ymm1, %ymm2 + +vpmulld %ymm0, %ymm1, %ymm2 +vpmulld (%rax), %ymm1, %ymm2 + +vpmullw %ymm0, %ymm1, %ymm2 +vpmullw (%rax), %ymm1, %ymm2 + +vpmuludq %ymm0, %ymm1, %ymm2 +vpmuludq (%rax), %ymm1, %ymm2 + +vpor %ymm0, %ymm1, %ymm2 +vpor (%rax), %ymm1, %ymm2 + +vpsadbw %ymm0, %ymm1, %ymm2 +vpsadbw (%rax), %ymm1, %ymm2 + +vpshufb %ymm0, %ymm1, %ymm2 +vpshufb (%rax), %ymm1, %ymm2 + +vpshufd $1, %ymm0, %ymm2 +vpshufd $1, (%rax), %ymm2 + +vpshufhw $1, %ymm0, %ymm2 +vpshufhw $1, (%rax), %ymm2 + +vpshuflw $1, %ymm0, %ymm2 +vpshuflw $1, (%rax), %ymm2 + +vpsignb %ymm0, %ymm1, %ymm2 +vpsignb (%rax), %ymm1, %ymm2 + +vpsignd %ymm0, %ymm1, %ymm2 +vpsignd (%rax), %ymm1, %ymm2 + +vpsignw %ymm0, %ymm1, %ymm2 +vpsignw (%rax), %ymm1, %ymm2 + +vpslld $1, %ymm0, %ymm2 +vpslld %xmm0, %ymm1, %ymm2 +vpslld (%rax), %ymm1, %ymm2 + +vpslldq $1, %ymm1, %ymm2 + +vpsllq $1, %ymm0, %ymm2 +vpsllq %xmm0, %ymm1, %ymm2 +vpsllq (%rax), %ymm1, %ymm2 + +vpsllvd %xmm0, %xmm1, %xmm2 +vpsllvd (%rax), %xmm1, %xmm2 + +vpsllvd %ymm0, %ymm1, %ymm2 +vpsllvd (%rax), %ymm1, %ymm2 + +vpsllvq %xmm0, %xmm1, %xmm2 +vpsllvq (%rax), %xmm1, %xmm2 + +vpsllvq %ymm0, %ymm1, %ymm2 +vpsllvq (%rax), %ymm1, %ymm2 + +vpsllw $1, %ymm0, %ymm2 +vpsllw %xmm0, %ymm1, %ymm2 +vpsllw (%rax), %ymm1, %ymm2 + +vpsrad $1, %ymm0, %ymm2 +vpsrad %xmm0, %ymm1, %ymm2 +vpsrad (%rax), %ymm1, %ymm2 + +vpsravd %xmm0, %xmm1, %xmm2 +vpsravd (%rax), %xmm1, %xmm2 + +vpsravd %ymm0, %ymm1, %ymm2 +vpsravd (%rax), %ymm1, %ymm2 + +vpsraw $1, %ymm0, %ymm2 +vpsraw %xmm0, %ymm1, %ymm2 +vpsraw (%rax), %ymm1, %ymm2 + +vpsrld $1, %ymm0, %ymm2 +vpsrld %xmm0, %ymm1, %ymm2 +vpsrld (%rax), %ymm1, %ymm2 + +vpsrldq $1, %ymm1, %ymm2 + +vpsrlq $1, %ymm0, %ymm2 +vpsrlq %xmm0, %ymm1, %ymm2 +vpsrlq (%rax), %ymm1, %ymm2 + +vpsrlvd %xmm0, %xmm1, %xmm2 +vpsrlvd (%rax), %xmm1, %xmm2 + +vpsrlvd %ymm0, %ymm1, %ymm2 +vpsrlvd (%rax), %ymm1, %ymm2 + +vpsrlvq %xmm0, %xmm1, %xmm2 +vpsrlvq (%rax), %xmm1, %xmm2 + +vpsrlvq %ymm0, %ymm1, %ymm2 +vpsrlvq (%rax), %ymm1, %ymm2 + +vpsrlw $1, %ymm0, %ymm2 +vpsrlw %xmm0, %ymm1, %ymm2 +vpsrlw (%rax), %ymm1, %ymm2 + +vpsubb %ymm0, %ymm1, %ymm2 +vpsubb (%rax), %ymm1, %ymm2 + +vpsubd %ymm0, %ymm1, %ymm2 +vpsubd (%rax), %ymm1, %ymm2 + +vpsubq %ymm0, %ymm1, %ymm2 +vpsubq (%rax), %ymm1, %ymm2 + +vpsubsb %ymm0, %ymm1, %ymm2 +vpsubsb (%rax), %ymm1, %ymm2 + +vpsubsw %ymm0, %ymm1, %ymm2 +vpsubsw (%rax), %ymm1, %ymm2 + +vpsubusb %ymm0, %ymm1, %ymm2 +vpsubusb (%rax), %ymm1, %ymm2 + +vpsubusw %ymm0, %ymm1, %ymm2 +vpsubusw (%rax), %ymm1, %ymm2 + +vpsubw %ymm0, %ymm1, %ymm2 +vpsubw (%rax), %ymm1, %ymm2 + +vpunpckhbw %ymm0, %ymm1, %ymm2 +vpunpckhbw (%rax), %ymm1, %ymm2 + +vpunpckhdq %ymm0, %ymm1, %ymm2 +vpunpckhdq (%rax), %ymm1, %ymm2 + +vpunpckhqdq %ymm0, %ymm1, %ymm2 +vpunpckhqdq (%rax), %ymm1, %ymm2 + +vpunpckhwd %ymm0, %ymm1, %ymm2 +vpunpckhwd (%rax), %ymm1, %ymm2 + +vpunpcklbw %ymm0, %ymm1, %ymm2 +vpunpcklbw (%rax), %ymm1, %ymm2 + +vpunpckldq %ymm0, %ymm1, %ymm2 +vpunpckldq (%rax), %ymm1, %ymm2 + +vpunpcklqdq %ymm0, %ymm1, %ymm2 +vpunpcklqdq (%rax), %ymm1, %ymm2 + +vpunpcklwd %ymm0, %ymm1, %ymm2 +vpunpcklwd (%rax), %ymm1, %ymm2 + +vpxor %ymm0, %ymm1, %ymm2 +vpxor (%rax), %ymm1, %ymm2 + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 8 0.33 * vbroadcasti128 (%rax), %ymm0 +# CHECK-NEXT: 1 100 0.25 vbroadcastsd %xmm0, %ymm0 +# CHECK-NEXT: 1 100 0.25 vbroadcastss %xmm0, %ymm0 +# CHECK-NEXT: 1 2 0.25 vextracti128 $1, %ymm0, %xmm2 +# CHECK-NEXT: 1 1 0.33 * vextracti128 $1, %ymm0, (%rax) +# CHECK-NEXT: 1 100 0.25 * vgatherdpd %xmm0, (%rax,%xmm1,2), %xmm2 +# CHECK-NEXT: 1 100 0.25 * vgatherdpd %ymm0, (%rax,%xmm1,2), %ymm2 +# CHECK-NEXT: 1 100 0.25 * vgatherdps %xmm0, (%rax,%xmm1,2), %xmm2 +# CHECK-NEXT: 1 100 0.25 * vgatherdps %ymm0, (%rax,%ymm1,2), %ymm2 +# CHECK-NEXT: 1 100 0.25 * vgatherqpd %xmm0, (%rax,%xmm1,2), %xmm2 +# CHECK-NEXT: 1 100 0.25 * vgatherqpd %ymm0, (%rax,%ymm1,2), %ymm2 +# CHECK-NEXT: 1 100 0.25 * vgatherqps %xmm0, (%rax,%xmm1,2), %xmm2 +# CHECK-NEXT: 1 100 0.25 * vgatherqps %xmm0, (%rax,%ymm1,2), %xmm2 +# CHECK-NEXT: 1 2 0.25 vinserti128 $1, %xmm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 9 0.33 * vinserti128 $1, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vmovntdqa (%rax), %ymm0 +# CHECK-NEXT: 1 100 0.25 vmpsadbw $1, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 100 0.25 * vmpsadbw $1, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpabsb %ymm0, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpabsb (%rax), %ymm2 +# CHECK-NEXT: 1 1 0.25 vpabsd %ymm0, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpabsd (%rax), %ymm2 +# CHECK-NEXT: 1 1 0.25 vpabsw %ymm0, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpabsw (%rax), %ymm2 +# CHECK-NEXT: 1 1 0.25 vpackssdw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpackssdw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpacksswb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpacksswb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpackusdw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpackusdw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpackuswb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpackuswb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpaddb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpaddb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpaddd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpaddd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpaddq %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpaddq (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpaddsb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpaddsb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpaddsw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpaddsw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpaddusb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpaddusb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpaddusw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpaddusw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpaddw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpaddw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpalignr $1, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpalignr $1, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpand %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpand (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpandn %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpandn (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpavgb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpavgb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpavgw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpavgw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.50 vpblendd $11, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 2 8 1.00 * vpblendd $11, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 2 1 0.50 vpblendd $11, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 9 1.50 * vpblendd $11, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 1.00 vpblendvb %ymm3, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 1.00 * vpblendvb %ymm3, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.33 vpblendw $11, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 8 0.33 * vpblendw $11, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpbroadcastb %xmm0, %xmm0 +# CHECK-NEXT: 2 8 1.00 * vpbroadcastb (%rax), %xmm0 +# CHECK-NEXT: 1 2 0.25 vpbroadcastb %xmm0, %ymm0 +# CHECK-NEXT: 2 8 2.00 * vpbroadcastb (%rax), %ymm0 +# CHECK-NEXT: 1 1 0.25 vpbroadcastd %xmm0, %xmm0 +# CHECK-NEXT: 1 8 0.33 * vpbroadcastd (%rax), %xmm0 +# CHECK-NEXT: 1 2 0.25 vpbroadcastd %xmm0, %ymm0 +# CHECK-NEXT: 1 8 0.33 * vpbroadcastd (%rax), %ymm0 +# CHECK-NEXT: 1 1 0.25 vpbroadcastq %xmm0, %xmm0 +# CHECK-NEXT: 1 8 0.33 * vpbroadcastq (%rax), %xmm0 +# CHECK-NEXT: 1 2 0.25 vpbroadcastq %xmm0, %ymm0 +# CHECK-NEXT: 1 8 0.33 * vpbroadcastq (%rax), %ymm0 +# CHECK-NEXT: 1 1 0.25 vpbroadcastw %xmm0, %xmm0 +# CHECK-NEXT: 2 8 1.00 * vpbroadcastw (%rax), %xmm0 +# CHECK-NEXT: 1 2 0.25 vpbroadcastw %xmm0, %ymm0 +# CHECK-NEXT: 2 8 2.00 * vpbroadcastw (%rax), %ymm0 +# CHECK-NEXT: 1 1 0.25 vpcmpeqb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpcmpeqb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpcmpeqd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpcmpeqd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpcmpeqq %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpcmpeqq (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpcmpeqw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpcmpeqw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpcmpgtb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpcmpgtb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpcmpgtd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpcmpgtd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.50 vpcmpgtq %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.50 * vpcmpgtq (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpcmpgtw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpcmpgtw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 0.25 vperm2i128 $1, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 9 0.33 * vperm2i128 $1, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 0.25 vpermd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 9 0.33 * vpermd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 100 0.25 vpermpd $1, %ymm0, %ymm2 +# CHECK-NEXT: 1 107 0.33 * vpermpd $1, (%rax), %ymm2 +# CHECK-NEXT: 1 100 0.25 vpermps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 107 0.33 * vpermps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 2 0.25 vpermq $1, %ymm0, %ymm2 +# CHECK-NEXT: 1 9 0.33 * vpermq $1, (%rax), %ymm2 +# CHECK-NEXT: 1 100 0.25 * vpgatherdd %xmm0, (%rax,%xmm1,2), %xmm2 +# CHECK-NEXT: 1 100 0.25 * vpgatherdd %ymm0, (%rax,%ymm1,2), %ymm2 +# CHECK-NEXT: 1 100 0.25 * vpgatherdq %xmm0, (%rax,%xmm1,2), %xmm2 +# CHECK-NEXT: 1 100 0.25 * vpgatherdq %ymm0, (%rax,%xmm1,2), %ymm2 +# CHECK-NEXT: 1 100 0.25 * vpgatherqd %xmm0, (%rax,%xmm1,2), %xmm2 +# CHECK-NEXT: 1 100 0.25 * vpgatherqd %xmm0, (%rax,%ymm1,2), %xmm2 +# CHECK-NEXT: 1 100 0.25 * vpgatherqq %xmm0, (%rax,%xmm1,2), %xmm2 +# CHECK-NEXT: 1 100 0.25 * vpgatherqq %ymm0, (%rax,%ymm1,2), %ymm2 +# CHECK-NEXT: 1 100 0.25 vphaddd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 100 0.25 * vphaddd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 100 0.25 vphaddsw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 100 0.25 * vphaddsw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 100 0.25 vphaddw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 100 0.25 * vphaddw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 100 0.25 vphsubd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 100 0.25 * vphsubd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 100 0.25 vphsubsw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 100 0.25 * vphsubsw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 100 0.25 vphsubw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 100 0.25 * vphsubw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 4 1.00 vpmaddubsw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 11 1.00 * vpmaddubsw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 4 1.00 vpmaddwd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 11 1.00 * vpmaddwd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 100 0.25 * vpmaskmovd (%rax), %xmm0, %xmm2 +# CHECK-NEXT: 1 100 0.25 * vpmaskmovd (%rax), %ymm0, %ymm2 +# CHECK-NEXT: 1 100 0.25 * * vpmaskmovd %xmm0, %xmm1, (%rax) +# CHECK-NEXT: 1 100 0.25 * * vpmaskmovd %ymm0, %ymm1, (%rax) +# CHECK-NEXT: 2 8 1.00 * vpmaskmovq (%rax), %xmm0, %xmm2 +# CHECK-NEXT: 2 8 1.00 * vpmaskmovq (%rax), %ymm0, %ymm2 +# CHECK-NEXT: 1 100 0.25 * * vpmaskmovq %xmm0, %xmm1, (%rax) +# CHECK-NEXT: 1 100 0.25 * * vpmaskmovq %ymm0, %ymm1, (%rax) +# CHECK-NEXT: 1 1 0.25 vpmaxsb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpmaxsb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpmaxsd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpmaxsd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpmaxsw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpmaxsw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpmaxub %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpmaxub (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpmaxud %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpmaxud (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpmaxuw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpmaxuw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpminsb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpminsb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpminsd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpminsd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpminsw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpminsw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpminub %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpminub (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpminud %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpminud (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpminuw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpminuw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 2 2 2.00 vpmovmskb %ymm0, %ecx +# CHECK-NEXT: 2 1 0.50 vpmovsxbd %xmm0, %ymm2 +# CHECK-NEXT: 2 8 0.50 * vpmovsxbd (%rax), %ymm2 +# CHECK-NEXT: 2 1 0.50 vpmovsxbq %xmm0, %ymm2 +# CHECK-NEXT: 2 8 0.50 * vpmovsxbq (%rax), %ymm2 +# CHECK-NEXT: 2 1 0.50 vpmovsxbw %xmm0, %ymm2 +# CHECK-NEXT: 2 8 0.50 * vpmovsxbw (%rax), %ymm2 +# CHECK-NEXT: 2 1 0.50 vpmovsxdq %xmm0, %ymm2 +# CHECK-NEXT: 2 8 0.50 * vpmovsxdq (%rax), %ymm2 +# CHECK-NEXT: 2 1 0.50 vpmovsxwd %xmm0, %ymm2 +# CHECK-NEXT: 2 8 0.50 * vpmovsxwd (%rax), %ymm2 +# CHECK-NEXT: 2 1 0.50 vpmovsxwq %xmm0, %ymm2 +# CHECK-NEXT: 2 8 0.50 * vpmovsxwq (%rax), %ymm2 +# CHECK-NEXT: 2 1 0.50 vpmovzxbd %xmm0, %ymm2 +# CHECK-NEXT: 2 8 0.50 * vpmovzxbd (%rax), %ymm2 +# CHECK-NEXT: 2 1 0.50 vpmovzxbq %xmm0, %ymm2 +# CHECK-NEXT: 2 8 0.50 * vpmovzxbq (%rax), %ymm2 +# CHECK-NEXT: 2 1 0.50 vpmovzxbw %xmm0, %ymm2 +# CHECK-NEXT: 2 8 0.50 * vpmovzxbw (%rax), %ymm2 +# CHECK-NEXT: 2 1 0.50 vpmovzxdq %xmm0, %ymm2 +# CHECK-NEXT: 2 8 0.50 * vpmovzxdq (%rax), %ymm2 +# CHECK-NEXT: 2 1 0.50 vpmovzxwd %xmm0, %ymm2 +# CHECK-NEXT: 2 8 0.50 * vpmovzxwd (%rax), %ymm2 +# CHECK-NEXT: 2 1 0.50 vpmovzxwq %xmm0, %ymm2 +# CHECK-NEXT: 2 8 0.50 * vpmovzxwq (%rax), %ymm2 +# CHECK-NEXT: 1 4 1.00 vpmuldq %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 11 1.00 * vpmuldq (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 4 1.00 vpmulhrsw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 11 1.00 * vpmulhrsw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 4 1.00 vpmulhuw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 11 1.00 * vpmulhuw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 4 1.00 vpmulhw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 11 1.00 * vpmulhw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 3 1.00 vpmulld %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 2 10 1.00 * vpmulld (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 4 1.00 vpmullw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 11 1.00 * vpmullw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 4 1.00 vpmuludq %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 11 1.00 * vpmuludq (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpor %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpor (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 3 1.00 vpsadbw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 10 1.00 * vpsadbw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpshufb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpshufb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpshufd $1, %ymm0, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpshufd $1, (%rax), %ymm2 +# CHECK-NEXT: 1 1 0.25 vpshufhw $1, %ymm0, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpshufhw $1, (%rax), %ymm2 +# CHECK-NEXT: 1 1 0.25 vpshuflw $1, %ymm0, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpshuflw $1, (%rax), %ymm2 +# CHECK-NEXT: 1 1 0.25 vpsignb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpsignb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpsignd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpsignd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpsignw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpsignw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpslld $1, %ymm0, %ymm2 +# CHECK-NEXT: 1 2 1.00 vpslld %xmm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 9 1.00 * vpslld (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 1.00 vpslldq $1, %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpsllq $1, %ymm0, %ymm2 +# CHECK-NEXT: 1 2 1.00 vpsllq %xmm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 9 1.00 * vpsllq (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.50 vpsllvd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vpsllvd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.50 vpsllvd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.50 * vpsllvd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.50 vpsllvq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vpsllvq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.50 vpsllvq %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.50 * vpsllvq (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpsllw $1, %ymm0, %ymm2 +# CHECK-NEXT: 1 2 1.00 vpsllw %xmm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 9 1.00 * vpsllw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpsrad $1, %ymm0, %ymm2 +# CHECK-NEXT: 1 2 1.00 vpsrad %xmm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 9 1.00 * vpsrad (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.50 vpsravd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vpsravd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.50 vpsravd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.50 * vpsravd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpsraw $1, %ymm0, %ymm2 +# CHECK-NEXT: 1 2 1.00 vpsraw %xmm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 9 1.00 * vpsraw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpsrld $1, %ymm0, %ymm2 +# CHECK-NEXT: 1 2 1.00 vpsrld %xmm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 9 1.00 * vpsrld (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 1.00 vpsrldq $1, %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpsrlq $1, %ymm0, %ymm2 +# CHECK-NEXT: 1 2 1.00 vpsrlq %xmm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 9 1.00 * vpsrlq (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.50 vpsrlvd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vpsrlvd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.50 vpsrlvd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.50 * vpsrlvd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.50 vpsrlvq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 8 0.50 * vpsrlvq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 1 0.50 vpsrlvq %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.50 * vpsrlvq (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpsrlw $1, %ymm0, %ymm2 +# CHECK-NEXT: 1 2 1.00 vpsrlw %xmm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 9 1.00 * vpsrlw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpsubb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpsubb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpsubd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpsubd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpsubq %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpsubq (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpsubsb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpsubsb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpsubsw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpsubsw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpsubusb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpsubusb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpsubusw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpsubusw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpsubw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpsubw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpunpckhbw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpunpckhbw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpunpckhdq %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpunpckhdq (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpunpckhqdq %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpunpckhqdq (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpunpckhwd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpunpckhwd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpunpcklbw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpunpcklbw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpunpckldq %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpunpckldq (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpunpcklqdq %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpunpcklqdq (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpunpcklwd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpunpcklwd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 1 0.25 vpxor %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 8 0.33 * vpxor (%rax), %ymm1, %ymm2 + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: 42.67 42.67 42.67 - - - - - 70.17 75.17 85.00 42.67 - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vbroadcasti128 (%rax), %ymm0 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vbroadcastsd %xmm0, %ymm0 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vbroadcastss %xmm0, %ymm0 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vextracti128 $1, %ymm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vextracti128 $1, %ymm0, (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - vgatherdpd %xmm0, (%rax,%xmm1,2), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vgatherdpd %ymm0, (%rax,%xmm1,2), %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vgatherdps %xmm0, (%rax,%xmm1,2), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vgatherdps %ymm0, (%rax,%ymm1,2), %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vgatherqpd %xmm0, (%rax,%xmm1,2), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vgatherqpd %ymm0, (%rax,%ymm1,2), %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vgatherqps %xmm0, (%rax,%xmm1,2), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vgatherqps %xmm0, (%rax,%ymm1,2), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vinserti128 $1, %xmm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vinserti128 $1, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - vmovntdqa (%rax), %ymm0 +# CHECK-NEXT: - - - - - - - - - - - - - vmpsadbw $1, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vmpsadbw $1, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpabsb %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpabsb (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpabsd %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpabsd (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpabsw %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpabsw (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpackssdw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpackssdw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpacksswb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpacksswb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpackusdw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpackusdw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpackuswb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpackuswb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpaddb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpaddb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpaddd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpaddd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpaddq %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpaddq (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpaddsb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpaddsb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpaddsw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpaddsw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpaddusb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpaddusb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpaddusw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpaddusw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpaddw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpaddw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpalignr $1, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpalignr $1, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpand %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpand (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpandn %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpandn (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpavgb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpavgb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpavgw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpavgw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - vpblendd $11, %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 1.00 - - - vpblendd $11, (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - vpblendd $11, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.50 1.50 - - - vpblendd $11, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vpblendvb %ymm3, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vpblendvb %ymm3, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.33 0.33 - 0.33 - vpblendw $11, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.33 0.33 - 0.33 - vpblendw $11, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpbroadcastb %xmm0, %xmm0 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 1.00 1.00 - - vpbroadcastb (%rax), %xmm0 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpbroadcastb %xmm0, %ymm0 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 2.00 - - - vpbroadcastb (%rax), %ymm0 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpbroadcastd %xmm0, %xmm0 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpbroadcastd (%rax), %xmm0 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpbroadcastd %xmm0, %ymm0 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpbroadcastd (%rax), %ymm0 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpbroadcastq %xmm0, %xmm0 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpbroadcastq (%rax), %xmm0 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpbroadcastq %xmm0, %ymm0 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpbroadcastq (%rax), %ymm0 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpbroadcastw %xmm0, %xmm0 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 1.00 1.00 - - vpbroadcastw (%rax), %xmm0 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpbroadcastw %xmm0, %ymm0 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 2.00 - - - vpbroadcastw (%rax), %ymm0 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpcmpeqb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpcmpeqb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpcmpeqd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpcmpeqd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpcmpeqq %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpcmpeqq (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpcmpeqw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpcmpeqw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpcmpgtb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpcmpgtb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpcmpgtd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpcmpgtd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vpcmpgtq %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vpcmpgtq (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpcmpgtw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpcmpgtw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vperm2i128 $1, %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vperm2i128 $1, (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpermd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpermd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpermpd $1, %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpermpd $1, (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpermps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpermps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpermq $1, %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpermq $1, (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vpgatherdd %xmm0, (%rax,%xmm1,2), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vpgatherdd %ymm0, (%rax,%ymm1,2), %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vpgatherdq %xmm0, (%rax,%xmm1,2), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vpgatherdq %ymm0, (%rax,%xmm1,2), %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vpgatherqd %xmm0, (%rax,%xmm1,2), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vpgatherqd %xmm0, (%rax,%ymm1,2), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vpgatherqq %xmm0, (%rax,%xmm1,2), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vpgatherqq %ymm0, (%rax,%ymm1,2), %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vphaddd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vphaddd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vphaddsw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vphaddsw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vphaddw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vphaddw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vphsubd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vphsubd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vphsubsw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vphsubsw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vphsubw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vphsubw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vpmaddubsw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vpmaddubsw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vpmaddwd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vpmaddwd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vpmaskmovd (%rax), %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vpmaskmovd (%rax), %ymm0, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vpmaskmovd %xmm0, %xmm1, (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - vpmaskmovd %ymm0, %ymm1, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 1.00 - - - vpmaskmovq (%rax), %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 1.00 - - - vpmaskmovq (%rax), %ymm0, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vpmaskmovq %xmm0, %xmm1, (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - vpmaskmovq %ymm0, %ymm1, (%rax) +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpmaxsb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpmaxsb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpmaxsd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpmaxsd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpmaxsw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpmaxsw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpmaxub %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpmaxub (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpmaxud %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpmaxud (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpmaxuw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpmaxuw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpminsb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpminsb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpminsd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpminsd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpminsw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpminsw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpminub %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpminub (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpminud %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpminud (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpminuw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpminuw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - 2.00 - - vpmovmskb %ymm0, %ecx +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpmovsxbd %xmm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpmovsxbd (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpmovsxbq %xmm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpmovsxbq (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpmovsxbw %xmm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpmovsxbw (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpmovsxdq %xmm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpmovsxdq (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpmovsxwd %xmm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpmovsxwd (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpmovsxwq %xmm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpmovsxwq (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpmovzxbd %xmm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpmovzxbd (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpmovzxbq %xmm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpmovzxbq (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpmovzxbw %xmm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpmovzxbw (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpmovzxdq %xmm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpmovzxdq (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpmovzxwd %xmm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpmovzxwd (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpmovzxwq %xmm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpmovzxwq (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vpmuldq %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vpmuldq (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vpmulhrsw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vpmulhrsw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vpmulhuw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vpmulhuw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vpmulhw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vpmulhw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vpmulld %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vpmulld (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vpmullw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vpmullw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vpmuludq %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vpmuludq (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpor %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpor (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - vpsadbw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - vpsadbw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpshufb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpshufb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpshufd $1, %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpshufd $1, (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpshufhw $1, %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpshufhw $1, (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpshuflw $1, %ymm0, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpshuflw $1, (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsignb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpsignb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsignd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpsignd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsignw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpsignw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpslld $1, %ymm0, %ymm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - vpslld %xmm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 - - vpslld (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - vpslldq $1, %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsllq $1, %ymm0, %ymm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - vpsllq %xmm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 - - vpsllq (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpsllvd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpsllvd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpsllvd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpsllvd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpsllvq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpsllvq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpsllvq %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpsllvq (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsllw $1, %ymm0, %ymm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - vpsllw %xmm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 - - vpsllw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsrad $1, %ymm0, %ymm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - vpsrad %xmm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 - - vpsrad (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpsravd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpsravd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpsravd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpsravd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsraw $1, %ymm0, %ymm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - vpsraw %xmm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 - - vpsraw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsrld $1, %ymm0, %ymm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - vpsrld %xmm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 - - vpsrld (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - vpsrldq $1, %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsrlq $1, %ymm0, %ymm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - vpsrlq %xmm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 - - vpsrlq (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpsrlvd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpsrlvd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpsrlvd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpsrlvd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpsrlvq %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpsrlvq (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - vpsrlvq %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - vpsrlvq (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsrlw $1, %ymm0, %ymm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - vpsrlw %xmm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 - - vpsrlw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsubb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpsubb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsubd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpsubd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsubq %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpsubq (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsubsb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpsubsb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsubsw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpsubsw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsubusb %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpsubusb (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsubusw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpsubusw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpsubw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpsubw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpunpckhbw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpunpckhbw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpunpckhdq %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpunpckhdq (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpunpckhqdq %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpunpckhqdq (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpunpckhwd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpunpckhwd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpunpcklbw %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpunpcklbw (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpunpckldq %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpunpckldq (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpunpcklqdq %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpunpcklqdq (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpunpcklwd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpunpcklwd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - vpxor %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - vpxor (%rax), %ymm1, %ymm2 Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-bmi1.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-bmi1.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-bmi1.s @@ -0,0 +1,125 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +andn %eax, %ebx, %ecx +andn (%rax), %ebx, %ecx + +andn %rax, %rbx, %rcx +andn (%rax), %rbx, %rcx + +bextr %eax, %ebx, %ecx +bextr %eax, (%rbx), %ecx + +bextr %rax, %rbx, %rcx +bextr %rax, (%rbx), %rcx + +blsi %eax, %ecx +blsi (%rax), %ecx + +blsi %rax, %rcx +blsi (%rax), %rcx + +blsmsk %eax, %ecx +blsmsk (%rax), %ecx + +blsmsk %rax, %rcx +blsmsk (%rax), %rcx + +blsr %eax, %ecx +blsr (%rax), %ecx + +blsr %rax, %rcx +blsr (%rax), %rcx + +tzcnt %ax, %cx +tzcnt (%rax), %cx + +tzcnt %eax, %ecx +tzcnt (%rax), %ecx + +tzcnt %rax, %rcx +tzcnt (%rax), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.25 andnl %eax, %ebx, %ecx +# CHECK-NEXT: 2 5 0.33 * andnl (%rax), %ebx, %ecx +# CHECK-NEXT: 1 1 0.25 andnq %rax, %rbx, %rcx +# CHECK-NEXT: 2 5 0.33 * andnq (%rax), %rbx, %rcx +# CHECK-NEXT: 1 1 0.25 bextrl %eax, %ebx, %ecx +# CHECK-NEXT: 2 5 0.33 * bextrl %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.25 bextrq %rax, %rbx, %rcx +# CHECK-NEXT: 2 5 0.33 * bextrq %rax, (%rbx), %rcx +# CHECK-NEXT: 1 2 0.25 blsil %eax, %ecx +# CHECK-NEXT: 1 6 0.33 * blsil (%rax), %ecx +# CHECK-NEXT: 1 2 0.25 blsiq %rax, %rcx +# CHECK-NEXT: 1 6 0.33 * blsiq (%rax), %rcx +# CHECK-NEXT: 1 2 0.25 blsmskl %eax, %ecx +# CHECK-NEXT: 1 6 0.33 * blsmskl (%rax), %ecx +# CHECK-NEXT: 1 2 0.25 blsmskq %rax, %rcx +# CHECK-NEXT: 1 6 0.33 * blsmskq (%rax), %rcx +# CHECK-NEXT: 1 2 0.25 blsrl %eax, %ecx +# CHECK-NEXT: 1 6 0.33 * blsrl (%rax), %ecx +# CHECK-NEXT: 1 2 0.25 blsrq %rax, %rcx +# CHECK-NEXT: 1 6 0.33 * blsrq (%rax), %rcx +# CHECK-NEXT: 1 2 0.25 tzcntw %ax, %cx +# CHECK-NEXT: 2 6 0.33 * tzcntw (%rax), %cx +# CHECK-NEXT: 1 2 0.25 tzcntl %eax, %ecx +# CHECK-NEXT: 2 6 0.33 * tzcntl (%rax), %ecx +# CHECK-NEXT: 1 2 0.25 tzcntq %rax, %rcx +# CHECK-NEXT: 2 6 0.33 * tzcntq (%rax), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: 4.33 4.33 4.33 6.50 6.50 6.50 6.50 - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - andnl %eax, %ebx, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - andnl (%rax), %ebx, %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - andnq %rax, %rbx, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - andnq (%rax), %rbx, %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - bextrl %eax, %ebx, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - bextrl %eax, (%rbx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - bextrq %rax, %rbx, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - bextrq %rax, (%rbx), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - blsil %eax, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - blsil (%rax), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - blsiq %rax, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - blsiq (%rax), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - blsmskl %eax, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - blsmskl (%rax), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - blsmskq %rax, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - blsmskq (%rax), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - blsrl %eax, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - blsrl (%rax), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - blsrq %rax, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - blsrq (%rax), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - tzcntw %ax, %cx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - tzcntw (%rax), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - tzcntl %eax, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - tzcntl (%rax), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - tzcntq %rax, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - tzcntq (%rax), %rcx Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-bmi2.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-bmi2.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-bmi2.s @@ -0,0 +1,146 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +bzhi %eax, %ebx, %ecx +bzhi %eax, (%rbx), %ecx + +bzhi %rax, %rbx, %rcx +bzhi %rax, (%rbx), %rcx + +mulx %eax, %ebx, %ecx +mulx (%rax), %ebx, %ecx + +mulx %rax, %rbx, %rcx +mulx (%rax), %rbx, %rcx + +pdep %eax, %ebx, %ecx +pdep (%rax), %ebx, %ecx + +pdep %rax, %rbx, %rcx +pdep (%rax), %rbx, %rcx + +pext %eax, %ebx, %ecx +pext (%rax), %ebx, %ecx + +pext %rax, %rbx, %rcx +pext (%rax), %rbx, %rcx + +rorx $1, %eax, %ecx +rorx $1, (%rax), %ecx + +rorx $1, %rax, %rcx +rorx $1, (%rax), %rcx + +sarx %eax, %ebx, %ecx +sarx %eax, (%rbx), %ecx + +sarx %rax, %rbx, %rcx +sarx %rax, (%rbx), %rcx + +shlx %eax, %ebx, %ecx +shlx %eax, (%rbx), %ecx + +shlx %rax, %rbx, %rcx +shlx %rax, (%rbx), %rcx + +shrx %eax, %ebx, %ecx +shrx %eax, (%rbx), %ecx + +shrx %rax, %rbx, %rcx +shrx %rax, (%rbx), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.25 bzhil %eax, %ebx, %ecx +# CHECK-NEXT: 2 5 0.33 * bzhil %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.25 bzhiq %rax, %rbx, %rcx +# CHECK-NEXT: 2 5 0.33 * bzhiq %rax, (%rbx), %rcx +# CHECK-NEXT: 1 3 2.00 mulxl %eax, %ebx, %ecx +# CHECK-NEXT: 1 8 2.00 * mulxl (%rax), %ebx, %ecx +# CHECK-NEXT: 1 3 1.00 mulxq %rax, %rbx, %rcx +# CHECK-NEXT: 1 8 1.00 * mulxq (%rax), %rbx, %rcx +# CHECK-NEXT: 1 100 0.25 pdepl %eax, %ebx, %ecx +# CHECK-NEXT: 1 100 0.25 * pdepl (%rax), %ebx, %ecx +# CHECK-NEXT: 1 100 0.25 pdepq %rax, %rbx, %rcx +# CHECK-NEXT: 1 100 0.25 * pdepq (%rax), %rbx, %rcx +# CHECK-NEXT: 1 100 0.25 pextl %eax, %ebx, %ecx +# CHECK-NEXT: 1 100 0.25 * pextl (%rax), %ebx, %ecx +# CHECK-NEXT: 1 100 0.25 pextq %rax, %rbx, %rcx +# CHECK-NEXT: 1 100 0.25 * pextq (%rax), %rbx, %rcx +# CHECK-NEXT: 1 1 0.25 rorxl $1, %eax, %ecx +# CHECK-NEXT: 2 5 0.33 * rorxl $1, (%rax), %ecx +# CHECK-NEXT: 1 1 0.25 rorxq $1, %rax, %rcx +# CHECK-NEXT: 2 5 0.33 * rorxq $1, (%rax), %rcx +# CHECK-NEXT: 1 1 0.25 sarxl %eax, %ebx, %ecx +# CHECK-NEXT: 2 5 0.33 * sarxl %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.25 sarxq %rax, %rbx, %rcx +# CHECK-NEXT: 2 5 0.33 * sarxq %rax, (%rbx), %rcx +# CHECK-NEXT: 1 1 0.25 shlxl %eax, %ebx, %ecx +# CHECK-NEXT: 2 5 0.33 * shlxl %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.25 shlxq %rax, %rbx, %rcx +# CHECK-NEXT: 2 5 0.33 * shlxq %rax, (%rbx), %rcx +# CHECK-NEXT: 1 1 0.25 shrxl %eax, %ebx, %ecx +# CHECK-NEXT: 2 5 0.33 * shrxl %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.25 shrxq %rax, %rbx, %rcx +# CHECK-NEXT: 2 5 0.33 * shrxq %rax, (%rbx), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: 4.00 4.00 4.00 5.00 10.00 5.00 5.00 - - - - - 5.00 + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - bzhil %eax, %ebx, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - bzhil %eax, (%rbx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - bzhiq %rax, %rbx, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - bzhiq %rax, (%rbx), %rcx +# CHECK-NEXT: - - - - 1.00 - - - - - - - 2.00 mulxl %eax, %ebx, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 - 2.00 - - - - - - - 2.00 mulxl (%rax), %ebx, %ecx +# CHECK-NEXT: - - - - 1.00 - - - - - - - - mulxq %rax, %rbx, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 - 1.00 - - - - - - - 1.00 mulxq (%rax), %rbx, %rcx +# CHECK-NEXT: - - - - - - - - - - - - - pdepl %eax, %ebx, %ecx +# CHECK-NEXT: - - - - - - - - - - - - - pdepl (%rax), %ebx, %ecx +# CHECK-NEXT: - - - - - - - - - - - - - pdepq %rax, %rbx, %rcx +# CHECK-NEXT: - - - - - - - - - - - - - pdepq (%rax), %rbx, %rcx +# CHECK-NEXT: - - - - - - - - - - - - - pextl %eax, %ebx, %ecx +# CHECK-NEXT: - - - - - - - - - - - - - pextl (%rax), %ebx, %ecx +# CHECK-NEXT: - - - - - - - - - - - - - pextq %rax, %rbx, %rcx +# CHECK-NEXT: - - - - - - - - - - - - - pextq (%rax), %rbx, %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rorxl $1, %eax, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - rorxl $1, (%rax), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rorxq $1, %rax, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - rorxq $1, (%rax), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sarxl %eax, %ebx, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sarxl %eax, (%rbx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sarxq %rax, %rbx, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sarxq %rax, (%rbx), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shlxl %eax, %ebx, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - shlxl %eax, (%rbx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shlxq %rax, %rbx, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - shlxq %rax, (%rbx), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shrxl %eax, %ebx, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - shrxl %eax, (%rbx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shrxq %rax, %rbx, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - shrxq %rax, (%rbx), %rcx Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-clflushopt.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-clflushopt.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-clflushopt.s @@ -0,0 +1,38 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +clflushopt (%rax) + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 8 0.33 * * U clflushopt (%rax) + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - clflushopt (%rax) Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-clzero.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-clzero.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-clzero.s @@ -0,0 +1,38 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +clzero + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 8 0.33 U clzero + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - clzero Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-cmov.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-cmov.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-cmov.s @@ -0,0 +1,328 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +cmovow %si, %di +cmovnow %si, %di +cmovbw %si, %di +cmovaew %si, %di +cmovew %si, %di +cmovnew %si, %di +cmovbew %si, %di +cmovaw %si, %di +cmovsw %si, %di +cmovnsw %si, %di +cmovpw %si, %di +cmovnpw %si, %di +cmovlw %si, %di +cmovgew %si, %di +cmovlew %si, %di +cmovgw %si, %di + +cmovow (%rax), %di +cmovnow (%rax), %di +cmovbw (%rax), %di +cmovaew (%rax), %di +cmovew (%rax), %di +cmovnew (%rax), %di +cmovbew (%rax), %di +cmovaw (%rax), %di +cmovsw (%rax), %di +cmovnsw (%rax), %di +cmovpw (%rax), %di +cmovnpw (%rax), %di +cmovlw (%rax), %di +cmovgew (%rax), %di +cmovlew (%rax), %di +cmovgw (%rax), %di + +cmovol %esi, %edi +cmovnol %esi, %edi +cmovbl %esi, %edi +cmovael %esi, %edi +cmovel %esi, %edi +cmovnel %esi, %edi +cmovbel %esi, %edi +cmoval %esi, %edi +cmovsl %esi, %edi +cmovnsl %esi, %edi +cmovpl %esi, %edi +cmovnpl %esi, %edi +cmovll %esi, %edi +cmovgel %esi, %edi +cmovlel %esi, %edi +cmovgl %esi, %edi + +cmovol (%rax), %edi +cmovnol (%rax), %edi +cmovbl (%rax), %edi +cmovael (%rax), %edi +cmovel (%rax), %edi +cmovnel (%rax), %edi +cmovbel (%rax), %edi +cmoval (%rax), %edi +cmovsl (%rax), %edi +cmovnsl (%rax), %edi +cmovpl (%rax), %edi +cmovnpl (%rax), %edi +cmovll (%rax), %edi +cmovgel (%rax), %edi +cmovlel (%rax), %edi +cmovgl (%rax), %edi + +cmovoq %rsi, %rdi +cmovnoq %rsi, %rdi +cmovbq %rsi, %rdi +cmovaeq %rsi, %rdi +cmoveq %rsi, %rdi +cmovneq %rsi, %rdi +cmovbeq %rsi, %rdi +cmovaq %rsi, %rdi +cmovsq %rsi, %rdi +cmovnsq %rsi, %rdi +cmovpq %rsi, %rdi +cmovnpq %rsi, %rdi +cmovlq %rsi, %rdi +cmovgeq %rsi, %rdi +cmovleq %rsi, %rdi +cmovgq %rsi, %rdi + +cmovoq (%rax), %rdi +cmovnoq (%rax), %rdi +cmovbq (%rax), %rdi +cmovaeq (%rax), %rdi +cmoveq (%rax), %rdi +cmovneq (%rax), %rdi +cmovbeq (%rax), %rdi +cmovaq (%rax), %rdi +cmovsq (%rax), %rdi +cmovnsq (%rax), %rdi +cmovpq (%rax), %rdi +cmovnpq (%rax), %rdi +cmovlq (%rax), %rdi +cmovgeq (%rax), %rdi +cmovleq (%rax), %rdi +cmovgq (%rax), %rdi + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.25 cmovow %si, %di +# CHECK-NEXT: 1 1 0.25 cmovnow %si, %di +# CHECK-NEXT: 1 1 0.25 cmovbw %si, %di +# CHECK-NEXT: 1 1 0.25 cmovaew %si, %di +# CHECK-NEXT: 1 1 0.25 cmovew %si, %di +# CHECK-NEXT: 1 1 0.25 cmovnew %si, %di +# CHECK-NEXT: 1 1 0.25 cmovbew %si, %di +# CHECK-NEXT: 1 1 0.25 cmovaw %si, %di +# CHECK-NEXT: 1 1 0.25 cmovsw %si, %di +# CHECK-NEXT: 1 1 0.25 cmovnsw %si, %di +# CHECK-NEXT: 1 1 0.25 cmovpw %si, %di +# CHECK-NEXT: 1 1 0.25 cmovnpw %si, %di +# CHECK-NEXT: 1 1 0.25 cmovlw %si, %di +# CHECK-NEXT: 1 1 0.25 cmovgew %si, %di +# CHECK-NEXT: 1 1 0.25 cmovlew %si, %di +# CHECK-NEXT: 1 1 0.25 cmovgw %si, %di +# CHECK-NEXT: 2 5 0.33 * cmovow (%rax), %di +# CHECK-NEXT: 2 5 0.33 * cmovnow (%rax), %di +# CHECK-NEXT: 2 5 0.33 * cmovbw (%rax), %di +# CHECK-NEXT: 2 5 0.33 * cmovaew (%rax), %di +# CHECK-NEXT: 2 5 0.33 * cmovew (%rax), %di +# CHECK-NEXT: 2 5 0.33 * cmovnew (%rax), %di +# CHECK-NEXT: 2 5 0.33 * cmovbew (%rax), %di +# CHECK-NEXT: 2 5 0.33 * cmovaw (%rax), %di +# CHECK-NEXT: 2 5 0.33 * cmovsw (%rax), %di +# CHECK-NEXT: 2 5 0.33 * cmovnsw (%rax), %di +# CHECK-NEXT: 2 5 0.33 * cmovpw (%rax), %di +# CHECK-NEXT: 2 5 0.33 * cmovnpw (%rax), %di +# CHECK-NEXT: 2 5 0.33 * cmovlw (%rax), %di +# CHECK-NEXT: 2 5 0.33 * cmovgew (%rax), %di +# CHECK-NEXT: 2 5 0.33 * cmovlew (%rax), %di +# CHECK-NEXT: 2 5 0.33 * cmovgw (%rax), %di +# CHECK-NEXT: 1 1 0.25 cmovol %esi, %edi +# CHECK-NEXT: 1 1 0.25 cmovnol %esi, %edi +# CHECK-NEXT: 1 1 0.25 cmovbl %esi, %edi +# CHECK-NEXT: 1 1 0.25 cmovael %esi, %edi +# CHECK-NEXT: 1 1 0.25 cmovel %esi, %edi +# CHECK-NEXT: 1 1 0.25 cmovnel %esi, %edi +# CHECK-NEXT: 1 1 0.25 cmovbel %esi, %edi +# CHECK-NEXT: 1 1 0.25 cmoval %esi, %edi +# CHECK-NEXT: 1 1 0.25 cmovsl %esi, %edi +# CHECK-NEXT: 1 1 0.25 cmovnsl %esi, %edi +# CHECK-NEXT: 1 1 0.25 cmovpl %esi, %edi +# CHECK-NEXT: 1 1 0.25 cmovnpl %esi, %edi +# CHECK-NEXT: 1 1 0.25 cmovll %esi, %edi +# CHECK-NEXT: 1 1 0.25 cmovgel %esi, %edi +# CHECK-NEXT: 1 1 0.25 cmovlel %esi, %edi +# CHECK-NEXT: 1 1 0.25 cmovgl %esi, %edi +# CHECK-NEXT: 2 5 0.33 * cmovol (%rax), %edi +# CHECK-NEXT: 2 5 0.33 * cmovnol (%rax), %edi +# CHECK-NEXT: 2 5 0.33 * cmovbl (%rax), %edi +# CHECK-NEXT: 2 5 0.33 * cmovael (%rax), %edi +# CHECK-NEXT: 2 5 0.33 * cmovel (%rax), %edi +# CHECK-NEXT: 2 5 0.33 * cmovnel (%rax), %edi +# CHECK-NEXT: 2 5 0.33 * cmovbel (%rax), %edi +# CHECK-NEXT: 2 5 0.33 * cmoval (%rax), %edi +# CHECK-NEXT: 2 5 0.33 * cmovsl (%rax), %edi +# CHECK-NEXT: 2 5 0.33 * cmovnsl (%rax), %edi +# CHECK-NEXT: 2 5 0.33 * cmovpl (%rax), %edi +# CHECK-NEXT: 2 5 0.33 * cmovnpl (%rax), %edi +# CHECK-NEXT: 2 5 0.33 * cmovll (%rax), %edi +# CHECK-NEXT: 2 5 0.33 * cmovgel (%rax), %edi +# CHECK-NEXT: 2 5 0.33 * cmovlel (%rax), %edi +# CHECK-NEXT: 2 5 0.33 * cmovgl (%rax), %edi +# CHECK-NEXT: 1 1 0.25 cmovoq %rsi, %rdi +# CHECK-NEXT: 1 1 0.25 cmovnoq %rsi, %rdi +# CHECK-NEXT: 1 1 0.25 cmovbq %rsi, %rdi +# CHECK-NEXT: 1 1 0.25 cmovaeq %rsi, %rdi +# CHECK-NEXT: 1 1 0.25 cmoveq %rsi, %rdi +# CHECK-NEXT: 1 1 0.25 cmovneq %rsi, %rdi +# CHECK-NEXT: 1 1 0.25 cmovbeq %rsi, %rdi +# CHECK-NEXT: 1 1 0.25 cmovaq %rsi, %rdi +# CHECK-NEXT: 1 1 0.25 cmovsq %rsi, %rdi +# CHECK-NEXT: 1 1 0.25 cmovnsq %rsi, %rdi +# CHECK-NEXT: 1 1 0.25 cmovpq %rsi, %rdi +# CHECK-NEXT: 1 1 0.25 cmovnpq %rsi, %rdi +# CHECK-NEXT: 1 1 0.25 cmovlq %rsi, %rdi +# CHECK-NEXT: 1 1 0.25 cmovgeq %rsi, %rdi +# CHECK-NEXT: 1 1 0.25 cmovleq %rsi, %rdi +# CHECK-NEXT: 1 1 0.25 cmovgq %rsi, %rdi +# CHECK-NEXT: 2 5 0.33 * cmovoq (%rax), %rdi +# CHECK-NEXT: 2 5 0.33 * cmovnoq (%rax), %rdi +# CHECK-NEXT: 2 5 0.33 * cmovbq (%rax), %rdi +# CHECK-NEXT: 2 5 0.33 * cmovaeq (%rax), %rdi +# CHECK-NEXT: 2 5 0.33 * cmoveq (%rax), %rdi +# CHECK-NEXT: 2 5 0.33 * cmovneq (%rax), %rdi +# CHECK-NEXT: 2 5 0.33 * cmovbeq (%rax), %rdi +# CHECK-NEXT: 2 5 0.33 * cmovaq (%rax), %rdi +# CHECK-NEXT: 2 5 0.33 * cmovsq (%rax), %rdi +# CHECK-NEXT: 2 5 0.33 * cmovnsq (%rax), %rdi +# CHECK-NEXT: 2 5 0.33 * cmovpq (%rax), %rdi +# CHECK-NEXT: 2 5 0.33 * cmovnpq (%rax), %rdi +# CHECK-NEXT: 2 5 0.33 * cmovlq (%rax), %rdi +# CHECK-NEXT: 2 5 0.33 * cmovgeq (%rax), %rdi +# CHECK-NEXT: 2 5 0.33 * cmovleq (%rax), %rdi +# CHECK-NEXT: 2 5 0.33 * cmovgq (%rax), %rdi + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: 16.00 16.00 16.00 24.00 24.00 24.00 24.00 - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovow %si, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovnow %si, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovbw %si, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovaew %si, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovew %si, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovnew %si, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovbew %si, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovaw %si, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovsw %si, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovnsw %si, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovpw %si, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovnpw %si, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovlw %si, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovgew %si, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovlew %si, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovgw %si, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovow (%rax), %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovnow (%rax), %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovbw (%rax), %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovaew (%rax), %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovew (%rax), %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovnew (%rax), %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovbew (%rax), %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovaw (%rax), %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovsw (%rax), %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovnsw (%rax), %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovpw (%rax), %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovnpw (%rax), %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovlw (%rax), %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovgew (%rax), %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovlew (%rax), %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovgw (%rax), %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovol %esi, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovnol %esi, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovbl %esi, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovael %esi, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovel %esi, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovnel %esi, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovbel %esi, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmoval %esi, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovsl %esi, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovnsl %esi, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovpl %esi, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovnpl %esi, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovll %esi, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovgel %esi, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovlel %esi, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovgl %esi, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovol (%rax), %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovnol (%rax), %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovbl (%rax), %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovael (%rax), %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovel (%rax), %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovnel (%rax), %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovbel (%rax), %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmoval (%rax), %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovsl (%rax), %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovnsl (%rax), %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovpl (%rax), %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovnpl (%rax), %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovll (%rax), %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovgel (%rax), %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovlel (%rax), %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovgl (%rax), %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovoq %rsi, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovnoq %rsi, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovbq %rsi, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovaeq %rsi, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmoveq %rsi, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovneq %rsi, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovbeq %rsi, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovaq %rsi, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovsq %rsi, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovnsq %rsi, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovpq %rsi, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovnpq %rsi, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovlq %rsi, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovgeq %rsi, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovleq %rsi, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmovgq %rsi, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovoq (%rax), %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovnoq (%rax), %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovbq (%rax), %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovaeq (%rax), %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmoveq (%rax), %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovneq (%rax), %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovbeq (%rax), %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovaq (%rax), %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovsq (%rax), %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovnsq (%rax), %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovpq (%rax), %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovnpq (%rax), %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovlq (%rax), %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovgeq (%rax), %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovleq (%rax), %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmovgq (%rax), %rdi Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-cmpxchg.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-cmpxchg.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-cmpxchg.s @@ -0,0 +1,41 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +cmpxchg8b (%rax) +cmpxchg16b (%rax) + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 18 1 0.33 * * cmpxchg8b (%rax) +# CHECK-NEXT: 1 100 0.25 * * cmpxchg16b (%rax) + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmpxchg8b (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - cmpxchg16b (%rax) Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-f16c.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-f16c.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-f16c.s @@ -0,0 +1,62 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +vcvtph2ps %xmm0, %xmm2 +vcvtph2ps (%rax), %xmm2 + +vcvtph2ps %xmm0, %ymm2 +vcvtph2ps (%rax), %ymm2 + +vcvtps2ph $0, %xmm0, %xmm2 +vcvtps2ph $0, %xmm0, (%rax) + +vcvtps2ph $0, %ymm0, %xmm2 +vcvtps2ph $0, %ymm0, (%rax) + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.25 vcvtph2ps %xmm0, %xmm2 +# CHECK-NEXT: 1 100 0.25 * vcvtph2ps (%rax), %xmm2 +# CHECK-NEXT: 1 100 0.25 vcvtph2ps %xmm0, %ymm2 +# CHECK-NEXT: 1 100 0.25 * vcvtph2ps (%rax), %ymm2 +# CHECK-NEXT: 1 100 0.25 vcvtps2ph $0, %xmm0, %xmm2 +# CHECK-NEXT: 1 100 0.25 * vcvtps2ph $0, %xmm0, (%rax) +# CHECK-NEXT: 1 100 0.25 vcvtps2ph $0, %ymm0, %xmm2 +# CHECK-NEXT: 1 100 0.25 * vcvtps2ph $0, %ymm0, (%rax) + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: - - - - - - - - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - - - - - - - - - - - vcvtph2ps %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vcvtph2ps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vcvtph2ps %xmm0, %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vcvtph2ps (%rax), %ymm2 +# CHECK-NEXT: - - - - - - - - - - - - - vcvtps2ph $0, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vcvtps2ph $0, %xmm0, (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - vcvtps2ph $0, %ymm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - vcvtps2ph $0, %ymm0, (%rax) Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-fma.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-fma.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-fma.s @@ -0,0 +1,706 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +vfmadd132pd %xmm0, %xmm1, %xmm2 +vfmadd132pd (%rax), %xmm1, %xmm2 + +vfmadd132pd %ymm0, %ymm1, %ymm2 +vfmadd132pd (%rax), %ymm1, %ymm2 + +vfmadd213pd %xmm0, %xmm1, %xmm2 +vfmadd213pd (%rax), %xmm1, %xmm2 + +vfmadd213pd %ymm0, %ymm1, %ymm2 +vfmadd213pd (%rax), %ymm1, %ymm2 + +vfmadd231pd %xmm0, %xmm1, %xmm2 +vfmadd231pd (%rax), %xmm1, %xmm2 + +vfmadd231pd %ymm0, %ymm1, %ymm2 +vfmadd231pd (%rax), %ymm1, %ymm2 + +vfmadd132ps %xmm0, %xmm1, %xmm2 +vfmadd132ps (%rax), %xmm1, %xmm2 + +vfmadd132ps %ymm0, %ymm1, %ymm2 +vfmadd132ps (%rax), %ymm1, %ymm2 + +vfmadd213ps %xmm0, %xmm1, %xmm2 +vfmadd213ps (%rax), %xmm1, %xmm2 + +vfmadd213ps %ymm0, %ymm1, %ymm2 +vfmadd213ps (%rax), %ymm1, %ymm2 + +vfmadd231ps %xmm0, %xmm1, %xmm2 +vfmadd231ps (%rax), %xmm1, %xmm2 + +vfmadd231ps %ymm0, %ymm1, %ymm2 +vfmadd231ps (%rax), %ymm1, %ymm2 + +vfmadd132sd %xmm0, %xmm1, %xmm2 +vfmadd132sd (%rax), %xmm1, %xmm2 + +vfmadd213sd %xmm0, %xmm1, %xmm2 +vfmadd213sd (%rax), %xmm1, %xmm2 + +vfmadd231sd %xmm0, %xmm1, %xmm2 +vfmadd231sd (%rax), %xmm1, %xmm2 + +vfmadd132ss %xmm0, %xmm1, %xmm2 +vfmadd132ss (%rax), %xmm1, %xmm2 + +vfmadd213ss %xmm0, %xmm1, %xmm2 +vfmadd213ss (%rax), %xmm1, %xmm2 + +vfmadd231ss %xmm0, %xmm1, %xmm2 +vfmadd231ss (%rax), %xmm1, %xmm2 + +vfmaddsub132pd %xmm0, %xmm1, %xmm2 +vfmaddsub132pd (%rax), %xmm1, %xmm2 + +vfmaddsub132pd %ymm0, %ymm1, %ymm2 +vfmaddsub132pd (%rax), %ymm1, %ymm2 + +vfmaddsub213pd %xmm0, %xmm1, %xmm2 +vfmaddsub213pd (%rax), %xmm1, %xmm2 + +vfmaddsub213pd %ymm0, %ymm1, %ymm2 +vfmaddsub213pd (%rax), %ymm1, %ymm2 + +vfmaddsub231pd %xmm0, %xmm1, %xmm2 +vfmaddsub231pd (%rax), %xmm1, %xmm2 + +vfmaddsub231pd %ymm0, %ymm1, %ymm2 +vfmaddsub231pd (%rax), %ymm1, %ymm2 + +vfmaddsub132ps %xmm0, %xmm1, %xmm2 +vfmaddsub132ps (%rax), %xmm1, %xmm2 + +vfmaddsub132ps %ymm0, %ymm1, %ymm2 +vfmaddsub132ps (%rax), %ymm1, %ymm2 + +vfmaddsub213ps %xmm0, %xmm1, %xmm2 +vfmaddsub213ps (%rax), %xmm1, %xmm2 + +vfmaddsub213ps %ymm0, %ymm1, %ymm2 +vfmaddsub213ps (%rax), %ymm1, %ymm2 + +vfmaddsub231ps %xmm0, %xmm1, %xmm2 +vfmaddsub231ps (%rax), %xmm1, %xmm2 + +vfmaddsub231ps %ymm0, %ymm1, %ymm2 +vfmaddsub231ps (%rax), %ymm1, %ymm2 + +vfmsub132pd %xmm0, %xmm1, %xmm2 +vfmsub132pd (%rax), %xmm1, %xmm2 + +vfmsub132pd %ymm0, %ymm1, %ymm2 +vfmsub132pd (%rax), %ymm1, %ymm2 + +vfmsub213pd %xmm0, %xmm1, %xmm2 +vfmsub213pd (%rax), %xmm1, %xmm2 + +vfmsub213pd %ymm0, %ymm1, %ymm2 +vfmsub213pd (%rax), %ymm1, %ymm2 + +vfmsub231pd %xmm0, %xmm1, %xmm2 +vfmsub231pd (%rax), %xmm1, %xmm2 + +vfmsub231pd %ymm0, %ymm1, %ymm2 +vfmsub231pd (%rax), %ymm1, %ymm2 + +vfmsub132ps %xmm0, %xmm1, %xmm2 +vfmsub132ps (%rax), %xmm1, %xmm2 + +vfmsub132ps %ymm0, %ymm1, %ymm2 +vfmsub132ps (%rax), %ymm1, %ymm2 + +vfmsub213ps %xmm0, %xmm1, %xmm2 +vfmsub213ps (%rax), %xmm1, %xmm2 + +vfmsub213ps %ymm0, %ymm1, %ymm2 +vfmsub213ps (%rax), %ymm1, %ymm2 + +vfmsub231ps %xmm0, %xmm1, %xmm2 +vfmsub231ps (%rax), %xmm1, %xmm2 + +vfmsub231ps %ymm0, %ymm1, %ymm2 +vfmsub231ps (%rax), %ymm1, %ymm2 + +vfmsub132sd %xmm0, %xmm1, %xmm2 +vfmsub132sd (%rax), %xmm1, %xmm2 + +vfmsub213sd %xmm0, %xmm1, %xmm2 +vfmsub213sd (%rax), %xmm1, %xmm2 + +vfmsub231sd %xmm0, %xmm1, %xmm2 +vfmsub231sd (%rax), %xmm1, %xmm2 + +vfmsub132ss %xmm0, %xmm1, %xmm2 +vfmsub132ss (%rax), %xmm1, %xmm2 + +vfmsub213ss %xmm0, %xmm1, %xmm2 +vfmsub213ss (%rax), %xmm1, %xmm2 + +vfmsub231ss %xmm0, %xmm1, %xmm2 +vfmsub231ss (%rax), %xmm1, %xmm2 + +vfmsubadd132pd %xmm0, %xmm1, %xmm2 +vfmsubadd132pd (%rax), %xmm1, %xmm2 + +vfmsubadd132pd %ymm0, %ymm1, %ymm2 +vfmsubadd132pd (%rax), %ymm1, %ymm2 + +vfmsubadd213pd %xmm0, %xmm1, %xmm2 +vfmsubadd213pd (%rax), %xmm1, %xmm2 + +vfmsubadd213pd %ymm0, %ymm1, %ymm2 +vfmsubadd213pd (%rax), %ymm1, %ymm2 + +vfmsubadd231pd %xmm0, %xmm1, %xmm2 +vfmsubadd231pd (%rax), %xmm1, %xmm2 + +vfmsubadd231pd %ymm0, %ymm1, %ymm2 +vfmsubadd231pd (%rax), %ymm1, %ymm2 + +vfmsubadd132ps %xmm0, %xmm1, %xmm2 +vfmsubadd132ps (%rax), %xmm1, %xmm2 + +vfmsubadd132ps %ymm0, %ymm1, %ymm2 +vfmsubadd132ps (%rax), %ymm1, %ymm2 + +vfmsubadd213ps %xmm0, %xmm1, %xmm2 +vfmsubadd213ps (%rax), %xmm1, %xmm2 + +vfmsubadd213ps %ymm0, %ymm1, %ymm2 +vfmsubadd213ps (%rax), %ymm1, %ymm2 + +vfmsubadd231ps %xmm0, %xmm1, %xmm2 +vfmsubadd231ps (%rax), %xmm1, %xmm2 + +vfmsubadd231ps %ymm0, %ymm1, %ymm2 +vfmsubadd231ps (%rax), %ymm1, %ymm2 + +vfnmadd132pd %xmm0, %xmm1, %xmm2 +vfnmadd132pd (%rax), %xmm1, %xmm2 + +vfnmadd132pd %ymm0, %ymm1, %ymm2 +vfnmadd132pd (%rax), %ymm1, %ymm2 + +vfnmadd213pd %xmm0, %xmm1, %xmm2 +vfnmadd213pd (%rax), %xmm1, %xmm2 + +vfnmadd213pd %ymm0, %ymm1, %ymm2 +vfnmadd213pd (%rax), %ymm1, %ymm2 + +vfnmadd231pd %xmm0, %xmm1, %xmm2 +vfnmadd231pd (%rax), %xmm1, %xmm2 + +vfnmadd231pd %ymm0, %ymm1, %ymm2 +vfnmadd231pd (%rax), %ymm1, %ymm2 + +vfnmadd132ps %xmm0, %xmm1, %xmm2 +vfnmadd132ps (%rax), %xmm1, %xmm2 + +vfnmadd132ps %ymm0, %ymm1, %ymm2 +vfnmadd132ps (%rax), %ymm1, %ymm2 + +vfnmadd213ps %xmm0, %xmm1, %xmm2 +vfnmadd213ps (%rax), %xmm1, %xmm2 + +vfnmadd213ps %ymm0, %ymm1, %ymm2 +vfnmadd213ps (%rax), %ymm1, %ymm2 + +vfnmadd231ps %xmm0, %xmm1, %xmm2 +vfnmadd231ps (%rax), %xmm1, %xmm2 + +vfnmadd231ps %ymm0, %ymm1, %ymm2 +vfnmadd231ps (%rax), %ymm1, %ymm2 + +vfnmadd132sd %xmm0, %xmm1, %xmm2 +vfnmadd132sd (%rax), %xmm1, %xmm2 + +vfnmadd213sd %xmm0, %xmm1, %xmm2 +vfnmadd213sd (%rax), %xmm1, %xmm2 + +vfnmadd231sd %xmm0, %xmm1, %xmm2 +vfnmadd231sd (%rax), %xmm1, %xmm2 + +vfnmadd132ss %xmm0, %xmm1, %xmm2 +vfnmadd132ss (%rax), %xmm1, %xmm2 + +vfnmadd213ss %xmm0, %xmm1, %xmm2 +vfnmadd213ss (%rax), %xmm1, %xmm2 + +vfnmadd231ss %xmm0, %xmm1, %xmm2 +vfnmadd231ss (%rax), %xmm1, %xmm2 + +vfnmsub132pd %xmm0, %xmm1, %xmm2 +vfnmsub132pd (%rax), %xmm1, %xmm2 + +vfnmsub132pd %ymm0, %ymm1, %ymm2 +vfnmsub132pd (%rax), %ymm1, %ymm2 + +vfnmsub213pd %xmm0, %xmm1, %xmm2 +vfnmsub213pd (%rax), %xmm1, %xmm2 + +vfnmsub213pd %ymm0, %ymm1, %ymm2 +vfnmsub213pd (%rax), %ymm1, %ymm2 + +vfnmsub231pd %xmm0, %xmm1, %xmm2 +vfnmsub231pd (%rax), %xmm1, %xmm2 + +vfnmsub231pd %ymm0, %ymm1, %ymm2 +vfnmsub231pd (%rax), %ymm1, %ymm2 + +vfnmsub132ps %xmm0, %xmm1, %xmm2 +vfnmsub132ps (%rax), %xmm1, %xmm2 + +vfnmsub132ps %ymm0, %ymm1, %ymm2 +vfnmsub132ps (%rax), %ymm1, %ymm2 + +vfnmsub213ps %xmm0, %xmm1, %xmm2 +vfnmsub213ps (%rax), %xmm1, %xmm2 + +vfnmsub213ps %ymm0, %ymm1, %ymm2 +vfnmsub213ps (%rax), %ymm1, %ymm2 + +vfnmsub231ps %xmm0, %xmm1, %xmm2 +vfnmsub231ps (%rax), %xmm1, %xmm2 + +vfnmsub231ps %ymm0, %ymm1, %ymm2 +vfnmsub231ps (%rax), %ymm1, %ymm2 + +vfnmsub132sd %xmm0, %xmm1, %xmm2 +vfnmsub132sd (%rax), %xmm1, %xmm2 + +vfnmsub213sd %xmm0, %xmm1, %xmm2 +vfnmsub213sd (%rax), %xmm1, %xmm2 + +vfnmsub231sd %xmm0, %xmm1, %xmm2 +vfnmsub231sd (%rax), %xmm1, %xmm2 + +vfnmsub132ss %xmm0, %xmm1, %xmm2 +vfnmsub132ss (%rax), %xmm1, %xmm2 + +vfnmsub213ss %xmm0, %xmm1, %xmm2 +vfnmsub213ss (%rax), %xmm1, %xmm2 + +vfnmsub231ss %xmm0, %xmm1, %xmm2 +vfnmsub231ss (%rax), %xmm1, %xmm2 + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 5 0.50 vfmadd132pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmadd132pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmadd132pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfmadd132pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfmadd213pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmadd213pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmadd213pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfmadd213pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfmadd231pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmadd231pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmadd231pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfmadd231pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfmadd132ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmadd132ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmadd132ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfmadd132ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfmadd213ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmadd213ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmadd213ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfmadd213ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfmadd231ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmadd231ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmadd231ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfmadd231ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfmadd132sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmadd132sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmadd213sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmadd213sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmadd231sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmadd231sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmadd132ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmadd132ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmadd213ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmadd213ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmadd231ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmadd231ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmaddsub132pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmaddsub132pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmaddsub132pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfmaddsub132pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfmaddsub213pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmaddsub213pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmaddsub213pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfmaddsub213pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfmaddsub231pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmaddsub231pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmaddsub231pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfmaddsub231pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfmaddsub132ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmaddsub132ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmaddsub132ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfmaddsub132ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfmaddsub213ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmaddsub213ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmaddsub213ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfmaddsub213ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfmaddsub231ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmaddsub231ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmaddsub231ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfmaddsub231ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfmsub132pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmsub132pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmsub132pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfmsub132pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfmsub213pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmsub213pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmsub213pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfmsub213pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfmsub231pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmsub231pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmsub231pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfmsub231pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfmsub132ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmsub132ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmsub132ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfmsub132ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfmsub213ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmsub213ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmsub213ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfmsub213ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfmsub231ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmsub231ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmsub231ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfmsub231ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfmsub132sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmsub132sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmsub213sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmsub213sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmsub231sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmsub231sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmsub132ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmsub132ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmsub213ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmsub213ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmsub231ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmsub231ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmsubadd132pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmsubadd132pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmsubadd132pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfmsubadd132pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfmsubadd213pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmsubadd213pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmsubadd213pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfmsubadd213pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfmsubadd231pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmsubadd231pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmsubadd231pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfmsubadd231pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfmsubadd132ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmsubadd132ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmsubadd132ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfmsubadd132ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfmsubadd213ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmsubadd213ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmsubadd213ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfmsubadd213ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfmsubadd231ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfmsubadd231ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfmsubadd231ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfmsubadd231ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfnmadd132pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfnmadd132pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfnmadd132pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfnmadd132pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfnmadd213pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfnmadd213pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfnmadd213pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfnmadd213pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfnmadd231pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfnmadd231pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfnmadd231pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfnmadd231pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfnmadd132ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfnmadd132ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfnmadd132ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfnmadd132ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfnmadd213ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfnmadd213ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfnmadd213ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfnmadd213ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfnmadd231ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfnmadd231ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfnmadd231ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfnmadd231ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfnmadd132sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfnmadd132sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfnmadd213sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfnmadd213sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfnmadd231sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfnmadd231sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfnmadd132ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfnmadd132ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfnmadd213ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfnmadd213ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfnmadd231ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfnmadd231ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfnmsub132pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfnmsub132pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfnmsub132pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfnmsub132pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfnmsub213pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfnmsub213pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfnmsub213pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfnmsub213pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfnmsub231pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfnmsub231pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfnmsub231pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfnmsub231pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfnmsub132ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfnmsub132ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfnmsub132ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfnmsub132ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfnmsub213ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfnmsub213ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfnmsub213ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfnmsub213ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfnmsub231ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfnmsub231ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfnmsub231ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 1 12 0.50 * vfnmsub231ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: 1 5 0.50 vfnmsub132sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfnmsub132sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfnmsub213sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfnmsub213sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfnmsub231sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfnmsub231sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfnmsub132ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfnmsub132ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfnmsub213ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfnmsub213ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: 1 5 0.50 vfnmsub231ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 1 12 0.50 * vfnmsub231ss (%rax), %xmm1, %xmm2 + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: 32.00 32.00 32.00 - - - - - 96.00 - - 96.00 - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmadd132pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmadd132pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmadd132pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmadd132pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmadd213pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmadd213pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmadd213pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmadd213pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmadd231pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmadd231pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmadd231pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmadd231pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmadd132ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmadd132ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmadd132ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmadd132ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmadd213ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmadd213ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmadd213ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmadd213ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmadd231ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmadd231ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmadd231ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmadd231ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmadd132sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmadd132sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmadd213sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmadd213sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmadd231sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmadd231sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmadd132ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmadd132ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmadd213ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmadd213ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmadd231ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmadd231ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmaddsub132pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmaddsub132pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmaddsub132pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmaddsub132pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmaddsub213pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmaddsub213pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmaddsub213pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmaddsub213pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmaddsub231pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmaddsub231pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmaddsub231pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmaddsub231pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmaddsub132ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmaddsub132ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmaddsub132ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmaddsub132ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmaddsub213ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmaddsub213ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmaddsub213ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmaddsub213ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmaddsub231ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmaddsub231ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmaddsub231ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmaddsub231ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsub132pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsub132pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsub132pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsub132pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsub213pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsub213pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsub213pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsub213pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsub231pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsub231pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsub231pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsub231pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsub132ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsub132ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsub132ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsub132ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsub213ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsub213ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsub213ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsub213ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsub231ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsub231ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsub231ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsub231ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsub132sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsub132sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsub213sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsub213sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsub231sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsub231sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsub132ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsub132ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsub213ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsub213ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsub231ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsub231ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsubadd132pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsubadd132pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsubadd132pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsubadd132pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsubadd213pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsubadd213pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsubadd213pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsubadd213pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsubadd231pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsubadd231pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsubadd231pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsubadd231pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsubadd132ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsubadd132ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsubadd132ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsubadd132ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsubadd213ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsubadd213ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsubadd213ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsubadd213ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsubadd231ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsubadd231ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfmsubadd231ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfmsubadd231ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmadd132pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmadd132pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmadd132pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmadd132pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmadd213pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmadd213pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmadd213pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmadd213pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmadd231pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmadd231pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmadd231pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmadd231pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmadd132ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmadd132ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmadd132ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmadd132ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmadd213ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmadd213ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmadd213ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmadd213ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmadd231ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmadd231ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmadd231ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmadd231ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmadd132sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmadd132sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmadd213sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmadd213sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmadd231sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmadd231sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmadd132ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmadd132ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmadd213ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmadd213ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmadd231ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmadd231ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmsub132pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmsub132pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmsub132pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmsub132pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmsub213pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmsub213pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmsub213pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmsub213pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmsub231pd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmsub231pd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmsub231pd %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmsub231pd (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmsub132ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmsub132ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmsub132ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmsub132ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmsub213ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmsub213ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmsub213ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmsub213ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmsub231ps %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmsub231ps (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmsub231ps %ymm0, %ymm1, %ymm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmsub231ps (%rax), %ymm1, %ymm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmsub132sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmsub132sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmsub213sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmsub213sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmsub231sd %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmsub231sd (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmsub132ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmsub132ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmsub213ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmsub213ss (%rax), %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - vfnmsub231ss %xmm0, %xmm1, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - vfnmsub231ss (%rax), %xmm1, %xmm2 Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-fsgsbase.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-fsgsbase.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-fsgsbase.s @@ -0,0 +1,62 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +rdfsbase %eax +rdfsbase %rax + +rdgsbase %eax +rdgsbase %rax + +wrfsbase %edi +wrfsbase %rdi + +wrgsbase %edi +wrgsbase %rdi + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.25 * * U rdfsbasel %eax +# CHECK-NEXT: 1 100 0.25 * * U rdfsbaseq %rax +# CHECK-NEXT: 1 100 0.25 * * U rdgsbasel %eax +# CHECK-NEXT: 1 100 0.25 * * U rdgsbaseq %rax +# CHECK-NEXT: 1 100 0.25 * * U wrfsbasel %edi +# CHECK-NEXT: 1 100 0.25 * * U wrfsbaseq %rdi +# CHECK-NEXT: 1 100 0.25 * * U wrgsbasel %edi +# CHECK-NEXT: 1 100 0.25 * * U wrgsbaseq %rdi + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: - - - - - - - - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - - - - - - - - - - - rdfsbasel %eax +# CHECK-NEXT: - - - - - - - - - - - - - rdfsbaseq %rax +# CHECK-NEXT: - - - - - - - - - - - - - rdgsbasel %eax +# CHECK-NEXT: - - - - - - - - - - - - - rdgsbaseq %rax +# CHECK-NEXT: - - - - - - - - - - - - - wrfsbasel %edi +# CHECK-NEXT: - - - - - - - - - - - - - wrfsbaseq %rdi +# CHECK-NEXT: - - - - - - - - - - - - - wrgsbasel %edi +# CHECK-NEXT: - - - - - - - - - - - - - wrgsbaseq %rdi Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-lea.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-lea.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-lea.s @@ -0,0 +1,442 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +lea 0(), %cx +lea 0(), %ecx +lea 0(), %rcx +lea (%eax), %cx +lea (%eax), %ecx +lea (%eax), %rcx +lea (%rax), %cx +lea (%rax), %ecx +lea (%rax), %rcx +lea (, %ebx), %cx +lea (, %ebx), %ecx +lea (, %ebx), %rcx +lea (, %rbx), %cx +lea (, %rbx), %ecx +lea (, %rbx), %rcx +lea (, %ebx, 1), %cx +lea (, %ebx, 1), %ecx +lea (, %ebx, 1), %rcx +lea (, %rbx, 1), %cx +lea (, %rbx, 1), %ecx +lea (, %rbx, 1), %rcx +lea (, %ebx, 2), %cx +lea (, %ebx, 2), %ecx +lea (, %ebx, 2), %rcx +lea (, %rbx, 2), %cx +lea (, %rbx, 2), %ecx +lea (, %rbx, 2), %rcx +lea (%eax, %ebx), %cx +lea (%eax, %ebx), %ecx +lea (%eax, %ebx), %rcx +lea (%rax, %rbx), %cx +lea (%rax, %rbx), %ecx +lea (%rax, %rbx), %rcx +lea (%eax, %ebx, 1), %cx +lea (%eax, %ebx, 1), %ecx +lea (%eax, %ebx, 1), %rcx +lea (%rax, %rbx, 1), %cx +lea (%rax, %rbx, 1), %ecx +lea (%rax, %rbx, 1), %rcx +lea (%eax, %ebx, 2), %cx +lea (%eax, %ebx, 2), %ecx +lea (%eax, %ebx, 2), %rcx +lea (%rax, %rbx, 2), %cx +lea (%rax, %rbx, 2), %ecx +lea (%rax, %rbx, 2), %rcx + +lea -16(), %cx +lea -16(), %ecx +lea -16(), %rcx +lea -16(%eax), %cx +lea -16(%eax), %ecx +lea -16(%eax), %rcx +lea -16(%rax), %cx +lea -16(%rax), %ecx +lea -16(%rax), %rcx +lea -16(, %ebx), %cx +lea -16(, %ebx), %ecx +lea -16(, %ebx), %rcx +lea -16(, %rbx), %cx +lea -16(, %rbx), %ecx +lea -16(, %rbx), %rcx +lea -16(, %ebx, 1), %cx +lea -16(, %ebx, 1), %ecx +lea -16(, %ebx, 1), %rcx +lea -16(, %rbx, 1), %cx +lea -16(, %rbx, 1), %ecx +lea -16(, %rbx, 1), %rcx +lea -16(, %ebx, 2), %cx +lea -16(, %ebx, 2), %ecx +lea -16(, %ebx, 2), %rcx +lea -16(, %rbx, 2), %cx +lea -16(, %rbx, 2), %ecx +lea -16(, %rbx, 2), %rcx +lea -16(%eax, %ebx), %cx +lea -16(%eax, %ebx), %ecx +lea -16(%eax, %ebx), %rcx +lea -16(%rax, %rbx), %cx +lea -16(%rax, %rbx), %ecx +lea -16(%rax, %rbx), %rcx +lea -16(%eax, %ebx, 1), %cx +lea -16(%eax, %ebx, 1), %ecx +lea -16(%eax, %ebx, 1), %rcx +lea -16(%rax, %rbx, 1), %cx +lea -16(%rax, %rbx, 1), %ecx +lea -16(%rax, %rbx, 1), %rcx +lea -16(%eax, %ebx, 2), %cx +lea -16(%eax, %ebx, 2), %ecx +lea -16(%eax, %ebx, 2), %rcx +lea -16(%rax, %rbx, 2), %cx +lea -16(%rax, %rbx, 2), %ecx +lea -16(%rax, %rbx, 2), %rcx + +lea 1024(), %cx +lea 1024(), %ecx +lea 1024(), %rcx +lea 1024(%eax), %cx +lea 1024(%eax), %ecx +lea 1024(%eax), %rcx +lea 1024(%rax), %cx +lea 1024(%rax), %ecx +lea 1024(%rax), %rcx +lea 1024(, %ebx), %cx +lea 1024(, %ebx), %ecx +lea 1024(, %ebx), %rcx +lea 1024(, %rbx), %cx +lea 1024(, %rbx), %ecx +lea 1024(, %rbx), %rcx +lea 1024(, %ebx, 1), %cx +lea 1024(, %ebx, 1), %ecx +lea 1024(, %ebx, 1), %rcx +lea 1024(, %rbx, 1), %cx +lea 1024(, %rbx, 1), %ecx +lea 1024(, %rbx, 1), %rcx +lea 1024(, %ebx, 2), %cx +lea 1024(, %ebx, 2), %ecx +lea 1024(, %ebx, 2), %rcx +lea 1024(, %rbx, 2), %cx +lea 1024(, %rbx, 2), %ecx +lea 1024(, %rbx, 2), %rcx +lea 1024(%eax, %ebx), %cx +lea 1024(%eax, %ebx), %ecx +lea 1024(%eax, %ebx), %rcx +lea 1024(%rax, %rbx), %cx +lea 1024(%rax, %rbx), %ecx +lea 1024(%rax, %rbx), %rcx +lea 1024(%eax, %ebx, 1), %cx +lea 1024(%eax, %ebx, 1), %ecx +lea 1024(%eax, %ebx, 1), %rcx +lea 1024(%rax, %rbx, 1), %cx +lea 1024(%rax, %rbx, 1), %ecx +lea 1024(%rax, %rbx, 1), %rcx +lea 1024(%eax, %ebx, 2), %cx +lea 1024(%eax, %ebx, 2), %ecx +lea 1024(%eax, %ebx, 2), %rcx +lea 1024(%rax, %rbx, 2), %cx +lea 1024(%rax, %rbx, 2), %ecx +lea 1024(%rax, %rbx, 2), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.25 leaw 0, %cx +# CHECK-NEXT: 1 1 0.25 leal 0, %ecx +# CHECK-NEXT: 1 1 0.25 leaq 0, %rcx +# CHECK-NEXT: 1 1 0.25 leaw (%eax), %cx +# CHECK-NEXT: 1 1 0.25 leal (%eax), %ecx +# CHECK-NEXT: 1 1 0.25 leaq (%eax), %rcx +# CHECK-NEXT: 1 1 0.25 leaw (%rax), %cx +# CHECK-NEXT: 1 1 0.25 leal (%rax), %ecx +# CHECK-NEXT: 1 1 0.25 leaq (%rax), %rcx +# CHECK-NEXT: 1 1 0.25 leaw (,%ebx), %cx +# CHECK-NEXT: 1 1 0.25 leal (,%ebx), %ecx +# CHECK-NEXT: 1 1 0.25 leaq (,%ebx), %rcx +# CHECK-NEXT: 1 1 0.25 leaw (,%rbx), %cx +# CHECK-NEXT: 1 1 0.25 leal (,%rbx), %ecx +# CHECK-NEXT: 1 1 0.25 leaq (,%rbx), %rcx +# CHECK-NEXT: 1 1 0.25 leaw (,%ebx), %cx +# CHECK-NEXT: 1 1 0.25 leal (,%ebx), %ecx +# CHECK-NEXT: 1 1 0.25 leaq (,%ebx), %rcx +# CHECK-NEXT: 1 1 0.25 leaw (,%rbx), %cx +# CHECK-NEXT: 1 1 0.25 leal (,%rbx), %ecx +# CHECK-NEXT: 1 1 0.25 leaq (,%rbx), %rcx +# CHECK-NEXT: 1 1 0.25 leaw (,%ebx,2), %cx +# CHECK-NEXT: 1 1 0.25 leal (,%ebx,2), %ecx +# CHECK-NEXT: 1 1 0.25 leaq (,%ebx,2), %rcx +# CHECK-NEXT: 1 1 0.25 leaw (,%rbx,2), %cx +# CHECK-NEXT: 1 1 0.25 leal (,%rbx,2), %ecx +# CHECK-NEXT: 1 1 0.25 leaq (,%rbx,2), %rcx +# CHECK-NEXT: 1 1 0.25 leaw (%eax,%ebx), %cx +# CHECK-NEXT: 1 1 0.25 leal (%eax,%ebx), %ecx +# CHECK-NEXT: 1 1 0.25 leaq (%eax,%ebx), %rcx +# CHECK-NEXT: 1 1 0.25 leaw (%rax,%rbx), %cx +# CHECK-NEXT: 1 1 0.25 leal (%rax,%rbx), %ecx +# CHECK-NEXT: 1 1 0.25 leaq (%rax,%rbx), %rcx +# CHECK-NEXT: 1 1 0.25 leaw (%eax,%ebx), %cx +# CHECK-NEXT: 1 1 0.25 leal (%eax,%ebx), %ecx +# CHECK-NEXT: 1 1 0.25 leaq (%eax,%ebx), %rcx +# CHECK-NEXT: 1 1 0.25 leaw (%rax,%rbx), %cx +# CHECK-NEXT: 1 1 0.25 leal (%rax,%rbx), %ecx +# CHECK-NEXT: 1 1 0.25 leaq (%rax,%rbx), %rcx +# CHECK-NEXT: 1 1 0.25 leaw (%eax,%ebx,2), %cx +# CHECK-NEXT: 1 1 0.25 leal (%eax,%ebx,2), %ecx +# CHECK-NEXT: 1 1 0.25 leaq (%eax,%ebx,2), %rcx +# CHECK-NEXT: 1 1 0.25 leaw (%rax,%rbx,2), %cx +# CHECK-NEXT: 1 1 0.25 leal (%rax,%rbx,2), %ecx +# CHECK-NEXT: 1 1 0.25 leaq (%rax,%rbx,2), %rcx +# CHECK-NEXT: 1 1 0.25 leaw -16, %cx +# CHECK-NEXT: 1 1 0.25 leal -16, %ecx +# CHECK-NEXT: 1 1 0.25 leaq -16, %rcx +# CHECK-NEXT: 1 1 0.25 leaw -16(%eax), %cx +# CHECK-NEXT: 1 1 0.25 leal -16(%eax), %ecx +# CHECK-NEXT: 1 1 0.25 leaq -16(%eax), %rcx +# CHECK-NEXT: 1 1 0.25 leaw -16(%rax), %cx +# CHECK-NEXT: 1 1 0.25 leal -16(%rax), %ecx +# CHECK-NEXT: 1 1 0.25 leaq -16(%rax), %rcx +# CHECK-NEXT: 1 1 0.25 leaw -16(,%ebx), %cx +# CHECK-NEXT: 1 1 0.25 leal -16(,%ebx), %ecx +# CHECK-NEXT: 1 1 0.25 leaq -16(,%ebx), %rcx +# CHECK-NEXT: 1 1 0.25 leaw -16(,%rbx), %cx +# CHECK-NEXT: 1 1 0.25 leal -16(,%rbx), %ecx +# CHECK-NEXT: 1 1 0.25 leaq -16(,%rbx), %rcx +# CHECK-NEXT: 1 1 0.25 leaw -16(,%ebx), %cx +# CHECK-NEXT: 1 1 0.25 leal -16(,%ebx), %ecx +# CHECK-NEXT: 1 1 0.25 leaq -16(,%ebx), %rcx +# CHECK-NEXT: 1 1 0.25 leaw -16(,%rbx), %cx +# CHECK-NEXT: 1 1 0.25 leal -16(,%rbx), %ecx +# CHECK-NEXT: 1 1 0.25 leaq -16(,%rbx), %rcx +# CHECK-NEXT: 1 1 0.25 leaw -16(,%ebx,2), %cx +# CHECK-NEXT: 1 1 0.25 leal -16(,%ebx,2), %ecx +# CHECK-NEXT: 1 1 0.25 leaq -16(,%ebx,2), %rcx +# CHECK-NEXT: 1 1 0.25 leaw -16(,%rbx,2), %cx +# CHECK-NEXT: 1 1 0.25 leal -16(,%rbx,2), %ecx +# CHECK-NEXT: 1 1 0.25 leaq -16(,%rbx,2), %rcx +# CHECK-NEXT: 1 1 0.25 leaw -16(%eax,%ebx), %cx +# CHECK-NEXT: 1 1 0.25 leal -16(%eax,%ebx), %ecx +# CHECK-NEXT: 1 1 0.25 leaq -16(%eax,%ebx), %rcx +# CHECK-NEXT: 1 1 0.25 leaw -16(%rax,%rbx), %cx +# CHECK-NEXT: 1 1 0.25 leal -16(%rax,%rbx), %ecx +# CHECK-NEXT: 1 1 0.25 leaq -16(%rax,%rbx), %rcx +# CHECK-NEXT: 1 1 0.25 leaw -16(%eax,%ebx), %cx +# CHECK-NEXT: 1 1 0.25 leal -16(%eax,%ebx), %ecx +# CHECK-NEXT: 1 1 0.25 leaq -16(%eax,%ebx), %rcx +# CHECK-NEXT: 1 1 0.25 leaw -16(%rax,%rbx), %cx +# CHECK-NEXT: 1 1 0.25 leal -16(%rax,%rbx), %ecx +# CHECK-NEXT: 1 1 0.25 leaq -16(%rax,%rbx), %rcx +# CHECK-NEXT: 1 1 0.25 leaw -16(%eax,%ebx,2), %cx +# CHECK-NEXT: 1 1 0.25 leal -16(%eax,%ebx,2), %ecx +# CHECK-NEXT: 1 1 0.25 leaq -16(%eax,%ebx,2), %rcx +# CHECK-NEXT: 1 1 0.25 leaw -16(%rax,%rbx,2), %cx +# CHECK-NEXT: 1 1 0.25 leal -16(%rax,%rbx,2), %ecx +# CHECK-NEXT: 1 1 0.25 leaq -16(%rax,%rbx,2), %rcx +# CHECK-NEXT: 1 1 0.25 leaw 1024, %cx +# CHECK-NEXT: 1 1 0.25 leal 1024, %ecx +# CHECK-NEXT: 1 1 0.25 leaq 1024, %rcx +# CHECK-NEXT: 1 1 0.25 leaw 1024(%eax), %cx +# CHECK-NEXT: 1 1 0.25 leal 1024(%eax), %ecx +# CHECK-NEXT: 1 1 0.25 leaq 1024(%eax), %rcx +# CHECK-NEXT: 1 1 0.25 leaw 1024(%rax), %cx +# CHECK-NEXT: 1 1 0.25 leal 1024(%rax), %ecx +# CHECK-NEXT: 1 1 0.25 leaq 1024(%rax), %rcx +# CHECK-NEXT: 1 1 0.25 leaw 1024(,%ebx), %cx +# CHECK-NEXT: 1 1 0.25 leal 1024(,%ebx), %ecx +# CHECK-NEXT: 1 1 0.25 leaq 1024(,%ebx), %rcx +# CHECK-NEXT: 1 1 0.25 leaw 1024(,%rbx), %cx +# CHECK-NEXT: 1 1 0.25 leal 1024(,%rbx), %ecx +# CHECK-NEXT: 1 1 0.25 leaq 1024(,%rbx), %rcx +# CHECK-NEXT: 1 1 0.25 leaw 1024(,%ebx), %cx +# CHECK-NEXT: 1 1 0.25 leal 1024(,%ebx), %ecx +# CHECK-NEXT: 1 1 0.25 leaq 1024(,%ebx), %rcx +# CHECK-NEXT: 1 1 0.25 leaw 1024(,%rbx), %cx +# CHECK-NEXT: 1 1 0.25 leal 1024(,%rbx), %ecx +# CHECK-NEXT: 1 1 0.25 leaq 1024(,%rbx), %rcx +# CHECK-NEXT: 1 1 0.25 leaw 1024(,%ebx,2), %cx +# CHECK-NEXT: 1 1 0.25 leal 1024(,%ebx,2), %ecx +# CHECK-NEXT: 1 1 0.25 leaq 1024(,%ebx,2), %rcx +# CHECK-NEXT: 1 1 0.25 leaw 1024(,%rbx,2), %cx +# CHECK-NEXT: 1 1 0.25 leal 1024(,%rbx,2), %ecx +# CHECK-NEXT: 1 1 0.25 leaq 1024(,%rbx,2), %rcx +# CHECK-NEXT: 1 1 0.25 leaw 1024(%eax,%ebx), %cx +# CHECK-NEXT: 1 1 0.25 leal 1024(%eax,%ebx), %ecx +# CHECK-NEXT: 1 1 0.25 leaq 1024(%eax,%ebx), %rcx +# CHECK-NEXT: 1 1 0.25 leaw 1024(%rax,%rbx), %cx +# CHECK-NEXT: 1 1 0.25 leal 1024(%rax,%rbx), %ecx +# CHECK-NEXT: 1 1 0.25 leaq 1024(%rax,%rbx), %rcx +# CHECK-NEXT: 1 1 0.25 leaw 1024(%eax,%ebx), %cx +# CHECK-NEXT: 1 1 0.25 leal 1024(%eax,%ebx), %ecx +# CHECK-NEXT: 1 1 0.25 leaq 1024(%eax,%ebx), %rcx +# CHECK-NEXT: 1 1 0.25 leaw 1024(%rax,%rbx), %cx +# CHECK-NEXT: 1 1 0.25 leal 1024(%rax,%rbx), %ecx +# CHECK-NEXT: 1 1 0.25 leaq 1024(%rax,%rbx), %rcx +# CHECK-NEXT: 1 1 0.25 leaw 1024(%eax,%ebx,2), %cx +# CHECK-NEXT: 1 1 0.25 leal 1024(%eax,%ebx,2), %ecx +# CHECK-NEXT: 1 1 0.25 leaq 1024(%eax,%ebx,2), %rcx +# CHECK-NEXT: 1 1 0.25 leaw 1024(%rax,%rbx,2), %cx +# CHECK-NEXT: 1 1 0.25 leal 1024(%rax,%rbx,2), %ecx +# CHECK-NEXT: 1 1 0.25 leaq 1024(%rax,%rbx,2), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: - - - 33.75 33.75 33.75 33.75 - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw 0, %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal 0, %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq 0, %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw (%eax), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal (%eax), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq (%eax), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw (%rax), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal (%rax), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq (%rax), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw (,%ebx), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal (,%ebx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq (,%ebx), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw (,%rbx), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal (,%rbx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq (,%rbx), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw (,%ebx), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal (,%ebx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq (,%ebx), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw (,%rbx), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal (,%rbx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq (,%rbx), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw (,%ebx,2), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal (,%ebx,2), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq (,%ebx,2), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw (,%rbx,2), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal (,%rbx,2), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq (,%rbx,2), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw (%eax,%ebx), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal (%eax,%ebx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq (%eax,%ebx), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw (%rax,%rbx), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal (%rax,%rbx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq (%rax,%rbx), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw (%eax,%ebx), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal (%eax,%ebx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq (%eax,%ebx), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw (%rax,%rbx), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal (%rax,%rbx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq (%rax,%rbx), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw (%eax,%ebx,2), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal (%eax,%ebx,2), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq (%eax,%ebx,2), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw (%rax,%rbx,2), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal (%rax,%rbx,2), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq (%rax,%rbx,2), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw -16, %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal -16, %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq -16, %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw -16(%eax), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal -16(%eax), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq -16(%eax), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw -16(%rax), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal -16(%rax), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq -16(%rax), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw -16(,%ebx), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal -16(,%ebx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq -16(,%ebx), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw -16(,%rbx), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal -16(,%rbx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq -16(,%rbx), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw -16(,%ebx), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal -16(,%ebx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq -16(,%ebx), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw -16(,%rbx), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal -16(,%rbx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq -16(,%rbx), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw -16(,%ebx,2), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal -16(,%ebx,2), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq -16(,%ebx,2), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw -16(,%rbx,2), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal -16(,%rbx,2), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq -16(,%rbx,2), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw -16(%eax,%ebx), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal -16(%eax,%ebx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq -16(%eax,%ebx), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw -16(%rax,%rbx), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal -16(%rax,%rbx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq -16(%rax,%rbx), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw -16(%eax,%ebx), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal -16(%eax,%ebx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq -16(%eax,%ebx), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw -16(%rax,%rbx), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal -16(%rax,%rbx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq -16(%rax,%rbx), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw -16(%eax,%ebx,2), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal -16(%eax,%ebx,2), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq -16(%eax,%ebx,2), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw -16(%rax,%rbx,2), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal -16(%rax,%rbx,2), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq -16(%rax,%rbx,2), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw 1024, %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal 1024, %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq 1024, %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw 1024(%eax), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal 1024(%eax), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq 1024(%eax), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw 1024(%rax), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal 1024(%rax), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq 1024(%rax), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw 1024(,%ebx), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal 1024(,%ebx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq 1024(,%ebx), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw 1024(,%rbx), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal 1024(,%rbx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq 1024(,%rbx), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw 1024(,%ebx), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal 1024(,%ebx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq 1024(,%ebx), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw 1024(,%rbx), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal 1024(,%rbx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq 1024(,%rbx), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw 1024(,%ebx,2), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal 1024(,%ebx,2), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq 1024(,%ebx,2), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw 1024(,%rbx,2), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal 1024(,%rbx,2), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq 1024(,%rbx,2), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw 1024(%eax,%ebx), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal 1024(%eax,%ebx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq 1024(%eax,%ebx), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw 1024(%rax,%rbx), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal 1024(%rax,%rbx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq 1024(%rax,%rbx), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw 1024(%eax,%ebx), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal 1024(%eax,%ebx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq 1024(%eax,%ebx), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw 1024(%rax,%rbx), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal 1024(%rax,%rbx), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq 1024(%rax,%rbx), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw 1024(%eax,%ebx,2), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal 1024(%eax,%ebx,2), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq 1024(%eax,%ebx,2), %rcx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaw 1024(%rax,%rbx,2), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leal 1024(%rax,%rbx,2), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - leaq 1024(%rax,%rbx,2), %rcx Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-lzcnt.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-lzcnt.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-lzcnt.s @@ -0,0 +1,55 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +lzcntw %cx, %cx +lzcntw (%rax), %cx + +lzcntl %eax, %ecx +lzcntl (%rax), %ecx + +lzcntq %rax, %rcx +lzcntq (%rax), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.25 lzcntw %cx, %cx +# CHECK-NEXT: 2 5 0.33 * lzcntw (%rax), %cx +# CHECK-NEXT: 1 1 0.25 lzcntl %eax, %ecx +# CHECK-NEXT: 2 5 0.33 * lzcntl (%rax), %ecx +# CHECK-NEXT: 1 1 0.25 lzcntq %rax, %rcx +# CHECK-NEXT: 2 5 0.33 * lzcntq (%rax), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: 1.00 1.00 1.00 1.50 1.50 1.50 1.50 - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - lzcntw %cx, %cx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - lzcntw (%rax), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - lzcntl %eax, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - lzcntl (%rax), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - lzcntq %rax, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - lzcntq (%rax), %rcx Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-mmx.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-mmx.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-mmx.s @@ -0,0 +1,398 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +emms + +movd %eax, %mm2 +movd (%rax), %mm2 + +movd %mm0, %ecx +movd %mm0, (%rax) + +movq %rax, %mm2 +movq (%rax), %mm2 + +movq %mm0, %rcx +movq %mm0, (%rax) + +packsswb %mm0, %mm2 +packsswb (%rax), %mm2 + +packssdw %mm0, %mm2 +packssdw (%rax), %mm2 + +packuswb %mm0, %mm2 +packuswb (%rax), %mm2 + +paddb %mm0, %mm2 +paddb (%rax), %mm2 + +paddd %mm0, %mm2 +paddd (%rax), %mm2 + +paddsb %mm0, %mm2 +paddsb (%rax), %mm2 + +paddsw %mm0, %mm2 +paddsw (%rax), %mm2 + +paddusb %mm0, %mm2 +paddusb (%rax), %mm2 + +paddusw %mm0, %mm2 +paddusw (%rax), %mm2 + +paddw %mm0, %mm2 +paddw (%rax), %mm2 + +pand %mm0, %mm2 +pand (%rax), %mm2 + +pandn %mm0, %mm2 +pandn (%rax), %mm2 + +pcmpeqb %mm0, %mm2 +pcmpeqb (%rax), %mm2 + +pcmpeqd %mm0, %mm2 +pcmpeqd (%rax), %mm2 + +pcmpeqw %mm0, %mm2 +pcmpeqw (%rax), %mm2 + +pcmpgtb %mm0, %mm2 +pcmpgtb (%rax), %mm2 + +pcmpgtd %mm0, %mm2 +pcmpgtd (%rax), %mm2 + +pcmpgtw %mm0, %mm2 +pcmpgtw (%rax), %mm2 + +pmaddwd %mm0, %mm2 +pmaddwd (%rax), %mm2 + +pmulhw %mm0, %mm2 +pmulhw (%rax), %mm2 + +pmullw %mm0, %mm2 +pmullw (%rax), %mm2 + +por %mm0, %mm2 +por (%rax), %mm2 + +pslld $1, %mm2 +pslld %mm0, %mm2 +pslld (%rax), %mm2 + +psllq $1, %mm2 +psllq %mm0, %mm2 +psllq (%rax), %mm2 + +psllw $1, %mm2 +psllw %mm0, %mm2 +psllw (%rax), %mm2 + +psrad $1, %mm2 +psrad %mm0, %mm2 +psrad (%rax), %mm2 + +psraw $1, %mm2 +psraw %mm0, %mm2 +psraw (%rax), %mm2 + +psrld $1, %mm2 +psrld %mm0, %mm2 +psrld (%rax), %mm2 + +psrlq $1, %mm2 +psrlq %mm0, %mm2 +psrlq (%rax), %mm2 + +psrlw $1, %mm2 +psrlw %mm0, %mm2 +psrlw (%rax), %mm2 + +psubb %mm0, %mm2 +psubb (%rax), %mm2 + +psubd %mm0, %mm2 +psubd (%rax), %mm2 + +psubsb %mm0, %mm2 +psubsb (%rax), %mm2 + +psubsw %mm0, %mm2 +psubsw (%rax), %mm2 + +psubusb %mm0, %mm2 +psubusb (%rax), %mm2 + +psubusw %mm0, %mm2 +psubusw (%rax), %mm2 + +psubw %mm0, %mm2 +psubw (%rax), %mm2 + +punpckhbw %mm0, %mm2 +punpckhbw (%rax), %mm2 + +punpckhdq %mm0, %mm2 +punpckhdq (%rax), %mm2 + +punpckhwd %mm0, %mm2 +punpckhwd (%rax), %mm2 + +punpcklbw %mm0, %mm2 +punpcklbw (%rax), %mm2 + +punpckldq %mm0, %mm2 +punpckldq (%rax), %mm2 + +punpcklwd %mm0, %mm2 +punpcklwd (%rax), %mm2 + +pxor %mm0, %mm2 +pxor (%rax), %mm2 + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 2 0.25 * * U emms +# CHECK-NEXT: 1 3 1.00 movd %eax, %mm2 +# CHECK-NEXT: 1 8 0.33 * movd (%rax), %mm2 +# CHECK-NEXT: 1 2 1.00 movd %mm0, %ecx +# CHECK-NEXT: 1 1 0.33 * U movd %mm0, (%rax) +# CHECK-NEXT: 1 3 1.00 movq %rax, %mm2 +# CHECK-NEXT: 1 8 0.33 * movq (%rax), %mm2 +# CHECK-NEXT: 1 2 1.00 movq %mm0, %rcx +# CHECK-NEXT: 1 1 0.33 * movq %mm0, (%rax) +# CHECK-NEXT: 1 1 0.50 packsswb %mm0, %mm2 +# CHECK-NEXT: 1 1 0.50 * packsswb (%rax), %mm2 +# CHECK-NEXT: 1 1 0.50 packssdw %mm0, %mm2 +# CHECK-NEXT: 1 1 0.50 * packssdw (%rax), %mm2 +# CHECK-NEXT: 1 1 0.50 packuswb %mm0, %mm2 +# CHECK-NEXT: 1 1 0.50 * packuswb (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 paddb %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * paddb (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 paddd %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * paddd (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 paddsb %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * paddsb (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 paddsw %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * paddsw (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 paddusb %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * paddusb (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 paddusw %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * paddusw (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 paddw %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * paddw (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 pand %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * pand (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 pandn %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * pandn (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 pcmpeqb %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * pcmpeqb (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 pcmpeqd %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * pcmpeqd (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 pcmpeqw %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * pcmpeqw (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 pcmpgtb %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * pcmpgtb (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 pcmpgtd %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * pcmpgtd (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 pcmpgtw %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * pcmpgtw (%rax), %mm2 +# CHECK-NEXT: 1 4 1.00 pmaddwd %mm0, %mm2 +# CHECK-NEXT: 1 11 1.00 * pmaddwd (%rax), %mm2 +# CHECK-NEXT: 1 4 1.00 pmulhw %mm0, %mm2 +# CHECK-NEXT: 1 11 1.00 * pmulhw (%rax), %mm2 +# CHECK-NEXT: 1 4 1.00 pmullw %mm0, %mm2 +# CHECK-NEXT: 1 11 1.00 * pmullw (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 por %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * por (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 pslld $1, %mm2 +# CHECK-NEXT: 1 1 0.25 pslld %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * pslld (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 psllq $1, %mm2 +# CHECK-NEXT: 1 1 0.25 psllq %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * psllq (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 psllw $1, %mm2 +# CHECK-NEXT: 1 1 0.25 psllw %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * psllw (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 psrad $1, %mm2 +# CHECK-NEXT: 1 1 0.25 psrad %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * psrad (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 psraw $1, %mm2 +# CHECK-NEXT: 1 1 0.25 psraw %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * psraw (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 psrld $1, %mm2 +# CHECK-NEXT: 1 1 0.25 psrld %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * psrld (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 psrlq $1, %mm2 +# CHECK-NEXT: 1 1 0.25 psrlq %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * psrlq (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 psrlw $1, %mm2 +# CHECK-NEXT: 1 1 0.25 psrlw %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * psrlw (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 psubb %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * psubb (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 psubd %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * psubd (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 psubsb %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * psubsb (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 psubsw %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * psubsw (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 psubusb %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * psubusb (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 psubusw %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * psubusw (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 psubw %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * psubw (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 punpckhbw %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * punpckhbw (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 punpckhdq %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * punpckhdq (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 punpckhwd %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * punpckhwd (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 punpcklbw %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * punpcklbw (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 punpckldq %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * punpckldq (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 punpcklwd %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * punpcklwd (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 pxor %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * pxor (%rax), %mm2 + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: 16.00 16.00 16.00 - - - - - 27.25 24.25 28.25 21.25 - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - emms +# CHECK-NEXT: - - - - - - - - - - 1.00 - - movd %eax, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movd (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - movd %mm0, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movd %mm0, (%rax) +# CHECK-NEXT: - - - - - - - - - - 1.00 - - movq %rax, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movq (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - movq %mm0, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movq %mm0, (%rax) +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - packsswb %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - packsswb (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - packssdw %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - packssdw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - packuswb %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - packuswb (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - paddb %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - paddb (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - paddd %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - paddd (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - paddsb %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - paddsb (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - paddsw %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - paddsw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - paddusb %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - paddusb (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - paddusw %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - paddusw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - paddw %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - paddw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pand %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pand (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pandn %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pandn (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pcmpeqb %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pcmpeqb (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pcmpeqd %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pcmpeqd (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pcmpeqw %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pcmpeqw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pcmpgtb %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pcmpgtb (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pcmpgtd %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pcmpgtd (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pcmpgtw %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pcmpgtw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - pmaddwd %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - pmaddwd (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - pmulhw %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - pmulhw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - pmullw %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - pmullw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - por %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - por (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pslld $1, %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pslld %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pslld (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psllq $1, %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psllq %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - psllq (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psllw $1, %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psllw %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - psllw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psrad $1, %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psrad %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - psrad (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psraw $1, %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psraw %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - psraw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psrld $1, %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psrld %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - psrld (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psrlq $1, %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psrlq %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - psrlq (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psrlw $1, %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psrlw %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - psrlw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psubb %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - psubb (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psubd %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - psubd (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psubsb %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - psubsb (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psubsw %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - psubsw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psubusb %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - psubusb (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psubusw %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - psubusw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psubw %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - psubw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - punpckhbw %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - punpckhbw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - punpckhdq %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - punpckhdq (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - punpckhwd %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - punpckhwd (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - punpcklbw %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - punpcklbw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - punpckldq %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - punpckldq (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - punpcklwd %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - punpcklwd (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pxor %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pxor (%rax), %mm2 Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-movbe.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-movbe.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-movbe.s @@ -0,0 +1,55 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +movbe %cx, (%rax) +movbe (%rax), %cx + +movbe %ecx, (%rax) +movbe (%rax), %ecx + +movbe %rcx, (%rax) +movbe (%rax), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 5 0.33 * movbew %cx, (%rax) +# CHECK-NEXT: 1 5 0.33 * movbew (%rax), %cx +# CHECK-NEXT: 1 5 0.33 * movbel %ecx, (%rax) +# CHECK-NEXT: 1 5 0.33 * movbel (%rax), %ecx +# CHECK-NEXT: 1 5 0.33 * movbeq %rcx, (%rax) +# CHECK-NEXT: 1 5 0.33 * movbeq (%rax), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: 2.00 2.00 2.00 1.50 1.50 1.50 1.50 - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - movbew %cx, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - movbew (%rax), %cx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - movbel %ecx, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - movbel (%rax), %ecx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - movbeq %rcx, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - movbeq (%rax), %rcx Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-mwaitx.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-mwaitx.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-mwaitx.s @@ -0,0 +1,41 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +monitorx +mwaitx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.25 U monitorx +# CHECK-NEXT: 1 100 0.25 * * U mwaitx + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: - - - - - - - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - - - - - - - - - - monitorx +# CHECK-NEXT: - - - - - - - - - - - - mwaitx Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-pclmul.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-pclmul.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-pclmul.s @@ -0,0 +1,41 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +pclmulqdq $11, %xmm0, %xmm2 +pclmulqdq $11, (%rax), %xmm2 + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.25 pclmulqdq $11, %xmm0, %xmm2 +# CHECK-NEXT: 1 100 0.25 * pclmulqdq $11, (%rax), %xmm2 + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: - - - - - - - - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - - - - - - - - - - - pclmulqdq $11, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - pclmulqdq $11, (%rax), %xmm2 Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-popcnt.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-popcnt.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-popcnt.s @@ -0,0 +1,55 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +popcntw %cx, %cx +popcntw (%rax), %cx + +popcntl %eax, %ecx +popcntl (%rax), %ecx + +popcntq %rax, %rcx +popcntq (%rax), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.25 popcntw %cx, %cx +# CHECK-NEXT: 2 5 0.33 * popcntw (%rax), %cx +# CHECK-NEXT: 1 1 0.25 popcntl %eax, %ecx +# CHECK-NEXT: 2 5 0.33 * popcntl (%rax), %ecx +# CHECK-NEXT: 1 1 0.25 popcntq %rax, %rcx +# CHECK-NEXT: 2 5 0.33 * popcntq (%rax), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: 1.00 1.00 1.00 1.50 1.50 1.50 1.50 - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - popcntw %cx, %cx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - popcntw (%rax), %cx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - popcntl %eax, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - popcntl (%rax), %ecx +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - popcntq %rax, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - popcntq (%rax), %rcx Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-prefetchw.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-prefetchw.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-prefetchw.s @@ -0,0 +1,41 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +prefetch (%rax) +prefetchw (%rax) + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 8 0.33 * * prefetch (%rax) +# CHECK-NEXT: 1 8 0.33 * * prefetchw (%rax) + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: 0.67 0.67 0.67 - - - - - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - prefetch (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - prefetchw (%rax) Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-rdrand.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-rdrand.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-rdrand.s @@ -0,0 +1,44 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +rdrand %ax +rdrand %eax +rdrand %rax + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.25 U rdrandw %ax +# CHECK-NEXT: 1 100 0.25 U rdrandl %eax +# CHECK-NEXT: 1 100 0.25 U rdrandq %rax + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: - - - - - - - - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - - - - - - - - - - - rdrandw %ax +# CHECK-NEXT: - - - - - - - - - - - - - rdrandl %eax +# CHECK-NEXT: - - - - - - - - - - - - - rdrandq %rax Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-rdseed.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-rdseed.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-rdseed.s @@ -0,0 +1,44 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +rdseed %ax +rdseed %eax +rdseed %rax + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.25 U rdseedw %ax +# CHECK-NEXT: 1 100 0.25 U rdseedl %eax +# CHECK-NEXT: 1 100 0.25 U rdseedq %rax + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: - - - - - - - - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - - - - - - - - - - - rdseedw %ax +# CHECK-NEXT: - - - - - - - - - - - - - rdseedl %eax +# CHECK-NEXT: - - - - - - - - - - - - - rdseedq %rax Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-sha.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-sha.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-sha.s @@ -0,0 +1,83 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +sha1msg1 %xmm0, %xmm2 +sha1msg1 (%rax), %xmm2 + +sha1msg2 %xmm0, %xmm2 +sha1msg2 (%rax), %xmm2 + +sha1nexte %xmm0, %xmm2 +sha1nexte (%rax), %xmm2 + +sha1rnds4 $3, %xmm0, %xmm2 +sha1rnds4 $3, (%rax), %xmm2 + +sha256msg1 %xmm0, %xmm2 +sha256msg1 (%rax), %xmm2 + +sha256msg2 %xmm0, %xmm2 +sha256msg2 (%rax), %xmm2 + +sha256rnds2 %xmm0, %xmm2 +sha256rnds2 (%rax), %xmm2 + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 2 0.50 sha1msg1 %xmm0, %xmm2 +# CHECK-NEXT: 1 9 0.50 * sha1msg1 (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.50 sha1msg2 %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.50 * sha1msg2 (%rax), %xmm2 +# CHECK-NEXT: 1 1 1.00 sha1nexte %xmm0, %xmm2 +# CHECK-NEXT: 1 8 1.00 * sha1nexte (%rax), %xmm2 +# CHECK-NEXT: 1 6 1.00 sha1rnds4 $3, %xmm0, %xmm2 +# CHECK-NEXT: 1 13 1.00 * sha1rnds4 $3, (%rax), %xmm2 +# CHECK-NEXT: 1 2 0.50 sha256msg1 %xmm0, %xmm2 +# CHECK-NEXT: 1 9 0.50 * sha256msg1 (%rax), %xmm2 +# CHECK-NEXT: 1 100 0.25 sha256msg2 %xmm0, %xmm2 +# CHECK-NEXT: 1 100 0.25 * sha256msg2 (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 sha256rnds2 %xmm0, %xmm0, %xmm2 +# CHECK-NEXT: 1 11 1.00 * sha256rnds2 %xmm0, (%rax), %xmm2 + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: 2.00 2.00 2.00 - - - - - - 9.00 3.00 - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - sha1msg1 %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - sha1msg1 (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - sha1msg2 %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - sha1msg2 (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - 1.00 - - - sha1nexte %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 1.00 - - - sha1nexte (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - 1.00 - - - sha1rnds4 $3, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 1.00 - - - sha1rnds4 $3, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - sha256msg1 %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - sha256msg1 (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - sha256msg2 %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - sha256msg2 (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - 1.00 - - - sha256rnds2 %xmm0, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 1.00 - - - sha256rnds2 %xmm0, (%rax), %xmm2 Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-sse1.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-sse1.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-sse1.s @@ -0,0 +1,466 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +addps %xmm0, %xmm2 +addps (%rax), %xmm2 + +addss %xmm0, %xmm2 +addss (%rax), %xmm2 + +andnps %xmm0, %xmm2 +andnps (%rax), %xmm2 + +andps %xmm0, %xmm2 +andps (%rax), %xmm2 + +cmpps $0, %xmm0, %xmm2 +cmpps $0, (%rax), %xmm2 + +cmpss $0, %xmm0, %xmm2 +cmpss $0, (%rax), %xmm2 + +comiss %xmm0, %xmm1 +comiss (%rax), %xmm1 + +cvtpi2ps %mm0, %xmm2 +cvtpi2ps (%rax), %xmm2 + +cvtps2pi %xmm0, %mm2 +cvtps2pi (%rax), %mm2 + +cvtsi2ss %ecx, %xmm2 +cvtsi2ss %rcx, %xmm2 +cvtsi2ss (%rax), %xmm2 +cvtsi2ss (%rax), %xmm2 + +cvtss2si %xmm0, %ecx +cvtss2si %xmm0, %rcx +cvtss2si (%rax), %ecx +cvtss2si (%rax), %rcx + +cvttps2pi %xmm0, %mm2 +cvttps2pi (%rax), %mm2 + +cvttss2si %xmm0, %ecx +cvttss2si %xmm0, %rcx +cvttss2si (%rax), %ecx +cvttss2si (%rax), %rcx + +divps %xmm0, %xmm2 +divps (%rax), %xmm2 + +divss %xmm0, %xmm2 +divss (%rax), %xmm2 + +ldmxcsr (%rax) + +maskmovq %mm0, %mm1 + +maxps %xmm0, %xmm2 +maxps (%rax), %xmm2 + +maxss %xmm0, %xmm2 +maxss (%rax), %xmm2 + +minps %xmm0, %xmm2 +minps (%rax), %xmm2 + +minss %xmm0, %xmm2 +minss (%rax), %xmm2 + +movaps %xmm0, %xmm2 +movaps %xmm0, (%rax) +movaps (%rax), %xmm2 + +movhlps %xmm0, %xmm2 +movlhps %xmm0, %xmm2 + +movhps %xmm0, (%rax) +movhps (%rax), %xmm2 + +movlps %xmm0, (%rax) +movlps (%rax), %xmm2 + +movmskps %xmm0, %rcx + +movntps %xmm0, (%rax) +movntq %mm0, (%rax) + +movss %xmm0, %xmm2 +movss %xmm0, (%rax) +movss (%rax), %xmm2 + +movups %xmm0, %xmm2 +movups %xmm0, (%rax) +movups (%rax), %xmm2 + +mulps %xmm0, %xmm2 +mulps (%rax), %xmm2 + +mulss %xmm0, %xmm2 +mulss (%rax), %xmm2 + +orps %xmm0, %xmm2 +orps (%rax), %xmm2 + +pavgb %mm0, %mm2 +pavgb (%rax), %mm2 + +pavgw %mm0, %mm2 +pavgw (%rax), %mm2 + +pextrw $1, %mm0, %rcx + +pinsrw $1, %rax, %mm2 +pinsrw $1, (%rax), %mm2 + +pmaxsw %mm0, %mm2 +pmaxsw (%rax), %mm2 + +pmaxub %mm0, %mm2 +pmaxub (%rax), %mm2 + +pminsw %mm0, %mm2 +pminsw (%rax), %mm2 + +pminub %mm0, %mm2 +pminub (%rax), %mm2 + +pmovmskb %mm0, %rcx + +pmulhuw %mm0, %mm2 +pmulhuw (%rax), %mm2 + +prefetcht0 (%rax) +prefetcht1 (%rax) +prefetcht2 (%rax) +prefetchnta (%rax) + +psadbw %mm0, %mm2 +psadbw (%rax), %mm2 + +pshufw $1, %mm0, %mm2 +pshufw $1, (%rax), %mm2 + +rcpps %xmm0, %xmm2 +rcpps (%rax), %xmm2 + +rcpss %xmm0, %xmm2 +rcpss (%rax), %xmm2 + +rsqrtps %xmm0, %xmm2 +rsqrtps (%rax), %xmm2 + +rsqrtss %xmm0, %xmm2 +rsqrtss (%rax), %xmm2 + +sfence + +shufps $1, %xmm0, %xmm2 +shufps $1, (%rax), %xmm2 + +sqrtps %xmm0, %xmm2 +sqrtps (%rax), %xmm2 + +sqrtss %xmm0, %xmm2 +sqrtss (%rax), %xmm2 + +stmxcsr (%rax) + +subps %xmm0, %xmm2 +subps (%rax), %xmm2 + +subss %xmm0, %xmm2 +subss (%rax), %xmm2 + +ucomiss %xmm0, %xmm1 +ucomiss (%rax), %xmm1 + +unpckhps %xmm0, %xmm2 +unpckhps (%rax), %xmm2 + +unpcklps %xmm0, %xmm2 +unpcklps (%rax), %xmm2 + +xorps %xmm0, %xmm2 +xorps (%rax), %xmm2 + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 3 1.00 addps %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * addps (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 addss %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * addss (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 andnps %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * andnps (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 andps %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * andps (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 cmpeqps %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * cmpeqps (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 cmpeqss %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * cmpeqss (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 comiss %xmm0, %xmm1 +# CHECK-NEXT: 1 10 1.00 * comiss (%rax), %xmm1 +# CHECK-NEXT: 1 5 1.00 cvtpi2ps %mm0, %xmm2 +# CHECK-NEXT: 1 12 1.00 * cvtpi2ps (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 cvtps2pi %xmm0, %mm2 +# CHECK-NEXT: 1 12 1.00 * cvtps2pi (%rax), %mm2 +# CHECK-NEXT: 1 5 1.00 cvtsi2ss %ecx, %xmm2 +# CHECK-NEXT: 1 5 1.00 cvtsi2ss %rcx, %xmm2 +# CHECK-NEXT: 1 12 1.00 * cvtsi2ssl (%rax), %xmm2 +# CHECK-NEXT: 1 12 1.00 * cvtsi2ssl (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 cvtss2si %xmm0, %ecx +# CHECK-NEXT: 1 3 1.00 cvtss2si %xmm0, %rcx +# CHECK-NEXT: 2 10 1.00 * cvtss2si (%rax), %ecx +# CHECK-NEXT: 2 10 1.00 * cvtss2si (%rax), %rcx +# CHECK-NEXT: 1 4 1.00 cvttps2pi %xmm0, %mm2 +# CHECK-NEXT: 1 12 1.00 * cvttps2pi (%rax), %mm2 +# CHECK-NEXT: 1 3 1.00 cvttss2si %xmm0, %ecx +# CHECK-NEXT: 1 3 1.00 cvttss2si %xmm0, %rcx +# CHECK-NEXT: 2 10 1.00 * cvttss2si (%rax), %ecx +# CHECK-NEXT: 2 10 1.00 * cvttss2si (%rax), %rcx +# CHECK-NEXT: 1 15 1.00 divps %xmm0, %xmm2 +# CHECK-NEXT: 1 22 1.00 * divps (%rax), %xmm2 +# CHECK-NEXT: 1 15 1.00 divss %xmm0, %xmm2 +# CHECK-NEXT: 1 22 1.00 * divss (%rax), %xmm2 +# CHECK-NEXT: 1 100 0.25 * U ldmxcsr (%rax) +# CHECK-NEXT: 1 100 0.25 * * U maskmovq %mm0, %mm1 +# CHECK-NEXT: 1 3 1.00 maxps %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * maxps (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 maxss %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * maxss (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 minps %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * minps (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 minss %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * minss (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 movaps %xmm0, %xmm2 +# CHECK-NEXT: 1 1 0.33 * movaps %xmm0, (%rax) +# CHECK-NEXT: 1 8 0.33 * movaps (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.50 movhlps %xmm0, %xmm2 +# CHECK-NEXT: 1 1 0.50 movlhps %xmm0, %xmm2 +# CHECK-NEXT: 1 1 0.33 * movhps %xmm0, (%rax) +# CHECK-NEXT: 1 8 0.50 * movhps (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.33 * movlps %xmm0, (%rax) +# CHECK-NEXT: 1 8 0.50 * movlps (%rax), %xmm2 +# CHECK-NEXT: 1 1 1.00 movmskps %xmm0, %ecx +# CHECK-NEXT: 1 1 0.33 * movntps %xmm0, (%rax) +# CHECK-NEXT: 1 1 0.33 * * U movntq %mm0, (%rax) +# CHECK-NEXT: 1 1 0.50 movss %xmm0, %xmm2 +# CHECK-NEXT: 1 1 0.33 * movss %xmm0, (%rax) +# CHECK-NEXT: 1 8 0.33 * movss (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 movups %xmm0, %xmm2 +# CHECK-NEXT: 1 1 0.33 * movups %xmm0, (%rax) +# CHECK-NEXT: 1 8 0.33 * movups (%rax), %xmm2 +# CHECK-NEXT: 1 3 0.50 mulps %xmm0, %xmm2 +# CHECK-NEXT: 2 10 0.50 * mulps (%rax), %xmm2 +# CHECK-NEXT: 1 3 0.50 mulss %xmm0, %xmm2 +# CHECK-NEXT: 2 10 0.50 * mulss (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 orps %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * orps (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pavgb %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * pavgb (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 pavgw %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * pavgw (%rax), %mm2 +# CHECK-NEXT: 1 2 2.00 pextrw $1, %mm0, %ecx +# CHECK-NEXT: 1 1 0.25 pinsrw $1, %eax, %mm2 +# CHECK-NEXT: 1 8 0.33 * pinsrw $1, (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 pmaxsw %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * pmaxsw (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 pmaxub %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * pmaxub (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 pminsw %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * pminsw (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 pminub %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * pminub (%rax), %mm2 +# CHECK-NEXT: 1 1 1.00 pmovmskb %mm0, %ecx +# CHECK-NEXT: 1 4 1.00 pmulhuw %mm0, %mm2 +# CHECK-NEXT: 1 11 1.00 * pmulhuw (%rax), %mm2 +# CHECK-NEXT: 1 8 0.33 * * prefetcht0 (%rax) +# CHECK-NEXT: 1 8 0.33 * * prefetcht1 (%rax) +# CHECK-NEXT: 1 8 0.33 * * prefetcht2 (%rax) +# CHECK-NEXT: 1 8 0.33 * * prefetchnta (%rax) +# CHECK-NEXT: 1 3 1.00 psadbw %mm0, %mm2 +# CHECK-NEXT: 1 10 1.00 * psadbw (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 pshufw $1, %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * pshufw $1, (%rax), %mm2 +# CHECK-NEXT: 1 5 0.50 rcpps %xmm0, %xmm2 +# CHECK-NEXT: 1 12 0.50 * rcpps (%rax), %xmm2 +# CHECK-NEXT: 1 5 0.50 rcpss %xmm0, %xmm2 +# CHECK-NEXT: 1 12 0.50 * rcpss (%rax), %xmm2 +# CHECK-NEXT: 1 5 0.50 rsqrtps %xmm0, %xmm2 +# CHECK-NEXT: 2 12 0.50 * rsqrtps (%rax), %xmm2 +# CHECK-NEXT: 1 5 0.50 rsqrtss %xmm0, %xmm2 +# CHECK-NEXT: 2 12 1.00 * rsqrtss (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.33 * * U sfence +# CHECK-NEXT: 1 1 0.50 shufps $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.50 * shufps $1, (%rax), %xmm2 +# CHECK-NEXT: 1 20 20.00 sqrtps %xmm0, %xmm2 +# CHECK-NEXT: 1 27 20.00 * sqrtps (%rax), %xmm2 +# CHECK-NEXT: 1 20 20.00 sqrtss %xmm0, %xmm2 +# CHECK-NEXT: 1 27 20.00 * sqrtss (%rax), %xmm2 +# CHECK-NEXT: 1 100 0.25 * U stmxcsr (%rax) +# CHECK-NEXT: 1 3 1.00 subps %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * subps (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 subss %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * subss (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 ucomiss %xmm0, %xmm1 +# CHECK-NEXT: 1 10 1.00 * ucomiss (%rax), %xmm1 +# CHECK-NEXT: 1 1 0.50 unpckhps %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.50 * unpckhps (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.50 unpcklps %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.50 * unpcklps (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 xorps %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * xorps (%rax), %xmm2 + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: 21.67 21.67 21.67 - - - - - 41.00 21.50 22.00 108.50 - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - - - - - - 1.00 - - - - addps %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - addps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - addss %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - addss (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - andnps %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - andnps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - andps %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - andps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - cmpeqps %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - cmpeqps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - cmpeqss %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - cmpeqss (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - comiss %xmm0, %xmm1 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - comiss (%rax), %xmm1 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - cvtpi2ps %mm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - cvtpi2ps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - cvtps2pi %xmm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - cvtps2pi (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - cvtsi2ss %ecx, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - cvtsi2ss %rcx, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - cvtsi2ssl (%rax), %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - cvtsi2ssl (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 1.00 - cvtss2si %xmm0, %ecx +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 1.00 - cvtss2si %xmm0, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 1.00 - cvtss2si (%rax), %ecx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 1.00 - cvtss2si (%rax), %rcx +# CHECK-NEXT: - - - - - - - - - - - 1.00 - cvttps2pi %xmm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - cvttps2pi (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 1.00 - cvttss2si %xmm0, %ecx +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 1.00 - cvttss2si %xmm0, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 1.00 - cvttss2si (%rax), %ecx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 1.00 - cvttss2si (%rax), %rcx +# CHECK-NEXT: - - - - - - - - - - - 1.00 - divps %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - divps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - divss %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - divss (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - ldmxcsr (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - maskmovq %mm0, %mm1 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - maxps %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - maxps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - maxss %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - maxss (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - minps %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - minps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - minss %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - minss (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - movaps %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movaps %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movaps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - movhlps %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - movlhps %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movhps %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - movhps (%rax), %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movlps %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - movlps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - movmskps %xmm0, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movntps %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movntq %mm0, (%rax) +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - movss %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movss %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movss (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - movups %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movups %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movups (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mulps %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - mulps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mulss %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - mulss (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - orps %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - orps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pavgb %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pavgb (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pavgw %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pavgw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - 0.50 2.50 - - pextrw $1, %mm0, %ecx +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pinsrw $1, %eax, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pinsrw $1, (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pmaxsw %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pmaxsw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pmaxub %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pmaxub (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pminsw %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pminsw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pminub %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pminub (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - pmovmskb %mm0, %ecx +# CHECK-NEXT: - - - - - - - - 1.00 - - - - pmulhuw %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - pmulhuw (%rax), %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - prefetcht0 (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - prefetcht1 (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - prefetcht2 (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - prefetchnta (%rax) +# CHECK-NEXT: - - - - - - - - 1.00 - - - - psadbw %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - psadbw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pshufw $1, %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pshufw $1, (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rcpps %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - rcpps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rcpss %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - rcpss (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - rsqrtps %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - rsqrtps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - 0.50 - - rsqrtss %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - 1.00 - - rsqrtss (%rax), %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - sfence +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - shufps $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - shufps $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 20.00 - sqrtps %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 20.00 - sqrtps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 20.00 - sqrtss %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 20.00 - sqrtss (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - stmxcsr (%rax) +# CHECK-NEXT: - - - - - - - - 1.00 - - - - subps %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - subps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - subss %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - subss (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - ucomiss %xmm0, %xmm1 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - ucomiss (%rax), %xmm1 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - unpckhps %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - unpckhps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - unpcklps %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - unpcklps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - xorps %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - xorps (%rax), %xmm2 Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-sse2.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-sse2.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-sse2.s @@ -0,0 +1,965 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +addpd %xmm0, %xmm2 +addpd (%rax), %xmm2 + +addsd %xmm0, %xmm2 +addsd (%rax), %xmm2 + +andnpd %xmm0, %xmm2 +andnpd (%rax), %xmm2 + +andpd %xmm0, %xmm2 +andpd (%rax), %xmm2 + +clflush (%rax) + +cmppd $0, %xmm0, %xmm2 +cmppd $0, (%rax), %xmm2 + +cmpsd $0, %xmm0, %xmm2 +cmpsd $0, (%rax), %xmm2 + +comisd %xmm0, %xmm1 +comisd (%rax), %xmm1 + +cvtdq2pd %xmm0, %xmm2 +cvtdq2pd (%rax), %xmm2 + +cvtdq2ps %xmm0, %xmm2 +cvtdq2ps (%rax), %xmm2 + +cvtpd2dq %xmm0, %xmm2 +cvtpd2dq (%rax), %xmm2 + +cvtpd2pi %xmm0, %mm2 +cvtpd2pi (%rax), %mm2 + +cvtpd2ps %xmm0, %xmm2 +cvtpd2ps (%rax), %xmm2 + +cvtpi2pd %mm0, %xmm2 +cvtpi2pd (%rax), %xmm2 + +cvtps2dq %xmm0, %xmm2 +cvtps2dq (%rax), %xmm2 + +cvtps2pd %xmm0, %xmm2 +cvtps2pd (%rax), %xmm2 + +cvtsd2si %xmm0, %ecx +cvtsd2si %xmm0, %rcx +cvtsd2si (%rax), %ecx +cvtsd2si (%rax), %rcx + +cvtsd2ss %xmm0, %xmm2 +cvtsd2ss (%rax), %xmm2 + +cvtsi2sd %ecx, %xmm2 +cvtsi2sd %rcx, %xmm2 +cvtsi2sd (%rax), %xmm2 +cvtsi2sd (%rax), %xmm2 + +cvtss2sd %xmm0, %xmm2 +cvtss2sd (%rax), %xmm2 + +cvttpd2dq %xmm0, %xmm2 +cvttpd2dq (%rax), %xmm2 + +cvttpd2pi %xmm0, %mm2 +cvttpd2pi (%rax), %mm2 + +cvttps2dq %xmm0, %xmm2 +cvttps2dq (%rax), %xmm2 + +cvttsd2si %xmm0, %ecx +cvttsd2si %xmm0, %rcx +cvttsd2si (%rax), %ecx +cvttsd2si (%rax), %rcx + +divpd %xmm0, %xmm2 +divpd (%rax), %xmm2 + +divsd %xmm0, %xmm2 +divsd (%rax), %xmm2 + +lfence + +maskmovdqu %xmm0, %xmm1 + +maxpd %xmm0, %xmm2 +maxpd (%rax), %xmm2 + +maxsd %xmm0, %xmm2 +maxsd (%rax), %xmm2 + +mfence + +minpd %xmm0, %xmm2 +minpd (%rax), %xmm2 + +minsd %xmm0, %xmm2 +minsd (%rax), %xmm2 + +movapd %xmm0, %xmm2 +movapd %xmm0, (%rax) +movapd (%rax), %xmm2 + +movd %eax, %xmm2 +movd (%rax), %xmm2 + +movd %xmm0, %ecx +movd %xmm0, (%rax) + +movdqa %xmm0, %xmm2 +movdqa %xmm0, (%rax) +movdqa (%rax), %xmm2 + +movdqu %xmm0, %xmm2 +movdqu %xmm0, (%rax) +movdqu (%rax), %xmm2 + +movdq2q %xmm0, %mm2 + +movhpd %xmm0, (%rax) +movhpd (%rax), %xmm2 + +movlpd %xmm0, (%rax) +movlpd (%rax), %xmm2 + +movmskpd %xmm0, %rcx + +movntil %eax, (%rax) +movntiq %rax, (%rax) + +movntdq %xmm0, (%rax) +movntpd %xmm0, (%rax) + +movq %xmm0, %xmm2 + +movq %rax, %xmm2 +movq (%rax), %xmm2 + +movq %xmm0, %rcx +movq %xmm0, (%rax) + +movq2dq %mm0, %xmm2 + +movsd %xmm0, %xmm2 +movsd %xmm0, (%rax) +movsd (%rax), %xmm2 + +movupd %xmm0, %xmm2 +movupd %xmm0, (%rax) +movupd (%rax), %xmm2 + +mulpd %xmm0, %xmm2 +mulpd (%rax), %xmm2 + +mulsd %xmm0, %xmm2 +mulsd (%rax), %xmm2 + +orpd %xmm0, %xmm2 +orpd (%rax), %xmm2 + +packssdw %xmm0, %xmm2 +packssdw (%rax), %xmm2 + +packsswb %xmm0, %xmm2 +packsswb (%rax), %xmm2 + +packuswb %xmm0, %xmm2 +packuswb (%rax), %xmm2 + +paddb %xmm0, %xmm2 +paddb (%rax), %xmm2 + +paddd %xmm0, %xmm2 +paddd (%rax), %xmm2 + +paddq %mm0, %mm2 +paddq (%rax), %mm2 + +paddq %xmm0, %xmm2 +paddq (%rax), %xmm2 + +paddsb %xmm0, %xmm2 +paddsb (%rax), %xmm2 + +paddsw %xmm0, %xmm2 +paddsw (%rax), %xmm2 + +paddusb %xmm0, %xmm2 +paddusb (%rax), %xmm2 + +paddusw %xmm0, %xmm2 +paddusw (%rax), %xmm2 + +paddw %xmm0, %xmm2 +paddw (%rax), %xmm2 + +pand %xmm0, %xmm2 +pand (%rax), %xmm2 + +pandn %xmm0, %xmm2 +pandn (%rax), %xmm2 + +pavgb %xmm0, %xmm2 +pavgb (%rax), %xmm2 + +pavgw %xmm0, %xmm2 +pavgw (%rax), %xmm2 + +pcmpeqb %xmm0, %xmm2 +pcmpeqb (%rax), %xmm2 + +pcmpeqd %xmm0, %xmm2 +pcmpeqd (%rax), %xmm2 + +pcmpeqw %xmm0, %xmm2 +pcmpeqw (%rax), %xmm2 + +pcmpgtb %xmm0, %xmm2 +pcmpgtb (%rax), %xmm2 + +pcmpgtd %xmm0, %xmm2 +pcmpgtd (%rax), %xmm2 + +pcmpgtw %xmm0, %xmm2 +pcmpgtw (%rax), %xmm2 + +pextrw $1, %xmm0, %rcx + +pinsrw $1, %rax, %xmm0 +pinsrw $1, (%rax), %xmm0 + +pmaddwd %xmm0, %xmm2 +pmaddwd (%rax), %xmm2 + +pmaxsw %xmm0, %xmm2 +pmaxsw (%rax), %xmm2 + +pmaxub %xmm0, %xmm2 +pmaxub (%rax), %xmm2 + +pminsw %xmm0, %xmm2 +pminsw (%rax), %xmm2 + +pminub %xmm0, %xmm2 +pminub (%rax), %xmm2 + +pmovmskb %xmm0, %rcx + +pmulhuw %xmm0, %xmm2 +pmulhuw (%rax), %xmm2 + +pmulhw %xmm0, %xmm2 +pmulhw (%rax), %xmm2 + +pmullw %xmm0, %xmm2 +pmullw (%rax), %xmm2 + +pmuludq %mm0, %mm2 +pmuludq (%rax), %mm2 + +pmuludq %xmm0, %xmm2 +pmuludq (%rax), %xmm2 + +por %xmm0, %xmm2 +por (%rax), %xmm2 + +psadbw %xmm0, %xmm2 +psadbw (%rax), %xmm2 + +pshufd $1, %xmm0, %xmm2 +pshufd $1, (%rax), %xmm2 + +pshufhw $1, %xmm0, %xmm2 +pshufhw $1, (%rax), %xmm2 + +pshuflw $1, %xmm0, %xmm2 +pshuflw $1, (%rax), %xmm2 + +pslld $1, %xmm2 +pslld %xmm0, %xmm2 +pslld (%rax), %xmm2 + +pslldq $1, %xmm2 + +psllq $1, %xmm2 +psllq %xmm0, %xmm2 +psllq (%rax), %xmm2 + +psllw $1, %xmm2 +psllw %xmm0, %xmm2 +psllw (%rax), %xmm2 + +psrad $1, %xmm2 +psrad %xmm0, %xmm2 +psrad (%rax), %xmm2 + +psraw $1, %xmm2 +psraw %xmm0, %xmm2 +psraw (%rax), %xmm2 + +psrld $1, %xmm2 +psrld %xmm0, %xmm2 +psrld (%rax), %xmm2 + +psrldq $1, %xmm2 + +psrlq $1, %xmm2 +psrlq %xmm0, %xmm2 +psrlq (%rax), %xmm2 + +psrlw $1, %xmm2 +psrlw %xmm0, %xmm2 +psrlw (%rax), %xmm2 + +psubb %xmm0, %xmm2 +psubb (%rax), %xmm2 + +psubd %xmm0, %xmm2 +psubd (%rax), %xmm2 + +psubq %mm0, %mm2 +psubq (%rax), %mm2 + +psubq %xmm0, %xmm2 +psubq (%rax), %xmm2 + +psubsb %xmm0, %xmm2 +psubsb (%rax), %xmm2 + +psubsw %xmm0, %xmm2 +psubsw (%rax), %xmm2 + +psubusb %xmm0, %xmm2 +psubusb (%rax), %xmm2 + +psubusw %xmm0, %xmm2 +psubusw (%rax), %xmm2 + +psubw %xmm0, %xmm2 +psubw (%rax), %xmm2 + +punpckhbw %xmm0, %xmm2 +punpckhbw (%rax), %xmm2 + +punpckhdq %xmm0, %xmm2 +punpckhdq (%rax), %xmm2 + +punpckhqdq %xmm0, %xmm2 +punpckhqdq (%rax), %xmm2 + +punpckhwd %xmm0, %xmm2 +punpckhwd (%rax), %xmm2 + +punpcklbw %xmm0, %xmm2 +punpcklbw (%rax), %xmm2 + +punpckldq %xmm0, %xmm2 +punpckldq (%rax), %xmm2 + +punpcklqdq %xmm0, %xmm2 +punpcklqdq (%rax), %xmm2 + +punpcklwd %xmm0, %xmm2 +punpcklwd (%rax), %xmm2 + +pxor %xmm0, %xmm2 +pxor (%rax), %xmm2 + +shufpd $1, %xmm0, %xmm2 +shufpd $1, (%rax), %xmm2 + +sqrtpd %xmm0, %xmm2 +sqrtpd (%rax), %xmm2 + +sqrtsd %xmm0, %xmm2 +sqrtsd (%rax), %xmm2 + +subpd %xmm0, %xmm2 +subpd (%rax), %xmm2 + +subsd %xmm0, %xmm2 +subsd (%rax), %xmm2 + +ucomisd %xmm0, %xmm1 +ucomisd (%rax), %xmm1 + +unpckhpd %xmm0, %xmm2 +unpckhpd (%rax), %xmm2 + +unpcklpd %xmm0, %xmm2 +unpcklpd (%rax), %xmm2 + +xorpd %xmm0, %xmm2 +xorpd (%rax), %xmm2 + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 3 1.00 addpd %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * addpd (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 addsd %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * addsd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 andnpd %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * andnpd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 andpd %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * andpd (%rax), %xmm2 +# CHECK-NEXT: 1 8 0.33 * * U clflush (%rax) +# CHECK-NEXT: 1 3 1.00 cmpeqpd %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * cmpeqpd (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 cmpeqsd %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * cmpeqsd (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 comisd %xmm0, %xmm1 +# CHECK-NEXT: 1 10 1.00 * comisd (%rax), %xmm1 +# CHECK-NEXT: 1 3 1.00 cvtdq2pd %xmm0, %xmm2 +# CHECK-NEXT: 1 12 1.00 * cvtdq2pd (%rax), %xmm2 +# CHECK-NEXT: 1 5 1.00 cvtdq2ps %xmm0, %xmm2 +# CHECK-NEXT: 1 12 1.00 * cvtdq2ps (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 cvtpd2dq %xmm0, %xmm2 +# CHECK-NEXT: 2 10 1.00 * cvtpd2dq (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 cvtpd2pi %xmm0, %mm2 +# CHECK-NEXT: 1 12 1.00 * cvtpd2pi (%rax), %mm2 +# CHECK-NEXT: 1 3 1.00 cvtpd2ps %xmm0, %xmm2 +# CHECK-NEXT: 2 10 0.50 * cvtpd2ps (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 cvtpi2pd %mm0, %xmm2 +# CHECK-NEXT: 1 12 1.00 * cvtpi2pd (%rax), %xmm2 +# CHECK-NEXT: 1 5 1.00 cvtps2dq %xmm0, %xmm2 +# CHECK-NEXT: 1 12 1.00 * cvtps2dq (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 cvtps2pd %xmm0, %xmm2 +# CHECK-NEXT: 2 10 1.00 * cvtps2pd (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 cvtsd2si %xmm0, %ecx +# CHECK-NEXT: 1 4 1.00 cvtsd2si %xmm0, %rcx +# CHECK-NEXT: 1 11 1.00 * cvtsd2si (%rax), %ecx +# CHECK-NEXT: 1 11 1.00 * cvtsd2si (%rax), %rcx +# CHECK-NEXT: 1 3 1.00 cvtsd2ss %xmm0, %xmm2 +# CHECK-NEXT: 2 10 0.50 * cvtsd2ss (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 cvtsi2sd %ecx, %xmm2 +# CHECK-NEXT: 1 4 1.00 cvtsi2sd %rcx, %xmm2 +# CHECK-NEXT: 1 12 1.00 * cvtsi2sdl (%rax), %xmm2 +# CHECK-NEXT: 1 12 1.00 * cvtsi2sdl (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 cvtss2sd %xmm0, %xmm2 +# CHECK-NEXT: 2 10 2.00 * cvtss2sd (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 cvttpd2dq %xmm0, %xmm2 +# CHECK-NEXT: 2 10 1.00 * cvttpd2dq (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 cvttpd2pi %xmm0, %mm2 +# CHECK-NEXT: 1 12 1.00 * cvttpd2pi (%rax), %mm2 +# CHECK-NEXT: 1 5 1.00 cvttps2dq %xmm0, %xmm2 +# CHECK-NEXT: 1 12 1.00 * cvttps2dq (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 cvttsd2si %xmm0, %ecx +# CHECK-NEXT: 1 4 1.00 cvttsd2si %xmm0, %rcx +# CHECK-NEXT: 1 11 1.00 * cvttsd2si (%rax), %ecx +# CHECK-NEXT: 1 11 1.00 * cvttsd2si (%rax), %rcx +# CHECK-NEXT: 1 15 1.00 divpd %xmm0, %xmm2 +# CHECK-NEXT: 1 22 1.00 * divpd (%rax), %xmm2 +# CHECK-NEXT: 1 15 1.00 divsd %xmm0, %xmm2 +# CHECK-NEXT: 1 22 1.00 * divsd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.33 * * U lfence +# CHECK-NEXT: 1 100 0.25 * * U maskmovdqu %xmm0, %xmm1 +# CHECK-NEXT: 1 3 1.00 maxpd %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * maxpd (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 maxsd %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * maxsd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.33 * * U mfence +# CHECK-NEXT: 1 3 1.00 minpd %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * minpd (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 minsd %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * minsd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 movapd %xmm0, %xmm2 +# CHECK-NEXT: 1 1 0.33 * movapd %xmm0, (%rax) +# CHECK-NEXT: 1 8 0.33 * movapd (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 movd %eax, %xmm2 +# CHECK-NEXT: 1 8 0.33 * movd (%rax), %xmm2 +# CHECK-NEXT: 1 2 1.00 movd %xmm0, %ecx +# CHECK-NEXT: 1 1 0.33 * movd %xmm0, (%rax) +# CHECK-NEXT: 1 1 0.25 movdqa %xmm0, %xmm2 +# CHECK-NEXT: 1 1 0.33 * movdqa %xmm0, (%rax) +# CHECK-NEXT: 1 8 0.33 * movdqa (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 movdqu %xmm0, %xmm2 +# CHECK-NEXT: 1 1 0.33 * movdqu %xmm0, (%rax) +# CHECK-NEXT: 1 8 0.33 * movdqu (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 movdq2q %xmm0, %mm2 +# CHECK-NEXT: 1 1 0.33 * movhpd %xmm0, (%rax) +# CHECK-NEXT: 1 8 0.50 * movhpd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.33 * movlpd %xmm0, (%rax) +# CHECK-NEXT: 1 8 0.50 * movlpd (%rax), %xmm2 +# CHECK-NEXT: 1 1 1.00 movmskpd %xmm0, %ecx +# CHECK-NEXT: 1 1 0.33 * movntil %eax, (%rax) +# CHECK-NEXT: 1 1 0.33 * movntiq %rax, (%rax) +# CHECK-NEXT: 1 1 0.33 * movntdq %xmm0, (%rax) +# CHECK-NEXT: 1 1 0.33 * movntpd %xmm0, (%rax) +# CHECK-NEXT: 1 1 0.25 movq %xmm0, %xmm2 +# CHECK-NEXT: 1 3 1.00 movq %rax, %xmm2 +# CHECK-NEXT: 1 8 0.33 * movq (%rax), %xmm2 +# CHECK-NEXT: 1 2 1.00 movq %xmm0, %rcx +# CHECK-NEXT: 1 1 0.33 * movq %xmm0, (%rax) +# CHECK-NEXT: 1 1 0.25 movq2dq %mm0, %xmm2 +# CHECK-NEXT: 1 1 0.50 movsd %xmm0, %xmm2 +# CHECK-NEXT: 1 1 0.33 * movsd %xmm0, (%rax) +# CHECK-NEXT: 1 8 0.33 * movsd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 movupd %xmm0, %xmm2 +# CHECK-NEXT: 1 1 0.33 * movupd %xmm0, (%rax) +# CHECK-NEXT: 1 8 0.33 * movupd (%rax), %xmm2 +# CHECK-NEXT: 1 3 0.50 mulpd %xmm0, %xmm2 +# CHECK-NEXT: 2 10 0.50 * mulpd (%rax), %xmm2 +# CHECK-NEXT: 1 3 0.50 mulsd %xmm0, %xmm2 +# CHECK-NEXT: 2 10 0.50 * mulsd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 orpd %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * orpd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 packssdw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * packssdw (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 packsswb %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * packsswb (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 packuswb %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * packuswb (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 paddb %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * paddb (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 paddd %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * paddd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 paddq %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * paddq (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 paddq %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * paddq (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 paddsb %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * paddsb (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 paddsw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * paddsw (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 paddusb %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * paddusb (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 paddusw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * paddusw (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 paddw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * paddw (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pand %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pand (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pandn %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pandn (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pavgb %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pavgb (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pavgw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pavgw (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pcmpeqb %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pcmpeqb (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pcmpeqd %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pcmpeqd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pcmpeqw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pcmpeqw (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pcmpgtb %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pcmpgtb (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pcmpgtd %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pcmpgtd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pcmpgtw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pcmpgtw (%rax), %xmm2 +# CHECK-NEXT: 1 2 2.00 pextrw $1, %xmm0, %ecx +# CHECK-NEXT: 1 1 0.25 pinsrw $1, %eax, %xmm0 +# CHECK-NEXT: 1 8 0.33 * pinsrw $1, (%rax), %xmm0 +# CHECK-NEXT: 1 4 1.00 pmaddwd %xmm0, %xmm2 +# CHECK-NEXT: 1 11 1.00 * pmaddwd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pmaxsw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pmaxsw (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pmaxub %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pmaxub (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pminsw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pminsw (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pminub %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pminub (%rax), %xmm2 +# CHECK-NEXT: 1 1 1.00 pmovmskb %xmm0, %ecx +# CHECK-NEXT: 1 4 1.00 pmulhuw %xmm0, %xmm2 +# CHECK-NEXT: 1 11 1.00 * pmulhuw (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 pmulhw %xmm0, %xmm2 +# CHECK-NEXT: 1 11 1.00 * pmulhw (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 pmullw %xmm0, %xmm2 +# CHECK-NEXT: 1 11 1.00 * pmullw (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 pmuludq %mm0, %mm2 +# CHECK-NEXT: 1 11 1.00 * pmuludq (%rax), %mm2 +# CHECK-NEXT: 1 4 1.00 pmuludq %xmm0, %xmm2 +# CHECK-NEXT: 1 11 1.00 * pmuludq (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 por %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * por (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 psadbw %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * psadbw (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pshufd $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pshufd $1, (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pshufhw $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pshufhw $1, (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pshuflw $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pshuflw $1, (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pslld $1, %xmm2 +# CHECK-NEXT: 1 1 1.00 pslld %xmm0, %xmm2 +# CHECK-NEXT: 1 8 1.00 * pslld (%rax), %xmm2 +# CHECK-NEXT: 1 1 1.00 pslldq $1, %xmm2 +# CHECK-NEXT: 1 1 0.25 psllq $1, %xmm2 +# CHECK-NEXT: 1 1 1.00 psllq %xmm0, %xmm2 +# CHECK-NEXT: 1 8 1.00 * psllq (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 psllw $1, %xmm2 +# CHECK-NEXT: 1 1 1.00 psllw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 1.00 * psllw (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 psrad $1, %xmm2 +# CHECK-NEXT: 1 1 1.00 psrad %xmm0, %xmm2 +# CHECK-NEXT: 1 8 1.00 * psrad (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 psraw $1, %xmm2 +# CHECK-NEXT: 1 1 1.00 psraw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 1.00 * psraw (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 psrld $1, %xmm2 +# CHECK-NEXT: 1 1 1.00 psrld %xmm0, %xmm2 +# CHECK-NEXT: 1 8 1.00 * psrld (%rax), %xmm2 +# CHECK-NEXT: 1 1 1.00 psrldq $1, %xmm2 +# CHECK-NEXT: 1 1 0.25 psrlq $1, %xmm2 +# CHECK-NEXT: 1 1 1.00 psrlq %xmm0, %xmm2 +# CHECK-NEXT: 1 8 1.00 * psrlq (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 psrlw $1, %xmm2 +# CHECK-NEXT: 1 1 1.00 psrlw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 1.00 * psrlw (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 psubb %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * psubb (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 psubd %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * psubd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 psubq %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * psubq (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 psubq %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * psubq (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 psubsb %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * psubsb (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 psubsw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * psubsw (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 psubusb %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * psubusb (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 psubusw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * psubusw (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 psubw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * psubw (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 punpckhbw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * punpckhbw (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 punpckhdq %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * punpckhdq (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 punpckhqdq %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * punpckhqdq (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 punpckhwd %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * punpckhwd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 punpcklbw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * punpcklbw (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 punpckldq %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * punpckldq (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 punpcklqdq %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * punpcklqdq (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 punpcklwd %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * punpcklwd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pxor %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pxor (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.50 shufpd $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.50 * shufpd $1, (%rax), %xmm2 +# CHECK-NEXT: 1 20 20.00 sqrtpd %xmm0, %xmm2 +# CHECK-NEXT: 1 27 20.00 * sqrtpd (%rax), %xmm2 +# CHECK-NEXT: 1 20 20.00 sqrtsd %xmm0, %xmm2 +# CHECK-NEXT: 1 27 20.00 * sqrtsd (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 subpd %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * subpd (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 subsd %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * subsd (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 ucomisd %xmm0, %xmm1 +# CHECK-NEXT: 1 10 1.00 * ucomisd (%rax), %xmm1 +# CHECK-NEXT: 1 1 0.50 unpckhpd %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.50 * unpckhpd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.50 unpcklpd %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.50 * unpcklpd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 xorpd %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * xorpd (%rax), %xmm2 + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: 44.33 44.33 44.33 - - - - - 71.92 40.42 71.75 152.92 - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - - - - - - 1.00 - - - - addpd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - addpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - addsd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - addsd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - andnpd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - andnpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - andpd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - andpd (%rax), %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - clflush (%rax) +# CHECK-NEXT: - - - - - - - - 1.00 - - - - cmpeqpd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - cmpeqpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - cmpeqsd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - cmpeqsd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - comisd %xmm0, %xmm1 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - comisd (%rax), %xmm1 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 1.00 - cvtdq2pd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - cvtdq2pd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - cvtdq2ps %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - cvtdq2ps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 1.00 - cvtpd2dq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 1.00 - cvtpd2dq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - cvtpd2pi %xmm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - cvtpd2pi (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - cvtpd2ps %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - cvtpd2ps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - cvtpi2pd %mm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - cvtpi2pd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - cvtps2dq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - cvtps2dq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - cvtps2pd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - cvtps2pd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - cvtsd2si %xmm0, %ecx +# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - cvtsd2si %xmm0, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 1.00 - cvtsd2si (%rax), %ecx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 1.00 - cvtsd2si (%rax), %rcx +# CHECK-NEXT: - - - - - - - - - - - 1.00 - cvtsd2ss %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - cvtsd2ss (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.33 0.33 - 1.33 - cvtsi2sd %ecx, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.33 0.33 - 1.33 - cvtsi2sd %rcx, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - cvtsi2sdl (%rax), %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - cvtsi2sdl (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - cvtss2sd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 2.00 - cvtss2sd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 1.00 - cvttpd2dq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 1.00 - cvttpd2dq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - cvttpd2pi %xmm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - cvttpd2pi (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - cvttps2dq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - cvttps2dq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - cvttsd2si %xmm0, %ecx +# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 - cvttsd2si %xmm0, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 1.00 - cvttsd2si (%rax), %ecx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 1.00 - cvttsd2si (%rax), %rcx +# CHECK-NEXT: - - - - - - - - - - - 1.00 - divpd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - divpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - divsd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - divsd (%rax), %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - lfence +# CHECK-NEXT: - - - - - - - - - - - - - maskmovdqu %xmm0, %xmm1 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - maxpd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - maxpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - maxsd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - maxsd (%rax), %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - mfence +# CHECK-NEXT: - - - - - - - - 1.00 - - - - minpd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - minpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - minsd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - minsd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - movapd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movapd %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movapd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - movd %eax, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - movd %xmm0, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movd %xmm0, (%rax) +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - movdqa %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movdqa %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movdqa (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - movdqu %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movdqu %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movdqu (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - movdq2q %xmm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movhpd %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - movhpd (%rax), %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movlpd %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - movlpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - movmskpd %xmm0, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movntil %eax, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movntiq %rax, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movntdq %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movntpd %xmm0, (%rax) +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - movq %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - movq %rax, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - movq %xmm0, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movq %xmm0, (%rax) +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - movq2dq %mm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - movsd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movsd %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movsd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - movupd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movupd %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movupd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mulpd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - mulpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - mulsd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - mulsd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - orpd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - orpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - packssdw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - packssdw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - packsswb %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - packsswb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - packuswb %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - packuswb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - paddb %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - paddb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - paddd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - paddd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - paddq %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - paddq (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - paddq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - paddq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - paddsb %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - paddsb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - paddsw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - paddsw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - paddusb %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - paddusb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - paddusw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - paddusw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - paddw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - paddw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pand %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pand (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pandn %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pandn (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pavgb %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pavgb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pavgw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pavgw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pcmpeqb %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pcmpeqb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pcmpeqd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pcmpeqd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pcmpeqw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pcmpeqw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pcmpgtb %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pcmpgtb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pcmpgtd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pcmpgtd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pcmpgtw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pcmpgtw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 2.50 - - pextrw $1, %xmm0, %ecx +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pinsrw $1, %eax, %xmm0 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pinsrw $1, (%rax), %xmm0 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - pmaddwd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - pmaddwd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pmaxsw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pmaxsw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pmaxub %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pmaxub (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pminsw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pminsw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pminub %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pminub (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - pmovmskb %xmm0, %ecx +# CHECK-NEXT: - - - - - - - - 1.00 - - - - pmulhuw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - pmulhuw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - pmulhw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - pmulhw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - pmullw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - pmullw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - pmuludq %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - pmuludq (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - pmuludq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - pmuludq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - por %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - por (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - psadbw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - psadbw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pshufd $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pshufd $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pshufhw $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pshufhw $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pshuflw $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pshuflw $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pslld $1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - pslld %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 - - pslld (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - pslldq $1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psllq $1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - psllq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 - - psllq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psllw $1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - psllw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 - - psllw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psrad $1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - psrad %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 - - psrad (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psraw $1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - psraw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 - - psraw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psrld $1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - psrld %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 - - psrld (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - psrldq $1, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psrlq $1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - psrlq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 - - psrlq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psrlw $1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - 1.00 - - psrlw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 - - psrlw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psubb %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - psubb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psubd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - psubd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psubq %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - psubq (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psubq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - psubq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psubsb %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - psubsb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psubsw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - psubsw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psubusb %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - psubusb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psubusw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - psubusw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psubw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - psubw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - punpckhbw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - punpckhbw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - punpckhdq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - punpckhdq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - punpckhqdq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - punpckhqdq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - punpckhwd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - punpckhwd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - punpcklbw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - punpcklbw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - punpckldq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - punpckldq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - punpcklqdq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - punpcklqdq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - punpcklwd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - punpcklwd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pxor %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pxor (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - shufpd $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - shufpd $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 20.00 - sqrtpd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 20.00 - sqrtpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 20.00 - sqrtsd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 20.00 - sqrtsd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - subpd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - subpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - subsd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - subsd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - ucomisd %xmm0, %xmm1 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - ucomisd (%rax), %xmm1 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - unpckhpd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - unpckhpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - unpcklpd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - unpcklpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - xorpd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - xorpd (%rax), %xmm2 Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-sse3.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-sse3.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-sse3.s @@ -0,0 +1,109 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +addsubpd %xmm0, %xmm2 +addsubpd (%rax), %xmm2 + +addsubps %xmm0, %xmm2 +addsubps (%rax), %xmm2 + +haddpd %xmm0, %xmm2 +haddpd (%rax), %xmm2 + +haddps %xmm0, %xmm2 +haddps (%rax), %xmm2 + +hsubpd %xmm0, %xmm2 +hsubpd (%rax), %xmm2 + +hsubps %xmm0, %xmm2 +hsubps (%rax), %xmm2 + +lddqu (%rax), %xmm2 + +monitor + +movddup %xmm0, %xmm2 +movddup (%rax), %xmm2 + +movshdup %xmm0, %xmm2 +movshdup (%rax), %xmm2 + +movsldup %xmm0, %xmm2 +movsldup (%rax), %xmm2 + +mwait + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 3 1.00 addsubpd %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * addsubpd (%rax), %xmm2 +# CHECK-NEXT: 1 3 1.00 addsubps %xmm0, %xmm2 +# CHECK-NEXT: 1 10 1.00 * addsubps (%rax), %xmm2 +# CHECK-NEXT: 1 100 0.25 haddpd %xmm0, %xmm2 +# CHECK-NEXT: 1 100 0.25 * haddpd (%rax), %xmm2 +# CHECK-NEXT: 1 100 0.25 haddps %xmm0, %xmm2 +# CHECK-NEXT: 1 100 0.25 * haddps (%rax), %xmm2 +# CHECK-NEXT: 1 100 0.25 hsubpd %xmm0, %xmm2 +# CHECK-NEXT: 1 100 0.25 * hsubpd (%rax), %xmm2 +# CHECK-NEXT: 1 100 0.25 hsubps %xmm0, %xmm2 +# CHECK-NEXT: 1 100 0.25 * hsubps (%rax), %xmm2 +# CHECK-NEXT: 1 8 0.33 * lddqu (%rax), %xmm2 +# CHECK-NEXT: 1 100 0.25 U monitor +# CHECK-NEXT: 1 1 0.50 movddup %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.50 * movddup (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.50 movshdup %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.50 * movshdup (%rax), %xmm2 +# CHECK-NEXT: 1 100 0.25 movsldup %xmm0, %xmm2 +# CHECK-NEXT: 1 100 0.25 * movsldup (%rax), %xmm2 +# CHECK-NEXT: 1 100 0.25 * * U mwait + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: 1.67 1.67 1.67 - - - - - 4.00 2.00 2.00 - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - - - - - - 1.00 - - - - addsubpd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - addsubpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - addsubps %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - addsubps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - haddpd %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - haddpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - haddps %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - haddps (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - hsubpd %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - hsubpd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - hsubps %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - hsubps (%rax), %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - lddqu (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - monitor +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - movddup %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - movddup (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - movshdup %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - movshdup (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - movsldup %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - movsldup (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - mwait Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-sse41.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-sse41.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-sse41.s @@ -0,0 +1,371 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +blendpd $11, %xmm0, %xmm2 +blendpd $11, (%rax), %xmm2 + +blendps $11, %xmm0, %xmm2 +blendps $11, (%rax), %xmm2 + +blendvpd %xmm0, %xmm2 +blendvpd (%rax), %xmm2 + +blendvps %xmm0, %xmm2 +blendvps (%rax), %xmm2 + +dppd $22, %xmm0, %xmm2 +dppd $22, (%rax), %xmm2 + +dpps $22, %xmm0, %xmm2 +dpps $22, (%rax), %xmm2 + +extractps $1, %xmm0, %rcx +extractps $1, %xmm0, (%rax) + +insertps $1, %xmm0, %xmm2 +insertps $1, (%rax), %xmm2 + +movntdqa (%rax), %xmm2 + +mpsadbw $1, %xmm0, %xmm2 +mpsadbw $1, (%rax), %xmm2 + +packusdw %xmm0, %xmm2 +packusdw (%rax), %xmm2 + +pblendvb %xmm0, %xmm2 +pblendvb (%rax), %xmm2 + +pblendw $11, %xmm0, %xmm2 +pblendw $11, (%rax), %xmm2 + +pcmpeqq %xmm0, %xmm2 +pcmpeqq (%rax), %xmm2 + +pextrb $1, %xmm0, %ecx +pextrb $1, %xmm0, (%rax) + +pextrd $1, %xmm0, %ecx +pextrd $1, %xmm0, (%rax) + +pextrq $1, %xmm0, %rcx +pextrq $1, %xmm0, (%rax) + +pextrw $1, %xmm0, (%rax) + +phminposuw %xmm0, %xmm2 +phminposuw (%rax), %xmm2 + +pinsrb $1, %eax, %xmm1 +pinsrb $1, (%rax), %xmm1 + +pinsrd $1, %eax, %xmm1 +pinsrd $1, (%rax), %xmm1 + +pinsrq $1, %rax, %xmm1 +pinsrq $1, (%rax), %xmm1 + +pmaxsb %xmm0, %xmm2 +pmaxsb (%rax), %xmm2 + +pmaxsd %xmm0, %xmm2 +pmaxsd (%rax), %xmm2 + +pmaxud %xmm0, %xmm2 +pmaxud (%rax), %xmm2 + +pmaxuw %xmm0, %xmm2 +pmaxuw (%rax), %xmm2 + +pminsb %xmm0, %xmm2 +pminsb (%rax), %xmm2 + +pminsd %xmm0, %xmm2 +pminsd (%rax), %xmm2 + +pminud %xmm0, %xmm2 +pminud (%rax), %xmm2 + +pminuw %xmm0, %xmm2 +pminuw (%rax), %xmm2 + +pmovsxbd %xmm0, %xmm2 +pmovsxbd (%rax), %xmm2 + +pmovsxbq %xmm0, %xmm2 +pmovsxbq (%rax), %xmm2 + +pmovsxbw %xmm0, %xmm2 +pmovsxbw (%rax), %xmm2 + +pmovsxdq %xmm0, %xmm2 +pmovsxdq (%rax), %xmm2 + +pmovsxwd %xmm0, %xmm2 +pmovsxwd (%rax), %xmm2 + +pmovsxwq %xmm0, %xmm2 +pmovsxwq (%rax), %xmm2 + +pmovzxbd %xmm0, %xmm2 +pmovzxbd (%rax), %xmm2 + +pmovzxbq %xmm0, %xmm2 +pmovzxbq (%rax), %xmm2 + +pmovzxbw %xmm0, %xmm2 +pmovzxbw (%rax), %xmm2 + +pmovzxdq %xmm0, %xmm2 +pmovzxdq (%rax), %xmm2 + +pmovzxwd %xmm0, %xmm2 +pmovzxwd (%rax), %xmm2 + +pmovzxwq %xmm0, %xmm2 +pmovzxwq (%rax), %xmm2 + +pmuldq %xmm0, %xmm2 +pmuldq (%rax), %xmm2 + +pmulld %xmm0, %xmm2 +pmulld (%rax), %xmm2 + +ptest %xmm0, %xmm1 +ptest (%rax), %xmm1 + +roundpd $1, %xmm0, %xmm2 +roundpd $1, (%rax), %xmm2 + +roundps $1, %xmm0, %xmm2 +roundps $1, (%rax), %xmm2 + +roundsd $1, %xmm0, %xmm2 +roundsd $1, (%rax), %xmm2 + +roundss $1, %xmm0, %xmm2 +roundss $1, (%rax), %xmm2 + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.50 blendpd $11, %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.50 * blendpd $11, (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.50 blendps $11, %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.50 * blendps $11, (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.50 blendvpd %xmm0, %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.50 * blendvpd %xmm0, (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.50 blendvps %xmm0, %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.50 * blendvps %xmm0, (%rax), %xmm2 +# CHECK-NEXT: 1 100 0.25 dppd $22, %xmm0, %xmm2 +# CHECK-NEXT: 1 100 0.25 * dppd $22, (%rax), %xmm2 +# CHECK-NEXT: 1 100 0.25 dpps $22, %xmm0, %xmm2 +# CHECK-NEXT: 1 100 0.25 * dpps $22, (%rax), %xmm2 +# CHECK-NEXT: 1 2 2.00 extractps $1, %xmm0, %ecx +# CHECK-NEXT: 2 5 2.00 * extractps $1, %xmm0, (%rax) +# CHECK-NEXT: 1 1 0.50 insertps $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.50 * insertps $1, (%rax), %xmm2 +# CHECK-NEXT: 1 8 0.33 * movntdqa (%rax), %xmm2 +# CHECK-NEXT: 1 100 0.25 mpsadbw $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 100 0.25 * mpsadbw $1, (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 packusdw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * packusdw (%rax), %xmm2 +# CHECK-NEXT: 1 1 1.00 pblendvb %xmm0, %xmm0, %xmm2 +# CHECK-NEXT: 1 8 1.00 * pblendvb %xmm0, (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.33 pblendw $11, %xmm0, %xmm2 +# CHECK-NEXT: 2 8 0.33 * pblendw $11, (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pcmpeqq %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pcmpeqq (%rax), %xmm2 +# CHECK-NEXT: 1 2 2.00 pextrb $1, %xmm0, %ecx +# CHECK-NEXT: 2 5 3.00 * pextrb $1, %xmm0, (%rax) +# CHECK-NEXT: 1 2 2.00 pextrd $1, %xmm0, %ecx +# CHECK-NEXT: 2 5 3.00 * pextrd $1, %xmm0, (%rax) +# CHECK-NEXT: 1 2 2.00 pextrq $1, %xmm0, %rcx +# CHECK-NEXT: 2 5 3.00 * pextrq $1, %xmm0, (%rax) +# CHECK-NEXT: 2 5 3.00 * pextrw $1, %xmm0, (%rax) +# CHECK-NEXT: 1 4 1.00 phminposuw %xmm0, %xmm2 +# CHECK-NEXT: 1 11 1.00 * phminposuw (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pinsrb $1, %eax, %xmm1 +# CHECK-NEXT: 1 8 0.33 * pinsrb $1, (%rax), %xmm1 +# CHECK-NEXT: 1 1 0.25 pinsrd $1, %eax, %xmm1 +# CHECK-NEXT: 1 8 0.33 * pinsrd $1, (%rax), %xmm1 +# CHECK-NEXT: 1 1 0.25 pinsrq $1, %rax, %xmm1 +# CHECK-NEXT: 1 8 0.33 * pinsrq $1, (%rax), %xmm1 +# CHECK-NEXT: 1 1 0.25 pmaxsb %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pmaxsb (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pmaxsd %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pmaxsd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pmaxud %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pmaxud (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pmaxuw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pmaxuw (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pminsb %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pminsb (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pminsd %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pminsd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pminud %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pminud (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pminuw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pminuw (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pmovsxbd %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pmovsxbd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pmovsxbq %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pmovsxbq (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pmovsxbw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pmovsxbw (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pmovsxdq %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pmovsxdq (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pmovsxwd %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pmovsxwd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pmovsxwq %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pmovsxwq (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pmovzxbd %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pmovzxbd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pmovzxbq %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pmovzxbq (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pmovzxbw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pmovzxbw (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pmovzxdq %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pmovzxdq (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pmovzxwd %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pmovzxwd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pmovzxwq %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pmovzxwq (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 pmuldq %xmm0, %xmm2 +# CHECK-NEXT: 1 11 1.00 * pmuldq (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 pmulld %xmm0, %xmm2 +# CHECK-NEXT: 2 11 1.00 * pmulld (%rax), %xmm2 +# CHECK-NEXT: 1 1 1.00 ptest %xmm0, %xmm1 +# CHECK-NEXT: 2 8 1.00 * ptest (%rax), %xmm1 +# CHECK-NEXT: 1 4 1.00 roundpd $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 11 1.00 * roundpd $1, (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 roundps $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 11 1.00 * roundps $1, (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 roundsd $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 11 1.00 * roundsd $1, (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 roundss $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 11 1.00 * roundss $1, (%rax), %xmm2 + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: 16.67 16.67 16.67 - - - - - 25.17 26.67 44.00 21.17 - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - blendpd $11, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - blendpd $11, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - blendps $11, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - blendps $11, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - blendvpd %xmm0, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - blendvpd %xmm0, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - blendvps %xmm0, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - blendvps %xmm0, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - dppd $22, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - dppd $22, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - dpps $22, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - dpps $22, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 2.50 - - extractps $1, %xmm0, %ecx +# CHECK-NEXT: 1.67 1.67 1.67 - - - - - - 0.50 2.50 - - extractps $1, %xmm0, (%rax) +# CHECK-NEXT: - - - - - - - - - 0.50 0.50 - - insertps $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 0.50 - - insertps $1, (%rax), %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movntdqa (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - mpsadbw $1, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - mpsadbw $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - packusdw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - packusdw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - pblendvb %xmm0, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - pblendvb %xmm0, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.33 0.33 - 0.33 - pblendw $11, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.33 0.33 - 0.33 - pblendw $11, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pcmpeqq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pcmpeqq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 2.50 - - pextrb $1, %xmm0, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 1.00 4.00 - - pextrb $1, %xmm0, (%rax) +# CHECK-NEXT: - - - - - - - - - 0.50 2.50 - - pextrd $1, %xmm0, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 1.00 4.00 - - pextrd $1, %xmm0, (%rax) +# CHECK-NEXT: - - - - - - - - - 0.50 2.50 - - pextrq $1, %xmm0, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 1.00 4.00 - - pextrq $1, %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 1.00 4.00 - - pextrw $1, %xmm0, (%rax) +# CHECK-NEXT: - - - - - - - - 1.00 - - - - phminposuw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - phminposuw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pinsrb $1, %eax, %xmm1 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pinsrb $1, (%rax), %xmm1 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pinsrd $1, %eax, %xmm1 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pinsrd $1, (%rax), %xmm1 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pinsrq $1, %rax, %xmm1 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pinsrq $1, (%rax), %xmm1 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pmaxsb %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pmaxsb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pmaxsd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pmaxsd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pmaxud %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pmaxud (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pmaxuw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pmaxuw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pminsb %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pminsb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pminsd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pminsd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pminud %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pminud (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pminuw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pminuw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pmovsxbd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pmovsxbd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pmovsxbq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pmovsxbq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pmovsxbw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pmovsxbw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pmovsxdq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pmovsxdq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pmovsxwd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pmovsxwd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pmovsxwq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pmovsxwq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pmovzxbd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pmovzxbd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pmovzxbq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pmovzxbq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pmovzxbw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pmovzxbw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pmovzxdq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pmovzxdq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pmovzxwd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pmovzxwd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pmovzxwq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pmovzxwq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - pmuldq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - pmuldq (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - pmulld %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - pmulld (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - 1.00 1.00 - - ptest %xmm0, %xmm1 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 1.00 1.00 - - ptest (%rax), %xmm1 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - roundpd $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - roundpd $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - roundps $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - roundps $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - roundsd $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - roundsd $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - roundss $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - roundss $1, (%rax), %xmm2 Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-sse42.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-sse42.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-sse42.s @@ -0,0 +1,104 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +crc32b %al, %ecx +crc32b (%rax), %ecx + +crc32l %eax, %ecx +crc32l (%rax), %ecx + +crc32w %ax, %ecx +crc32w (%rax), %ecx + +crc32b %al, %rcx +crc32b (%rax), %rcx + +crc32q %rax, %rcx +crc32q (%rax), %rcx + +pcmpestri $1, %xmm0, %xmm2 +pcmpestri $1, (%rax), %xmm2 + +pcmpestrm $1, %xmm0, %xmm2 +pcmpestrm $1, (%rax), %xmm2 + +pcmpistri $1, %xmm0, %xmm2 +pcmpistri $1, (%rax), %xmm2 + +pcmpistrm $1, %xmm0, %xmm2 +pcmpistrm $1, (%rax), %xmm2 + +pcmpgtq %xmm0, %xmm2 +pcmpgtq (%rax), %xmm2 + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 3 1.00 crc32b %al, %ecx +# CHECK-NEXT: 1 10 1.00 * crc32b (%rax), %ecx +# CHECK-NEXT: 1 3 1.00 crc32l %eax, %ecx +# CHECK-NEXT: 1 10 1.00 * crc32l (%rax), %ecx +# CHECK-NEXT: 1 3 1.00 crc32w %ax, %ecx +# CHECK-NEXT: 1 10 1.00 * crc32w (%rax), %ecx +# CHECK-NEXT: 1 3 1.00 crc32b %al, %rcx +# CHECK-NEXT: 1 10 1.00 * crc32b (%rax), %rcx +# CHECK-NEXT: 1 3 1.00 crc32q %rax, %rcx +# CHECK-NEXT: 1 10 1.00 * crc32q (%rax), %rcx +# CHECK-NEXT: 1 100 0.25 pcmpestri $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 100 0.25 * pcmpestri $1, (%rax), %xmm2 +# CHECK-NEXT: 1 100 0.25 pcmpestrm $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 100 0.25 * pcmpestrm $1, (%rax), %xmm2 +# CHECK-NEXT: 1 100 0.25 pcmpistri $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 100 0.25 * pcmpistri $1, (%rax), %xmm2 +# CHECK-NEXT: 1 100 0.25 pcmpistrm $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 100 0.25 * pcmpistrm $1, (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.50 pcmpgtq %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.50 * pcmpgtq (%rax), %xmm2 + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: 2.00 2.00 2.00 - - - - - 11.00 - - 1.00 - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - - - - - - 1.00 - - - - crc32b %al, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - crc32b (%rax), %ecx +# CHECK-NEXT: - - - - - - - - 1.00 - - - - crc32l %eax, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - crc32l (%rax), %ecx +# CHECK-NEXT: - - - - - - - - 1.00 - - - - crc32w %ax, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - crc32w (%rax), %ecx +# CHECK-NEXT: - - - - - - - - 1.00 - - - - crc32b %al, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - crc32b (%rax), %rcx +# CHECK-NEXT: - - - - - - - - 1.00 - - - - crc32q %rax, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - crc32q (%rax), %rcx +# CHECK-NEXT: - - - - - - - - - - - - - pcmpestri $1, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - pcmpestri $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - pcmpestrm $1, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - pcmpestrm $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - pcmpistri $1, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - pcmpistri $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - pcmpistrm $1, %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - pcmpistrm $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 - - 0.50 - pcmpgtq %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - - 0.50 - pcmpgtq (%rax), %xmm2 Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-sse4a.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-sse4a.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-sse4a.s @@ -0,0 +1,55 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +extrq %xmm0, %xmm2 +extrq $22, $2, %xmm2 + +insertq %xmm0, %xmm2 +insertq $22, $22, %xmm0, %xmm2 + +movntsd %xmm0, (%rax) +movntss %xmm0, (%rax) + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 2 1.00 extrq %xmm0, %xmm2 +# CHECK-NEXT: 1 2 1.00 extrq $22, $2, %xmm2 +# CHECK-NEXT: 1 4 1.00 insertq %xmm0, %xmm2 +# CHECK-NEXT: 1 4 1.00 insertq $22, $22, %xmm0, %xmm2 +# CHECK-NEXT: 1 8 1.00 * movntsd %xmm0, (%rax) +# CHECK-NEXT: 1 8 1.00 * movntss %xmm0, (%rax) + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: 0.67 0.67 0.67 - - - - - 1.00 3.00 5.00 1.00 - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - - - - - - - 0.50 1.50 - - extrq %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - 0.50 1.50 - - extrq $22, $2, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 1.00 - 0.50 - insertq %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 1.00 - 0.50 - insertq $22, $22, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 - - movntsd %xmm0, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 1.00 - - movntss %xmm0, (%rax) Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-ssse3.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-ssse3.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-ssse3.s @@ -0,0 +1,258 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +pabsb %mm0, %mm2 +pabsb (%rax), %mm2 + +pabsb %xmm0, %xmm2 +pabsb (%rax), %xmm2 + +pabsd %mm0, %mm2 +pabsd (%rax), %mm2 + +pabsd %xmm0, %xmm2 +pabsd (%rax), %xmm2 + +pabsw %mm0, %mm2 +pabsw (%rax), %mm2 + +pabsw %xmm0, %xmm2 +pabsw (%rax), %xmm2 + +palignr $1, %mm0, %mm2 +palignr $1, (%rax), %mm2 + +palignr $1, %xmm0, %xmm2 +palignr $1, (%rax), %xmm2 + +phaddd %mm0, %mm2 +phaddd (%rax), %mm2 + +phaddd %xmm0, %xmm2 +phaddd (%rax), %xmm2 + +phaddsw %mm0, %mm2 +phaddsw (%rax), %mm2 + +phaddsw %xmm0, %xmm2 +phaddsw (%rax), %xmm2 + +phaddw %mm0, %mm2 +phaddw (%rax), %mm2 + +phaddw %xmm0, %xmm2 +phaddw (%rax), %xmm2 + +phsubd %mm0, %mm2 +phsubd (%rax), %mm2 + +phsubd %xmm0, %xmm2 +phsubd (%rax), %xmm2 + +phsubsw %mm0, %mm2 +phsubsw (%rax), %mm2 + +phsubsw %xmm0, %xmm2 +phsubsw (%rax), %xmm2 + +phsubw %mm0, %mm2 +phsubw (%rax), %mm2 + +phsubw %xmm0, %xmm2 +phsubw (%rax), %xmm2 + +pmaddubsw %mm0, %mm2 +pmaddubsw (%rax), %mm2 + +pmaddubsw %xmm0, %xmm2 +pmaddubsw (%rax), %xmm2 + +pmulhrsw %mm0, %mm2 +pmulhrsw (%rax), %mm2 + +pmulhrsw %xmm0, %xmm2 +pmulhrsw (%rax), %xmm2 + +pshufb %mm0, %mm2 +pshufb (%rax), %mm2 + +pshufb %xmm0, %xmm2 +pshufb (%rax), %xmm2 + +psignb %mm0, %mm2 +psignb (%rax), %mm2 + +psignb %xmm0, %xmm2 +psignb (%rax), %xmm2 + +psignd %mm0, %mm2 +psignd (%rax), %mm2 + +psignd %xmm0, %xmm2 +psignd (%rax), %xmm2 + +psignw %mm0, %mm2 +psignw (%rax), %mm2 + +psignw %xmm0, %xmm2 +psignw (%rax), %xmm2 + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.25 pabsb %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * pabsb (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 pabsb %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pabsb (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pabsd %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * pabsd (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 pabsd %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pabsd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pabsw %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * pabsw (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 pabsw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pabsw (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 palignr $1, %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * palignr $1, (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 palignr $1, %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * palignr $1, (%rax), %xmm2 +# CHECK-NEXT: 1 100 0.25 phaddd %mm0, %mm2 +# CHECK-NEXT: 1 100 0.25 * phaddd (%rax), %mm2 +# CHECK-NEXT: 1 100 0.25 phaddd %xmm0, %xmm2 +# CHECK-NEXT: 1 100 0.25 * phaddd (%rax), %xmm2 +# CHECK-NEXT: 1 100 0.25 phaddsw %mm0, %mm2 +# CHECK-NEXT: 1 100 0.25 * phaddsw (%rax), %mm2 +# CHECK-NEXT: 1 100 0.25 phaddsw %xmm0, %xmm2 +# CHECK-NEXT: 1 100 0.25 * phaddsw (%rax), %xmm2 +# CHECK-NEXT: 1 100 0.25 phaddw %mm0, %mm2 +# CHECK-NEXT: 1 100 0.25 * phaddw (%rax), %mm2 +# CHECK-NEXT: 1 100 0.25 phaddw %xmm0, %xmm2 +# CHECK-NEXT: 1 100 0.25 * phaddw (%rax), %xmm2 +# CHECK-NEXT: 1 100 0.25 phsubd %mm0, %mm2 +# CHECK-NEXT: 1 100 0.25 * phsubd (%rax), %mm2 +# CHECK-NEXT: 1 100 0.25 phsubd %xmm0, %xmm2 +# CHECK-NEXT: 1 100 0.25 * phsubd (%rax), %xmm2 +# CHECK-NEXT: 1 100 0.25 phsubsw %mm0, %mm2 +# CHECK-NEXT: 1 100 0.25 * phsubsw (%rax), %mm2 +# CHECK-NEXT: 1 100 0.25 phsubsw %xmm0, %xmm2 +# CHECK-NEXT: 1 100 0.25 * phsubsw (%rax), %xmm2 +# CHECK-NEXT: 1 100 0.25 phsubw %mm0, %mm2 +# CHECK-NEXT: 1 100 0.25 * phsubw (%rax), %mm2 +# CHECK-NEXT: 1 100 0.25 phsubw %xmm0, %xmm2 +# CHECK-NEXT: 1 100 0.25 * phsubw (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 pmaddubsw %mm0, %mm2 +# CHECK-NEXT: 1 11 1.00 * pmaddubsw (%rax), %mm2 +# CHECK-NEXT: 1 4 1.00 pmaddubsw %xmm0, %xmm2 +# CHECK-NEXT: 1 11 1.00 * pmaddubsw (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 pmulhrsw %mm0, %mm2 +# CHECK-NEXT: 1 11 1.00 * pmulhrsw (%rax), %mm2 +# CHECK-NEXT: 1 4 1.00 pmulhrsw %xmm0, %xmm2 +# CHECK-NEXT: 1 11 1.00 * pmulhrsw (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 pshufb %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * pshufb (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 pshufb %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * pshufb (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 psignb %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * psignb (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 psignb %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * psignb (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 psignd %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * psignd (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 psignd %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * psignd (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.25 psignw %mm0, %mm2 +# CHECK-NEXT: 1 8 0.33 * psignw (%rax), %mm2 +# CHECK-NEXT: 1 1 0.25 psignw %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.33 * psignw (%rax), %xmm2 + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: 6.67 6.67 6.67 - - - - - 16.00 8.00 8.00 8.00 - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pabsb %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pabsb (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pabsb %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pabsb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pabsd %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pabsd (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pabsd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pabsd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pabsw %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pabsw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pabsw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pabsw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - palignr $1, %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - palignr $1, (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - palignr $1, %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - palignr $1, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - phaddd %mm0, %mm2 +# CHECK-NEXT: - - - - - - - - - - - - - phaddd (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - - - - phaddd %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - phaddd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - phaddsw %mm0, %mm2 +# CHECK-NEXT: - - - - - - - - - - - - - phaddsw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - - - - phaddsw %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - phaddsw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - phaddw %mm0, %mm2 +# CHECK-NEXT: - - - - - - - - - - - - - phaddw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - - - - phaddw %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - phaddw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - phsubd %mm0, %mm2 +# CHECK-NEXT: - - - - - - - - - - - - - phsubd (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - - - - phsubd %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - phsubd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - phsubsw %mm0, %mm2 +# CHECK-NEXT: - - - - - - - - - - - - - phsubsw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - - - - phsubsw %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - phsubsw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - phsubw %mm0, %mm2 +# CHECK-NEXT: - - - - - - - - - - - - - phsubw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - - - - - - phsubw %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - phsubw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - pmaddubsw %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - pmaddubsw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - pmaddubsw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - pmaddubsw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - pmulhrsw %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - pmulhrsw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - - pmulhrsw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - pmulhrsw (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pshufb %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pshufb (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - pshufb %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - pshufb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psignb %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - psignb (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psignb %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - psignb (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psignd %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - psignd (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psignd %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - psignd (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psignw %mm0, %mm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - psignw (%rax), %mm2 +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - psignw %xmm0, %xmm2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.25 0.25 0.25 0.25 - psignw (%rax), %xmm2 Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-x86_32.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-x86_32.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-x86_32.s @@ -0,0 +1,83 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=i686-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +aaa + +aad +aad $7 + +aam +aam $7 + +aas + +bound %bx, (%eax) +bound %ebx, (%eax) + +daa + +das + +into + +leave + +salc + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.25 aaa +# CHECK-NEXT: 1 100 0.25 aad +# CHECK-NEXT: 1 100 0.25 aad $7 +# CHECK-NEXT: 1 100 0.25 aam +# CHECK-NEXT: 1 100 0.25 aam $7 +# CHECK-NEXT: 1 100 0.25 aas +# CHECK-NEXT: 1 100 0.25 U bound %bx, (%eax) +# CHECK-NEXT: 1 100 0.25 U bound %ebx, (%eax) +# CHECK-NEXT: 1 100 0.25 daa +# CHECK-NEXT: 1 100 0.25 das +# CHECK-NEXT: 1 100 0.25 U into +# CHECK-NEXT: 2 8 0.33 * leave +# CHECK-NEXT: 1 1 0.25 U salc + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: 0.33 0.33 0.33 0.50 0.50 0.50 0.50 - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - - - - - - - - - - - aaa +# CHECK-NEXT: - - - - - - - - - - - - - aad +# CHECK-NEXT: - - - - - - - - - - - - - aad $7 +# CHECK-NEXT: - - - - - - - - - - - - - aam +# CHECK-NEXT: - - - - - - - - - - - - - aam $7 +# CHECK-NEXT: - - - - - - - - - - - - - aas +# CHECK-NEXT: - - - - - - - - - - - - - bound %bx, (%eax) +# CHECK-NEXT: - - - - - - - - - - - - - bound %ebx, (%eax) +# CHECK-NEXT: - - - - - - - - - - - - - daa +# CHECK-NEXT: - - - - - - - - - - - - - das +# CHECK-NEXT: - - - - - - - - - - - - - into +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - leave +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - salc Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-x86_64.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-x86_64.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-x86_64.s @@ -0,0 +1,2481 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +adcb $0, %al +adcb $0, %dil +adcb $0, (%rax) +adcb $7, %al +adcb $7, %dil +adcb $7, (%rax) +adcb %sil, %dil +adcb %sil, (%rax) +adcb (%rax), %dil + +adcw $0, %ax +adcw $0, %di +adcw $0, (%rax) +adcw $511, %ax +adcw $511, %di +adcw $511, (%rax) +adcw $7, %di +adcw $7, (%rax) +adcw %si, %di +adcw %si, (%rax) +adcw (%rax), %di + +adcl $0, %eax +adcl $0, %edi +adcl $0, (%rax) +adcl $665536, %eax +adcl $665536, %edi +adcl $665536, (%rax) +adcl $7, %edi +adcl $7, (%rax) +adcl %esi, %edi +adcl %esi, (%rax) +adcl (%rax), %edi + +adcq $0, %rax +adcq $0, %rdi +adcq $0, (%rax) +adcq $665536, %rax +adcq $665536, %rdi +adcq $665536, (%rax) +adcq $7, %rdi +adcq $7, (%rax) +adcq %rsi, %rdi +adcq %rsi, (%rax) +adcq (%rax), %rdi + +addb $7, %al +addb $7, %dil +addb $7, (%rax) +addb %sil, %dil +addb %sil, (%rax) +addb (%rax), %dil + +addw $511, %ax +addw $511, %di +addw $511, (%rax) +addw $7, %di +addw $7, (%rax) +addw %si, %di +addw %si, (%rax) +addw (%rax), %di + +addl $665536, %eax +addl $665536, %edi +addl $665536, (%rax) +addl $7, %edi +addl $7, (%rax) +addl %esi, %edi +addl %esi, (%rax) +addl (%rax), %edi + +addq $665536, %rax +addq $665536, %rdi +addq $665536, (%rax) +addq $7, %rdi +addq $7, (%rax) +addq %rsi, %rdi +addq %rsi, (%rax) +addq (%rax), %rdi + +andb $7, %al +andb $7, %dil +andb $7, (%rax) +andb %sil, %dil +andb %sil, (%rax) +andb (%rax), %dil + +andw $511, %ax +andw $511, %di +andw $511, (%rax) +andw $7, %di +andw $7, (%rax) +andw %si, %di +andw %si, (%rax) +andw (%rax), %di + +andl $665536, %eax +andl $665536, %edi +andl $665536, (%rax) +andl $7, %edi +andl $7, (%rax) +andl %esi, %edi +andl %esi, (%rax) +andl (%rax), %edi + +andq $665536, %rax +andq $665536, %rdi +andq $665536, (%rax) +andq $7, %rdi +andq $7, (%rax) +andq %rsi, %rdi +andq %rsi, (%rax) +andq (%rax), %rdi + +bsfw %si, %di +bsrw %si, %di +bsfw (%rax), %di +bsrw (%rax), %di + +bsfl %esi, %edi +bsrl %esi, %edi +bsfl (%rax), %edi +bsrl (%rax), %edi + +bsfq %rsi, %rdi +bsrq %rsi, %rdi +bsfq (%rax), %rdi +bsrq (%rax), %rdi + +bswap %eax +bswap %rax + +btw %si, %di +btcw %si, %di +btrw %si, %di +btsw %si, %di +btw %si, (%rax) +btcw %si, (%rax) +btrw %si, (%rax) +btsw %si, (%rax) +btw $7, %di +btcw $7, %di +btrw $7, %di +btsw $7, %di +btw $7, (%rax) +btcw $7, (%rax) +btrw $7, (%rax) +btsw $7, (%rax) + +btl %esi, %edi +btcl %esi, %edi +btrl %esi, %edi +btsl %esi, %edi +btl %esi, (%rax) +btcl %esi, (%rax) +btrl %esi, (%rax) +btsl %esi, (%rax) +btl $7, %edi +btcl $7, %edi +btrl $7, %edi +btsl $7, %edi +btl $7, (%rax) +btcl $7, (%rax) +btrl $7, (%rax) +btsl $7, (%rax) + +btq %rsi, %rdi +btcq %rsi, %rdi +btrq %rsi, %rdi +btsq %rsi, %rdi +btq %rsi, (%rax) +btcq %rsi, (%rax) +btrq %rsi, (%rax) +btsq %rsi, (%rax) +btq $7, %rdi +btcq $7, %rdi +btrq $7, %rdi +btsq $7, %rdi +btq $7, (%rax) +btcq $7, (%rax) +btrq $7, (%rax) +btsq $7, (%rax) + +cbw +cwde +cdqe +cwd +cdq +cqo + +clc +cld +cmc + +cmpb $7, %al +cmpb $7, %dil +cmpb $7, (%rax) +cmpb %sil, %dil +cmpb %sil, (%rax) +cmpb (%rax), %dil + +cmpw $511, %ax +cmpw $511, %di +cmpw $511, (%rax) +cmpw $7, %di +cmpw $7, (%rax) +cmpw %si, %di +cmpw %si, (%rax) +cmpw (%rax), %di + +cmpl $665536, %eax +cmpl $665536, %edi +cmpl $665536, (%rax) +cmpl $7, %edi +cmpl $7, (%rax) +cmpl %esi, %edi +cmpl %esi, (%rax) +cmpl (%rax), %edi + +cmpq $665536, %rax +cmpq $665536, %rdi +cmpq $665536, (%rax) +cmpq $7, %rdi +cmpq $7, (%rax) +cmpq %rsi, %rdi +cmpq %rsi, (%rax) +cmpq (%rax), %rdi + +cmpsb +cmpsw +cmpsl +cmpsq + +cmpxchgb %cl, %bl +cmpxchgb %cl, (%rbx) + +cmpxchgw %cx, %bx +cmpxchgw %cx, (%rbx) + +cmpxchgl %ecx, %ebx +cmpxchgl %ecx, (%rbx) + +cmpxchgq %rcx, %rbx +cmpxchgq %rcx, (%rbx) + +cpuid + +decb %dil +decb (%rax) +decw %di +decw (%rax) +decl %edi +decl (%rax) +decq %rdi +decq (%rax) + +divb %dil +divb (%rax) +divw %si +divw (%rax) +divl %edx +divl (%rax) +divq %rcx +divq (%rax) + +enter $7, $4095 + +idivb %dil +idivb (%rax) +idivw %si +idivw (%rax) +idivl %edx +idivl (%rax) +idivq %rcx +idivq (%rax) + +imulb %dil +imulb (%rax) + +imulw %di +imulw (%rax) +imulw %si, %di +imulw (%rax), %di +imulw $511, %si, %di +imulw $511, (%rax), %di +imulw $7, %si, %di +imulw $7, (%rax), %di + +imull %edi +imull (%rax) +imull %esi, %edi +imull (%rax), %edi +imull $665536, %esi, %edi +imull $665536, (%rax), %edi +imull $7, %esi, %edi +imull $7, (%rax), %edi + +imulq %rdi +imulq (%rax) +imulq %rsi, %rdi +imulq (%rax), %rdi +imulq $665536, %rsi, %rdi +imulq $665536, (%rax), %rdi +imulq $7, %rsi, %rdi +imulq $7, (%rax), %rdi + +inb $7, %al +inb %dx, %al +inw $7, %ax +inw %dx, %ax +inl $7, %eax +inl %dx, %eax + +incb %dil +incb (%rax) +incw %di +incw (%rax) +incl %edi +incl (%rax) +incq %rdi +incq (%rax) + +insb +insw +insl + +int $7 + +invlpg (%rax) +invlpga %rax, %ecx + +lahf + +leave + +lodsb +lodsw +lodsl +lodsq + +movsb +movsw +movsl +movsq + +movsbw %al, %di +movzbw %al, %di +movsbw (%rax), %di +movzbw (%rax), %di +movsbl %al, %edi +movzbl %al, %edi +movsbl (%rax), %edi +movzbl (%rax), %edi +movsbq %al, %rdi +movzbq %al, %rdi +movsbq (%rax), %rdi +movzbq (%rax), %rdi + +movswl %ax, %edi +movzwl %ax, %edi +movswl (%rax), %edi +movzwl (%rax), %edi +movswq %ax, %rdi +movzwq %ax, %rdi +movswq (%rax), %rdi +movzwq (%rax), %rdi + +movslq %eax, %rdi +movslq (%rax), %rdi + +mulb %dil +mulb (%rax) +mulw %si +mulw (%rax) +mull %edx +mull (%rax) +mulq %rcx +mulq (%rax) + +negb %dil +negb (%r8) +negw %si +negw (%r9) +negl %edx +negl (%rax) +negq %rcx +negq (%r10) + +nop +nopw %di +nopw (%rcx) +nopl %esi +nopl (%r8) +nopq %rdx +nopq (%r9) + +notb %dil +notb (%r8) +notw %si +notw (%r9) +notl %edx +notl (%rax) +notq %rcx +notq (%r10) + +orb $7, %al +orb $7, %dil +orb $7, (%rax) +orb %sil, %dil +orb %sil, (%rax) +orb (%rax), %dil + +orw $511, %ax +orw $511, %di +orw $511, (%rax) +orw $7, %di +orw $7, (%rax) +orw %si, %di +orw %si, (%rax) +orw (%rax), %di + +orl $665536, %eax +orl $665536, %edi +orl $665536, (%rax) +orl $7, %edi +orl $7, (%rax) +orl %esi, %edi +orl %esi, (%rax) +orl (%rax), %edi + +orq $665536, %rax +orq $665536, %rdi +orq $665536, (%rax) +orq $7, %rdi +orq $7, (%rax) +orq %rsi, %rdi +orq %rsi, (%rax) +orq (%rax), %rdi + +outb %al, $7 +outb %al, %dx +outw %ax, $7 +outw %ax, %dx +outl %eax, $7 +outl %eax, %dx + +outsb +outsw +outsl + +pause + +rclb %dil +rcrb %dil +rclb (%rax) +rcrb (%rax) +rclb $7, %dil +rcrb $7, %dil +rclb $7, (%rax) +rcrb $7, (%rax) +rclb %cl, %dil +rcrb %cl, %dil +rclb %cl, (%rax) +rcrb %cl, (%rax) + +rclw %di +rcrw %di +rclw (%rax) +rcrw (%rax) +rclw $7, %di +rcrw $7, %di +rclw $7, (%rax) +rcrw $7, (%rax) +rclw %cl, %di +rcrw %cl, %di +rclw %cl, (%rax) +rcrw %cl, (%rax) + +rcll %edi +rcrl %edi +rcll (%rax) +rcrl (%rax) +rcll $7, %edi +rcrl $7, %edi +rcll $7, (%rax) +rcrl $7, (%rax) +rcll %cl, %edi +rcrl %cl, %edi +rcll %cl, (%rax) +rcrl %cl, (%rax) + +rclq %rdi +rcrq %rdi +rclq (%rax) +rcrq (%rax) +rclq $7, %rdi +rcrq $7, %rdi +rclq $7, (%rax) +rcrq $7, (%rax) +rclq %cl, %rdi +rcrq %cl, %rdi +rclq %cl, (%rax) +rcrq %cl, (%rax) + +rdmsr +rdpmc +rdtsc +rdtscp + +rolb %dil +rorb %dil +rolb (%rax) +rorb (%rax) +rolb $7, %dil +rorb $7, %dil +rolb $7, (%rax) +rorb $7, (%rax) +rolb %cl, %dil +rorb %cl, %dil +rolb %cl, (%rax) +rorb %cl, (%rax) + +rolw %di +rorw %di +rolw (%rax) +rorw (%rax) +rolw $7, %di +rorw $7, %di +rolw $7, (%rax) +rorw $7, (%rax) +rolw %cl, %di +rorw %cl, %di +rolw %cl, (%rax) +rorw %cl, (%rax) + +roll %edi +rorl %edi +roll (%rax) +rorl (%rax) +roll $7, %edi +rorl $7, %edi +roll $7, (%rax) +rorl $7, (%rax) +roll %cl, %edi +rorl %cl, %edi +roll %cl, (%rax) +rorl %cl, (%rax) + +rolq %rdi +rorq %rdi +rolq (%rax) +rorq (%rax) +rolq $7, %rdi +rorq $7, %rdi +rolq $7, (%rax) +rorq $7, (%rax) +rolq %cl, %rdi +rorq %cl, %rdi +rolq %cl, (%rax) +rorq %cl, (%rax) + +sahf + +sarb %dil +shlb %dil +shrb %dil +sarb (%rax) +shlb (%rax) +shrb (%rax) +sarb $7, %dil +shlb $7, %dil +shrb $7, %dil +sarb $7, (%rax) +shlb $7, (%rax) +shrb $7, (%rax) +sarb %cl, %dil +shlb %cl, %dil +shrb %cl, %dil +sarb %cl, (%rax) +shlb %cl, (%rax) +shrb %cl, (%rax) + +sarw %di +shlw %di +shrw %di +sarw (%rax) +shlw (%rax) +shrw (%rax) +sarw $7, %di +shlw $7, %di +shrw $7, %di +sarw $7, (%rax) +shlw $7, (%rax) +shrw $7, (%rax) +sarw %cl, %di +shlw %cl, %di +shrw %cl, %di +sarw %cl, (%rax) +shlw %cl, (%rax) +shrw %cl, (%rax) + +sarl %edi +shll %edi +shrl %edi +sarl (%rax) +shll (%rax) +shrl (%rax) +sarl $7, %edi +shll $7, %edi +shrl $7, %edi +sarl $7, (%rax) +shll $7, (%rax) +shrl $7, (%rax) +sarl %cl, %edi +shll %cl, %edi +shrl %cl, %edi +sarl %cl, (%rax) +shll %cl, (%rax) +shrl %cl, (%rax) + +sarq %rdi +shlq %rdi +shrq %rdi +sarq (%rax) +shlq (%rax) +shrq (%rax) +sarq $7, %rdi +shlq $7, %rdi +shrq $7, %rdi +sarq $7, (%rax) +shlq $7, (%rax) +shrq $7, (%rax) +sarq %cl, %rdi +shlq %cl, %rdi +shrq %cl, %rdi +sarq %cl, (%rax) +shlq %cl, (%rax) +shrq %cl, (%rax) + +sbbb $0, %al +sbbb $0, %dil +sbbb $0, (%rax) +sbbb $7, %al +sbbb $7, %dil +sbbb $7, (%rax) +sbbb %sil, %dil +sbbb %sil, (%rax) +sbbb (%rax), %dil + +sbbw $0, %ax +sbbw $0, %di +sbbw $0, (%rax) +sbbw $511, %ax +sbbw $511, %di +sbbw $511, (%rax) +sbbw $7, %di +sbbw $7, (%rax) +sbbw %si, %di +sbbw %si, (%rax) +sbbw (%rax), %di + +sbbl $0, %eax +sbbl $0, %edi +sbbl $0, (%rax) +sbbl $665536, %eax +sbbl $665536, %edi +sbbl $665536, (%rax) +sbbl $7, %edi +sbbl $7, (%rax) +sbbl %esi, %edi +sbbl %esi, (%rax) +sbbl (%rax), %edi + +sbbq $0, %rax +sbbq $0, %rdi +sbbq $0, (%rax) +sbbq $665536, %rax +sbbq $665536, %rdi +sbbq $665536, (%rax) +sbbq $7, %rdi +sbbq $7, (%rax) +sbbq %rsi, %rdi +sbbq %rsi, (%rax) +sbbq (%rax), %rdi + +scasb +scasw +scasl +scasq + +seto %al +seto (%rax) +setno %al +setno (%rax) +setb %al +setb (%rax) +setnb %al +setnb (%rax) +setz %al +setz (%rax) +setnz %al +setnz (%rax) +seta %al +seta (%rax) +setna %al +setna (%rax) +sets %al +sets (%rax) +setns %al +setns (%rax) +setp %al +setp (%rax) +setnp %al +setnp (%rax) +setl %al +setl (%rax) +setnl %al +setnl (%rax) +setg %al +setg (%rax) +setng %al +setng (%rax) + +shldw %cl, %si, %di +shrdw %cl, %si, %di +shldw %cl, %si, (%rax) +shrdw %cl, %si, (%rax) +shldw $7, %si, %di +shrdw $7, %si, %di +shldw $7, %si, (%rax) +shrdw $7, %si, (%rax) + +shldl %cl, %esi, %edi +shrdl %cl, %esi, %edi +shldl %cl, %esi, (%rax) +shrdl %cl, %esi, (%rax) +shldl $7, %esi, %edi +shrdl $7, %esi, %edi +shldl $7, %esi, (%rax) +shrdl $7, %esi, (%rax) + +shldq %cl, %rsi, %rdi +shrdq %cl, %rsi, %rdi +shldq %cl, %rsi, (%rax) +shrdq %cl, %rsi, (%rax) +shldq $7, %rsi, %rdi +shrdq $7, %rsi, %rdi +shldq $7, %rsi, (%rax) +shrdq $7, %rsi, (%rax) + +stc +std + +stosb +stosw +stosl +stosq + +subb $7, %al +subb $7, %dil +subb $7, (%rax) +subb %sil, %dil +subb %sil, (%rax) +subb (%rax), %dil + +subw $511, %ax +subw $511, %di +subw $511, (%rax) +subw $7, %di +subw $7, (%rax) +subw %si, %di +subw %si, (%rax) +subw (%rax), %di + +subl $665536, %eax +subl $665536, %edi +subl $665536, (%rax) +subl $7, %edi +subl $7, (%rax) +subl %esi, %edi +subl %esi, (%rax) +subl (%rax), %edi + +subq $665536, %rax +subq $665536, %rdi +subq $665536, (%rax) +subq $7, %rdi +subq $7, (%rax) +subq %rsi, %rdi +subq %rsi, (%rax) +subq (%rax), %rdi + +testb $7, %al +testb $7, %dil +testb $7, (%rax) +testb %sil, %dil +testb %sil, (%rax) + +testw $511, %ax +testw $511, %di +testw $511, (%rax) +testw $7, %di +testw $7, (%rax) +testw %si, %di +testw %si, (%rax) + +testl $665536, %eax +testl $665536, %edi +testl $665536, (%rax) +testl $7, %edi +testl $7, (%rax) +testl %esi, %edi +testl %esi, (%rax) + +testq $665536, %rax +testq $665536, %rdi +testq $665536, (%rax) +testq $7, %rdi +testq $7, (%rax) +testq %rsi, %rdi +testq %rsi, (%rax) + +ud2 + +wrmsr + +xaddb %bl, %cl +xaddb %bl, (%rcx) + +xaddw %bx, %cx +xaddw %ax, (%rbx) + +xaddl %ebx, %ecx +xaddl %eax, (%rbx) + +xaddq %rbx, %rcx +xaddq %rax, (%rbx) + +xchgb %bl, %cl +xchgb %bl, (%rbx) + +xchgw %ax, %bx +xchgw %bx, %cx +xchgw %ax, (%rbx) + +xchgl %eax, %ebx +xchgl %ebx, %ecx +xchgl %eax, (%rbx) + +xchgq %rax, %rbx +xchgq %rbx, %rcx +xchgq %rax, (%rbx) + +xlatb + +xorb $7, %al +xorb $7, %dil +xorb $7, (%rax) +xorb %sil, %dil +xorb %sil, (%rax) +xorb (%rax), %dil + +xorw $511, %ax +xorw $511, %di +xorw $511, (%rax) +xorw $7, %di +xorw $7, (%rax) +xorw %si, %di +xorw %si, (%rax) +xorw (%rax), %di + +xorl $665536, %eax +xorl $665536, %edi +xorl $665536, (%rax) +xorl $7, %edi +xorl $7, (%rax) +xorl %esi, %edi +xorl %esi, (%rax) +xorl (%rax), %edi + +xorq $665536, %rax +xorq $665536, %rdi +xorq $665536, (%rax) +xorq $7, %rdi +xorq $7, (%rax) +xorq %rsi, %rdi +xorq %rsi, (%rax) +xorq (%rax), %rdi + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.25 adcb $0, %al +# CHECK-NEXT: 1 1 0.25 adcb $0, %dil +# CHECK-NEXT: 2 5 0.33 * * adcb $0, (%rax) +# CHECK-NEXT: 1 1 0.25 adcb $7, %al +# CHECK-NEXT: 1 1 0.25 adcb $7, %dil +# CHECK-NEXT: 2 5 0.33 * * adcb $7, (%rax) +# CHECK-NEXT: 1 1 0.25 adcb %sil, %dil +# CHECK-NEXT: 2 5 0.33 * * adcb %sil, (%rax) +# CHECK-NEXT: 2 5 0.33 * adcb (%rax), %dil +# CHECK-NEXT: 1 1 0.25 adcw $0, %ax +# CHECK-NEXT: 1 1 0.25 adcw $0, %di +# CHECK-NEXT: 2 5 0.33 * * adcw $0, (%rax) +# CHECK-NEXT: 1 1 0.25 adcw $511, %ax +# CHECK-NEXT: 1 1 0.25 adcw $511, %di +# CHECK-NEXT: 2 5 0.33 * * adcw $511, (%rax) +# CHECK-NEXT: 1 1 0.25 adcw $7, %di +# CHECK-NEXT: 2 5 0.33 * * adcw $7, (%rax) +# CHECK-NEXT: 1 1 0.25 adcw %si, %di +# CHECK-NEXT: 2 5 0.33 * * adcw %si, (%rax) +# CHECK-NEXT: 2 5 0.33 * adcw (%rax), %di +# CHECK-NEXT: 1 1 0.25 adcl $0, %eax +# CHECK-NEXT: 1 1 0.25 adcl $0, %edi +# CHECK-NEXT: 2 5 0.33 * * adcl $0, (%rax) +# CHECK-NEXT: 1 1 0.25 adcl $665536, %eax +# CHECK-NEXT: 1 1 0.25 adcl $665536, %edi +# CHECK-NEXT: 2 5 0.33 * * adcl $665536, (%rax) +# CHECK-NEXT: 1 1 0.25 adcl $7, %edi +# CHECK-NEXT: 2 5 0.33 * * adcl $7, (%rax) +# CHECK-NEXT: 1 1 0.25 adcl %esi, %edi +# CHECK-NEXT: 2 5 0.33 * * adcl %esi, (%rax) +# CHECK-NEXT: 2 5 0.33 * adcl (%rax), %edi +# CHECK-NEXT: 1 1 0.25 adcq $0, %rax +# CHECK-NEXT: 1 1 0.25 adcq $0, %rdi +# CHECK-NEXT: 2 5 0.33 * * adcq $0, (%rax) +# CHECK-NEXT: 1 1 0.25 adcq $665536, %rax +# CHECK-NEXT: 1 1 0.25 adcq $665536, %rdi +# CHECK-NEXT: 2 5 0.33 * * adcq $665536, (%rax) +# CHECK-NEXT: 1 1 0.25 adcq $7, %rdi +# CHECK-NEXT: 2 5 0.33 * * adcq $7, (%rax) +# CHECK-NEXT: 1 1 0.25 adcq %rsi, %rdi +# CHECK-NEXT: 2 5 0.33 * * adcq %rsi, (%rax) +# CHECK-NEXT: 2 5 0.33 * adcq (%rax), %rdi +# CHECK-NEXT: 1 1 0.25 addb $7, %al +# CHECK-NEXT: 1 1 0.25 addb $7, %dil +# CHECK-NEXT: 2 5 0.33 * * addb $7, (%rax) +# CHECK-NEXT: 1 1 0.25 addb %sil, %dil +# CHECK-NEXT: 2 5 0.33 * * addb %sil, (%rax) +# CHECK-NEXT: 2 5 0.33 * addb (%rax), %dil +# CHECK-NEXT: 1 1 0.25 addw $511, %ax +# CHECK-NEXT: 1 1 0.25 addw $511, %di +# CHECK-NEXT: 2 5 0.33 * * addw $511, (%rax) +# CHECK-NEXT: 1 1 0.25 addw $7, %di +# CHECK-NEXT: 2 5 0.33 * * addw $7, (%rax) +# CHECK-NEXT: 1 1 0.25 addw %si, %di +# CHECK-NEXT: 2 5 0.33 * * addw %si, (%rax) +# CHECK-NEXT: 2 5 0.33 * addw (%rax), %di +# CHECK-NEXT: 1 1 0.25 addl $665536, %eax +# CHECK-NEXT: 1 1 0.25 addl $665536, %edi +# CHECK-NEXT: 2 5 0.33 * * addl $665536, (%rax) +# CHECK-NEXT: 1 1 0.25 addl $7, %edi +# CHECK-NEXT: 2 5 0.33 * * addl $7, (%rax) +# CHECK-NEXT: 1 1 0.25 addl %esi, %edi +# CHECK-NEXT: 2 5 0.33 * * addl %esi, (%rax) +# CHECK-NEXT: 2 5 0.33 * addl (%rax), %edi +# CHECK-NEXT: 1 1 0.25 addq $665536, %rax +# CHECK-NEXT: 1 1 0.25 addq $665536, %rdi +# CHECK-NEXT: 2 5 0.33 * * addq $665536, (%rax) +# CHECK-NEXT: 1 1 0.25 addq $7, %rdi +# CHECK-NEXT: 2 5 0.33 * * addq $7, (%rax) +# CHECK-NEXT: 1 1 0.25 addq %rsi, %rdi +# CHECK-NEXT: 2 5 0.33 * * addq %rsi, (%rax) +# CHECK-NEXT: 2 5 0.33 * addq (%rax), %rdi +# CHECK-NEXT: 1 1 0.25 andb $7, %al +# CHECK-NEXT: 1 1 0.25 andb $7, %dil +# CHECK-NEXT: 2 5 0.33 * * andb $7, (%rax) +# CHECK-NEXT: 1 1 0.25 andb %sil, %dil +# CHECK-NEXT: 2 5 0.33 * * andb %sil, (%rax) +# CHECK-NEXT: 2 5 0.33 * andb (%rax), %dil +# CHECK-NEXT: 1 1 0.25 andw $511, %ax +# CHECK-NEXT: 1 1 0.25 andw $511, %di +# CHECK-NEXT: 2 5 0.33 * * andw $511, (%rax) +# CHECK-NEXT: 1 1 0.25 andw $7, %di +# CHECK-NEXT: 2 5 0.33 * * andw $7, (%rax) +# CHECK-NEXT: 1 1 0.25 andw %si, %di +# CHECK-NEXT: 2 5 0.33 * * andw %si, (%rax) +# CHECK-NEXT: 2 5 0.33 * andw (%rax), %di +# CHECK-NEXT: 1 1 0.25 andl $665536, %eax +# CHECK-NEXT: 1 1 0.25 andl $665536, %edi +# CHECK-NEXT: 2 5 0.33 * * andl $665536, (%rax) +# CHECK-NEXT: 1 1 0.25 andl $7, %edi +# CHECK-NEXT: 2 5 0.33 * * andl $7, (%rax) +# CHECK-NEXT: 1 1 0.25 andl %esi, %edi +# CHECK-NEXT: 2 5 0.33 * * andl %esi, (%rax) +# CHECK-NEXT: 2 5 0.33 * andl (%rax), %edi +# CHECK-NEXT: 1 1 0.25 andq $665536, %rax +# CHECK-NEXT: 1 1 0.25 andq $665536, %rdi +# CHECK-NEXT: 2 5 0.33 * * andq $665536, (%rax) +# CHECK-NEXT: 1 1 0.25 andq $7, %rdi +# CHECK-NEXT: 2 5 0.33 * * andq $7, (%rax) +# CHECK-NEXT: 1 1 0.25 andq %rsi, %rdi +# CHECK-NEXT: 2 5 0.33 * * andq %rsi, (%rax) +# CHECK-NEXT: 2 5 0.33 * andq (%rax), %rdi +# CHECK-NEXT: 1 3 0.25 bsfw %si, %di +# CHECK-NEXT: 1 3 0.25 bsrw %si, %di +# CHECK-NEXT: 2 7 0.33 * bsfw (%rax), %di +# CHECK-NEXT: 2 7 0.33 * bsrw (%rax), %di +# CHECK-NEXT: 1 3 0.25 bsfl %esi, %edi +# CHECK-NEXT: 1 3 0.25 bsrl %esi, %edi +# CHECK-NEXT: 2 7 0.33 * bsfl (%rax), %edi +# CHECK-NEXT: 2 7 0.33 * bsrl (%rax), %edi +# CHECK-NEXT: 1 3 0.25 bsfq %rsi, %rdi +# CHECK-NEXT: 1 3 0.25 bsrq %rsi, %rdi +# CHECK-NEXT: 2 7 0.33 * bsfq (%rax), %rdi +# CHECK-NEXT: 2 7 0.33 * bsrq (%rax), %rdi +# CHECK-NEXT: 1 1 1.00 bswapl %eax +# CHECK-NEXT: 1 1 1.00 bswapq %rax +# CHECK-NEXT: 1 1 0.25 btw %si, %di +# CHECK-NEXT: 2 2 0.25 btcw %si, %di +# CHECK-NEXT: 2 2 0.25 btrw %si, %di +# CHECK-NEXT: 2 2 0.25 btsw %si, %di +# CHECK-NEXT: 2 5 0.33 * btw %si, (%rax) +# CHECK-NEXT: 2 6 0.33 * * btcw %si, (%rax) +# CHECK-NEXT: 2 6 0.33 * * btrw %si, (%rax) +# CHECK-NEXT: 2 6 0.33 * * btsw %si, (%rax) +# CHECK-NEXT: 1 1 0.25 btw $7, %di +# CHECK-NEXT: 2 2 0.25 btcw $7, %di +# CHECK-NEXT: 2 2 0.25 btrw $7, %di +# CHECK-NEXT: 2 2 0.25 btsw $7, %di +# CHECK-NEXT: 2 5 0.33 * btw $7, (%rax) +# CHECK-NEXT: 2 6 0.33 * * btcw $7, (%rax) +# CHECK-NEXT: 2 6 0.33 * * btrw $7, (%rax) +# CHECK-NEXT: 2 6 0.33 * * btsw $7, (%rax) +# CHECK-NEXT: 1 1 0.25 btl %esi, %edi +# CHECK-NEXT: 2 2 0.25 btcl %esi, %edi +# CHECK-NEXT: 2 2 0.25 btrl %esi, %edi +# CHECK-NEXT: 2 2 0.25 btsl %esi, %edi +# CHECK-NEXT: 2 5 0.33 * btl %esi, (%rax) +# CHECK-NEXT: 2 6 0.33 * * btcl %esi, (%rax) +# CHECK-NEXT: 2 6 0.33 * * btrl %esi, (%rax) +# CHECK-NEXT: 2 6 0.33 * * btsl %esi, (%rax) +# CHECK-NEXT: 1 1 0.25 btl $7, %edi +# CHECK-NEXT: 2 2 0.25 btcl $7, %edi +# CHECK-NEXT: 2 2 0.25 btrl $7, %edi +# CHECK-NEXT: 2 2 0.25 btsl $7, %edi +# CHECK-NEXT: 2 5 0.33 * btl $7, (%rax) +# CHECK-NEXT: 2 6 0.33 * * btcl $7, (%rax) +# CHECK-NEXT: 2 6 0.33 * * btrl $7, (%rax) +# CHECK-NEXT: 2 6 0.33 * * btsl $7, (%rax) +# CHECK-NEXT: 1 1 0.25 btq %rsi, %rdi +# CHECK-NEXT: 2 2 0.25 btcq %rsi, %rdi +# CHECK-NEXT: 2 2 0.25 btrq %rsi, %rdi +# CHECK-NEXT: 2 2 0.25 btsq %rsi, %rdi +# CHECK-NEXT: 2 5 0.33 * btq %rsi, (%rax) +# CHECK-NEXT: 2 6 0.33 * * btcq %rsi, (%rax) +# CHECK-NEXT: 2 6 0.33 * * btrq %rsi, (%rax) +# CHECK-NEXT: 2 6 0.33 * * btsq %rsi, (%rax) +# CHECK-NEXT: 1 1 0.25 btq $7, %rdi +# CHECK-NEXT: 2 2 0.25 btcq $7, %rdi +# CHECK-NEXT: 2 2 0.25 btrq $7, %rdi +# CHECK-NEXT: 2 2 0.25 btsq $7, %rdi +# CHECK-NEXT: 2 5 0.33 * btq $7, (%rax) +# CHECK-NEXT: 2 6 0.33 * * btcq $7, (%rax) +# CHECK-NEXT: 2 6 0.33 * * btrq $7, (%rax) +# CHECK-NEXT: 2 6 0.33 * * btsq $7, (%rax) +# CHECK-NEXT: 1 1 0.25 cbtw +# CHECK-NEXT: 1 1 0.25 cwtl +# CHECK-NEXT: 1 1 0.25 cltq +# CHECK-NEXT: 1 1 0.25 cwtd +# CHECK-NEXT: 1 1 0.25 cltd +# CHECK-NEXT: 1 1 0.25 cqto +# CHECK-NEXT: 1 1 0.25 U clc +# CHECK-NEXT: 1 1 0.25 U cld +# CHECK-NEXT: 1 1 0.25 U cmc +# CHECK-NEXT: 1 1 0.25 cmpb $7, %al +# CHECK-NEXT: 1 1 0.25 cmpb $7, %dil +# CHECK-NEXT: 2 5 0.33 * cmpb $7, (%rax) +# CHECK-NEXT: 1 1 0.25 cmpb %sil, %dil +# CHECK-NEXT: 2 5 0.33 * cmpb %sil, (%rax) +# CHECK-NEXT: 2 5 0.33 * cmpb (%rax), %dil +# CHECK-NEXT: 1 1 0.25 cmpw $511, %ax +# CHECK-NEXT: 1 1 0.25 cmpw $511, %di +# CHECK-NEXT: 2 5 0.33 * cmpw $511, (%rax) +# CHECK-NEXT: 1 1 0.25 cmpw $7, %di +# CHECK-NEXT: 2 5 0.33 * cmpw $7, (%rax) +# CHECK-NEXT: 1 1 0.25 cmpw %si, %di +# CHECK-NEXT: 2 5 0.33 * cmpw %si, (%rax) +# CHECK-NEXT: 2 5 0.33 * cmpw (%rax), %di +# CHECK-NEXT: 1 1 0.25 cmpl $665536, %eax +# CHECK-NEXT: 1 1 0.25 cmpl $665536, %edi +# CHECK-NEXT: 2 5 0.33 * cmpl $665536, (%rax) +# CHECK-NEXT: 1 1 0.25 cmpl $7, %edi +# CHECK-NEXT: 2 5 0.33 * cmpl $7, (%rax) +# CHECK-NEXT: 1 1 0.25 cmpl %esi, %edi +# CHECK-NEXT: 2 5 0.33 * cmpl %esi, (%rax) +# CHECK-NEXT: 2 5 0.33 * cmpl (%rax), %edi +# CHECK-NEXT: 1 1 0.25 cmpq $665536, %rax +# CHECK-NEXT: 1 1 0.25 cmpq $665536, %rdi +# CHECK-NEXT: 2 5 0.33 * cmpq $665536, (%rax) +# CHECK-NEXT: 1 1 0.25 cmpq $7, %rdi +# CHECK-NEXT: 2 5 0.33 * cmpq $7, (%rax) +# CHECK-NEXT: 1 1 0.25 cmpq %rsi, %rdi +# CHECK-NEXT: 2 5 0.33 * cmpq %rsi, (%rax) +# CHECK-NEXT: 2 5 0.33 * cmpq (%rax), %rdi +# CHECK-NEXT: 1 100 0.25 U cmpsb %es:(%rdi), (%rsi) +# CHECK-NEXT: 1 100 0.25 U cmpsw %es:(%rdi), (%rsi) +# CHECK-NEXT: 1 100 0.25 U cmpsl %es:(%rdi), (%rsi) +# CHECK-NEXT: 1 100 0.25 U cmpsq %es:(%rdi), (%rsi) +# CHECK-NEXT: 1 1 0.25 cmpxchgb %cl, %bl +# CHECK-NEXT: 5 8 0.33 * * cmpxchgb %cl, (%rbx) +# CHECK-NEXT: 1 1 0.25 cmpxchgw %cx, %bx +# CHECK-NEXT: 5 8 0.33 * * cmpxchgw %cx, (%rbx) +# CHECK-NEXT: 1 1 0.25 cmpxchgl %ecx, %ebx +# CHECK-NEXT: 5 8 0.33 * * cmpxchgl %ecx, (%rbx) +# CHECK-NEXT: 1 1 0.25 cmpxchgq %rcx, %rbx +# CHECK-NEXT: 5 8 0.33 * * cmpxchgq %rcx, (%rbx) +# CHECK-NEXT: 1 100 0.25 U cpuid +# CHECK-NEXT: 1 1 0.25 decb %dil +# CHECK-NEXT: 2 5 0.33 * * decb (%rax) +# CHECK-NEXT: 1 1 0.25 decw %di +# CHECK-NEXT: 2 5 0.33 * * decw (%rax) +# CHECK-NEXT: 1 1 0.25 decl %edi +# CHECK-NEXT: 2 5 0.33 * * decl (%rax) +# CHECK-NEXT: 1 1 0.25 decq %rdi +# CHECK-NEXT: 2 5 0.33 * * decq (%rax) +# CHECK-NEXT: 1 15 15.00 U divb %dil +# CHECK-NEXT: 2 19 15.00 * U divb (%rax) +# CHECK-NEXT: 2 17 17.00 U divw %si +# CHECK-NEXT: 3 21 17.00 * U divw (%rax) +# CHECK-NEXT: 2 25 25.00 U divl %edx +# CHECK-NEXT: 3 29 25.00 * U divl (%rax) +# CHECK-NEXT: 2 41 41.00 U divq %rcx +# CHECK-NEXT: 3 45 41.00 * U divq (%rax) +# CHECK-NEXT: 1 100 0.25 U enter $7, $4095 +# CHECK-NEXT: 1 15 15.00 U idivb %dil +# CHECK-NEXT: 2 19 15.00 * U idivb (%rax) +# CHECK-NEXT: 2 17 17.00 U idivw %si +# CHECK-NEXT: 3 21 17.00 * U idivw (%rax) +# CHECK-NEXT: 2 25 25.00 U idivl %edx +# CHECK-NEXT: 3 29 25.00 * U idivl (%rax) +# CHECK-NEXT: 2 41 41.00 U idivq %rcx +# CHECK-NEXT: 3 45 41.00 * U idivq (%rax) +# CHECK-NEXT: 1 4 1.00 imulb %dil +# CHECK-NEXT: 2 8 1.00 * imulb (%rax) +# CHECK-NEXT: 1 3 1.00 imulw %di +# CHECK-NEXT: 1 8 1.00 * imulw (%rax) +# CHECK-NEXT: 1 3 1.00 imulw %si, %di +# CHECK-NEXT: 1 8 1.00 * imulw (%rax), %di +# CHECK-NEXT: 1 3 1.00 imulw $511, %si, %di +# CHECK-NEXT: 1 8 1.00 * imulw $511, (%rax), %di +# CHECK-NEXT: 1 3 1.00 imulw $7, %si, %di +# CHECK-NEXT: 1 8 1.00 * imulw $7, (%rax), %di +# CHECK-NEXT: 1 3 1.00 imull %edi +# CHECK-NEXT: 1 8 1.00 * imull (%rax) +# CHECK-NEXT: 1 3 1.00 imull %esi, %edi +# CHECK-NEXT: 1 8 1.00 * imull (%rax), %edi +# CHECK-NEXT: 1 3 1.00 imull $665536, %esi, %edi +# CHECK-NEXT: 1 8 1.00 * imull $665536, (%rax), %edi +# CHECK-NEXT: 1 3 1.00 imull $7, %esi, %edi +# CHECK-NEXT: 1 8 1.00 * imull $7, (%rax), %edi +# CHECK-NEXT: 2 4 1.00 imulq %rdi +# CHECK-NEXT: 2 9 1.00 * imulq (%rax) +# CHECK-NEXT: 2 4 1.00 imulq %rsi, %rdi +# CHECK-NEXT: 2 9 1.00 * imulq (%rax), %rdi +# CHECK-NEXT: 2 4 1.00 imulq $665536, %rsi, %rdi +# CHECK-NEXT: 2 9 1.00 * imulq $665536, (%rax), %rdi +# CHECK-NEXT: 2 4 1.00 imulq $7, %rsi, %rdi +# CHECK-NEXT: 2 9 1.00 * imulq $7, (%rax), %rdi +# CHECK-NEXT: 1 100 0.25 U inb $7, %al +# CHECK-NEXT: 1 100 0.25 U inb %dx, %al +# CHECK-NEXT: 1 100 0.25 U inw $7, %ax +# CHECK-NEXT: 1 100 0.25 U inw %dx, %ax +# CHECK-NEXT: 1 100 0.25 U inl $7, %eax +# CHECK-NEXT: 1 100 0.25 U inl %dx, %eax +# CHECK-NEXT: 1 1 0.25 incb %dil +# CHECK-NEXT: 2 5 0.33 * * incb (%rax) +# CHECK-NEXT: 1 1 0.25 incw %di +# CHECK-NEXT: 2 5 0.33 * * incw (%rax) +# CHECK-NEXT: 1 1 0.25 incl %edi +# CHECK-NEXT: 2 5 0.33 * * incl (%rax) +# CHECK-NEXT: 1 1 0.25 incq %rdi +# CHECK-NEXT: 2 5 0.33 * * incq (%rax) +# CHECK-NEXT: 1 100 0.25 U insb %dx, %es:(%rdi) +# CHECK-NEXT: 1 100 0.25 U insw %dx, %es:(%rdi) +# CHECK-NEXT: 1 100 0.25 U insl %dx, %es:(%rdi) +# CHECK-NEXT: 1 100 0.25 * * U int $7 +# CHECK-NEXT: 1 100 0.25 U invlpg (%rax) +# CHECK-NEXT: 1 100 0.25 U invlpga %rax, %ecx +# CHECK-NEXT: 1 100 0.25 lahf +# CHECK-NEXT: 2 8 0.33 * leave +# CHECK-NEXT: 1 100 0.25 U lodsb (%rsi), %al +# CHECK-NEXT: 1 100 0.25 U lodsw (%rsi), %ax +# CHECK-NEXT: 1 100 0.25 U lodsl (%rsi), %eax +# CHECK-NEXT: 1 100 0.25 U lodsq (%rsi), %rax +# CHECK-NEXT: 1 100 0.25 U movsb (%rsi), %es:(%rdi) +# CHECK-NEXT: 1 100 0.25 U movsw (%rsi), %es:(%rdi) +# CHECK-NEXT: 1 100 0.25 U movsl (%rsi), %es:(%rdi) +# CHECK-NEXT: 1 100 0.25 U movsq (%rsi), %es:(%rdi) +# CHECK-NEXT: 1 1 0.25 movsbw %al, %di +# CHECK-NEXT: 1 1 0.25 movzbw %al, %di +# CHECK-NEXT: 2 5 0.33 * movsbw (%rax), %di +# CHECK-NEXT: 2 5 0.33 * movzbw (%rax), %di +# CHECK-NEXT: 1 1 0.25 movsbl %al, %edi +# CHECK-NEXT: 1 1 0.25 movzbl %al, %edi +# CHECK-NEXT: 1 8 0.33 * movsbl (%rax), %edi +# CHECK-NEXT: 1 8 0.33 * movzbl (%rax), %edi +# CHECK-NEXT: 1 1 0.25 movsbq %al, %rdi +# CHECK-NEXT: 1 1 0.25 movzbq %al, %rdi +# CHECK-NEXT: 2 5 0.33 * movsbq (%rax), %rdi +# CHECK-NEXT: 2 5 0.33 * movzbq (%rax), %rdi +# CHECK-NEXT: 1 1 0.25 movswl %ax, %edi +# CHECK-NEXT: 1 1 0.25 movzwl %ax, %edi +# CHECK-NEXT: 1 8 0.33 * movswl (%rax), %edi +# CHECK-NEXT: 1 8 0.33 * movzwl (%rax), %edi +# CHECK-NEXT: 1 1 0.25 movswq %ax, %rdi +# CHECK-NEXT: 1 1 0.25 movzwq %ax, %rdi +# CHECK-NEXT: 2 5 0.33 * movswq (%rax), %rdi +# CHECK-NEXT: 2 5 0.33 * movzwq (%rax), %rdi +# CHECK-NEXT: 1 1 0.25 movslq %eax, %rdi +# CHECK-NEXT: 2 5 0.33 * movslq (%rax), %rdi +# CHECK-NEXT: 1 4 1.00 mulb %dil +# CHECK-NEXT: 2 8 1.00 * mulb (%rax) +# CHECK-NEXT: 1 3 1.00 mulw %si +# CHECK-NEXT: 1 8 1.00 * mulw (%rax) +# CHECK-NEXT: 1 3 1.00 mull %edx +# CHECK-NEXT: 1 8 1.00 * mull (%rax) +# CHECK-NEXT: 2 4 1.00 mulq %rcx +# CHECK-NEXT: 2 9 1.00 * mulq (%rax) +# CHECK-NEXT: 1 1 0.25 negb %dil +# CHECK-NEXT: 2 5 0.33 * * negb (%r8) +# CHECK-NEXT: 1 1 0.25 negw %si +# CHECK-NEXT: 2 5 0.33 * * negw (%r9) +# CHECK-NEXT: 1 1 0.25 negl %edx +# CHECK-NEXT: 2 5 0.33 * * negl (%rax) +# CHECK-NEXT: 1 1 0.25 negq %rcx +# CHECK-NEXT: 2 5 0.33 * * negq (%r10) +# CHECK-NEXT: 1 1 0.25 nop +# CHECK-NEXT: 1 1 0.25 nopw %di +# CHECK-NEXT: 1 1 0.25 nopw (%rcx) +# CHECK-NEXT: 1 1 0.25 nopl %esi +# CHECK-NEXT: 1 1 0.25 nopl (%r8) +# CHECK-NEXT: 1 1 0.25 nopq %rdx +# CHECK-NEXT: 1 1 0.25 nopq (%r9) +# CHECK-NEXT: 1 1 0.25 notb %dil +# CHECK-NEXT: 2 5 0.33 * * notb (%r8) +# CHECK-NEXT: 1 1 0.25 notw %si +# CHECK-NEXT: 2 5 0.33 * * notw (%r9) +# CHECK-NEXT: 1 1 0.25 notl %edx +# CHECK-NEXT: 2 5 0.33 * * notl (%rax) +# CHECK-NEXT: 1 1 0.25 notq %rcx +# CHECK-NEXT: 2 5 0.33 * * notq (%r10) +# CHECK-NEXT: 1 1 0.25 orb $7, %al +# CHECK-NEXT: 1 1 0.25 orb $7, %dil +# CHECK-NEXT: 2 5 0.33 * * orb $7, (%rax) +# CHECK-NEXT: 1 1 0.25 orb %sil, %dil +# CHECK-NEXT: 2 5 0.33 * * orb %sil, (%rax) +# CHECK-NEXT: 2 5 0.33 * orb (%rax), %dil +# CHECK-NEXT: 1 1 0.25 orw $511, %ax +# CHECK-NEXT: 1 1 0.25 orw $511, %di +# CHECK-NEXT: 2 5 0.33 * * orw $511, (%rax) +# CHECK-NEXT: 1 1 0.25 orw $7, %di +# CHECK-NEXT: 2 5 0.33 * * orw $7, (%rax) +# CHECK-NEXT: 1 1 0.25 orw %si, %di +# CHECK-NEXT: 2 5 0.33 * * orw %si, (%rax) +# CHECK-NEXT: 2 5 0.33 * orw (%rax), %di +# CHECK-NEXT: 1 1 0.25 orl $665536, %eax +# CHECK-NEXT: 1 1 0.25 orl $665536, %edi +# CHECK-NEXT: 2 5 0.33 * * orl $665536, (%rax) +# CHECK-NEXT: 1 1 0.25 orl $7, %edi +# CHECK-NEXT: 2 5 0.33 * * orl $7, (%rax) +# CHECK-NEXT: 1 1 0.25 orl %esi, %edi +# CHECK-NEXT: 2 5 0.33 * * orl %esi, (%rax) +# CHECK-NEXT: 2 5 0.33 * orl (%rax), %edi +# CHECK-NEXT: 1 1 0.25 orq $665536, %rax +# CHECK-NEXT: 1 1 0.25 orq $665536, %rdi +# CHECK-NEXT: 2 5 0.33 * * orq $665536, (%rax) +# CHECK-NEXT: 1 1 0.25 orq $7, %rdi +# CHECK-NEXT: 2 5 0.33 * * orq $7, (%rax) +# CHECK-NEXT: 1 1 0.25 orq %rsi, %rdi +# CHECK-NEXT: 2 5 0.33 * * orq %rsi, (%rax) +# CHECK-NEXT: 2 5 0.33 * orq (%rax), %rdi +# CHECK-NEXT: 1 100 0.25 U outb %al, $7 +# CHECK-NEXT: 1 100 0.25 U outb %al, %dx +# CHECK-NEXT: 1 100 0.25 U outw %ax, $7 +# CHECK-NEXT: 1 100 0.25 U outw %ax, %dx +# CHECK-NEXT: 1 100 0.25 U outl %eax, $7 +# CHECK-NEXT: 1 100 0.25 U outl %eax, %dx +# CHECK-NEXT: 1 100 0.25 U outsb (%rsi), %dx +# CHECK-NEXT: 1 100 0.25 U outsw (%rsi), %dx +# CHECK-NEXT: 1 100 0.25 U outsl (%rsi), %dx +# CHECK-NEXT: 1 100 0.25 * * U pause +# CHECK-NEXT: 1 1 0.25 rclb %dil +# CHECK-NEXT: 1 1 0.25 rcrb %dil +# CHECK-NEXT: 1 100 0.25 * rclb (%rax) +# CHECK-NEXT: 1 100 0.25 * rcrb (%rax) +# CHECK-NEXT: 1 1 0.25 rclb $7, %dil +# CHECK-NEXT: 1 1 0.25 rcrb $7, %dil +# CHECK-NEXT: 1 100 0.25 * rclb $7, (%rax) +# CHECK-NEXT: 1 100 0.25 * rcrb $7, (%rax) +# CHECK-NEXT: 1 1 0.25 rclb %cl, %dil +# CHECK-NEXT: 1 1 0.25 rcrb %cl, %dil +# CHECK-NEXT: 1 100 0.25 * rclb %cl, (%rax) +# CHECK-NEXT: 1 100 0.25 * rcrb %cl, (%rax) +# CHECK-NEXT: 1 1 0.25 rclw %di +# CHECK-NEXT: 1 1 0.25 rcrw %di +# CHECK-NEXT: 1 100 0.25 * rclw (%rax) +# CHECK-NEXT: 1 100 0.25 * rcrw (%rax) +# CHECK-NEXT: 1 1 0.25 rclw $7, %di +# CHECK-NEXT: 1 1 0.25 rcrw $7, %di +# CHECK-NEXT: 1 100 0.25 * rclw $7, (%rax) +# CHECK-NEXT: 1 100 0.25 * rcrw $7, (%rax) +# CHECK-NEXT: 1 1 0.25 rclw %cl, %di +# CHECK-NEXT: 1 1 0.25 rcrw %cl, %di +# CHECK-NEXT: 1 100 0.25 * rclw %cl, (%rax) +# CHECK-NEXT: 1 100 0.25 * rcrw %cl, (%rax) +# CHECK-NEXT: 1 1 0.25 rcll %edi +# CHECK-NEXT: 1 1 0.25 rcrl %edi +# CHECK-NEXT: 1 100 0.25 * rcll (%rax) +# CHECK-NEXT: 1 100 0.25 * rcrl (%rax) +# CHECK-NEXT: 1 1 0.25 rcll $7, %edi +# CHECK-NEXT: 1 1 0.25 rcrl $7, %edi +# CHECK-NEXT: 1 100 0.25 * rcll $7, (%rax) +# CHECK-NEXT: 1 100 0.25 * rcrl $7, (%rax) +# CHECK-NEXT: 1 1 0.25 rcll %cl, %edi +# CHECK-NEXT: 1 1 0.25 rcrl %cl, %edi +# CHECK-NEXT: 1 100 0.25 * rcll %cl, (%rax) +# CHECK-NEXT: 1 100 0.25 * rcrl %cl, (%rax) +# CHECK-NEXT: 1 1 0.25 rclq %rdi +# CHECK-NEXT: 1 1 0.25 rcrq %rdi +# CHECK-NEXT: 1 100 0.25 * rclq (%rax) +# CHECK-NEXT: 1 100 0.25 * rcrq (%rax) +# CHECK-NEXT: 1 1 0.25 rclq $7, %rdi +# CHECK-NEXT: 1 1 0.25 rcrq $7, %rdi +# CHECK-NEXT: 1 100 0.25 * rclq $7, (%rax) +# CHECK-NEXT: 1 100 0.25 * rcrq $7, (%rax) +# CHECK-NEXT: 1 1 0.25 rclq %cl, %rdi +# CHECK-NEXT: 1 1 0.25 rcrq %cl, %rdi +# CHECK-NEXT: 1 100 0.25 * rclq %cl, (%rax) +# CHECK-NEXT: 1 100 0.25 * rcrq %cl, (%rax) +# CHECK-NEXT: 1 100 0.25 U rdmsr +# CHECK-NEXT: 1 100 0.25 U rdpmc +# CHECK-NEXT: 1 100 0.25 U rdtsc +# CHECK-NEXT: 1 100 0.25 U rdtscp +# CHECK-NEXT: 1 1 0.25 rolb %dil +# CHECK-NEXT: 1 1 0.25 rorb %dil +# CHECK-NEXT: 3 5 0.67 * * rolb (%rax) +# CHECK-NEXT: 3 5 0.67 * * rorb (%rax) +# CHECK-NEXT: 1 1 0.25 rolb $7, %dil +# CHECK-NEXT: 1 1 0.25 rorb $7, %dil +# CHECK-NEXT: 3 5 0.67 * * rolb $7, (%rax) +# CHECK-NEXT: 3 5 0.67 * * rorb $7, (%rax) +# CHECK-NEXT: 1 1 0.25 rolb %cl, %dil +# CHECK-NEXT: 1 1 0.25 rorb %cl, %dil +# CHECK-NEXT: 3 5 0.67 * * rolb %cl, (%rax) +# CHECK-NEXT: 3 5 0.67 * * rorb %cl, (%rax) +# CHECK-NEXT: 1 1 0.25 rolw %di +# CHECK-NEXT: 1 1 0.25 rorw %di +# CHECK-NEXT: 3 5 0.67 * * rolw (%rax) +# CHECK-NEXT: 3 5 0.67 * * rorw (%rax) +# CHECK-NEXT: 1 1 0.25 rolw $7, %di +# CHECK-NEXT: 1 1 0.25 rorw $7, %di +# CHECK-NEXT: 3 5 0.67 * * rolw $7, (%rax) +# CHECK-NEXT: 3 5 0.67 * * rorw $7, (%rax) +# CHECK-NEXT: 1 1 0.25 rolw %cl, %di +# CHECK-NEXT: 1 1 0.25 rorw %cl, %di +# CHECK-NEXT: 3 5 0.67 * * rolw %cl, (%rax) +# CHECK-NEXT: 3 5 0.67 * * rorw %cl, (%rax) +# CHECK-NEXT: 1 1 0.25 roll %edi +# CHECK-NEXT: 1 1 0.25 rorl %edi +# CHECK-NEXT: 3 5 0.67 * * roll (%rax) +# CHECK-NEXT: 3 5 0.67 * * rorl (%rax) +# CHECK-NEXT: 1 1 0.25 roll $7, %edi +# CHECK-NEXT: 1 1 0.25 rorl $7, %edi +# CHECK-NEXT: 3 5 0.67 * * roll $7, (%rax) +# CHECK-NEXT: 3 5 0.67 * * rorl $7, (%rax) +# CHECK-NEXT: 1 1 0.25 roll %cl, %edi +# CHECK-NEXT: 1 1 0.25 rorl %cl, %edi +# CHECK-NEXT: 3 5 0.67 * * roll %cl, (%rax) +# CHECK-NEXT: 3 5 0.67 * * rorl %cl, (%rax) +# CHECK-NEXT: 1 1 0.25 rolq %rdi +# CHECK-NEXT: 1 1 0.25 rorq %rdi +# CHECK-NEXT: 3 5 0.67 * * rolq (%rax) +# CHECK-NEXT: 3 5 0.67 * * rorq (%rax) +# CHECK-NEXT: 1 1 0.25 rolq $7, %rdi +# CHECK-NEXT: 1 1 0.25 rorq $7, %rdi +# CHECK-NEXT: 3 5 0.67 * * rolq $7, (%rax) +# CHECK-NEXT: 3 5 0.67 * * rorq $7, (%rax) +# CHECK-NEXT: 1 1 0.25 rolq %cl, %rdi +# CHECK-NEXT: 1 1 0.25 rorq %cl, %rdi +# CHECK-NEXT: 3 5 0.67 * * rolq %cl, (%rax) +# CHECK-NEXT: 3 5 0.67 * * rorq %cl, (%rax) +# CHECK-NEXT: 2 2 0.25 sahf +# CHECK-NEXT: 1 1 0.25 sarb %dil +# CHECK-NEXT: 1 1 0.25 shlb %dil +# CHECK-NEXT: 1 1 0.25 shrb %dil +# CHECK-NEXT: 2 5 0.33 * * sarb (%rax) +# CHECK-NEXT: 2 5 0.33 * * shlb (%rax) +# CHECK-NEXT: 2 5 0.33 * * shrb (%rax) +# CHECK-NEXT: 1 1 0.25 sarb $7, %dil +# CHECK-NEXT: 1 1 0.25 shlb $7, %dil +# CHECK-NEXT: 1 1 0.25 shrb $7, %dil +# CHECK-NEXT: 2 5 0.33 * * sarb $7, (%rax) +# CHECK-NEXT: 2 5 0.33 * * shlb $7, (%rax) +# CHECK-NEXT: 2 5 0.33 * * shrb $7, (%rax) +# CHECK-NEXT: 1 1 0.25 sarb %cl, %dil +# CHECK-NEXT: 1 1 0.25 shlb %cl, %dil +# CHECK-NEXT: 1 1 0.25 shrb %cl, %dil +# CHECK-NEXT: 3 5 0.67 * * sarb %cl, (%rax) +# CHECK-NEXT: 3 5 0.67 * * shlb %cl, (%rax) +# CHECK-NEXT: 3 5 0.67 * * shrb %cl, (%rax) +# CHECK-NEXT: 1 1 0.25 sarw %di +# CHECK-NEXT: 1 1 0.25 shlw %di +# CHECK-NEXT: 1 1 0.25 shrw %di +# CHECK-NEXT: 2 5 0.33 * * sarw (%rax) +# CHECK-NEXT: 2 5 0.33 * * shlw (%rax) +# CHECK-NEXT: 2 5 0.33 * * shrw (%rax) +# CHECK-NEXT: 1 1 0.25 sarw $7, %di +# CHECK-NEXT: 1 1 0.25 shlw $7, %di +# CHECK-NEXT: 1 1 0.25 shrw $7, %di +# CHECK-NEXT: 2 5 0.33 * * sarw $7, (%rax) +# CHECK-NEXT: 2 5 0.33 * * shlw $7, (%rax) +# CHECK-NEXT: 2 5 0.33 * * shrw $7, (%rax) +# CHECK-NEXT: 1 1 0.25 sarw %cl, %di +# CHECK-NEXT: 1 1 0.25 shlw %cl, %di +# CHECK-NEXT: 1 1 0.25 shrw %cl, %di +# CHECK-NEXT: 3 5 0.67 * * sarw %cl, (%rax) +# CHECK-NEXT: 3 5 0.67 * * shlw %cl, (%rax) +# CHECK-NEXT: 3 5 0.67 * * shrw %cl, (%rax) +# CHECK-NEXT: 1 1 0.25 sarl %edi +# CHECK-NEXT: 1 1 0.25 shll %edi +# CHECK-NEXT: 1 1 0.25 shrl %edi +# CHECK-NEXT: 2 5 0.33 * * sarl (%rax) +# CHECK-NEXT: 2 5 0.33 * * shll (%rax) +# CHECK-NEXT: 2 5 0.33 * * shrl (%rax) +# CHECK-NEXT: 1 1 0.25 sarl $7, %edi +# CHECK-NEXT: 1 1 0.25 shll $7, %edi +# CHECK-NEXT: 1 1 0.25 shrl $7, %edi +# CHECK-NEXT: 2 5 0.33 * * sarl $7, (%rax) +# CHECK-NEXT: 2 5 0.33 * * shll $7, (%rax) +# CHECK-NEXT: 2 5 0.33 * * shrl $7, (%rax) +# CHECK-NEXT: 1 1 0.25 sarl %cl, %edi +# CHECK-NEXT: 1 1 0.25 shll %cl, %edi +# CHECK-NEXT: 1 1 0.25 shrl %cl, %edi +# CHECK-NEXT: 3 5 0.67 * * sarl %cl, (%rax) +# CHECK-NEXT: 3 5 0.67 * * shll %cl, (%rax) +# CHECK-NEXT: 3 5 0.67 * * shrl %cl, (%rax) +# CHECK-NEXT: 1 1 0.25 sarq %rdi +# CHECK-NEXT: 1 1 0.25 shlq %rdi +# CHECK-NEXT: 1 1 0.25 shrq %rdi +# CHECK-NEXT: 2 5 0.33 * * sarq (%rax) +# CHECK-NEXT: 2 5 0.33 * * shlq (%rax) +# CHECK-NEXT: 2 5 0.33 * * shrq (%rax) +# CHECK-NEXT: 1 1 0.25 sarq $7, %rdi +# CHECK-NEXT: 1 1 0.25 shlq $7, %rdi +# CHECK-NEXT: 1 1 0.25 shrq $7, %rdi +# CHECK-NEXT: 2 5 0.33 * * sarq $7, (%rax) +# CHECK-NEXT: 2 5 0.33 * * shlq $7, (%rax) +# CHECK-NEXT: 2 5 0.33 * * shrq $7, (%rax) +# CHECK-NEXT: 1 1 0.25 sarq %cl, %rdi +# CHECK-NEXT: 1 1 0.25 shlq %cl, %rdi +# CHECK-NEXT: 1 1 0.25 shrq %cl, %rdi +# CHECK-NEXT: 3 5 0.67 * * sarq %cl, (%rax) +# CHECK-NEXT: 3 5 0.67 * * shlq %cl, (%rax) +# CHECK-NEXT: 3 5 0.67 * * shrq %cl, (%rax) +# CHECK-NEXT: 1 1 0.25 sbbb $0, %al +# CHECK-NEXT: 1 1 0.25 sbbb $0, %dil +# CHECK-NEXT: 2 5 0.33 * * sbbb $0, (%rax) +# CHECK-NEXT: 1 1 0.25 sbbb $7, %al +# CHECK-NEXT: 1 1 0.25 sbbb $7, %dil +# CHECK-NEXT: 2 5 0.33 * * sbbb $7, (%rax) +# CHECK-NEXT: 1 1 0.25 sbbb %sil, %dil +# CHECK-NEXT: 2 5 0.33 * * sbbb %sil, (%rax) +# CHECK-NEXT: 2 5 0.33 * sbbb (%rax), %dil +# CHECK-NEXT: 1 1 0.25 sbbw $0, %ax +# CHECK-NEXT: 1 1 0.25 sbbw $0, %di +# CHECK-NEXT: 2 5 0.33 * * sbbw $0, (%rax) +# CHECK-NEXT: 1 1 0.25 sbbw $511, %ax +# CHECK-NEXT: 1 1 0.25 sbbw $511, %di +# CHECK-NEXT: 2 5 0.33 * * sbbw $511, (%rax) +# CHECK-NEXT: 1 1 0.25 sbbw $7, %di +# CHECK-NEXT: 2 5 0.33 * * sbbw $7, (%rax) +# CHECK-NEXT: 1 1 0.25 sbbw %si, %di +# CHECK-NEXT: 2 5 0.33 * * sbbw %si, (%rax) +# CHECK-NEXT: 2 5 0.33 * sbbw (%rax), %di +# CHECK-NEXT: 1 1 0.25 sbbl $0, %eax +# CHECK-NEXT: 1 1 0.25 sbbl $0, %edi +# CHECK-NEXT: 2 5 0.33 * * sbbl $0, (%rax) +# CHECK-NEXT: 1 1 0.25 sbbl $665536, %eax +# CHECK-NEXT: 1 1 0.25 sbbl $665536, %edi +# CHECK-NEXT: 2 5 0.33 * * sbbl $665536, (%rax) +# CHECK-NEXT: 1 1 0.25 sbbl $7, %edi +# CHECK-NEXT: 2 5 0.33 * * sbbl $7, (%rax) +# CHECK-NEXT: 1 1 0.25 sbbl %esi, %edi +# CHECK-NEXT: 2 5 0.33 * * sbbl %esi, (%rax) +# CHECK-NEXT: 2 5 0.33 * sbbl (%rax), %edi +# CHECK-NEXT: 1 1 0.25 sbbq $0, %rax +# CHECK-NEXT: 1 1 0.25 sbbq $0, %rdi +# CHECK-NEXT: 2 5 0.33 * * sbbq $0, (%rax) +# CHECK-NEXT: 1 1 0.25 sbbq $665536, %rax +# CHECK-NEXT: 1 1 0.25 sbbq $665536, %rdi +# CHECK-NEXT: 2 5 0.33 * * sbbq $665536, (%rax) +# CHECK-NEXT: 1 1 0.25 sbbq $7, %rdi +# CHECK-NEXT: 2 5 0.33 * * sbbq $7, (%rax) +# CHECK-NEXT: 1 1 0.25 sbbq %rsi, %rdi +# CHECK-NEXT: 2 5 0.33 * * sbbq %rsi, (%rax) +# CHECK-NEXT: 2 5 0.33 * sbbq (%rax), %rdi +# CHECK-NEXT: 1 100 0.25 U scasb %es:(%rdi), %al +# CHECK-NEXT: 1 100 0.25 U scasw %es:(%rdi), %ax +# CHECK-NEXT: 1 100 0.25 U scasl %es:(%rdi), %eax +# CHECK-NEXT: 1 100 0.25 U scasq %es:(%rdi), %rax +# CHECK-NEXT: 1 1 0.25 seto %al +# CHECK-NEXT: 1 1 0.33 * seto (%rax) +# CHECK-NEXT: 1 1 0.25 setno %al +# CHECK-NEXT: 1 1 0.33 * setno (%rax) +# CHECK-NEXT: 1 1 0.25 setb %al +# CHECK-NEXT: 1 1 0.33 * setb (%rax) +# CHECK-NEXT: 1 1 0.25 setae %al +# CHECK-NEXT: 1 1 0.33 * setae (%rax) +# CHECK-NEXT: 1 1 0.25 sete %al +# CHECK-NEXT: 1 1 0.33 * sete (%rax) +# CHECK-NEXT: 1 1 0.25 setne %al +# CHECK-NEXT: 1 1 0.33 * setne (%rax) +# CHECK-NEXT: 1 1 0.25 seta %al +# CHECK-NEXT: 1 1 0.33 * seta (%rax) +# CHECK-NEXT: 1 1 0.25 setbe %al +# CHECK-NEXT: 1 1 0.33 * setbe (%rax) +# CHECK-NEXT: 1 1 0.25 sets %al +# CHECK-NEXT: 1 1 0.33 * sets (%rax) +# CHECK-NEXT: 1 1 0.25 setns %al +# CHECK-NEXT: 1 1 0.33 * setns (%rax) +# CHECK-NEXT: 1 1 0.25 setp %al +# CHECK-NEXT: 1 1 0.33 * setp (%rax) +# CHECK-NEXT: 1 1 0.25 setnp %al +# CHECK-NEXT: 1 1 0.33 * setnp (%rax) +# CHECK-NEXT: 1 1 0.25 setl %al +# CHECK-NEXT: 1 1 0.33 * setl (%rax) +# CHECK-NEXT: 1 1 0.25 setge %al +# CHECK-NEXT: 1 1 0.33 * setge (%rax) +# CHECK-NEXT: 1 1 0.25 setg %al +# CHECK-NEXT: 1 1 0.33 * setg (%rax) +# CHECK-NEXT: 1 1 0.25 setle %al +# CHECK-NEXT: 1 1 0.33 * setle (%rax) +# CHECK-NEXT: 1 100 0.25 shldw %cl, %si, %di +# CHECK-NEXT: 1 100 0.25 shrdw %cl, %si, %di +# CHECK-NEXT: 1 100 0.25 * * shldw %cl, %si, (%rax) +# CHECK-NEXT: 1 100 0.25 * * shrdw %cl, %si, (%rax) +# CHECK-NEXT: 1 1 0.25 shldw $7, %si, %di +# CHECK-NEXT: 1 1 0.25 shrdw $7, %si, %di +# CHECK-NEXT: 2 5 0.33 * * shldw $7, %si, (%rax) +# CHECK-NEXT: 2 5 0.33 * * shrdw $7, %si, (%rax) +# CHECK-NEXT: 1 100 0.25 shldl %cl, %esi, %edi +# CHECK-NEXT: 1 100 0.25 shrdl %cl, %esi, %edi +# CHECK-NEXT: 1 100 0.25 * * shldl %cl, %esi, (%rax) +# CHECK-NEXT: 1 100 0.25 * * shrdl %cl, %esi, (%rax) +# CHECK-NEXT: 1 1 0.25 shldl $7, %esi, %edi +# CHECK-NEXT: 1 1 0.25 shrdl $7, %esi, %edi +# CHECK-NEXT: 2 5 0.33 * * shldl $7, %esi, (%rax) +# CHECK-NEXT: 2 5 0.33 * * shrdl $7, %esi, (%rax) +# CHECK-NEXT: 1 100 0.25 shldq %cl, %rsi, %rdi +# CHECK-NEXT: 1 100 0.25 shrdq %cl, %rsi, %rdi +# CHECK-NEXT: 1 100 0.25 * * shldq %cl, %rsi, (%rax) +# CHECK-NEXT: 1 100 0.25 * * shrdq %cl, %rsi, (%rax) +# CHECK-NEXT: 1 1 0.25 shldq $7, %rsi, %rdi +# CHECK-NEXT: 1 1 0.25 shrdq $7, %rsi, %rdi +# CHECK-NEXT: 2 5 0.33 * * shldq $7, %rsi, (%rax) +# CHECK-NEXT: 2 5 0.33 * * shrdq $7, %rsi, (%rax) +# CHECK-NEXT: 1 1 0.25 U stc +# CHECK-NEXT: 1 1 0.25 U std +# CHECK-NEXT: 1 100 0.25 U stosb %al, %es:(%rdi) +# CHECK-NEXT: 1 100 0.25 U stosw %ax, %es:(%rdi) +# CHECK-NEXT: 1 100 0.25 U stosl %eax, %es:(%rdi) +# CHECK-NEXT: 1 100 0.25 U stosq %rax, %es:(%rdi) +# CHECK-NEXT: 1 1 0.25 subb $7, %al +# CHECK-NEXT: 1 1 0.25 subb $7, %dil +# CHECK-NEXT: 2 5 0.33 * * subb $7, (%rax) +# CHECK-NEXT: 1 1 0.25 subb %sil, %dil +# CHECK-NEXT: 2 5 0.33 * * subb %sil, (%rax) +# CHECK-NEXT: 2 5 0.33 * subb (%rax), %dil +# CHECK-NEXT: 1 1 0.25 subw $511, %ax +# CHECK-NEXT: 1 1 0.25 subw $511, %di +# CHECK-NEXT: 2 5 0.33 * * subw $511, (%rax) +# CHECK-NEXT: 1 1 0.25 subw $7, %di +# CHECK-NEXT: 2 5 0.33 * * subw $7, (%rax) +# CHECK-NEXT: 1 1 0.25 subw %si, %di +# CHECK-NEXT: 2 5 0.33 * * subw %si, (%rax) +# CHECK-NEXT: 2 5 0.33 * subw (%rax), %di +# CHECK-NEXT: 1 1 0.25 subl $665536, %eax +# CHECK-NEXT: 1 1 0.25 subl $665536, %edi +# CHECK-NEXT: 2 5 0.33 * * subl $665536, (%rax) +# CHECK-NEXT: 1 1 0.25 subl $7, %edi +# CHECK-NEXT: 2 5 0.33 * * subl $7, (%rax) +# CHECK-NEXT: 1 1 0.25 subl %esi, %edi +# CHECK-NEXT: 2 5 0.33 * * subl %esi, (%rax) +# CHECK-NEXT: 2 5 0.33 * subl (%rax), %edi +# CHECK-NEXT: 1 1 0.25 subq $665536, %rax +# CHECK-NEXT: 1 1 0.25 subq $665536, %rdi +# CHECK-NEXT: 2 5 0.33 * * subq $665536, (%rax) +# CHECK-NEXT: 1 1 0.25 subq $7, %rdi +# CHECK-NEXT: 2 5 0.33 * * subq $7, (%rax) +# CHECK-NEXT: 1 1 0.25 subq %rsi, %rdi +# CHECK-NEXT: 2 5 0.33 * * subq %rsi, (%rax) +# CHECK-NEXT: 2 5 0.33 * subq (%rax), %rdi +# CHECK-NEXT: 1 1 0.25 testb $7, %al +# CHECK-NEXT: 1 1 0.25 testb $7, %dil +# CHECK-NEXT: 2 5 0.33 * testb $7, (%rax) +# CHECK-NEXT: 1 1 0.25 testb %sil, %dil +# CHECK-NEXT: 2 5 0.33 * testb %sil, (%rax) +# CHECK-NEXT: 1 1 0.25 testw $511, %ax +# CHECK-NEXT: 1 1 0.25 testw $511, %di +# CHECK-NEXT: 2 5 0.33 * testw $511, (%rax) +# CHECK-NEXT: 1 1 0.25 testw $7, %di +# CHECK-NEXT: 2 5 0.33 * testw $7, (%rax) +# CHECK-NEXT: 1 1 0.25 testw %si, %di +# CHECK-NEXT: 2 5 0.33 * testw %si, (%rax) +# CHECK-NEXT: 1 1 0.25 testl $665536, %eax +# CHECK-NEXT: 1 1 0.25 testl $665536, %edi +# CHECK-NEXT: 2 5 0.33 * testl $665536, (%rax) +# CHECK-NEXT: 1 1 0.25 testl $7, %edi +# CHECK-NEXT: 2 5 0.33 * testl $7, (%rax) +# CHECK-NEXT: 1 1 0.25 testl %esi, %edi +# CHECK-NEXT: 2 5 0.33 * testl %esi, (%rax) +# CHECK-NEXT: 1 1 0.25 testq $665536, %rax +# CHECK-NEXT: 1 1 0.25 testq $665536, %rdi +# CHECK-NEXT: 2 5 0.33 * testq $665536, (%rax) +# CHECK-NEXT: 1 1 0.25 testq $7, %rdi +# CHECK-NEXT: 2 5 0.33 * testq $7, (%rax) +# CHECK-NEXT: 1 1 0.25 testq %rsi, %rdi +# CHECK-NEXT: 2 5 0.33 * testq %rsi, (%rax) +# CHECK-NEXT: 1 100 0.25 * U ud2 +# CHECK-NEXT: 1 100 0.25 U wrmsr +# CHECK-NEXT: 1 1 0.25 xaddb %bl, %cl +# CHECK-NEXT: 1 100 0.25 * * xaddb %bl, (%rcx) +# CHECK-NEXT: 1 1 0.25 xaddw %bx, %cx +# CHECK-NEXT: 1 100 0.25 * * xaddw %ax, (%rbx) +# CHECK-NEXT: 1 1 0.25 xaddl %ebx, %ecx +# CHECK-NEXT: 1 100 0.25 * * xaddl %eax, (%rbx) +# CHECK-NEXT: 1 1 0.25 xaddq %rbx, %rcx +# CHECK-NEXT: 1 100 0.25 * * xaddq %rax, (%rbx) +# CHECK-NEXT: 2 1 0.25 xchgb %bl, %cl +# CHECK-NEXT: 2 5 0.33 * * xchgb %bl, (%rbx) +# CHECK-NEXT: 2 1 0.25 xchgw %bx, %ax +# CHECK-NEXT: 2 1 0.25 xchgw %bx, %cx +# CHECK-NEXT: 2 5 0.33 * * xchgw %ax, (%rbx) +# CHECK-NEXT: 2 1 0.25 xchgl %ebx, %eax +# CHECK-NEXT: 2 1 0.25 xchgl %ebx, %ecx +# CHECK-NEXT: 2 5 0.33 * * xchgl %eax, (%rbx) +# CHECK-NEXT: 2 1 0.25 xchgq %rbx, %rax +# CHECK-NEXT: 2 1 0.25 xchgq %rbx, %rcx +# CHECK-NEXT: 2 5 0.33 * * xchgq %rax, (%rbx) +# CHECK-NEXT: 1 100 0.25 * xlatb +# CHECK-NEXT: 1 1 0.25 xorb $7, %al +# CHECK-NEXT: 1 1 0.25 xorb $7, %dil +# CHECK-NEXT: 2 5 0.33 * * xorb $7, (%rax) +# CHECK-NEXT: 1 1 0.25 xorb %sil, %dil +# CHECK-NEXT: 2 5 0.33 * * xorb %sil, (%rax) +# CHECK-NEXT: 2 5 0.33 * xorb (%rax), %dil +# CHECK-NEXT: 1 1 0.25 xorw $511, %ax +# CHECK-NEXT: 1 1 0.25 xorw $511, %di +# CHECK-NEXT: 2 5 0.33 * * xorw $511, (%rax) +# CHECK-NEXT: 1 1 0.25 xorw $7, %di +# CHECK-NEXT: 2 5 0.33 * * xorw $7, (%rax) +# CHECK-NEXT: 1 1 0.25 xorw %si, %di +# CHECK-NEXT: 2 5 0.33 * * xorw %si, (%rax) +# CHECK-NEXT: 2 5 0.33 * xorw (%rax), %di +# CHECK-NEXT: 1 1 0.25 xorl $665536, %eax +# CHECK-NEXT: 1 1 0.25 xorl $665536, %edi +# CHECK-NEXT: 2 5 0.33 * * xorl $665536, (%rax) +# CHECK-NEXT: 1 1 0.25 xorl $7, %edi +# CHECK-NEXT: 2 5 0.33 * * xorl $7, (%rax) +# CHECK-NEXT: 1 1 0.25 xorl %esi, %edi +# CHECK-NEXT: 2 5 0.33 * * xorl %esi, (%rax) +# CHECK-NEXT: 2 5 0.33 * xorl (%rax), %edi +# CHECK-NEXT: 1 1 0.25 xorq $665536, %rax +# CHECK-NEXT: 1 1 0.25 xorq $665536, %rdi +# CHECK-NEXT: 2 5 0.33 * * xorq $665536, (%rax) +# CHECK-NEXT: 1 1 0.25 xorq $7, %rdi +# CHECK-NEXT: 2 5 0.33 * * xorq $7, (%rax) +# CHECK-NEXT: 1 1 0.25 xorq %rsi, %rdi +# CHECK-NEXT: 2 5 0.33 * * xorq %rsi, (%rax) +# CHECK-NEXT: 2 5 0.33 * xorq (%rax), %rdi + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: 116.00 116.00 116.00 158.00 192.00 174.00 158.00 392.00 - - - - 34.00 + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - adcb $0, %al +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - adcb $0, %dil +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - adcb $0, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - adcb $7, %al +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - adcb $7, %dil +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - adcb $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - adcb %sil, %dil +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - adcb %sil, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - adcb (%rax), %dil +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - adcw $0, %ax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - adcw $0, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - adcw $0, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - adcw $511, %ax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - adcw $511, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - adcw $511, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - adcw $7, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - adcw $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - adcw %si, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - adcw %si, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - adcw (%rax), %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - adcl $0, %eax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - adcl $0, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - adcl $0, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - adcl $665536, %eax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - adcl $665536, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - adcl $665536, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - adcl $7, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - adcl $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - adcl %esi, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - adcl %esi, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - adcl (%rax), %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - adcq $0, %rax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - adcq $0, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - adcq $0, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - adcq $665536, %rax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - adcq $665536, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - adcq $665536, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - adcq $7, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - adcq $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - adcq %rsi, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - adcq %rsi, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - adcq (%rax), %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - addb $7, %al +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - addb $7, %dil +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - addb $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - addb %sil, %dil +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - addb %sil, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - addb (%rax), %dil +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - addw $511, %ax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - addw $511, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - addw $511, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - addw $7, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - addw $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - addw %si, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - addw %si, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - addw (%rax), %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - addl $665536, %eax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - addl $665536, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - addl $665536, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - addl $7, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - addl $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - addl %esi, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - addl %esi, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - addl (%rax), %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - addq $665536, %rax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - addq $665536, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - addq $665536, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - addq $7, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - addq $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - addq %rsi, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - addq %rsi, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - addq (%rax), %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - andb $7, %al +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - andb $7, %dil +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - andb $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - andb %sil, %dil +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - andb %sil, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - andb (%rax), %dil +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - andw $511, %ax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - andw $511, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - andw $511, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - andw $7, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - andw $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - andw %si, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - andw %si, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - andw (%rax), %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - andl $665536, %eax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - andl $665536, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - andl $665536, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - andl $7, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - andl $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - andl %esi, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - andl %esi, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - andl (%rax), %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - andq $665536, %rax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - andq $665536, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - andq $665536, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - andq $7, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - andq $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - andq %rsi, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - andq %rsi, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - andq (%rax), %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - bsfw %si, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - bsrw %si, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - bsfw (%rax), %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - bsrw (%rax), %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - bsfl %esi, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - bsrl %esi, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - bsfl (%rax), %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - bsrl (%rax), %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - bsfq %rsi, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - bsrq %rsi, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - bsfq (%rax), %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - bsrq (%rax), %rdi +# CHECK-NEXT: - - - 1.00 1.00 1.00 1.00 - - - - - - bswapl %eax +# CHECK-NEXT: - - - 1.00 1.00 1.00 1.00 - - - - - - bswapq %rax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - btw %si, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - btcw %si, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - btrw %si, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - btsw %si, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - btw %si, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - btcw %si, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - btrw %si, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - btsw %si, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - btw $7, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - btcw $7, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - btrw $7, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - btsw $7, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - btw $7, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - btcw $7, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - btrw $7, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - btsw $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - btl %esi, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - btcl %esi, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - btrl %esi, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - btsl %esi, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - btl %esi, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - btcl %esi, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - btrl %esi, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - btsl %esi, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - btl $7, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - btcl $7, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - btrl $7, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - btsl $7, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - btl $7, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - btcl $7, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - btrl $7, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - btsl $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - btq %rsi, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - btcq %rsi, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - btrq %rsi, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - btsq %rsi, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - btq %rsi, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - btcq %rsi, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - btrq %rsi, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - btsq %rsi, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - btq $7, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - btcq $7, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - btrq $7, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - btsq $7, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - btq $7, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - btcq $7, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - btrq $7, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - btsq $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cbtw +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cwtl +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cltq +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cwtd +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cltd +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cqto +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - clc +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cld +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmc +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmpb $7, %al +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmpb $7, %dil +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmpb $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmpb %sil, %dil +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmpb %sil, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmpb (%rax), %dil +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmpw $511, %ax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmpw $511, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmpw $511, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmpw $7, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmpw $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmpw %si, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmpw %si, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmpw (%rax), %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmpl $665536, %eax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmpl $665536, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmpl $665536, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmpl $7, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmpl $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmpl %esi, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmpl %esi, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmpl (%rax), %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmpq $665536, %rax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmpq $665536, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmpq $665536, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmpq $7, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmpq $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmpq %rsi, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmpq %rsi, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmpq (%rax), %rdi +# CHECK-NEXT: - - - - - - - - - - - - - cmpsb %es:(%rdi), (%rsi) +# CHECK-NEXT: - - - - - - - - - - - - - cmpsw %es:(%rdi), (%rsi) +# CHECK-NEXT: - - - - - - - - - - - - - cmpsl %es:(%rdi), (%rsi) +# CHECK-NEXT: - - - - - - - - - - - - - cmpsq %es:(%rdi), (%rsi) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmpxchgb %cl, %bl +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmpxchgb %cl, (%rbx) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmpxchgw %cx, %bx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmpxchgw %cx, (%rbx) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmpxchgl %ecx, %ebx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmpxchgl %ecx, (%rbx) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - cmpxchgq %rcx, %rbx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - cmpxchgq %rcx, (%rbx) +# CHECK-NEXT: - - - - - - - - - - - - - cpuid +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - decb %dil +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - decb (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - decw %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - decw (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - decl %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - decl (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - decq %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - decq (%rax) +# CHECK-NEXT: - - - - - 1.00 - 15.00 - - - - - divb %dil +# CHECK-NEXT: 0.33 0.33 0.33 - - 1.00 - 15.00 - - - - - divb (%rax) +# CHECK-NEXT: - - - - - 1.00 - 17.00 - - - - - divw %si +# CHECK-NEXT: 0.33 0.33 0.33 - - 1.00 - 17.00 - - - - - divw (%rax) +# CHECK-NEXT: - - - - - 1.00 - 25.00 - - - - - divl %edx +# CHECK-NEXT: 0.33 0.33 0.33 - - 1.00 - 25.00 - - - - - divl (%rax) +# CHECK-NEXT: - - - - - 1.00 - 41.00 - - - - - divq %rcx +# CHECK-NEXT: 0.33 0.33 0.33 - - 1.00 - 41.00 - - - - - divq (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - enter $7, $4095 +# CHECK-NEXT: - - - - - 1.00 - 15.00 - - - - - idivb %dil +# CHECK-NEXT: 0.33 0.33 0.33 - - 1.00 - 15.00 - - - - - idivb (%rax) +# CHECK-NEXT: - - - - - 1.00 - 17.00 - - - - - idivw %si +# CHECK-NEXT: 0.33 0.33 0.33 - - 1.00 - 17.00 - - - - - idivw (%rax) +# CHECK-NEXT: - - - - - 1.00 - 25.00 - - - - - idivl %edx +# CHECK-NEXT: 0.33 0.33 0.33 - - 1.00 - 25.00 - - - - - idivl (%rax) +# CHECK-NEXT: - - - - - 1.00 - 41.00 - - - - - idivq %rcx +# CHECK-NEXT: 0.33 0.33 0.33 - - 1.00 - 41.00 - - - - - idivq (%rax) +# CHECK-NEXT: - - - - 1.00 - - - - - - - 1.00 imulb %dil +# CHECK-NEXT: 0.33 0.33 0.33 - 1.00 - - - - - - - 1.00 imulb (%rax) +# CHECK-NEXT: - - - - 1.00 - - - - - - - 1.00 imulw %di +# CHECK-NEXT: 0.33 0.33 0.33 - 1.00 - - - - - - - 1.00 imulw (%rax) +# CHECK-NEXT: - - - - 1.00 - - - - - - - 1.00 imulw %si, %di +# CHECK-NEXT: 0.33 0.33 0.33 - 1.00 - - - - - - - 1.00 imulw (%rax), %di +# CHECK-NEXT: - - - - 1.00 - - - - - - - 1.00 imulw $511, %si, %di +# CHECK-NEXT: 0.33 0.33 0.33 - 1.00 - - - - - - - 1.00 imulw $511, (%rax), %di +# CHECK-NEXT: - - - - 1.00 - - - - - - - 1.00 imulw $7, %si, %di +# CHECK-NEXT: 0.33 0.33 0.33 - 1.00 - - - - - - - 1.00 imulw $7, (%rax), %di +# CHECK-NEXT: - - - - 1.00 - - - - - - - 1.00 imull %edi +# CHECK-NEXT: 0.33 0.33 0.33 - 1.00 - - - - - - - 1.00 imull (%rax) +# CHECK-NEXT: - - - - 1.00 - - - - - - - 1.00 imull %esi, %edi +# CHECK-NEXT: 0.33 0.33 0.33 - 1.00 - - - - - - - 1.00 imull (%rax), %edi +# CHECK-NEXT: - - - - 1.00 - - - - - - - 1.00 imull $665536, %esi, %edi +# CHECK-NEXT: 0.33 0.33 0.33 - 1.00 - - - - - - - 1.00 imull $665536, (%rax), %edi +# CHECK-NEXT: - - - - 1.00 - - - - - - - 1.00 imull $7, %esi, %edi +# CHECK-NEXT: 0.33 0.33 0.33 - 1.00 - - - - - - - 1.00 imull $7, (%rax), %edi +# CHECK-NEXT: - - - - 1.00 - - - - - - - 1.00 imulq %rdi +# CHECK-NEXT: 0.33 0.33 0.33 - 1.00 - - - - - - - 1.00 imulq (%rax) +# CHECK-NEXT: - - - - 1.00 - - - - - - - 1.00 imulq %rsi, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 - 1.00 - - - - - - - 1.00 imulq (%rax), %rdi +# CHECK-NEXT: - - - - 1.00 - - - - - - - 1.00 imulq $665536, %rsi, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 - 1.00 - - - - - - - 1.00 imulq $665536, (%rax), %rdi +# CHECK-NEXT: - - - - 1.00 - - - - - - - 1.00 imulq $7, %rsi, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 - 1.00 - - - - - - - 1.00 imulq $7, (%rax), %rdi +# CHECK-NEXT: - - - - - - - - - - - - - inb $7, %al +# CHECK-NEXT: - - - - - - - - - - - - - inb %dx, %al +# CHECK-NEXT: - - - - - - - - - - - - - inw $7, %ax +# CHECK-NEXT: - - - - - - - - - - - - - inw %dx, %ax +# CHECK-NEXT: - - - - - - - - - - - - - inl $7, %eax +# CHECK-NEXT: - - - - - - - - - - - - - inl %dx, %eax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - incb %dil +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - incb (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - incw %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - incw (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - incl %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - incl (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - incq %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - incq (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - insb %dx, %es:(%rdi) +# CHECK-NEXT: - - - - - - - - - - - - - insw %dx, %es:(%rdi) +# CHECK-NEXT: - - - - - - - - - - - - - insl %dx, %es:(%rdi) +# CHECK-NEXT: - - - - - - - - - - - - - int $7 +# CHECK-NEXT: - - - - - - - - - - - - - invlpg (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - invlpga %rax, %ecx +# CHECK-NEXT: - - - - - - - - - - - - - lahf +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - leave +# CHECK-NEXT: - - - - - - - - - - - - - lodsb (%rsi), %al +# CHECK-NEXT: - - - - - - - - - - - - - lodsw (%rsi), %ax +# CHECK-NEXT: - - - - - - - - - - - - - lodsl (%rsi), %eax +# CHECK-NEXT: - - - - - - - - - - - - - lodsq (%rsi), %rax +# CHECK-NEXT: - - - - - - - - - - - - - movsb (%rsi), %es:(%rdi) +# CHECK-NEXT: - - - - - - - - - - - - - movsw (%rsi), %es:(%rdi) +# CHECK-NEXT: - - - - - - - - - - - - - movsl (%rsi), %es:(%rdi) +# CHECK-NEXT: - - - - - - - - - - - - - movsq (%rsi), %es:(%rdi) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - movsbw %al, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - movzbw %al, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - movsbw (%rax), %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - movzbw (%rax), %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - movsbl %al, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - movzbl %al, %edi +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movsbl (%rax), %edi +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movzbl (%rax), %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - movsbq %al, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - movzbq %al, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - movsbq (%rax), %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - movzbq (%rax), %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - movswl %ax, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - movzwl %ax, %edi +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movswl (%rax), %edi +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movzwl (%rax), %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - movswq %ax, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - movzwq %ax, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - movswq (%rax), %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - movzwq (%rax), %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - movslq %eax, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - movslq (%rax), %rdi +# CHECK-NEXT: - - - - 1.00 - - - - - - - 1.00 mulb %dil +# CHECK-NEXT: 0.33 0.33 0.33 - 1.00 - - - - - - - 1.00 mulb (%rax) +# CHECK-NEXT: - - - - 1.00 - - - - - - - 1.00 mulw %si +# CHECK-NEXT: 0.33 0.33 0.33 - 1.00 - - - - - - - 1.00 mulw (%rax) +# CHECK-NEXT: - - - - 1.00 - - - - - - - 1.00 mull %edx +# CHECK-NEXT: 0.33 0.33 0.33 - 1.00 - - - - - - - 1.00 mull (%rax) +# CHECK-NEXT: - - - - 1.00 - - - - - - - 1.00 mulq %rcx +# CHECK-NEXT: 0.33 0.33 0.33 - 1.00 - - - - - - - 1.00 mulq (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - negb %dil +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - negb (%r8) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - negw %si +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - negw (%r9) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - negl %edx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - negl (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - negq %rcx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - negq (%r10) +# CHECK-NEXT: - - - - - - - - - - - - - nop +# CHECK-NEXT: - - - - - - - - - - - - - nopw %di +# CHECK-NEXT: - - - - - - - - - - - - - nopw (%rcx) +# CHECK-NEXT: - - - - - - - - - - - - - nopl %esi +# CHECK-NEXT: - - - - - - - - - - - - - nopl (%r8) +# CHECK-NEXT: - - - - - - - - - - - - - nopq %rdx +# CHECK-NEXT: - - - - - - - - - - - - - nopq (%r9) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - notb %dil +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - notb (%r8) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - notw %si +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - notw (%r9) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - notl %edx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - notl (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - notq %rcx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - notq (%r10) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - orb $7, %al +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - orb $7, %dil +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - orb $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - orb %sil, %dil +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - orb %sil, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - orb (%rax), %dil +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - orw $511, %ax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - orw $511, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - orw $511, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - orw $7, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - orw $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - orw %si, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - orw %si, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - orw (%rax), %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - orl $665536, %eax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - orl $665536, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - orl $665536, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - orl $7, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - orl $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - orl %esi, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - orl %esi, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - orl (%rax), %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - orq $665536, %rax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - orq $665536, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - orq $665536, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - orq $7, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - orq $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - orq %rsi, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - orq %rsi, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - orq (%rax), %rdi +# CHECK-NEXT: - - - - - - - - - - - - - outb %al, $7 +# CHECK-NEXT: - - - - - - - - - - - - - outb %al, %dx +# CHECK-NEXT: - - - - - - - - - - - - - outw %ax, $7 +# CHECK-NEXT: - - - - - - - - - - - - - outw %ax, %dx +# CHECK-NEXT: - - - - - - - - - - - - - outl %eax, $7 +# CHECK-NEXT: - - - - - - - - - - - - - outl %eax, %dx +# CHECK-NEXT: - - - - - - - - - - - - - outsb (%rsi), %dx +# CHECK-NEXT: - - - - - - - - - - - - - outsw (%rsi), %dx +# CHECK-NEXT: - - - - - - - - - - - - - outsl (%rsi), %dx +# CHECK-NEXT: - - - - - - - - - - - - - pause +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rclb %dil +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rcrb %dil +# CHECK-NEXT: - - - - - - - - - - - - - rclb (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - rcrb (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rclb $7, %dil +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rcrb $7, %dil +# CHECK-NEXT: - - - - - - - - - - - - - rclb $7, (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - rcrb $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rclb %cl, %dil +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rcrb %cl, %dil +# CHECK-NEXT: - - - - - - - - - - - - - rclb %cl, (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - rcrb %cl, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rclw %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rcrw %di +# CHECK-NEXT: - - - - - - - - - - - - - rclw (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - rcrw (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rclw $7, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rcrw $7, %di +# CHECK-NEXT: - - - - - - - - - - - - - rclw $7, (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - rcrw $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rclw %cl, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rcrw %cl, %di +# CHECK-NEXT: - - - - - - - - - - - - - rclw %cl, (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - rcrw %cl, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rcll %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rcrl %edi +# CHECK-NEXT: - - - - - - - - - - - - - rcll (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - rcrl (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rcll $7, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rcrl $7, %edi +# CHECK-NEXT: - - - - - - - - - - - - - rcll $7, (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - rcrl $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rcll %cl, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rcrl %cl, %edi +# CHECK-NEXT: - - - - - - - - - - - - - rcll %cl, (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - rcrl %cl, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rclq %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rcrq %rdi +# CHECK-NEXT: - - - - - - - - - - - - - rclq (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - rcrq (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rclq $7, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rcrq $7, %rdi +# CHECK-NEXT: - - - - - - - - - - - - - rclq $7, (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - rcrq $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rclq %cl, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rcrq %cl, %rdi +# CHECK-NEXT: - - - - - - - - - - - - - rclq %cl, (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - rcrq %cl, (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - rdmsr +# CHECK-NEXT: - - - - - - - - - - - - - rdpmc +# CHECK-NEXT: - - - - - - - - - - - - - rdtsc +# CHECK-NEXT: - - - - - - - - - - - - - rdtscp +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rolb %dil +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rorb %dil +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - rolb (%rax) +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - rorb (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rolb $7, %dil +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rorb $7, %dil +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - rolb $7, (%rax) +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - rorb $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rolb %cl, %dil +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rorb %cl, %dil +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - rolb %cl, (%rax) +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - rorb %cl, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rolw %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rorw %di +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - rolw (%rax) +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - rorw (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rolw $7, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rorw $7, %di +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - rolw $7, (%rax) +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - rorw $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rolw %cl, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rorw %cl, %di +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - rolw %cl, (%rax) +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - rorw %cl, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - roll %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rorl %edi +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - roll (%rax) +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - rorl (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - roll $7, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rorl $7, %edi +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - roll $7, (%rax) +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - rorl $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - roll %cl, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rorl %cl, %edi +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - roll %cl, (%rax) +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - rorl %cl, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rolq %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rorq %rdi +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - rolq (%rax) +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - rorq (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rolq $7, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rorq $7, %rdi +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - rolq $7, (%rax) +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - rorq $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rolq %cl, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - rorq %cl, %rdi +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - rolq %cl, (%rax) +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - rorq %cl, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sahf +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sarb %dil +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shlb %dil +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shrb %dil +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sarb (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - shlb (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - shrb (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sarb $7, %dil +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shlb $7, %dil +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shrb $7, %dil +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sarb $7, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - shlb $7, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - shrb $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sarb %cl, %dil +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shlb %cl, %dil +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shrb %cl, %dil +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - sarb %cl, (%rax) +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - shlb %cl, (%rax) +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - shrb %cl, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sarw %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shlw %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shrw %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sarw (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - shlw (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - shrw (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sarw $7, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shlw $7, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shrw $7, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sarw $7, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - shlw $7, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - shrw $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sarw %cl, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shlw %cl, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shrw %cl, %di +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - sarw %cl, (%rax) +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - shlw %cl, (%rax) +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - shrw %cl, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sarl %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shll %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shrl %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sarl (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - shll (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - shrl (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sarl $7, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shll $7, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shrl $7, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sarl $7, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - shll $7, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - shrl $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sarl %cl, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shll %cl, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shrl %cl, %edi +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - sarl %cl, (%rax) +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - shll %cl, (%rax) +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - shrl %cl, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sarq %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shlq %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shrq %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sarq (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - shlq (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - shrq (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sarq $7, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shlq $7, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shrq $7, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sarq $7, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - shlq $7, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - shrq $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sarq %cl, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shlq %cl, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shrq %cl, %rdi +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - sarq %cl, (%rax) +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - shlq %cl, (%rax) +# CHECK-NEXT: 0.67 0.67 0.67 0.25 0.25 0.25 0.25 - - - - - - shrq %cl, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sbbb $0, %al +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sbbb $0, %dil +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sbbb $0, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sbbb $7, %al +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sbbb $7, %dil +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sbbb $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sbbb %sil, %dil +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sbbb %sil, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sbbb (%rax), %dil +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sbbw $0, %ax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sbbw $0, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sbbw $0, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sbbw $511, %ax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sbbw $511, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sbbw $511, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sbbw $7, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sbbw $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sbbw %si, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sbbw %si, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sbbw (%rax), %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sbbl $0, %eax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sbbl $0, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sbbl $0, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sbbl $665536, %eax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sbbl $665536, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sbbl $665536, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sbbl $7, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sbbl $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sbbl %esi, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sbbl %esi, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sbbl (%rax), %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sbbq $0, %rax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sbbq $0, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sbbq $0, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sbbq $665536, %rax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sbbq $665536, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sbbq $665536, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sbbq $7, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sbbq $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sbbq %rsi, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sbbq %rsi, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sbbq (%rax), %rdi +# CHECK-NEXT: - - - - - - - - - - - - - scasb %es:(%rdi), %al +# CHECK-NEXT: - - - - - - - - - - - - - scasw %es:(%rdi), %ax +# CHECK-NEXT: - - - - - - - - - - - - - scasl %es:(%rdi), %eax +# CHECK-NEXT: - - - - - - - - - - - - - scasq %es:(%rdi), %rax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - seto %al +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - seto (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - setno %al +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - setno (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - setb %al +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - setb (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - setae %al +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - setae (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sete %al +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sete (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - setne %al +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - setne (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - seta %al +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - seta (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - setbe %al +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - setbe (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - sets %al +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - sets (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - setns %al +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - setns (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - setp %al +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - setp (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - setnp %al +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - setnp (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - setl %al +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - setl (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - setge %al +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - setge (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - setg %al +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - setg (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - setle %al +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - setle (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - shldw %cl, %si, %di +# CHECK-NEXT: - - - - - - - - - - - - - shrdw %cl, %si, %di +# CHECK-NEXT: - - - - - - - - - - - - - shldw %cl, %si, (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - shrdw %cl, %si, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shldw $7, %si, %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shrdw $7, %si, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - shldw $7, %si, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - shrdw $7, %si, (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - shldl %cl, %esi, %edi +# CHECK-NEXT: - - - - - - - - - - - - - shrdl %cl, %esi, %edi +# CHECK-NEXT: - - - - - - - - - - - - - shldl %cl, %esi, (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - shrdl %cl, %esi, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shldl $7, %esi, %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shrdl $7, %esi, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - shldl $7, %esi, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - shrdl $7, %esi, (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - shldq %cl, %rsi, %rdi +# CHECK-NEXT: - - - - - - - - - - - - - shrdq %cl, %rsi, %rdi +# CHECK-NEXT: - - - - - - - - - - - - - shldq %cl, %rsi, (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - shrdq %cl, %rsi, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shldq $7, %rsi, %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - shrdq $7, %rsi, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - shldq $7, %rsi, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - shrdq $7, %rsi, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - stc +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - std +# CHECK-NEXT: - - - - - - - - - - - - - stosb %al, %es:(%rdi) +# CHECK-NEXT: - - - - - - - - - - - - - stosw %ax, %es:(%rdi) +# CHECK-NEXT: - - - - - - - - - - - - - stosl %eax, %es:(%rdi) +# CHECK-NEXT: - - - - - - - - - - - - - stosq %rax, %es:(%rdi) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - subb $7, %al +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - subb $7, %dil +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - subb $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - subb %sil, %dil +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - subb %sil, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - subb (%rax), %dil +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - subw $511, %ax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - subw $511, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - subw $511, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - subw $7, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - subw $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - subw %si, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - subw %si, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - subw (%rax), %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - subl $665536, %eax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - subl $665536, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - subl $665536, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - subl $7, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - subl $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - subl %esi, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - subl %esi, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - subl (%rax), %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - subq $665536, %rax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - subq $665536, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - subq $665536, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - subq $7, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - subq $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - subq %rsi, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - subq %rsi, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - subq (%rax), %rdi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - testb $7, %al +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - testb $7, %dil +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - testb $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - testb %sil, %dil +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - testb %sil, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - testw $511, %ax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - testw $511, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - testw $511, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - testw $7, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - testw $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - testw %si, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - testw %si, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - testl $665536, %eax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - testl $665536, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - testl $665536, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - testl $7, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - testl $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - testl %esi, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - testl %esi, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - testq $665536, %rax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - testq $665536, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - testq $665536, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - testq $7, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - testq $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - testq %rsi, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - testq %rsi, (%rax) +# CHECK-NEXT: - - - - - - - - - - - - - ud2 +# CHECK-NEXT: - - - - - - - - - - - - - wrmsr +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - xaddb %bl, %cl +# CHECK-NEXT: - - - - - - - - - - - - - xaddb %bl, (%rcx) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - xaddw %bx, %cx +# CHECK-NEXT: - - - - - - - - - - - - - xaddw %ax, (%rbx) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - xaddl %ebx, %ecx +# CHECK-NEXT: - - - - - - - - - - - - - xaddl %eax, (%rbx) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - xaddq %rbx, %rcx +# CHECK-NEXT: - - - - - - - - - - - - - xaddq %rax, (%rbx) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - xchgb %bl, %cl +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - xchgb %bl, (%rbx) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - xchgw %bx, %ax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - xchgw %bx, %cx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - xchgw %ax, (%rbx) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - xchgl %ebx, %eax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - xchgl %ebx, %ecx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - xchgl %eax, (%rbx) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - xchgq %rbx, %rax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - xchgq %rbx, %rcx +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - xchgq %rax, (%rbx) +# CHECK-NEXT: - - - - - - - - - - - - - xlatb +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - xorb $7, %al +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - xorb $7, %dil +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - xorb $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - xorb %sil, %dil +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - xorb %sil, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - xorb (%rax), %dil +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - xorw $511, %ax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - xorw $511, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - xorw $511, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - xorw $7, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - xorw $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - xorw %si, %di +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - xorw %si, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - xorw (%rax), %di +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - xorl $665536, %eax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - xorl $665536, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - xorl $665536, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - xorl $7, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - xorl $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - xorl %esi, %edi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - xorl %esi, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - xorl (%rax), %edi +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - xorq $665536, %rax +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - xorq $665536, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - xorq $665536, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - xorq $7, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - xorq $7, (%rax) +# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - xorq %rsi, %rdi +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - xorq %rsi, (%rax) +# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - xorq (%rax), %rdi Index: llvm/test/tools/llvm-mca/X86/Znver2/resources-x87.s =================================================================== --- llvm/test/tools/llvm-mca/X86/Znver2/resources-x87.s +++ llvm/test/tools/llvm-mca/X86/Znver2/resources-x87.s @@ -0,0 +1,526 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -instruction-tables < %s | FileCheck %s + +f2xm1 + +fabs + +fadd %st, %st(1) +fadd %st(2) +fadds (%ecx) +faddl (%ecx) +faddp %st(1) +faddp %st(2) +fiadds (%ecx) +fiaddl (%ecx) + +fbld (%ecx) +fbstp (%eax) + +fchs + +fnclex + +fcmovb %st(1), %st +fcmovbe %st(1), %st +fcmove %st(1), %st +fcmovnb %st(1), %st +fcmovnbe %st(1), %st +fcmovne %st(1), %st +fcmovnu %st(1), %st +fcmovu %st(1), %st + +fcom %st(1) +fcom %st(3) +fcoms (%ecx) +fcoml (%eax) +fcomp %st(1) +fcomp %st(3) +fcomps (%ecx) +fcompl (%eax) +fcompp + +fcomi %st(3) +fcompi %st(3) + +fcos + +fdecstp + +fdiv %st, %st(1) +fdiv %st(2) +fdivs (%ecx) +fdivl (%eax) +fdivp %st(1) +fdivp %st(2) +fidivs (%ecx) +fidivl (%eax) + +fdivr %st, %st(1) +fdivr %st(2) +fdivrs (%ecx) +fdivrl (%eax) +fdivrp %st(1) +fdivrp %st(2) +fidivrs (%ecx) +fidivrl (%eax) + +ffree %st(0) + +ficoms (%ecx) +ficoml (%eax) +ficomps (%ecx) +ficompl (%eax) + +filds (%edx) +fildl (%ecx) +fildll (%eax) + +fincstp + +fninit + +fists (%edx) +fistl (%ecx) +fistps (%edx) +fistpl (%ecx) +fistpll (%eax) + +fisttps (%edx) +fisttpl (%ecx) +fisttpll (%eax) + +fld %st(0) +flds (%edx) +fldl (%ecx) +fldt (%eax) + +fldcw (%eax) +fldenv (%eax) + +fld1 +fldl2e +fldl2t +fldlg2 +fldln2 +fldpi +fldz + +fmul %st, %st(1) +fmul %st(2) +fmuls (%ecx) +fmull (%eax) +fmulp %st(1) +fmulp %st(2) +fimuls (%ecx) +fimull (%eax) + +fnop + +fpatan + +fprem +fprem1 + +fptan + +frndint + +frstor (%eax) + +fnsave (%eax) + +fscale + +fsin + +fsincos + +fsqrt + +fst %st(0) +fsts (%edx) +fstl (%ecx) +fstp %st(0) +fstpl (%edx) +fstpl (%ecx) +fstpt (%eax) + +fnstcw (%eax) +fnstenv (%eax) +fnstsw (%eax) + +frstor (%eax) +fsave (%eax) + +fsub %st, %st(1) +fsub %st(2) +fsubs (%ecx) +fsubl (%eax) +fsubp %st(1) +fsubp %st(2) +fisubs (%ecx) +fisubl (%eax) + +fsubr %st, %st(1) +fsubr %st(2) +fsubrs (%ecx) +fsubrl (%eax) +fsubrp %st(1) +fsubrp %st(2) +fisubrs (%ecx) +fisubrl (%eax) + +ftst + +fucom %st(1) +fucom %st(3) +fucomp %st(1) +fucomp %st(3) +fucompp + +fucomi %st(3) +fucompi %st(3) + +fwait + +fxam + +fxch %st(1) +fxch %st(3) + +fxrstor (%eax) +fxsave (%eax) + +fxtract + +fyl2x +fyl2xp1 + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.25 U f2xm1 +# CHECK-NEXT: 1 2 1.00 U fabs +# CHECK-NEXT: 1 3 1.00 U fadd %st, %st(1) +# CHECK-NEXT: 1 3 1.00 U fadd %st(2), %st +# CHECK-NEXT: 1 10 1.00 * U fadds (%ecx) +# CHECK-NEXT: 1 10 1.00 * U faddl (%ecx) +# CHECK-NEXT: 1 3 1.00 U faddp %st, %st(1) +# CHECK-NEXT: 1 3 1.00 U faddp %st, %st(2) +# CHECK-NEXT: 1 10 1.00 * U fiadds (%ecx) +# CHECK-NEXT: 1 10 1.00 * U fiaddl (%ecx) +# CHECK-NEXT: 1 100 0.25 U fbld (%ecx) +# CHECK-NEXT: 1 100 0.25 U fbstp (%eax) +# CHECK-NEXT: 1 1 1.00 U fchs +# CHECK-NEXT: 1 100 0.25 U fnclex +# CHECK-NEXT: 1 100 0.25 U fcmovb %st(1), %st +# CHECK-NEXT: 1 100 0.25 U fcmovbe %st(1), %st +# CHECK-NEXT: 1 100 0.25 U fcmove %st(1), %st +# CHECK-NEXT: 1 100 0.25 U fcmovnb %st(1), %st +# CHECK-NEXT: 1 100 0.25 U fcmovnbe %st(1), %st +# CHECK-NEXT: 1 100 0.25 U fcmovne %st(1), %st +# CHECK-NEXT: 1 100 0.25 U fcmovnu %st(1), %st +# CHECK-NEXT: 1 100 0.25 U fcmovu %st(1), %st +# CHECK-NEXT: 1 1 1.00 U fcom %st(1) +# CHECK-NEXT: 1 1 1.00 U fcom %st(3) +# CHECK-NEXT: 1 8 1.00 U fcoms (%ecx) +# CHECK-NEXT: 1 8 1.00 U fcoml (%eax) +# CHECK-NEXT: 1 1 1.00 U fcomp %st(1) +# CHECK-NEXT: 1 1 1.00 U fcomp %st(3) +# CHECK-NEXT: 1 8 1.00 U fcomps (%ecx) +# CHECK-NEXT: 1 8 1.00 U fcompl (%eax) +# CHECK-NEXT: 1 1 1.00 U fcompp +# CHECK-NEXT: 1 9 0.50 U fcomi %st(3), %st +# CHECK-NEXT: 1 9 0.50 U fcompi %st(3), %st +# CHECK-NEXT: 1 100 0.25 U fcos +# CHECK-NEXT: 1 11 1.00 U fdecstp +# CHECK-NEXT: 1 15 1.00 U fdiv %st, %st(1) +# CHECK-NEXT: 1 15 1.00 U fdiv %st(2), %st +# CHECK-NEXT: 1 22 1.00 * U fdivs (%ecx) +# CHECK-NEXT: 1 22 1.00 * U fdivl (%eax) +# CHECK-NEXT: 1 15 1.00 U fdivp %st, %st(1) +# CHECK-NEXT: 1 15 1.00 U fdivp %st, %st(2) +# CHECK-NEXT: 1 22 1.00 * U fidivs (%ecx) +# CHECK-NEXT: 1 22 1.00 * U fidivl (%eax) +# CHECK-NEXT: 1 15 1.00 U fdivr %st, %st(1) +# CHECK-NEXT: 1 15 1.00 U fdivr %st(2), %st +# CHECK-NEXT: 1 22 1.00 * U fdivrs (%ecx) +# CHECK-NEXT: 1 22 1.00 * U fdivrl (%eax) +# CHECK-NEXT: 1 15 1.00 U fdivrp %st, %st(1) +# CHECK-NEXT: 1 15 1.00 U fdivrp %st, %st(2) +# CHECK-NEXT: 1 22 1.00 * U fidivrs (%ecx) +# CHECK-NEXT: 1 22 1.00 * U fidivrl (%eax) +# CHECK-NEXT: 1 11 1.00 U ffree %st(0) +# CHECK-NEXT: 2 12 1.50 U ficoms (%ecx) +# CHECK-NEXT: 2 12 1.50 U ficoml (%eax) +# CHECK-NEXT: 2 12 1.50 U ficomps (%ecx) +# CHECK-NEXT: 2 12 1.50 U ficompl (%eax) +# CHECK-NEXT: 2 11 1.00 * U filds (%edx) +# CHECK-NEXT: 2 11 1.00 * U fildl (%ecx) +# CHECK-NEXT: 2 11 1.00 * U fildll (%eax) +# CHECK-NEXT: 1 11 1.00 U fincstp +# CHECK-NEXT: 1 100 0.25 U fninit +# CHECK-NEXT: 1 12 0.50 * U fists (%edx) +# CHECK-NEXT: 1 12 0.50 * U fistl (%ecx) +# CHECK-NEXT: 1 12 0.50 * U fistps (%edx) +# CHECK-NEXT: 1 12 0.50 * U fistpl (%ecx) +# CHECK-NEXT: 1 12 0.50 * U fistpll (%eax) +# CHECK-NEXT: 1 12 0.50 * U fisttps (%edx) +# CHECK-NEXT: 1 12 0.50 * U fisttpl (%ecx) +# CHECK-NEXT: 1 12 0.50 * U fisttpll (%eax) +# CHECK-NEXT: 1 1 0.50 U fld %st(0) +# CHECK-NEXT: 1 8 0.33 * U flds (%edx) +# CHECK-NEXT: 1 8 0.33 * U fldl (%ecx) +# CHECK-NEXT: 2 1 0.50 * U fldt (%eax) +# CHECK-NEXT: 1 100 0.25 * U fldcw (%eax) +# CHECK-NEXT: 1 100 0.25 U fldenv (%eax) +# CHECK-NEXT: 1 11 1.00 U fld1 +# CHECK-NEXT: 1 11 1.00 U fldl2e +# CHECK-NEXT: 1 11 1.00 U fldl2t +# CHECK-NEXT: 1 11 1.00 U fldlg2 +# CHECK-NEXT: 1 11 1.00 U fldln2 +# CHECK-NEXT: 1 11 1.00 U fldpi +# CHECK-NEXT: 1 8 0.50 U fldz +# CHECK-NEXT: 1 3 0.50 U fmul %st, %st(1) +# CHECK-NEXT: 1 3 0.50 U fmul %st(2), %st +# CHECK-NEXT: 2 10 0.50 * U fmuls (%ecx) +# CHECK-NEXT: 2 10 0.50 * U fmull (%eax) +# CHECK-NEXT: 1 3 0.50 U fmulp %st, %st(1) +# CHECK-NEXT: 1 3 0.50 U fmulp %st, %st(2) +# CHECK-NEXT: 2 10 0.50 * U fimuls (%ecx) +# CHECK-NEXT: 2 10 0.50 * U fimull (%eax) +# CHECK-NEXT: 1 1 1.00 U fnop +# CHECK-NEXT: 1 100 0.25 U fpatan +# CHECK-NEXT: 1 100 0.25 U fprem +# CHECK-NEXT: 1 100 0.25 U fprem1 +# CHECK-NEXT: 1 100 0.25 U fptan +# CHECK-NEXT: 1 100 0.25 U frndint +# CHECK-NEXT: 1 100 0.25 U frstor (%eax) +# CHECK-NEXT: 1 100 0.25 U fnsave (%eax) +# CHECK-NEXT: 1 100 0.25 U fscale +# CHECK-NEXT: 1 100 0.25 U fsin +# CHECK-NEXT: 1 100 0.25 U fsincos +# CHECK-NEXT: 1 20 20.00 U fsqrt +# CHECK-NEXT: 2 5 0.50 U fst %st(0) +# CHECK-NEXT: 1 1 0.33 * U fsts (%edx) +# CHECK-NEXT: 1 1 0.33 * U fstl (%ecx) +# CHECK-NEXT: 2 5 0.50 U fstp %st(0) +# CHECK-NEXT: 1 1 0.33 * U fstpl (%edx) +# CHECK-NEXT: 1 1 0.33 * U fstpl (%ecx) +# CHECK-NEXT: 1 5 0.50 * U fstpt (%eax) +# CHECK-NEXT: 1 100 0.25 * U fnstcw (%eax) +# CHECK-NEXT: 1 100 0.25 U fnstenv (%eax) +# CHECK-NEXT: 1 100 0.25 U fnstsw (%eax) +# CHECK-NEXT: 1 100 0.25 U frstor (%eax) +# CHECK-NEXT: 1 1 1.00 U wait +# CHECK-NEXT: 1 100 0.25 U fnsave (%eax) +# CHECK-NEXT: 1 3 1.00 U fsub %st, %st(1) +# CHECK-NEXT: 1 3 1.00 U fsub %st(2), %st +# CHECK-NEXT: 1 10 1.00 * U fsubs (%ecx) +# CHECK-NEXT: 1 10 1.00 * U fsubl (%eax) +# CHECK-NEXT: 1 3 1.00 U fsubp %st, %st(1) +# CHECK-NEXT: 1 3 1.00 U fsubp %st, %st(2) +# CHECK-NEXT: 1 10 1.00 * U fisubs (%ecx) +# CHECK-NEXT: 1 10 1.00 * U fisubl (%eax) +# CHECK-NEXT: 1 3 1.00 U fsubr %st, %st(1) +# CHECK-NEXT: 1 3 1.00 U fsubr %st(2), %st +# CHECK-NEXT: 1 10 1.00 * U fsubrs (%ecx) +# CHECK-NEXT: 1 10 1.00 * U fsubrl (%eax) +# CHECK-NEXT: 1 3 1.00 U fsubrp %st, %st(1) +# CHECK-NEXT: 1 3 1.00 U fsubrp %st, %st(2) +# CHECK-NEXT: 1 10 1.00 * U fisubrs (%ecx) +# CHECK-NEXT: 1 10 1.00 * U fisubrl (%eax) +# CHECK-NEXT: 1 1 1.00 U ftst +# CHECK-NEXT: 1 1 1.00 U fucom %st(1) +# CHECK-NEXT: 1 1 1.00 U fucom %st(3) +# CHECK-NEXT: 1 1 1.00 U fucomp %st(1) +# CHECK-NEXT: 1 1 1.00 U fucomp %st(3) +# CHECK-NEXT: 1 1 1.00 U fucompp +# CHECK-NEXT: 1 9 0.50 U fucomi %st(3), %st +# CHECK-NEXT: 1 9 0.50 U fucompi %st(3), %st +# CHECK-NEXT: 1 1 1.00 U wait +# CHECK-NEXT: 1 1 1.00 U fxam +# CHECK-NEXT: 1 1 0.25 U fxch %st(1) +# CHECK-NEXT: 1 1 0.25 U fxch %st(3) +# CHECK-NEXT: 1 100 0.25 * * U fxrstor (%eax) +# CHECK-NEXT: 1 100 0.25 * * U fxsave (%eax) +# CHECK-NEXT: 1 100 0.25 U fxtract +# CHECK-NEXT: 1 100 0.25 U fyl2x +# CHECK-NEXT: 1 100 0.25 U fyl2xp1 + +# CHECK: Resources: +# CHECK-NEXT: [0] - Zn2AGU0 +# CHECK-NEXT: [1] - Zn2AGU1 +# CHECK-NEXT: [2] - Zn2AGU2 +# CHECK-NEXT: [3] - Zn2ALU0 +# CHECK-NEXT: [4] - Zn2ALU1 +# CHECK-NEXT: [5] - Zn2ALU2 +# CHECK-NEXT: [6] - Zn2ALU3 +# CHECK-NEXT: [7] - Zn2Divider +# CHECK-NEXT: [8] - Zn2FPU0 +# CHECK-NEXT: [9] - Zn2FPU1 +# CHECK-NEXT: [10] - Zn2FPU2 +# CHECK-NEXT: [11] - Zn2FPU3 +# CHECK-NEXT: [12] - Zn2Multiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] +# CHECK-NEXT: 21.67 21.67 21.67 - - - - - 54.50 6.00 8.00 64.50 - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: +# CHECK-NEXT: - - - - - - - - - - - - - f2xm1 +# CHECK-NEXT: - - - - - - - - - - - 1.00 - fabs +# CHECK-NEXT: - - - - - - - - 1.00 - - - - fadd %st, %st(1) +# CHECK-NEXT: - - - - - - - - 1.00 - - - - fadd %st(2), %st +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - fadds (%ecx) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - faddl (%ecx) +# CHECK-NEXT: - - - - - - - - 1.00 - - - - faddp %st, %st(1) +# CHECK-NEXT: - - - - - - - - 1.00 - - - - faddp %st, %st(2) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - fiadds (%ecx) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - fiaddl (%ecx) +# CHECK-NEXT: - - - - - - - - - - - - - fbld (%ecx) +# CHECK-NEXT: - - - - - - - - - - - - - fbstp (%eax) +# CHECK-NEXT: - - - - - - - - - - - 1.00 - fchs +# CHECK-NEXT: - - - - - - - - - - - - - fnclex +# CHECK-NEXT: - - - - - - - - - - - - - fcmovb %st(1), %st +# CHECK-NEXT: - - - - - - - - - - - - - fcmovbe %st(1), %st +# CHECK-NEXT: - - - - - - - - - - - - - fcmove %st(1), %st +# CHECK-NEXT: - - - - - - - - - - - - - fcmovnb %st(1), %st +# CHECK-NEXT: - - - - - - - - - - - - - fcmovnbe %st(1), %st +# CHECK-NEXT: - - - - - - - - - - - - - fcmovne %st(1), %st +# CHECK-NEXT: - - - - - - - - - - - - - fcmovnu %st(1), %st +# CHECK-NEXT: - - - - - - - - - - - - - fcmovu %st(1), %st +# CHECK-NEXT: - - - - - - - - 1.00 - - - - fcom %st(1) +# CHECK-NEXT: - - - - - - - - 1.00 - - - - fcom %st(3) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - fcoms (%ecx) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - fcoml (%eax) +# CHECK-NEXT: - - - - - - - - 1.00 - - - - fcomp %st(1) +# CHECK-NEXT: - - - - - - - - 1.00 - - - - fcomp %st(3) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - fcomps (%ecx) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - fcompl (%eax) +# CHECK-NEXT: - - - - - - - - 1.00 - - - - fcompp +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - 0.50 - - fcomi %st(3), %st +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - 0.50 - - fcompi %st(3), %st +# CHECK-NEXT: - - - - - - - - - - - - - fcos +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - fdecstp +# CHECK-NEXT: - - - - - - - - - - - 1.00 - fdiv %st, %st(1) +# CHECK-NEXT: - - - - - - - - - - - 1.00 - fdiv %st(2), %st +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - fdivs (%ecx) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - fdivl (%eax) +# CHECK-NEXT: - - - - - - - - - - - 1.00 - fdivp %st, %st(1) +# CHECK-NEXT: - - - - - - - - - - - 1.00 - fdivp %st, %st(2) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - fidivs (%ecx) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - fidivl (%eax) +# CHECK-NEXT: - - - - - - - - - - - 1.00 - fdivr %st, %st(1) +# CHECK-NEXT: - - - - - - - - - - - 1.00 - fdivr %st(2), %st +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - fdivrs (%ecx) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - fdivrl (%eax) +# CHECK-NEXT: - - - - - - - - - - - 1.00 - fdivrp %st, %st(1) +# CHECK-NEXT: - - - - - - - - - - - 1.00 - fdivrp %st, %st(2) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - fidivrs (%ecx) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - fidivrl (%eax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - ffree %st(0) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.50 - - 1.50 - ficoms (%ecx) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.50 - - 1.50 - ficoml (%eax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.50 - - 1.50 - ficomps (%ecx) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.50 - - 1.50 - ficompl (%eax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - filds (%edx) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - fildl (%ecx) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - fildll (%eax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - fincstp +# CHECK-NEXT: - - - - - - - - - - - - - fninit +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 0.50 0.50 - fists (%edx) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 0.50 0.50 - fistl (%ecx) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 0.50 0.50 - fistps (%edx) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 0.50 0.50 - fistpl (%ecx) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 0.50 0.50 - fistpll (%eax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 0.50 0.50 - fisttps (%edx) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 0.50 0.50 - fisttpl (%ecx) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 0.50 0.50 - fisttpll (%eax) +# CHECK-NEXT: - - - - - - - - - 0.50 - 0.50 - fld %st(0) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - flds (%edx) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - fldl (%ecx) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 - 0.50 - fldt (%eax) +# CHECK-NEXT: - - - - - - - - - - - - - fldcw (%eax) +# CHECK-NEXT: - - - - - - - - - - - - - fldenv (%eax) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - fld1 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - fldl2e +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - fldl2t +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - fldlg2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - fldln2 +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - 1.00 - fldpi +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - 0.50 - 0.50 - fldz +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmul %st, %st(1) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmul %st(2), %st +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - fmuls (%ecx) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - fmull (%eax) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmulp %st, %st(1) +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - - fmulp %st, %st(2) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - fimuls (%ecx) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 0.50 - - - fimull (%eax) +# CHECK-NEXT: - - - - - - - - 1.00 - - - - fnop +# CHECK-NEXT: - - - - - - - - - - - - - fpatan +# CHECK-NEXT: - - - - - - - - - - - - - fprem +# CHECK-NEXT: - - - - - - - - - - - - - fprem1 +# CHECK-NEXT: - - - - - - - - - - - - - fptan +# CHECK-NEXT: - - - - - - - - - - - - - frndint +# CHECK-NEXT: - - - - - - - - - - - - - frstor (%eax) +# CHECK-NEXT: - - - - - - - - - - - - - fnsave (%eax) +# CHECK-NEXT: - - - - - - - - - - - - - fscale +# CHECK-NEXT: - - - - - - - - - - - - - fsin +# CHECK-NEXT: - - - - - - - - - - - - - fsincos +# CHECK-NEXT: - - - - - - - - - - - 20.00 - fsqrt +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fst %st(0) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - fsts (%edx) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - fstl (%ecx) +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - fstp %st(0) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - fstpl (%edx) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - fstpl (%ecx) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - 0.50 0.50 - fstpt (%eax) +# CHECK-NEXT: - - - - - - - - - - - - - fnstcw (%eax) +# CHECK-NEXT: - - - - - - - - - - - - - fnstenv (%eax) +# CHECK-NEXT: - - - - - - - - - - - - - fnstsw (%eax) +# CHECK-NEXT: - - - - - - - - - - - - - frstor (%eax) +# CHECK-NEXT: - - - - - - - - 1.00 - - - - wait +# CHECK-NEXT: - - - - - - - - - - - - - fnsave (%eax) +# CHECK-NEXT: - - - - - - - - 1.00 - - - - fsub %st, %st(1) +# CHECK-NEXT: - - - - - - - - 1.00 - - - - fsub %st(2), %st +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - fsubs (%ecx) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - fsubl (%eax) +# CHECK-NEXT: - - - - - - - - 1.00 - - - - fsubp %st, %st(1) +# CHECK-NEXT: - - - - - - - - 1.00 - - - - fsubp %st, %st(2) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - fisubs (%ecx) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - fisubl (%eax) +# CHECK-NEXT: - - - - - - - - 1.00 - - - - fsubr %st, %st(1) +# CHECK-NEXT: - - - - - - - - 1.00 - - - - fsubr %st(2), %st +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - fsubrs (%ecx) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - fsubrl (%eax) +# CHECK-NEXT: - - - - - - - - 1.00 - - - - fsubrp %st, %st(1) +# CHECK-NEXT: - - - - - - - - 1.00 - - - - fsubrp %st, %st(2) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - fisubrs (%ecx) +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 1.00 - - - - fisubrl (%eax) +# CHECK-NEXT: - - - - - - - - 1.00 - - - - ftst +# CHECK-NEXT: - - - - - - - - 1.00 - - - - fucom %st(1) +# CHECK-NEXT: - - - - - - - - 1.00 - - - - fucom %st(3) +# CHECK-NEXT: - - - - - - - - 1.00 - - - - fucomp %st(1) +# CHECK-NEXT: - - - - - - - - 1.00 - - - - fucomp %st(3) +# CHECK-NEXT: - - - - - - - - 1.00 - - - - fucompp +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - 0.50 - - fucomi %st(3), %st +# CHECK-NEXT: 0.33 0.33 0.33 - - - - - 0.50 - 0.50 - - fucompi %st(3), %st +# CHECK-NEXT: - - - - - - - - 1.00 - - - - wait +# CHECK-NEXT: - - - - - - - - - - - 1.00 - fxam +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - fxch %st(1) +# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - fxch %st(3) +# CHECK-NEXT: - - - - - - - - - - - - - fxrstor (%eax) +# CHECK-NEXT: - - - - - - - - - - - - - fxsave (%eax) +# CHECK-NEXT: - - - - - - - - - - - - - fxtract +# CHECK-NEXT: - - - - - - - - - - - - - fyl2x +# CHECK-NEXT: - - - - - - - - - - - - - fyl2xp1 Index: llvm/test/tools/llvm-mca/X86/bextr-read-after-ld.s =================================================================== --- llvm/test/tools/llvm-mca/X86/bextr-read-after-ld.s +++ llvm/test/tools/llvm-mca/X86/bextr-read-after-ld.s @@ -5,6 +5,7 @@ # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=BDVER2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=BTVER2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver1 -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=ZNVER1 +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=ZNVER2 add %edi, %esi bextrl %esi, (%rdi), %eax @@ -30,6 +31,9 @@ # ZNVER1-NEXT: Total Cycles: 8 # ZNVER1-NEXT: Total uOps: 3 +# ZNVER2-NEXT: Total Cycles: 8 +# ZNVER2-NEXT: Total uOps: 3 + # BDVER2: Dispatch Width: 4 # BDVER2-NEXT: uOps Per Cycle: 0.33 # BDVER2-NEXT: IPC: 0.22 Index: llvm/test/tools/llvm-mca/X86/bzhi-read-after-ld.s =================================================================== --- llvm/test/tools/llvm-mca/X86/bzhi-read-after-ld.s +++ llvm/test/tools/llvm-mca/X86/bzhi-read-after-ld.s @@ -3,6 +3,7 @@ # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=broadwell -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=BDWELL # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=SKYLAKE # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver1 -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=ZNVER1 +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=ZNVER2 add %edi, %esi bzhil %esi, (%rdi), %eax @@ -14,6 +15,7 @@ # HASWELL-NEXT: Total Cycles: 9 # SKYLAKE-NEXT: Total Cycles: 9 # ZNVER1-NEXT: Total Cycles: 8 +# ZNVER2-NEXT: Total Cycles: 8 # ALL-NEXT: Total uOps: 3 Index: llvm/test/tools/llvm-mca/X86/cpus.s =================================================================== --- llvm/test/tools/llvm-mca/X86/cpus.s +++ llvm/test/tools/llvm-mca/X86/cpus.s @@ -3,6 +3,7 @@ # RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -resource-pressure=false -instruction-info=false < %s | FileCheck --check-prefix=ALL --check-prefix=BDVER2 %s # RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=btver2 -resource-pressure=false -instruction-info=false < %s | FileCheck --check-prefix=ALL --check-prefix=BTVER2 %s # RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=znver1 -resource-pressure=false -instruction-info=false < %s | FileCheck --check-prefix=ALL --check-prefix=ZNVER1 %s +# RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=znver2 -resource-pressure=false -instruction-info=false < %s | FileCheck --check-prefix=ALL --check-prefix=ZNVER2 %s # RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge -resource-pressure=false -instruction-info=false < %s | FileCheck --check-prefix=ALL --check-prefix=SANDYBRIDGE %s # RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=ivybridge -resource-pressure=false -instruction-info=false < %s | FileCheck --check-prefix=ALL --check-prefix=IVYBRIDGE %s # RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=haswell -resource-pressure=false -instruction-info=false < %s | FileCheck --check-prefix=ALL --check-prefix=HASWELL %s @@ -78,3 +79,8 @@ # ZNVER1-NEXT: uOps Per Cycle: 0.97 # ZNVER1-NEXT: IPC: 0.97 # ZNVER1-NEXT: Block RThroughput: 0.3 + +# ZNVER2: Dispatch Width: 4 +# ZNVER2-NEXT: uOps Per Cycle: 0.97 +# ZNVER2-NEXT: IPC: 0.97 +# ZNVER2-NEXT: Block RThroughput: 0.3 Index: llvm/test/tools/llvm-mca/X86/fma3-read-after-ld-1.s =================================================================== --- llvm/test/tools/llvm-mca/X86/fma3-read-after-ld-1.s +++ llvm/test/tools/llvm-mca/X86/fma3-read-after-ld-1.s @@ -7,6 +7,8 @@ # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver1 -iterations=1 -resource-pressure=false -instruction-info=false -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=ZNVER1 +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -iterations=1 -resource-pressure=false -instruction-info=false -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=ZNVER1 + vaddps %xmm0, %xmm0, %xmm1 vfmadd213ps (%rdi), %xmm1, %xmm2 Index: llvm/test/tools/llvm-mca/X86/fma3-read-after-ld-2.s =================================================================== --- llvm/test/tools/llvm-mca/X86/fma3-read-after-ld-2.s +++ llvm/test/tools/llvm-mca/X86/fma3-read-after-ld-2.s @@ -7,6 +7,8 @@ # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver1 -iterations=1 -resource-pressure=false -instruction-info=false -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=ZNVER1 +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -iterations=1 -resource-pressure=false -instruction-info=false -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=ZNVER1 + vaddps %xmm0, %xmm0, %xmm2 vfmadd213ps (%rdi), %xmm1, %xmm2 Index: llvm/test/tools/llvm-mca/X86/read-after-ld-1.s =================================================================== --- llvm/test/tools/llvm-mca/X86/read-after-ld-1.s +++ llvm/test/tools/llvm-mca/X86/read-after-ld-1.s @@ -7,6 +7,7 @@ # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1 -resource-pressure=false -instruction-info=false -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=BDVER2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=1 -resource-pressure=false -instruction-info=false -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=BTVER2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver1 -iterations=1 -resource-pressure=false -instruction-info=false -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=ZNVER1 +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -iterations=1 -resource-pressure=false -instruction-info=false -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=ZNVER2 vdivps %xmm0, %xmm1, %xmm1 vaddps (%rax), %xmm1, %xmm1 @@ -38,6 +39,9 @@ # ZNVER1-NEXT: Total Cycles: 20 # ZNVER1-NEXT: Total uOps: 2 +# ZNVER2-NEXT: Total Cycles: 20 +# ZNVER2-NEXT: Total uOps: 2 + # BARCELONA: Dispatch Width: 4 # BARCELONA-NEXT: uOps Per Cycle: 0.15 # BARCELONA-NEXT: IPC: 0.10 @@ -78,6 +82,11 @@ # ZNVER1-NEXT: IPC: 0.10 # ZNVER1-NEXT: Block RThroughput: 1.0 +# ZNVER2: Dispatch Width: 4 +# ZNVER2-NEXT: uOps Per Cycle: 0.10 +# ZNVER2-NEXT: IPC: 0.10 +# ZNVER2-NEXT: Block RThroughput: 1.0 + # ALL: Timeline view: # BARCELONA-NEXT: 0123456789 @@ -104,6 +113,9 @@ # ZNVER1-NEXT: 0123456789 # ZNVER1-NEXT: Index 0123456789 +# ZNVER2-NEXT: 0123456789 +# ZNVER2-NEXT: Index 0123456789 + # BARCELONA: [0,0] DeeeeeeeeeeeeeeER . vdivps %xmm0, %xmm1, %xmm1 # BARCELONA-NEXT: [0,1] D========eeeeeeeeeER vaddps (%rax), %xmm1, %xmm1 @@ -128,6 +140,9 @@ # ZNVER1: [0,0] DeeeeeeeeeeeeeeeER . vdivps %xmm0, %xmm1, %xmm1 # ZNVER1-NEXT: [0,1] D=======eeeeeeeeeeER vaddps (%rax), %xmm1, %xmm1 +# ZNVER2: [0,0] DeeeeeeeeeeeeeeeER . vdivps %xmm0, %xmm1, %xmm1 +# ZNVER2-NEXT: [0,1] D=======eeeeeeeeeeER vaddps (%rax), %xmm1, %xmm1 + # ALL: Average Wait times (based on the timeline view): # ALL-NEXT: [0]: Executions # ALL-NEXT: [1]: Average time spent waiting in a scheduler's queue @@ -160,3 +175,6 @@ # ZNVER1-NEXT: 1. 1 8.0 0.0 0.0 vaddps (%rax), %xmm1, %xmm1 # ZNVER1-NEXT: 1 4.5 0.5 0.0 + +# ZNVER2-NEXT: 1. 1 8.0 0.0 0.0 vaddps (%rax), %xmm1, %xmm1 +# ZNVER2-NEXT: 1 4.5 0.5 0.0 Index: llvm/test/tools/llvm-mca/X86/read-after-ld-2.s =================================================================== --- llvm/test/tools/llvm-mca/X86/read-after-ld-2.s +++ llvm/test/tools/llvm-mca/X86/read-after-ld-2.s @@ -7,6 +7,8 @@ # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver1 -iterations=100 -resource-pressure=false -instruction-info=false -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=ZNVER1 +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -iterations=100 -resource-pressure=false -instruction-info=false -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=ZNVER2 + # Code Snippet from "Ithemal: Accurate, Portable and Fast Basic Block Throughput Estimation using Deep Neural Networks" # Charith Mendis, Saman Amarasinghe, Michael Carbin add $1, %edx @@ -49,6 +51,11 @@ # ZNVER1-NEXT: IPC: 3.64 # ZNVER1-NEXT: Block RThroughput: 1.0 +# ZNVER2: Dispatch Width: 4 +# ZNVER2-NEXT: uOps Per Cycle: 3.64 +# ZNVER2-NEXT: IPC: 3.64 +# ZNVER2-NEXT: Block RThroughput: 1.0 + # ALL: Timeline view: # BDWELL-NEXT: 0123456789 @@ -63,6 +70,9 @@ # ZNVER1-NEXT: 0123456789 # ZNVER1-NEXT: Index 0123456789 +# ZNVER2-NEXT: 0123456789 +# ZNVER2-NEXT: Index 0123456789 + # BDWELL: [0,0] DeER . . . .. addl $1, %edx # BDWELL-NEXT: [0,1] DeeeeeeeER. . .. vpaddd (%r8), %ymm0, %ymm0 # BDWELL-NEXT: [0,2] DeE------R. . .. addq $32, %r8 @@ -227,6 +237,47 @@ # ZNVER1-NEXT: [9,2] . . DeE-------R addq $32, %r8 # ZNVER1-NEXT: [9,3] . . D=eE------R cmpl %edi, %edx +# ZNVER2: [0,0] DeER . . . . addl $1, %edx +# ZNVER2-NEXT: [0,1] DeeeeeeeeER . . vpaddd (%r8), %ymm0, %ymm0 +# ZNVER2-NEXT: [0,2] DeE-------R . . addq $32, %r8 +# ZNVER2-NEXT: [0,3] D=eE------R . . cmpl %edi, %edx +# ZNVER2-NEXT: [1,0] .DeE------R . . addl $1, %edx +# ZNVER2-NEXT: [1,1] .DeeeeeeeeER . . vpaddd (%r8), %ymm0, %ymm0 +# ZNVER2-NEXT: [1,2] .DeE-------R . . addq $32, %r8 +# ZNVER2-NEXT: [1,3] .D=eE------R . . cmpl %edi, %edx +# ZNVER2-NEXT: [2,0] . DeE------R . . addl $1, %edx +# ZNVER2-NEXT: [2,1] . DeeeeeeeeER . . vpaddd (%r8), %ymm0, %ymm0 +# ZNVER2-NEXT: [2,2] . DeE-------R . . addq $32, %r8 +# ZNVER2-NEXT: [2,3] . D=eE------R . . cmpl %edi, %edx +# ZNVER2-NEXT: [3,0] . DeE------R . . addl $1, %edx +# ZNVER2-NEXT: [3,1] . DeeeeeeeeER . . vpaddd (%r8), %ymm0, %ymm0 +# ZNVER2-NEXT: [3,2] . DeE-------R . . addq $32, %r8 +# ZNVER2-NEXT: [3,3] . D=eE------R . . cmpl %edi, %edx +# ZNVER2-NEXT: [4,0] . DeE------R . . addl $1, %edx +# ZNVER2-NEXT: [4,1] . DeeeeeeeeER. . vpaddd (%r8), %ymm0, %ymm0 +# ZNVER2-NEXT: [4,2] . DeE-------R. . addq $32, %r8 +# ZNVER2-NEXT: [4,3] . D=eE------R. . cmpl %edi, %edx +# ZNVER2-NEXT: [5,0] . DeE------R. . addl $1, %edx +# ZNVER2-NEXT: [5,1] . DeeeeeeeeER . vpaddd (%r8), %ymm0, %ymm0 +# ZNVER2-NEXT: [5,2] . DeE-------R . addq $32, %r8 +# ZNVER2-NEXT: [5,3] . D=eE------R . cmpl %edi, %edx +# ZNVER2-NEXT: [6,0] . .DeE------R . addl $1, %edx +# ZNVER2-NEXT: [6,1] . .DeeeeeeeeER . vpaddd (%r8), %ymm0, %ymm0 +# ZNVER2-NEXT: [6,2] . .DeE-------R . addq $32, %r8 +# ZNVER2-NEXT: [6,3] . .D=eE------R . cmpl %edi, %edx +# ZNVER2-NEXT: [7,0] . . DeE------R . addl $1, %edx +# ZNVER2-NEXT: [7,1] . . DeeeeeeeeER . vpaddd (%r8), %ymm0, %ymm0 +# ZNVER2-NEXT: [7,2] . . DeE-------R . addq $32, %r8 +# ZNVER2-NEXT: [7,3] . . D=eE------R . cmpl %edi, %edx +# ZNVER2-NEXT: [8,0] . . DeE------R . addl $1, %edx +# ZNVER2-NEXT: [8,1] . . DeeeeeeeeER. vpaddd (%r8), %ymm0, %ymm0 +# ZNVER2-NEXT: [8,2] . . DeE-------R. addq $32, %r8 +# ZNVER2-NEXT: [8,3] . . D=eE------R. cmpl %edi, %edx +# ZNVER2-NEXT: [9,0] . . DeE------R. addl $1, %edx +# ZNVER2-NEXT: [9,1] . . DeeeeeeeeER vpaddd (%r8), %ymm0, %ymm0 +# ZNVER2-NEXT: [9,2] . . DeE-------R addq $32, %r8 +# ZNVER2-NEXT: [9,3] . . D=eE------R cmpl %edi, %edx + # ALL: Average Wait times (based on the timeline view): # ALL-NEXT: [0]: Executions # ALL-NEXT: [1]: Average time spent waiting in a scheduler's queue @@ -239,6 +290,7 @@ # HASWELL-NEXT: 0. 10 1.0 0.4 5.4 addl $1, %edx # SKYLAKE-NEXT: 0. 10 1.9 0.1 5.4 addl $1, %edx # ZNVER1-NEXT: 0. 10 1.0 0.1 5.4 addl $1, %edx +# ZNVER2-NEXT: 0. 10 1.0 0.1 5.4 addl $1, %edx # ALL-NEXT: 1. 10 1.0 0.1 0.0 vpaddd (%r8), %ymm0, %ymm0 @@ -257,3 +309,7 @@ # ZNVER1-NEXT: 2. 10 1.0 0.1 7.0 addq $32, %r8 # ZNVER1-NEXT: 3. 10 2.0 0.0 6.0 cmpl %edi, %edx # ZNVER1-NEXT: 10 1.3 0.1 4.6 + +# ZNVER2-NEXT: 2. 10 1.0 0.1 7.0 addq $32, %r8 +# ZNVER2-NEXT: 3. 10 2.0 0.0 6.0 cmpl %edi, %edx +# ZNVER2-NEXT: 10 1.3 0.1 4.6 Index: llvm/test/tools/llvm-mca/X86/register-file-statistics.s =================================================================== --- llvm/test/tools/llvm-mca/X86/register-file-statistics.s +++ llvm/test/tools/llvm-mca/X86/register-file-statistics.s @@ -4,6 +4,7 @@ # RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1 -all-stats=false -all-views=false -register-file-stats < %s | FileCheck --check-prefixes=ALL,BDVER2 %s # RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=1 -all-stats=false -all-views=false -register-file-stats < %s | FileCheck --check-prefixes=ALL,BTVER2 %s # RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=znver1 -iterations=1 -all-stats=false -all-views=false -register-file-stats < %s | FileCheck --check-prefixes=ALL,ZNVER1 %s +# RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=znver2 -iterations=1 -all-stats=false -all-views=false -register-file-stats < %s | FileCheck --check-prefixes=ALL,ZNVER2 %s # RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge -iterations=1 -all-stats=false -all-views=false -register-file-stats < %s | FileCheck --check-prefixes=ALL %s # RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=ivybridge -iterations=1 -all-stats=false -all-views=false -register-file-stats < %s | FileCheck --check-prefixes=ALL %s # RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=haswell -iterations=1 -all-stats=false -all-views=false -register-file-stats < %s | FileCheck --check-prefixes=ALL %s @@ -38,6 +39,11 @@ # ZNVER1-NEXT: Total number of mappings created: 0 # ZNVER1-NEXT: Max number of mappings used: 0 +# ZNVER2: * Register File #1 -- Zn2FpuPRF: +# ZNVER2-NEXT: Number of physical registers: 160 +# ZNVER2-NEXT: Total number of mappings created: 0 +# ZNVER2-NEXT: Max number of mappings used: 0 + # BDVER2: * Register File #2 -- PdIntegerPRF: # BDVER2-NEXT: Number of physical registers: 96 # BDVER2-NEXT: Total number of mappings created: 2 @@ -52,3 +58,8 @@ # ZNVER1-NEXT: Number of physical registers: 168 # ZNVER1-NEXT: Total number of mappings created: 2 # ZNVER1-NEXT: Max number of mappings used: 2 + +# ZNVER2: * Register File #2 -- Zn2IntegerPRF: +# ZNVER2-NEXT: Number of physical registers: 168 +# ZNVER2-NEXT: Total number of mappings created: 2 +# ZNVER2-NEXT: Max number of mappings used: 2 Index: llvm/test/tools/llvm-mca/X86/scheduler-queue-usage.s =================================================================== --- llvm/test/tools/llvm-mca/X86/scheduler-queue-usage.s +++ llvm/test/tools/llvm-mca/X86/scheduler-queue-usage.s @@ -3,6 +3,7 @@ # RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1 -all-stats=false -all-views=false -scheduler-stats < %s | FileCheck --check-prefixes=ALL,BDVER2 %s # RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=1 -all-stats=false -all-views=false -scheduler-stats < %s | FileCheck --check-prefixes=ALL,BTVER2 %s # RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=znver1 -iterations=1 -all-stats=false -all-views=false -scheduler-stats < %s | FileCheck --check-prefixes=ALL,ZNVER1 %s +# RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=znver2 -iterations=1 -all-stats=false -all-views=false -scheduler-stats < %s | FileCheck --check-prefixes=ALL,ZNVER2 %s # RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge -iterations=1 -all-stats=false -all-views=false -scheduler-stats < %s | FileCheck --check-prefixes=ALL,SNB %s # RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=ivybridge -iterations=1 -all-stats=false -all-views=false -scheduler-stats < %s | FileCheck --check-prefixes=ALL,IVB %s # RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=haswell -iterations=1 -all-stats=false -all-views=false -scheduler-stats < %s | FileCheck --check-prefixes=ALL,HSW %s @@ -88,6 +89,12 @@ # ZNVER1-NEXT: [3] Maximum number of used buffer entries. # ZNVER1-NEXT: [4] Total number of buffer entries. +# ZNVER2: Scheduler's queue usage: +# ZNVER2-NEXT: [1] Resource name. +# ZNVER2-NEXT: [2] Average number of used buffer entries. +# ZNVER2-NEXT: [3] Maximum number of used buffer entries. +# ZNVER2-NEXT: [4] Total number of buffer entries. + # BARCELONA: [1] [2] [3] [4] # BARCELONA-NEXT: SBPortAny 0 1 54 Index: llvm/test/tools/llvm-mca/X86/sqrt-rsqrt-rcp-memop.s =================================================================== --- llvm/test/tools/llvm-mca/X86/sqrt-rsqrt-rcp-memop.s +++ llvm/test/tools/llvm-mca/X86/sqrt-rsqrt-rcp-memop.s @@ -3,6 +3,7 @@ # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1 -all-views=false -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=BDVER2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=1 -all-views=false -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=BTVER2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver1 -iterations=1 -all-views=false -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=ZNVER1 +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -iterations=1 -all-views=false -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=ZNVER2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell -iterations=1 -all-views=false -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=HASWELL # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=broadwell -iterations=1 -all-views=false -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=BROADWELL # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake -iterations=1 -all-views=false -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=SKYLAKE @@ -52,6 +53,9 @@ # ZNVER1-NEXT: 0123456789 0 # ZNVER1-NEXT: Index 0123456789 0123456789 +# ZNVER2-NEXT: 0123456789 0 +# ZNVER2-NEXT: Index 0123456789 0123456789 + # BARCELONA: [0,0] DeER . . . . . leaq 8(%rsp,%rdi,2), %rax # BARCELONA-NEXT: [0,1] D=eeeeeeeeeeeeeeeeeeeeER sqrtss (%rax), %xmm1 @@ -73,6 +77,9 @@ # ZNVER1: [0,0] DeER . . . . . . leaq 8(%rsp,%rdi,2), %rax # ZNVER1-NEXT: [0,1] D=eeeeeeeeeeeeeeeeeeeeeeeeeeeER sqrtss (%rax), %xmm1 +# ZNVER2: [0,0] DeER . . . . . . leaq 8(%rsp,%rdi,2), %rax +# ZNVER2-NEXT: [0,1] D=eeeeeeeeeeeeeeeeeeeeeeeeeeeER sqrtss (%rax), %xmm1 + # ALL: Average Wait times (based on the timeline view): # ALL-NEXT: [0]: Executions # ALL-NEXT: [1]: Average time spent waiting in a scheduler's queue @@ -103,6 +110,9 @@ # ZNVER1-NEXT: 1. 1 2.0 0.0 0.0 sqrtss (%rax), %xmm1 # ZNVER1-NEXT: 1 1.5 0.5 0.0 +# ZNVER2-NEXT: 1. 1 2.0 0.0 0.0 sqrtss (%rax), %xmm1 +# ZNVER2-NEXT: 1 1.5 0.5 0.0 + # ALL: [1] Code Region - test_sqrtsd # ALL: Timeline view: @@ -128,6 +138,9 @@ # ZNVER1-NEXT: 0123456789 0 # ZNVER1-NEXT: Index 0123456789 0123456789 +# ZNVER2-NEXT: 0123456789 0 +# ZNVER2-NEXT: Index 0123456789 0123456789 + # BARCELONA: [0,0] DeER . . . . . . leaq 8(%rsp,%rdi,2), %rax # BARCELONA-NEXT: [0,1] D=eeeeeeeeeeeeeeeeeeeeeeeeeeeER sqrtsd (%rax), %xmm1 @@ -149,6 +162,9 @@ # ZNVER1: [0,0] DeER . . . . . . leaq 8(%rsp,%rdi,2), %rax # ZNVER1-NEXT: [0,1] D=eeeeeeeeeeeeeeeeeeeeeeeeeeeER sqrtsd (%rax), %xmm1 +# ZNVER2: [0,0] DeER . . . . . . leaq 8(%rsp,%rdi,2), %rax +# ZNVER2-NEXT: [0,1] D=eeeeeeeeeeeeeeeeeeeeeeeeeeeER sqrtsd (%rax), %xmm1 + # ALL: Average Wait times (based on the timeline view): # ALL-NEXT: [0]: Executions # ALL-NEXT: [1]: Average time spent waiting in a scheduler's queue @@ -179,6 +195,9 @@ # ZNVER1-NEXT: 1. 1 2.0 0.0 0.0 sqrtsd (%rax), %xmm1 # ZNVER1-NEXT: 1 1.5 0.5 0.0 +# ZNVER2-NEXT: 1. 1 2.0 0.0 0.0 sqrtsd (%rax), %xmm1 +# ZNVER2-NEXT: 1 1.5 0.5 0.0 + # ALL: [2] Code Region - test_rsqrtss # ALL: Timeline view: @@ -190,6 +209,7 @@ # HASWELL-NEXT: 0123 # SKYLAKE-NEXT: 012 # ZNVER1-NEXT: 012345 +# ZNVER2-NEXT: 012345 # ALL-NEXT: Index 0123456789 @@ -214,6 +234,9 @@ # ZNVER1: [0,0] DeER . . . leaq 8(%rsp,%rdi,2), %rax # ZNVER1-NEXT: [0,1] D=eeeeeeeeeeeeER rsqrtss (%rax), %xmm1 +# ZNVER2: [0,0] DeER . . . leaq 8(%rsp,%rdi,2), %rax +# ZNVER2-NEXT: [0,1] D=eeeeeeeeeeeeER rsqrtss (%rax), %xmm1 + # ALL: Average Wait times (based on the timeline view): # ALL-NEXT: [0]: Executions # ALL-NEXT: [1]: Average time spent waiting in a scheduler's queue @@ -244,6 +267,9 @@ # ZNVER1-NEXT: 1. 1 2.0 0.0 0.0 rsqrtss (%rax), %xmm1 # ZNVER1-NEXT: 1 1.5 0.5 0.0 +# ZNVER2-NEXT: 1. 1 2.0 0.0 0.0 rsqrtss (%rax), %xmm1 +# ZNVER2-NEXT: 1 1.5 0.5 0.0 + # ALL: [3] Code Region - test_rcp # ALL: Timeline view: @@ -255,6 +281,7 @@ # HASWELL-NEXT: 0123 # SKYLAKE-NEXT: 012 # ZNVER1-NEXT: 012345 +# ZNVER2-NEXT: 012345 # ALL-NEXT: Index 0123456789 @@ -279,6 +306,9 @@ # ZNVER1: [0,0] DeER . . . leaq 8(%rsp,%rdi,2), %rax # ZNVER1-NEXT: [0,1] D=eeeeeeeeeeeeER rcpss (%rax), %xmm1 +# ZNVER2: [0,0] DeER . . . leaq 8(%rsp,%rdi,2), %rax +# ZNVER2-NEXT: [0,1] D=eeeeeeeeeeeeER rcpss (%rax), %xmm1 + # ALL: Average Wait times (based on the timeline view): # ALL-NEXT: [0]: Executions # ALL-NEXT: [1]: Average time spent waiting in a scheduler's queue @@ -308,3 +338,6 @@ # ZNVER1-NEXT: 1. 1 2.0 0.0 0.0 rcpss (%rax), %xmm1 # ZNVER1-NEXT: 1 1.5 0.5 0.0 + +# ZNVER2-NEXT: 1. 1 2.0 0.0 0.0 rcpss (%rax), %xmm1 +# ZNVER2-NEXT: 1 1.5 0.5 0.0 Index: llvm/test/tools/llvm-mca/X86/variable-blend-read-after-ld-1.s =================================================================== --- llvm/test/tools/llvm-mca/X86/variable-blend-read-after-ld-1.s +++ llvm/test/tools/llvm-mca/X86/variable-blend-read-after-ld-1.s @@ -15,6 +15,8 @@ # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver1 -iterations=1 -timeline -instruction-info=false -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=ZNVER1 +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -iterations=1 -timeline -instruction-info=false -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=ZNVER2 + vaddps %xmm0, %xmm0, %xmm1 vblendvps %xmm1, (%rdi), %xmm2, %xmm3 @@ -45,6 +47,9 @@ # ZNVER1-NEXT: Total Cycles: 11 # ZNVER1-NEXT: Total uOps: 2 +# ZNVER2-NEXT: Total Cycles: 11 +# ZNVER2-NEXT: Total uOps: 2 + # BDVER2: Dispatch Width: 4 # BDVER2-NEXT: uOps Per Cycle: 0.20 # BDVER2-NEXT: IPC: 0.20 @@ -85,6 +90,11 @@ # ZNVER1-NEXT: IPC: 0.18 # ZNVER1-NEXT: Block RThroughput: 1.0 +# ZNVER2: Dispatch Width: 4 +# ZNVER2-NEXT: uOps Per Cycle: 0.18 +# ZNVER2-NEXT: IPC: 0.18 +# ZNVER2-NEXT: Block RThroughput: 1.0 + # BDVER2: Timeline view: # BDVER2-NEXT: Index 0123456789 @@ -115,6 +125,10 @@ # ZNVER1-NEXT: 0 # ZNVER1-NEXT: Index 0123456789 +# ZNVER2: Timeline view: +# ZNVER2-NEXT: 0 +# ZNVER2-NEXT: Index 0123456789 + # BDVER2: [0,0] DeeeeeER . vaddps %xmm0, %xmm0, %xmm1 # BDVER2-NEXT: [0,1] DeeeeeeeER vblendvps %xmm1, (%rdi), %xmm2, %xmm3 @@ -139,6 +153,9 @@ # ZNVER1: [0,0] DeeeER . vaddps %xmm0, %xmm0, %xmm1 # ZNVER1-NEXT: [0,1] DeeeeeeeeER vblendvps %xmm1, (%rdi), %xmm2, %xmm3 +# ZNVER2: [0,0] DeeeER . vaddps %xmm0, %xmm0, %xmm1 +# ZNVER2-NEXT: [0,1] DeeeeeeeeER vblendvps %xmm1, (%rdi), %xmm2, %xmm3 + # ALL: Average Wait times (based on the timeline view): # ALL-NEXT: [0]: Executions # ALL-NEXT: [1]: Average time spent waiting in a scheduler's queue @@ -171,3 +188,6 @@ # ZNVER1-NEXT: 1. 1 1.0 0.0 0.0 vblendvps %xmm1, (%rdi), %xmm2, %xmm3 # ZNVER1-NEXT: 1 1.0 0.5 0.0 + +# ZNVER2-NEXT: 1. 1 1.0 0.0 0.0 vblendvps %xmm1, (%rdi), %xmm2, %xmm3 +# ZNVER2-NEXT: 1 1.0 0.5 0.0 Index: llvm/test/tools/llvm-mca/X86/variable-blend-read-after-ld-2.s =================================================================== --- llvm/test/tools/llvm-mca/X86/variable-blend-read-after-ld-2.s +++ llvm/test/tools/llvm-mca/X86/variable-blend-read-after-ld-2.s @@ -15,6 +15,8 @@ # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver1 -iterations=1 -timeline -instruction-info=false -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=ZNVER1 +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -iterations=1 -timeline -instruction-info=false -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=ZNVER2 + vaddps %xmm0, %xmm0, %xmm2 vblendvps %xmm1, (%rdi), %xmm2, %xmm3 @@ -45,6 +47,9 @@ # ZNVER1-NEXT: Total Cycles: 11 # ZNVER1-NEXT: Total uOps: 2 +# ZNVER2-NEXT: Total Cycles: 11 +# ZNVER2-NEXT: Total uOps: 2 + # BDVER2: Dispatch Width: 4 # BDVER2-NEXT: uOps Per Cycle: 0.20 # BDVER2-NEXT: IPC: 0.20 @@ -85,6 +90,11 @@ # ZNVER1-NEXT: IPC: 0.18 # ZNVER1-NEXT: Block RThroughput: 1.0 +# ZNVER2: Dispatch Width: 4 +# ZNVER2-NEXT: uOps Per Cycle: 0.18 +# ZNVER2-NEXT: IPC: 0.18 +# ZNVER2-NEXT: Block RThroughput: 1.0 + # BDVER2: Timeline view: # BDVER2-NEXT: Index 0123456789 @@ -115,6 +125,10 @@ # ZNVER1-NEXT: 0 # ZNVER1-NEXT: Index 0123456789 +# ZNVER2: Timeline view: +# ZNVER2-NEXT: 0 +# ZNVER2-NEXT: Index 0123456789 + # BDVER2: [0,0] DeeeeeER . vaddps %xmm0, %xmm0, %xmm2 # BDVER2-NEXT: [0,1] DeeeeeeeER vblendvps %xmm1, (%rdi), %xmm2, %xmm3 @@ -139,6 +153,9 @@ # ZNVER1: [0,0] DeeeER . vaddps %xmm0, %xmm0, %xmm2 # ZNVER1-NEXT: [0,1] DeeeeeeeeER vblendvps %xmm1, (%rdi), %xmm2, %xmm3 +# ZNVER2: [0,0] DeeeER . vaddps %xmm0, %xmm0, %xmm2 +# ZNVER2-NEXT: [0,1] DeeeeeeeeER vblendvps %xmm1, (%rdi), %xmm2, %xmm3 + # ALL: Average Wait times (based on the timeline view): # ALL-NEXT: [0]: Executions # ALL-NEXT: [1]: Average time spent waiting in a scheduler's queue @@ -171,3 +188,7 @@ # ZNVER1-NEXT: 1. 1 1.0 0.0 0.0 vblendvps %xmm1, (%rdi), %xmm2, %xmm3 # ZNVER1-NEXT: 1 1.0 0.5 0.0 + +# ZNVER2-NEXT: 1. 1 1.0 0.0 0.0 vblendvps %xmm1, (%rdi), %xmm2, %xmm3 +# ZNVER2-NEXT: 1 1.0 0.5 0.0 +