Index: llvm/lib/Target/X86/X86.td =================================================================== --- llvm/lib/Target/X86/X86.td +++ llvm/lib/Target/X86/X86.td @@ -449,6 +449,9 @@ "Merge branches to a three-way " "conditional branch">; +def FeatureHasDSB : SubtargetFeature<"dsb", "HasDSB", "true", + "Target has decoded stream buffer">; + // Bonnell def ProcIntelAtom : SubtargetFeature<"", "X86ProcFamily", "IntelAtom", "">; // Silvermont @@ -528,6 +531,7 @@ FeatureXSAVE, FeatureXSAVEOPT, FeatureSlow3OpsLEA, + FeatureHasDSB, FeatureFastScalarFSQRT, FeatureFastSHLDRotate, FeatureMergeToThreeWayBranch]; Index: llvm/lib/Target/X86/X86Subtarget.h =================================================================== --- llvm/lib/Target/X86/X86Subtarget.h +++ llvm/lib/Target/X86/X86Subtarget.h @@ -442,6 +442,9 @@ /// Threeway branch is profitable in this subtarget. bool ThreewayBranchProfitable = false; + /// Processor supports Decoded Stream Buffer. + bool HasDSB = false; + /// What processor and OS we're targeting. Triple TargetTriple; @@ -694,6 +697,7 @@ bool hasPCONFIG() const { return HasPCONFIG; } bool hasSGX() const { return HasSGX; } bool threewayBranchProfitable() const { return ThreewayBranchProfitable; } + bool hasDSB() const { return HasDSB; } bool hasINVPCID() const { return HasINVPCID; } bool hasENQCMD() const { return HasENQCMD; } bool useRetpolineIndirectCalls() const { return UseRetpolineIndirectCalls; } Index: llvm/lib/Target/X86/X86TargetTransformInfo.h =================================================================== --- llvm/lib/Target/X86/X86TargetTransformInfo.h +++ llvm/lib/Target/X86/X86TargetTransformInfo.h @@ -64,6 +64,7 @@ X86::FeatureBranchFusion, X86::FeatureMacroFusion, X86::FeatureMergeToThreeWayBranch, + X86::FeatureHasDSB, X86::FeaturePadShortFunctions, X86::FeaturePOPCNTFalseDeps, X86::FeatureSSEUnalignedMem,