Index: lib/Target/Mips/MipsInstructionSelector.cpp =================================================================== --- lib/Target/Mips/MipsInstructionSelector.cpp +++ lib/Target/Mips/MipsInstructionSelector.cpp @@ -265,6 +265,11 @@ .add(I.getOperand(2)); break; } + case G_INTTOPTR: + case G_PTRTOINT: { + I.setDesc(TII.get(COPY)); + return selectCopy(I, MRI); + } case G_FRAME_INDEX: { MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::ADDiu)) .add(I.getOperand(0)) Index: lib/Target/Mips/MipsLegalizerInfo.cpp =================================================================== --- lib/Target/Mips/MipsLegalizerInfo.cpp +++ lib/Target/Mips/MipsLegalizerInfo.cpp @@ -89,9 +89,12 @@ .legalFor({s32}) .clampScalar(0, s32, s32); - getActionDefinitionsBuilder(G_GEP) + getActionDefinitionsBuilder({G_GEP, G_INTTOPTR}) .legalFor({{p0, s32}}); + getActionDefinitionsBuilder(G_PTRTOINT) + .legalFor({{s32, p0}}); + getActionDefinitionsBuilder(G_FRAME_INDEX) .legalFor({p0}); Index: lib/Target/Mips/MipsRegisterBankInfo.cpp =================================================================== --- lib/Target/Mips/MipsRegisterBankInfo.cpp +++ lib/Target/Mips/MipsRegisterBankInfo.cpp @@ -388,6 +388,8 @@ case G_ZEXTLOAD: case G_SEXTLOAD: case G_GEP: + case G_INTTOPTR: + case G_PTRTOINT: case G_AND: case G_OR: case G_XOR: Index: test/CodeGen/Mips/GlobalISel/instruction-select/inttoptr_and_ptrtoint.mir =================================================================== --- /dev/null +++ test/CodeGen/Mips/GlobalISel/instruction-select/inttoptr_and_ptrtoint.mir @@ -0,0 +1,51 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32 +--- | + + define void @inttoptr() {entry: ret void} + define void @ptrtoint() {entry: ret void} + +... +--- +name: inttoptr +alignment: 2 +legalized: true +regBankSelected: true +tracksRegLiveness: true +body: | + bb.1.entry: + liveins: $a0 + + ; MIPS32-LABEL: name: inttoptr + ; MIPS32: liveins: $a0 + ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 + ; MIPS32: $v0 = COPY [[COPY]] + ; MIPS32: RetRA implicit $v0 + %0:gprb(s32) = COPY $a0 + %1:gprb(p0) = G_INTTOPTR %0(s32) + $v0 = COPY %1(p0) + RetRA implicit $v0 + +... +--- +name: ptrtoint +alignment: 2 +legalized: true +regBankSelected: true +tracksRegLiveness: true +body: | + bb.1.entry: + liveins: $a0 + + ; MIPS32-LABEL: name: ptrtoint + ; MIPS32: liveins: $a0 + ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 + ; MIPS32: $v0 = COPY [[COPY]] + ; MIPS32: RetRA implicit $v0 + %0:gprb(p0) = COPY $a0 + %1:gprb(s32) = G_PTRTOINT %0(p0) + $v0 = COPY %1(s32) + RetRA implicit $v0 + +... + Index: test/CodeGen/Mips/GlobalISel/legalizer/inttoptr_and_ptrtoint.mir =================================================================== --- /dev/null +++ test/CodeGen/Mips/GlobalISel/legalizer/inttoptr_and_ptrtoint.mir @@ -0,0 +1,48 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32 +--- | + + define void @inttoptr() {entry: ret void} + define void @ptrtoint() {entry: ret void} + +... +--- +name: inttoptr +alignment: 2 +tracksRegLiveness: true +body: | + bb.1.entry: + liveins: $a0 + + ; MIPS32-LABEL: name: inttoptr + ; MIPS32: liveins: $a0 + ; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0 + ; MIPS32: [[INTTOPTR:%[0-9]+]]:_(p0) = G_INTTOPTR [[COPY]](s32) + ; MIPS32: $v0 = COPY [[INTTOPTR]](p0) + ; MIPS32: RetRA implicit $v0 + %0:_(s32) = COPY $a0 + %1:_(p0) = G_INTTOPTR %0(s32) + $v0 = COPY %1(p0) + RetRA implicit $v0 + +... +--- +name: ptrtoint +alignment: 2 +tracksRegLiveness: true +body: | + bb.1.entry: + liveins: $a0 + + ; MIPS32-LABEL: name: ptrtoint + ; MIPS32: liveins: $a0 + ; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0 + ; MIPS32: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT [[COPY]](p0) + ; MIPS32: $v0 = COPY [[PTRTOINT]](s32) + ; MIPS32: RetRA implicit $v0 + %0:_(p0) = COPY $a0 + %1:_(s32) = G_PTRTOINT %0(p0) + $v0 = COPY %1(s32) + RetRA implicit $v0 + +... Index: test/CodeGen/Mips/GlobalISel/llvm-ir/inttoptr_and_ptrtoint.ll =================================================================== --- /dev/null +++ test/CodeGen/Mips/GlobalISel/llvm-ir/inttoptr_and_ptrtoint.ll @@ -0,0 +1,24 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32 + +define i32* @inttoptr(i32 %a) { +; MIPS32-LABEL: inttoptr: +; MIPS32: # %bb.0: # %entry +; MIPS32-NEXT: move $2, $4 +; MIPS32-NEXT: jr $ra +; MIPS32-NEXT: nop +entry: + %0 = inttoptr i32 %a to i32* + ret i32* %0 +} + +define i32 @ptrtoint(i32* %a) { +; MIPS32-LABEL: ptrtoint: +; MIPS32: # %bb.0: # %entry +; MIPS32-NEXT: move $2, $4 +; MIPS32-NEXT: jr $ra +; MIPS32-NEXT: nop +entry: + %0 = ptrtoint i32* %a to i32 + ret i32 %0 +} Index: test/CodeGen/Mips/GlobalISel/regbankselect/inttoptr_and_ptrtoint.mir =================================================================== --- /dev/null +++ test/CodeGen/Mips/GlobalISel/regbankselect/inttoptr_and_ptrtoint.mir @@ -0,0 +1,50 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32 +--- | + + define void @inttoptr() {entry: ret void} + define void @ptrtoint() {entry: ret void} + +... +--- +name: inttoptr +alignment: 2 +legalized: true +tracksRegLiveness: true +body: | + bb.1.entry: + liveins: $a0 + + ; MIPS32-LABEL: name: inttoptr + ; MIPS32: liveins: $a0 + ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 + ; MIPS32: [[INTTOPTR:%[0-9]+]]:gprb(p0) = G_INTTOPTR [[COPY]](s32) + ; MIPS32: $v0 = COPY [[INTTOPTR]](p0) + ; MIPS32: RetRA implicit $v0 + %0:_(s32) = COPY $a0 + %1:_(p0) = G_INTTOPTR %0(s32) + $v0 = COPY %1(p0) + RetRA implicit $v0 + +... +--- +name: ptrtoint +alignment: 2 +legalized: true +tracksRegLiveness: true +body: | + bb.1.entry: + liveins: $a0 + + ; MIPS32-LABEL: name: ptrtoint + ; MIPS32: liveins: $a0 + ; MIPS32: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0 + ; MIPS32: [[PTRTOINT:%[0-9]+]]:gprb(s32) = G_PTRTOINT [[COPY]](p0) + ; MIPS32: $v0 = COPY [[PTRTOINT]](s32) + ; MIPS32: RetRA implicit $v0 + %0:_(p0) = COPY $a0 + %1:_(s32) = G_PTRTOINT %0(p0) + $v0 = COPY %1(s32) + RetRA implicit $v0 + +...