diff --git a/llvm/include/llvm/MC/MCInstPrinter.h b/llvm/include/llvm/MC/MCInstPrinter.h
--- a/llvm/include/llvm/MC/MCInstPrinter.h
+++ b/llvm/include/llvm/MC/MCInstPrinter.h
@@ -34,9 +34,69 @@
 
 } // end namespace HexStyle
 
+enum class MarkupType {
+  Reg,
+  Imm,
+  Mem,
+};
+
+/// MarkupSpan represents a marked up range in the disassembly. For example:
+///
+///     Pos   InnerPos
+///      v    v
+///  ... <mem:256(<reg:%rip>)> ...
+///           ~~~~~~~~~~~~~~~ InnerLenth
+///      ~~~~~~~~~~~~~~~~~~~~~ Length
+///
+struct MarkupSpan {
+  MarkupType Type;
+  /// The offset of the beginning of the marked up range.
+  size_t Pos;
+  /// The length of the marked up range.
+  size_t Length;
+  /// The offset of the beginning of the inner text.
+  size_t InnerPos;
+  /// The length of the inner text.
+  size_t InnerLength;
+  /// Marked up ranges in the inner text. In the example above,
+  /// InnerSpans contains one MarkupSpan which represents `<reg:%rip>`.
+  std::unique_ptr<std::vector<MarkupSpan>> InnerSpans;
+
+  MarkupSpan(MarkupType Type, size_t Pos, size_t Length, size_t InnerPos,
+             size_t InnerLength)
+      : Type(Type), Pos(Pos), Length(Length), InnerPos(InnerPos),
+        InnerLength(InnerLength), InnerSpans(new std::vector<MarkupSpan>()) {}
+};
+
+struct MarkupStart;
+struct MarkupEnd;
+
 /// This is an instance of a target assembly language printer that
 /// converts an MCInst to valid target assembly syntax.
 class MCInstPrinter {
+public:
+  /// MarkupState holds the state used by llvm::operator<<(raw_ostream&)
+  /// implementaions for MarkupStart and MarkupEnd.
+  struct PrinterMarkupState {
+    /// True if the marked up disassembly is enabled. Defaults to false in case
+    /// resetMarkup() isn't called in the printer.
+    bool Enabled = false;
+    /// The offset of the beginning of the disassembly in the stream.
+    size_t StartOffset;
+    /// A stack of pointers which points to SpansOut or InnerSpans of unclosed
+    /// Spans. Here we use std::vector as a stack instead of std::stack because
+    /// we need "clear" method.
+    std::vector<std::vector<MarkupSpan> *> Spans;
+
+    void reset(raw_ostream &OS, bool NewEnabled,
+               std::vector<MarkupSpan> *SpansOut);
+    size_t offset(raw_ostream &OS) const;
+  };
+
+private:
+  virtual void printInstImpl(const MCInst *MI, raw_ostream &OS, StringRef Annot,
+                             const MCSubtargetInfo &STI) = 0;
+
 protected:
   /// A stream that comments can be emitted to if desired.  Each comment
   /// must end with a newline.  This will be null if verbose assembly emission
@@ -55,6 +115,10 @@
   /// Which style to use for printing hexadecimal values.
   HexStyle::Style PrintHexStyle = HexStyle::C;
 
+  /// Markup states.
+  PrinterMarkupState MarkupState;
+  std::vector<MarkupSpan> *MarkupSpans = nullptr;
+
   /// Utility function for printing annotations.
   void printAnnotation(raw_ostream &OS, StringRef Annot);
 
@@ -72,8 +136,8 @@
   void setCommentStream(raw_ostream &OS) { CommentStream = &OS; }
 
   /// Print the specified MCInst to the specified raw_ostream.
-  virtual void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot,
-                         const MCSubtargetInfo &STI) = 0;
+  void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot,
+                 const MCSubtargetInfo &STI);
 
   /// Return the name of the specified opcode enum (e.g. "MOV32ri") or
   /// empty if we can't resolve it.
@@ -85,8 +149,13 @@
   bool getUseMarkup() const { return UseMarkup; }
   void setUseMarkup(bool Value) { UseMarkup = Value; }
 
+  /// Set the vector to write marked up ranges to.
+  void setMarkupSpans(std::vector<MarkupSpan> &MS) { MarkupSpans = &MS; }
+
   /// Utility functions to make adding mark ups simpler.
   StringRef markup(StringRef s) const;
+  MarkupStart startMarkup(MarkupType Type);
+  MarkupEnd endMarkup();
 
   bool getPrintImmHex() const { return PrintImmHex; }
   void setPrintImmHex(bool Value) { PrintImmHex = Value; }
@@ -104,6 +173,22 @@
   format_object<uint64_t> formatHex(uint64_t Value) const;
 };
 
+struct MarkupStart {
+  MCInstPrinter::PrinterMarkupState &State;
+  MarkupType Type;
+
+  MarkupStart(MCInstPrinter::PrinterMarkupState &State, MarkupType Type)
+      : State(State), Type(Type) {}
+  friend raw_ostream &operator<<(raw_ostream &OS, const MarkupStart &M);
+};
+
+struct MarkupEnd {
+  MCInstPrinter::PrinterMarkupState &State;
+
+  MarkupEnd(MCInstPrinter::PrinterMarkupState &State) : State(State) {}
+  friend raw_ostream &operator<<(raw_ostream &OS, const MarkupEnd &M);
+};
+
 } // end namespace llvm
 
 #endif // LLVM_MC_MCINSTPRINTER_H
diff --git a/llvm/lib/MC/MCInstPrinter.cpp b/llvm/lib/MC/MCInstPrinter.cpp
--- a/llvm/lib/MC/MCInstPrinter.cpp
+++ b/llvm/lib/MC/MCInstPrinter.cpp
@@ -44,6 +44,12 @@
   llvm_unreachable("Target should implement this");
 }
 
+void MCInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
+                              StringRef Annot, const MCSubtargetInfo &STI) {
+  MarkupState.reset(OS, getUseMarkup(), MarkupSpans);
+  printInstImpl(MI, OS, Annot, STI);
+}
+
 void MCInstPrinter::printAnnotation(raw_ostream &OS, StringRef Annot) {
   if (!Annot.empty()) {
     if (CommentStream) {
@@ -117,3 +123,72 @@
   }
   llvm_unreachable("unsupported print style");
 }
+
+MarkupStart MCInstPrinter::startMarkup(MarkupType Type) {
+  return MarkupStart(MarkupState, Type);
+}
+
+MarkupEnd MCInstPrinter::endMarkup() { return MarkupEnd(MarkupState); }
+
+void MCInstPrinter::PrinterMarkupState::reset(
+    raw_ostream &OS, bool NewEnabled, std::vector<MarkupSpan> *SpansOut) {
+  Enabled = NewEnabled;
+  StartOffset = OS.tell();
+  Spans.clear();
+  if (SpansOut) {
+    Spans.push_back(SpansOut);
+  }
+}
+
+size_t MCInstPrinter::PrinterMarkupState::offset(raw_ostream &OS) const {
+  return OS.tell() - StartOffset;
+}
+
+raw_ostream &llvm::operator<<(raw_ostream &OS, const MarkupStart &M) {
+  if (M.State.Enabled) {
+    StringRef TypeStr;
+    switch (M.Type) {
+    case MarkupType::Imm:
+      TypeStr = "imm";
+      break;
+    case MarkupType::Reg:
+      TypeStr = "reg";
+      break;
+    case MarkupType::Mem:
+      TypeStr = "mem";
+      break;
+    }
+
+    // TODO: support tag-modifier-list. See:
+    // https://llvm.org/docs/MarkedUpDisassembly.html
+    size_t Length = 2 + TypeStr.size();
+    if (!M.State.Spans.empty()) {
+      // Length and InnerLength will be set later.
+      MarkupSpan Span = MarkupSpan(M.Type, M.State.offset(OS), 0,
+                                   M.State.offset(OS) + Length, 0);
+      auto *InnerSpans =
+          const_cast<std::vector<MarkupSpan> *>(Span.InnerSpans.get());
+      M.State.Spans.back()->push_back(std::move(Span));
+      M.State.Spans.push_back(InnerSpans);
+    }
+    OS << "<" << TypeStr << ":";
+  }
+
+  return OS;
+}
+
+raw_ostream &llvm::operator<<(raw_ostream &OS, const MarkupEnd &M) {
+  if (M.State.Enabled) {
+    if (!M.State.Spans.empty()) {
+      assert(M.State.Spans.size() > 1 &&
+             "Missing the corresponding markupStart().");
+      M.State.Spans.pop_back();
+      MarkupSpan &Span = M.State.Spans.back()->back();
+      Span.Length = M.State.offset(OS) - Span.Pos + 1;
+      Span.InnerLength = M.State.offset(OS) - Span.InnerPos;
+    }
+    OS << ">";
+  }
+
+  return OS;
+}
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
@@ -25,8 +25,6 @@
   AArch64InstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
                      const MCRegisterInfo &MRI);
 
-  void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
-                 const MCSubtargetInfo &STI) override;
   void printRegName(raw_ostream &OS, unsigned RegNo) const override;
 
   // Autogenerated by tblgen.
@@ -47,6 +45,8 @@
                                      unsigned AltIdx = AArch64::NoRegAltName);
 
 protected:
+  void printInstImpl(const MCInst *MI, raw_ostream &O, StringRef Annot,
+                     const MCSubtargetInfo &STI) override;
   bool printSysAlias(const MCInst *MI, const MCSubtargetInfo &STI,
                      raw_ostream &O);
   // Operand printers
@@ -197,9 +197,6 @@
   AArch64AppleInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
                           const MCRegisterInfo &MRI);
 
-  void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
-                 const MCSubtargetInfo &STI) override;
-
   void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI,
                         raw_ostream &O) override;
   bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
@@ -215,6 +212,10 @@
 
   static const char *getRegisterName(unsigned RegNo,
                                      unsigned AltIdx = AArch64::NoRegAltName);
+
+private:
+  void printInstImpl(const MCInst *MI, raw_ostream &O, StringRef Annot,
+                     const MCSubtargetInfo &STI) override;
 };
 
 } // end namespace llvm
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
@@ -56,9 +56,9 @@
   OS << getRegisterName(RegNo);
 }
 
-void AArch64InstPrinter::printInst(const MCInst *MI, raw_ostream &O,
-                                   StringRef Annot,
-                                   const MCSubtargetInfo &STI) {
+void AArch64InstPrinter::printInstImpl(const MCInst *MI, raw_ostream &O,
+                                       StringRef Annot,
+                                       const MCSubtargetInfo &STI) {
   // Check for special encodings and print the canonical alias instead.
 
   unsigned Opcode = MI->getOpcode();
@@ -697,9 +697,9 @@
   return nullptr;
 }
 
-void AArch64AppleInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
-                                        StringRef Annot,
-                                        const MCSubtargetInfo &STI) {
+void AArch64AppleInstPrinter::printInstImpl(const MCInst *MI, raw_ostream &O,
+                                            StringRef Annot,
+                                            const MCSubtargetInfo &STI) {
   unsigned Opcode = MI->getOpcode();
   StringRef Layout;
 
@@ -747,7 +747,7 @@
     return;
   }
 
-  AArch64InstPrinter::printInst(MI, O, Annot, STI);
+  AArch64InstPrinter::printInstImpl(MI, O, Annot, STI);
 }
 
 bool AArch64InstPrinter::printSysAlias(const MCInst *MI,
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
@@ -27,12 +27,12 @@
                         raw_ostream &O);
   static const char *getRegisterName(unsigned RegNo);
 
-  void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
-                 const MCSubtargetInfo &STI) override;
   static void printRegOperand(unsigned RegNo, raw_ostream &O,
                               const MCRegisterInfo &MRI);
 
 private:
+  void printInstImpl(const MCInst *MI, raw_ostream &O, StringRef Annot,
+                     const MCSubtargetInfo &STI) override;
   void printU4ImmOperand(const MCInst *MI, unsigned OpNo,
                          const MCSubtargetInfo &STI, raw_ostream &O);
   void printU8ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
@@ -236,10 +236,8 @@
 public:
   R600InstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
                   const MCRegisterInfo &MRI)
-    : MCInstPrinter(MAI, MII, MRI) {}
+      : MCInstPrinter(MAI, MII, MRI) {}
 
-  void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
-                 const MCSubtargetInfo &STI) override;
   void printInstruction(const MCInst *MI, raw_ostream &O);
   static const char *getRegisterName(unsigned RegNo);
 
@@ -259,6 +257,10 @@
   void printUpdateExecMask(const MCInst *MI, unsigned OpNo, raw_ostream &O);
   void printUpdatePred(const MCInst *MI, unsigned OpNo, raw_ostream &O);
   void printWrite(const MCInst *MI, unsigned OpNo, raw_ostream &O);
+
+private:
+  void printInstImpl(const MCInst *MI, raw_ostream &O, StringRef Annot,
+                     const MCSubtargetInfo &STI) override;
 };
 
 } // End namespace llvm
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
@@ -26,8 +26,9 @@
 using namespace llvm;
 using namespace llvm::AMDGPU;
 
-void AMDGPUInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
-                                  StringRef Annot, const MCSubtargetInfo &STI) {
+void AMDGPUInstPrinter::printInstImpl(const MCInst *MI, raw_ostream &OS,
+                                      StringRef Annot,
+                                      const MCSubtargetInfo &STI) {
   OS.flush();
   printInstruction(MI, STI, OS);
   printAnnotation(OS, Annot);
@@ -1335,8 +1336,9 @@
 
 #include "AMDGPUGenAsmWriter.inc"
 
-void R600InstPrinter::printInst(const MCInst *MI, raw_ostream &O,
-                                StringRef Annot, const MCSubtargetInfo &STI) {
+void R600InstPrinter::printInstImpl(const MCInst *MI, raw_ostream &O,
+                                    StringRef Annot,
+                                    const MCSubtargetInfo &STI) {
   O.flush();
   printInstruction(MI, O);
   printAnnotation(O, Annot);
diff --git a/llvm/lib/Target/ARC/MCTargetDesc/ARCInstPrinter.h b/llvm/lib/Target/ARC/MCTargetDesc/ARCInstPrinter.h
--- a/llvm/lib/Target/ARC/MCTargetDesc/ARCInstPrinter.h
+++ b/llvm/lib/Target/ARC/MCTargetDesc/ARCInstPrinter.h
@@ -30,10 +30,10 @@
   static const char *getRegisterName(unsigned RegNo);
 
   void printRegName(raw_ostream &OS, unsigned RegNo) const override;
-  void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
-                 const MCSubtargetInfo &STI) override;
 
 private:
+  void printInstImpl(const MCInst *MI, raw_ostream &O, StringRef Annot,
+                     const MCSubtargetInfo &STI) override;
   void printMemOperandRI(const MCInst *MI, unsigned OpNum, raw_ostream &O);
   void printOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
   void printPredicateOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
diff --git a/llvm/lib/Target/ARC/MCTargetDesc/ARCInstPrinter.cpp b/llvm/lib/Target/ARC/MCTargetDesc/ARCInstPrinter.cpp
--- a/llvm/lib/Target/ARC/MCTargetDesc/ARCInstPrinter.cpp
+++ b/llvm/lib/Target/ARC/MCTargetDesc/ARCInstPrinter.cpp
@@ -97,8 +97,9 @@
   OS << StringRef(getRegisterName(RegNo)).lower();
 }
 
-void ARCInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
-                               StringRef Annot, const MCSubtargetInfo &STI) {
+void ARCInstPrinter::printInstImpl(const MCInst *MI, raw_ostream &O,
+                                   StringRef Annot,
+                                   const MCSubtargetInfo &STI) {
   printInstruction(MI, O);
   printAnnotation(O, Annot);
 }
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h b/llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h
@@ -25,8 +25,6 @@
 
   bool applyTargetSpecificCLOption(StringRef Opt) override;
 
-  void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
-                 const MCSubtargetInfo &STI) override;
   void printRegName(raw_ostream &OS, unsigned RegNo) const override;
 
   // Autogenerated by tblgen.
@@ -266,6 +264,8 @@
                          const MCSubtargetInfo &STI, raw_ostream &O);
 private:
   unsigned DefaultAltIdx = ARM::NoRegAltName;
+  void printInstImpl(const MCInst *MI, raw_ostream &O, StringRef Annot,
+                     const MCSubtargetInfo &STI) override;
 };
 
 } // end namespace llvm
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp
@@ -88,8 +88,9 @@
   OS << markup("<reg:") << getRegisterName(RegNo, DefaultAltIdx) << markup(">");
 }
 
-void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
-                               StringRef Annot, const MCSubtargetInfo &STI) {
+void ARMInstPrinter::printInstImpl(const MCInst *MI, raw_ostream &O,
+                                   StringRef Annot,
+                                   const MCSubtargetInfo &STI) {
   unsigned Opcode = MI->getOpcode();
 
   switch (Opcode) {
diff --git a/llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.h b/llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.h
--- a/llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.h
+++ b/llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.h
@@ -29,10 +29,9 @@
   static const char *getPrettyRegisterName(unsigned RegNo,
                                            MCRegisterInfo const &MRI);
 
-  void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
-                 const MCSubtargetInfo &STI) override;
-
 private:
+  void printInstImpl(const MCInst *MI, raw_ostream &O, StringRef Annot,
+                     const MCSubtargetInfo &STI) override;
   static const char *getRegisterName(unsigned RegNo,
                                      unsigned AltIdx = AVR::NoRegAltName);
 
diff --git a/llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp b/llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp
--- a/llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp
+++ b/llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp
@@ -32,8 +32,9 @@
 #define PRINT_ALIAS_INSTR
 #include "AVRGenAsmWriter.inc"
 
-void AVRInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
-                               StringRef Annot, const MCSubtargetInfo &STI) {
+void AVRInstPrinter::printInstImpl(const MCInst *MI, raw_ostream &O,
+                                   StringRef Annot,
+                                   const MCSubtargetInfo &STI) {
   unsigned Opcode = MI->getOpcode();
 
   // First handle load and store instructions with postinc or predec
diff --git a/llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.h b/llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.h
--- a/llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.h
+++ b/llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.h
@@ -22,8 +22,6 @@
                  const MCRegisterInfo &MRI)
       : MCInstPrinter(MAI, MII, MRI) {}
 
-  void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
-                 const MCSubtargetInfo &STI) override;
   void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O,
                     const char *Modifier = nullptr);
   void printMemOperand(const MCInst *MI, int OpNo, raw_ostream &O,
@@ -34,7 +32,11 @@
   // Autogenerated by tblgen.
   void printInstruction(const MCInst *MI, raw_ostream &O);
   static const char *getRegisterName(unsigned RegNo);
+
+private:
+  void printInstImpl(const MCInst *MI, raw_ostream &O, StringRef Annot,
+                     const MCSubtargetInfo &STI) override;
 };
-}
+} // namespace llvm
 
 #endif
diff --git a/llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp b/llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp
--- a/llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp
+++ b/llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp
@@ -24,8 +24,9 @@
 // Include the auto-generated portion of the assembly writer.
 #include "BPFGenAsmWriter.inc"
 
-void BPFInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
-                               StringRef Annot, const MCSubtargetInfo &STI) {
+void BPFInstPrinter::printInstImpl(const MCInst *MI, raw_ostream &O,
+                                   StringRef Annot,
+                                   const MCSubtargetInfo &STI) {
   printInstruction(MI, O);
   printAnnotation(O, Annot);
 }
diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.h b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.h
--- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.h
+++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.h
@@ -26,10 +26,8 @@
 public:
   explicit HexagonInstPrinter(MCAsmInfo const &MAI, MCInstrInfo const &MII,
                               MCRegisterInfo const &MRI)
-    : MCInstPrinter(MAI, MII, MRI), MII(MII) {}
+      : MCInstPrinter(MAI, MII, MRI), MII(MII) {}
 
-  void printInst(MCInst const *MI, raw_ostream &O, StringRef Annot,
-                 const MCSubtargetInfo &STI) override;
   void printRegName(raw_ostream &O, unsigned RegNo) const override;
 
   static char const *getRegisterName(unsigned RegNo);
@@ -44,6 +42,8 @@
 private:
   MCInstrInfo const &MII;
   bool HasExtender = false;
+  void printInstImpl(MCInst const *MI, raw_ostream &O, StringRef Annot,
+                     const MCSubtargetInfo &STI) override;
 };
 
 } // end namespace llvm
diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp
--- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp
+++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp
@@ -30,8 +30,9 @@
   O << getRegisterName(RegNo);
 }
 
-void HexagonInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
-                                   StringRef Annot, const MCSubtargetInfo &STI) {
+void HexagonInstPrinter::printInstImpl(const MCInst *MI, raw_ostream &OS,
+                                       StringRef Annot,
+                                       const MCSubtargetInfo &STI) {
   assert(HexagonMCInstrInfo::isBundle(*MI));
   assert(HexagonMCInstrInfo::bundleSize(*MI) <= HEXAGON_PACKET_SIZE);
   assert(HexagonMCInstrInfo::bundleSize(*MI) > 0);
diff --git a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.h b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.h
--- a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.h
+++ b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.h
@@ -24,8 +24,6 @@
                    const MCRegisterInfo &MRI)
       : MCInstPrinter(MAI, MII, MRI) {}
 
-  void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
-                 const MCSubtargetInfo &STI) override;
   void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O,
                     const char *Modifier = nullptr);
   void printPredicateOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
@@ -51,6 +49,8 @@
   void printRegName(raw_ostream &OS, unsigned RegNo) const override;
 
 private:
+  void printInstImpl(const MCInst *MI, raw_ostream &O, StringRef Annot,
+                     const MCSubtargetInfo &STI) override;
   bool printAlias(const MCInst *MI, raw_ostream &Ostream);
   bool printInst(const MCInst *MI, raw_ostream &Ostream, StringRef Alias,
                  unsigned OpNo0, unsigned OpnNo1);
diff --git a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.cpp b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.cpp
--- a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.cpp
+++ b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.cpp
@@ -137,9 +137,9 @@
   }
 }
 
-void LanaiInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
-                                 StringRef Annotation,
-                                 const MCSubtargetInfo & /*STI*/) {
+void LanaiInstPrinter::printInstImpl(const MCInst *MI, raw_ostream &OS,
+                                     StringRef Annotation,
+                                     const MCSubtargetInfo & /*STI*/) {
   if (!printAlias(MI, OS) && !printAliasInstr(MI, OS))
     printInstruction(MI, OS);
   printAnnotation(OS, Annotation);
diff --git a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.h b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.h
--- a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.h
+++ b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.h
@@ -20,10 +20,7 @@
   public:
     MSP430InstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
                       const MCRegisterInfo &MRI)
-      : MCInstPrinter(MAI, MII, MRI) {}
-
-    void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
-                   const MCSubtargetInfo &STI) override;
+        : MCInstPrinter(MAI, MII, MRI) {}
 
     // Autogenerated by tblgen.
     void printInstruction(const MCInst *MI, raw_ostream &O);
@@ -32,7 +29,9 @@
                                  unsigned PrintMethodIdx, raw_ostream &O);
     static const char *getRegisterName(unsigned RegNo);
 
-private:
+  private:
+    void printInstImpl(const MCInst *MI, raw_ostream &O, StringRef Annot,
+                       const MCSubtargetInfo &STI) override;
     void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O,
                       const char *Modifier = nullptr);
     void printPCRelImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
diff --git a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.cpp b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.cpp
--- a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.cpp
+++ b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.cpp
@@ -26,8 +26,9 @@
 #define PRINT_ALIAS_INSTR
 #include "MSP430GenAsmWriter.inc"
 
-void MSP430InstPrinter::printInst(const MCInst *MI, raw_ostream &O,
-                                  StringRef Annot, const MCSubtargetInfo &STI) {
+void MSP430InstPrinter::printInstImpl(const MCInst *MI, raw_ostream &O,
+                                      StringRef Annot,
+                                      const MCSubtargetInfo &STI) {
   if (!printAliasInstr(MI, O))
     printInstruction(MI, O);
   printAnnotation(O, Annot);
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.h b/llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.h
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.h
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.h
@@ -83,14 +83,14 @@
   static const char *getRegisterName(unsigned RegNo);
 
   void printRegName(raw_ostream &OS, unsigned RegNo) const override;
-  void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
-                 const MCSubtargetInfo &STI) override;
 
   bool printAliasInstr(const MCInst *MI, raw_ostream &OS);
   void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
                                unsigned PrintMethodIdx, raw_ostream &O);
 
 private:
+  void printInstImpl(const MCInst *MI, raw_ostream &O, StringRef Annot,
+                     const MCSubtargetInfo &STI) override;
   void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
   template <unsigned Bits, unsigned Offset = 0>
   void printUImm(const MCInst *MI, int opNum, raw_ostream &O);
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.cpp
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.cpp
@@ -75,8 +75,9 @@
   OS << '$' << StringRef(getRegisterName(RegNo)).lower();
 }
 
-void MipsInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
-                                StringRef Annot, const MCSubtargetInfo &STI) {
+void MipsInstPrinter::printInstImpl(const MCInst *MI, raw_ostream &O,
+                                    StringRef Annot,
+                                    const MCSubtargetInfo &STI) {
   switch (MI->getOpcode()) {
   default:
     break;
diff --git a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
--- a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
+++ b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
@@ -25,8 +25,6 @@
                    const MCRegisterInfo &MRI);
 
   void printRegName(raw_ostream &OS, unsigned RegNo) const override;
-  void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot,
-                 const MCSubtargetInfo &STI) override;
 
   // Autogenerated by tblgen.
   void printInstruction(const MCInst *MI, raw_ostream &O);
@@ -46,8 +44,12 @@
                        raw_ostream &O, const char *Modifier = nullptr);
   void printProtoIdent(const MCInst *MI, int OpNum,
                        raw_ostream &O, const char *Modifier = nullptr);
+
+private:
+  void printInstImpl(const MCInst *MI, raw_ostream &O, StringRef Annot,
+                     const MCSubtargetInfo &STI) override;
 };
 
-}
+} // namespace llvm
 
 #endif
diff --git a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
--- a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
+++ b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
@@ -72,8 +72,9 @@
   OS << VReg;
 }
 
-void NVPTXInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
-                                 StringRef Annot, const MCSubtargetInfo &STI) {
+void NVPTXInstPrinter::printInstImpl(const MCInst *MI, raw_ostream &OS,
+                                     StringRef Annot,
+                                     const MCSubtargetInfo &STI) {
   printInstruction(MI, OS);
 
   // Next always print the annotation.
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.h b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.h
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.h
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.h
@@ -25,15 +25,15 @@
   bool showRegistersWithPrefix() const;
   const char *getVerboseConditionRegName(unsigned RegNum,
                                          unsigned RegEncoding) const;
+  void printInstImpl(const MCInst *MI, raw_ostream &O, StringRef Annot,
+                     const MCSubtargetInfo &STI) override;
 
 public:
   PPCInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
                  const MCRegisterInfo &MRI, Triple T)
-    : MCInstPrinter(MAI, MII, MRI), TT(T) {}
+      : MCInstPrinter(MAI, MII, MRI), TT(T) {}
 
   void printRegName(raw_ostream &OS, unsigned RegNo) const override;
-  void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
-                 const MCSubtargetInfo &STI) override;
 
   // Autogenerated by tblgen.
   void printInstruction(const MCInst *MI, raw_ostream &O);
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
@@ -64,8 +64,9 @@
   OS << RegName;
 }
 
-void PPCInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
-                               StringRef Annot, const MCSubtargetInfo &STI) {
+void PPCInstPrinter::printInstImpl(const MCInst *MI, raw_ostream &O,
+                                   StringRef Annot,
+                                   const MCSubtargetInfo &STI) {
   // Check for slwi/srwi mnemonics.
   if (MI->getOpcode() == PPC::RLWINM) {
     unsigned char SH = MI->getOperand(2).getImm();
@@ -172,7 +173,6 @@
   printAnnotation(O, Annot);
 }
 
-
 void PPCInstPrinter::printPredicateOperand(const MCInst *MI, unsigned OpNo,
                                            raw_ostream &O,
                                            const char *Modifier) {
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h
@@ -25,8 +25,6 @@
                    const MCRegisterInfo &MRI)
       : MCInstPrinter(MAI, MII, MRI) {}
 
-  void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
-                 const MCSubtargetInfo &STI) override;
   void printRegName(raw_ostream &O, unsigned RegNo) const override;
 
   void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
@@ -48,6 +46,10 @@
                                const MCSubtargetInfo &STI, raw_ostream &O);
   static const char *getRegisterName(unsigned RegNo,
                                      unsigned AltIdx = RISCV::ABIRegAltName);
+
+private:
+  void printInstImpl(const MCInst *MI, raw_ostream &O, StringRef Annot,
+                     const MCSubtargetInfo &STI) override;
 };
 } // namespace llvm
 
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
@@ -39,8 +39,9 @@
               cl::desc("Disable the emission of assembler pseudo instructions"),
               cl::init(false), cl::Hidden);
 
-void RISCVInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
-                                 StringRef Annot, const MCSubtargetInfo &STI) {
+void RISCVInstPrinter::printInstImpl(const MCInst *MI, raw_ostream &O,
+                                     StringRef Annot,
+                                     const MCSubtargetInfo &STI) {
   bool Res = false;
   const MCInst *NewMI = MI;
   MCInst UncompressedMI;
diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.h b/llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.h
--- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.h
+++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.h
@@ -24,8 +24,6 @@
       : MCInstPrinter(MAI, MII, MRI) {}
 
   void printRegName(raw_ostream &OS, unsigned RegNo) const override;
-  void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
-                 const MCSubtargetInfo &STI) override;
   bool printSparcAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
                             raw_ostream &OS);
   bool isV9(const MCSubtargetInfo &STI) const;
@@ -50,6 +48,10 @@
                    raw_ostream &OS);
   void printMembarTag(const MCInst *MI, int opNum, const MCSubtargetInfo &STI,
                       raw_ostream &O);
+
+private:
+  void printInstImpl(const MCInst *MI, raw_ostream &O, StringRef Annot,
+                     const MCSubtargetInfo &STI) override;
 };
 } // end namespace llvm
 
diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.cpp b/llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.cpp
--- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.cpp
+++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.cpp
@@ -43,8 +43,9 @@
   OS << '%' << StringRef(getRegisterName(RegNo)).lower();
 }
 
-void SparcInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
-                                 StringRef Annot, const MCSubtargetInfo &STI) {
+void SparcInstPrinter::printInstImpl(const MCInst *MI, raw_ostream &O,
+                                     StringRef Annot,
+                                     const MCSubtargetInfo &STI) {
   if (!printAliasInstr(MI, STI, O) && !printSparcAliasInstr(MI, STI, O))
     printInstruction(MI, STI, O);
   printAnnotation(O, Annot);
diff --git a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.h b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.h
--- a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.h
+++ b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.h
@@ -40,8 +40,8 @@
 
   // Override MCInstPrinter.
   void printRegName(raw_ostream &O, unsigned RegNo) const override;
-  void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
-                 const MCSubtargetInfo &STI) override;
+  void printInstImpl(const MCInst *MI, raw_ostream &O, StringRef Annot,
+                     const MCSubtargetInfo &STI) override;
 
 private:
   // Print various types of operand.
diff --git a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.cpp b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.cpp
--- a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.cpp
+++ b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.cpp
@@ -51,9 +51,9 @@
     llvm_unreachable("Invalid operand");
 }
 
-void SystemZInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
-                                   StringRef Annot,
-                                   const MCSubtargetInfo &STI) {
+void SystemZInstPrinter::printInstImpl(const MCInst *MI, raw_ostream &O,
+                                       StringRef Annot,
+                                       const MCSubtargetInfo &STI) {
   printInstruction(MI, O);
   printAnnotation(O, Annot);
 }
diff --git a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.h b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.h
--- a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.h
+++ b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.h
@@ -37,8 +37,6 @@
                          const MCRegisterInfo &MRI);
 
   void printRegName(raw_ostream &OS, unsigned RegNo) const override;
-  void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot,
-                 const MCSubtargetInfo &STI) override;
 
   // Used by tblegen code.
   void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
@@ -51,6 +49,10 @@
   // Autogenerated by tblgen.
   void printInstruction(const MCInst *MI, raw_ostream &O);
   static const char *getRegisterName(unsigned RegNo);
+
+private:
+  void printInstImpl(const MCInst *MI, raw_ostream &O, StringRef Annot,
+                     const MCSubtargetInfo &STI) override;
 };
 
 namespace WebAssembly {
diff --git a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
--- a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
+++ b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
@@ -43,9 +43,9 @@
   OS << "$" << RegNo;
 }
 
-void WebAssemblyInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
-                                       StringRef Annot,
-                                       const MCSubtargetInfo &STI) {
+void WebAssemblyInstPrinter::printInstImpl(const MCInst *MI, raw_ostream &OS,
+                                           StringRef Annot,
+                                           const MCSubtargetInfo &STI) {
   // Print the instruction (this uses the AsmStrings from the .td files).
   printInstruction(MI, OS);
 
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.h b/llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.h
--- a/llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.h
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.h
@@ -24,8 +24,6 @@
       : X86InstPrinterCommon(MAI, MII, MRI), HasCustomInstComment(false) {}
 
   void printRegName(raw_ostream &OS, unsigned RegNo) const override;
-  void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot,
-                 const MCSubtargetInfo &STI) override;
   bool printVecCompareInstr(const MCInst *MI, raw_ostream &OS);
 
   // Autogenerated by tblgen, returns true if we successfully printed an
@@ -117,6 +115,8 @@
 
 private:
   bool HasCustomInstComment;
+  void printInstImpl(const MCInst *MI, raw_ostream &O, StringRef Annot,
+                     const MCSubtargetInfo &STI) override;
 };
 
 } // end namespace llvm
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
--- a/llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
@@ -38,8 +38,9 @@
   OS << markup("<reg:") << '%' << getRegisterName(RegNo) << markup(">");
 }
 
-void X86ATTInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
-                                  StringRef Annot, const MCSubtargetInfo &STI) {
+void X86ATTInstPrinter::printInstImpl(const MCInst *MI, raw_ostream &OS,
+                                      StringRef Annot,
+                                      const MCSubtargetInfo &STI) {
   // If verbose assembly is enabled, we can print some informative comments.
   if (CommentStream)
     HasCustomInstComment = EmitAnyX86InstComments(MI, *CommentStream, MII);
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.h b/llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.h
--- a/llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.h
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.h
@@ -22,11 +22,9 @@
 public:
   X86IntelInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
                       const MCRegisterInfo &MRI)
-    : X86InstPrinterCommon(MAI, MII, MRI) {}
+      : X86InstPrinterCommon(MAI, MII, MRI) {}
 
   void printRegName(raw_ostream &OS, unsigned RegNo) const override;
-  void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot,
-                 const MCSubtargetInfo &STI) override;
   bool printVecCompareInstr(const MCInst *MI, raw_ostream &OS);
 
   // Autogenerated by tblgen, returns true if we successfully printed an
@@ -137,6 +135,10 @@
     O << "qword ptr ";
     printMemOffset(MI, OpNo, O);
   }
+
+private:
+  void printInstImpl(const MCInst *MI, raw_ostream &O, StringRef Annot,
+                     const MCSubtargetInfo &STI) override;
 };
 
 } // end namespace llvm
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
--- a/llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
@@ -36,9 +36,9 @@
   OS << getRegisterName(RegNo);
 }
 
-void X86IntelInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
-                                    StringRef Annot,
-                                    const MCSubtargetInfo &STI) {
+void X86IntelInstPrinter::printInstImpl(const MCInst *MI, raw_ostream &OS,
+                                        StringRef Annot,
+                                        const MCSubtargetInfo &STI) {
   printInstFlags(MI, OS);
 
   // In 16-bit mode, print data16 as data32.
diff --git a/llvm/lib/Target/XCore/MCTargetDesc/XCoreInstPrinter.h b/llvm/lib/Target/XCore/MCTargetDesc/XCoreInstPrinter.h
--- a/llvm/lib/Target/XCore/MCTargetDesc/XCoreInstPrinter.h
+++ b/llvm/lib/Target/XCore/MCTargetDesc/XCoreInstPrinter.h
@@ -31,10 +31,10 @@
   static const char *getRegisterName(unsigned RegNo);
 
   void printRegName(raw_ostream &OS, unsigned RegNo) const override;
-  void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
-                 const MCSubtargetInfo &STI) override;
 
 private:
+  void printInstImpl(const MCInst *MI, raw_ostream &O, StringRef Annot,
+                     const MCSubtargetInfo &STI) override;
   void printInlineJT(const MCInst *MI, int opNum, raw_ostream &O);
   void printInlineJT32(const MCInst *MI, int opNum, raw_ostream &O);
   void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
diff --git a/llvm/lib/Target/XCore/MCTargetDesc/XCoreInstPrinter.cpp b/llvm/lib/Target/XCore/MCTargetDesc/XCoreInstPrinter.cpp
--- a/llvm/lib/Target/XCore/MCTargetDesc/XCoreInstPrinter.cpp
+++ b/llvm/lib/Target/XCore/MCTargetDesc/XCoreInstPrinter.cpp
@@ -30,8 +30,9 @@
   OS << StringRef(getRegisterName(RegNo)).lower();
 }
 
-void XCoreInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
-                                 StringRef Annot, const MCSubtargetInfo &STI) {
+void XCoreInstPrinter::printInstImpl(const MCInst *MI, raw_ostream &O,
+                                     StringRef Annot,
+                                     const MCSubtargetInfo &STI) {
   printInstruction(MI, O);
   printAnnotation(O, Annot);
 }