Index: lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp =================================================================== --- lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp +++ lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp @@ -430,8 +430,21 @@ if (Modifier[0] == 'l') { // Labels are target independent. if (MI->getOperand(OpNo).isBlockAddress()) { const BlockAddress *BA = MI->getOperand(OpNo).getBlockAddress(); - MCSymbol *Sym = AP->GetBlockAddressSymbol(BA); - Sym->print(OS, AP->MAI); + const Function *Fn = BA->getFunction(); + if (Fn == &MI->getParent()->getParent()->getFunction()) { + const MachineFunction *MF = MMI->getMachineFunction(*Fn); + const BasicBlock *BB = BA->getBasicBlock(); + for (const MachineBasicBlock &MBB : *MF) { + if (BB == MBB.getBasicBlock()) { + MBB.getSymbol()->print(OS, AP->MAI); + const_cast(MBB).setLabelMustBeEmitted(); + break; + } + } + } else { + MCSymbol *Sym = AP->GetBlockAddressSymbol(BA); + Sym->print(OS, AP->MAI); + } } else if (MI->getOperand(OpNo).isMBB()) { const MCSymbol *Sym = MI->getOperand(OpNo).getMBB()->getSymbol(); Sym->print(OS, AP->MAI); Index: test/CodeGen/AArch64/callbr-asm-label.ll =================================================================== --- /dev/null +++ test/CodeGen/AArch64/callbr-asm-label.ll @@ -0,0 +1,63 @@ +; RUN: llc < %s -mtriple=armv4t-unknown-linux-gnueabi | FileCheck %s + +@X = common local_unnamed_addr global i32 0, align 4 + +define i32 @test1() { +; CHECK-LABEL: test1: +; CHECK-LABEL: .Ltmp0: +; CHECK: .long b +; CHECK-NEXT: .long .LBB0_1 +; CHECK-LABEL: .LBB0_1: +; CHECK-LABEL: .LBB0_2: +entry: + callbr void asm sideeffect "1:\0A\09.word b, ${0:l}\0A\09", "X"(i8* blockaddress(@test1, %l_yes)) + to label %cleanup [label %l_yes] + +l_yes: + br label %cleanup + +cleanup: + %retval.0 = phi i32 [ 1, %l_yes ], [ 0, %entry ] + ret i32 %retval.0 +} + +define void @test2() { +; CHECK-LABEL: test2: +; CHECK-LABEL: .Ltmp2 +; CHECK: .long b +; CHECK-NEXT: .long .LBB1_3 +; CHECK-LABEL: .LBB1_2: +; CHECK-LABEL: .LBB1_3: +; CHECK-LABEL: .LBB1_5: +entry: + %0 = load i32, i32* @X, align 4 + %and = and i32 %0, 1 + %tobool = icmp eq i32 %and, 0 + br i1 %tobool, label %if.end10, label %if.then + +if.then: + callbr void asm sideeffect "1:\0A\09.word b, ${0:l}\0A\09", "X"(i8* blockaddress(@test2, %if.end6)) + to label %if.then4 [label %if.then9] + +if.then4: + %call5 = tail call i32 bitcast (i32 (...)* @g to i32 ()*)() + br label %if.end6 + +if.end6: + %.pre = load i32, i32* @X, align 4 + %.pre13 = and i32 %.pre, 1 + %phitmp = icmp eq i32 %.pre13, 0 + br i1 %phitmp, label %if.end10, label %if.then9 + +if.then9: + callbr void asm sideeffect "", "X"(i8* blockaddress(@test2, %l_yes)) + to label %if.end10 [label %l_yes] + +if.end10: + br label %l_yes + +l_yes: + ret void +} + +declare i32 @g(...) Index: test/CodeGen/X86/callbr-asm-label-addr.ll =================================================================== --- /dev/null +++ test/CodeGen/X86/callbr-asm-label-addr.ll @@ -0,0 +1,28 @@ +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s + +; CHECK-LABEL: test1: +; CHECK: .quad .LBB0_2 +; CHECK-NEXT: .quad .LBB0_1 +; CHECK-LABEL: .LBB0_1: +; CHECK-LABEL: .LBB0_2: + +define i32 @test1(i32 %x) { +entry: + callbr void asm sideeffect ".quad ${0:l}\0A\09.quad ${1:l}", "i,X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@test1, %baz), i8* blockaddress(@test1, %bar)) + to label %asm.fallthrough [label %bar] + +asm.fallthrough: + br label %bar + +bar: + %call = tail call i32 @foo(i32 %x) + br label %baz + +baz: + %call1 = tail call i32 @mux(i32 %call) + ret i32 %call1 +} + +declare i32 @foo(i32) + +declare i32 @mux(i32) Index: test/CodeGen/X86/callbr-asm-obj-file.ll =================================================================== --- /dev/null +++ test/CodeGen/X86/callbr-asm-obj-file.ll @@ -0,0 +1,19 @@ +; RUN: llc < %s -mtriple=x86_64-linux-gnu -filetype=obj -o - \ +; RUN: | llvm-objdump -triple x86_64-linux-gnu -d - \ +; RUN: | FileCheck %s + +; CHECK: 0000000000000000 test1: +; CHECK-NEXT: 0: 74 00 je 0 +; CHECK-NEXT: 2: c3 retq + +define void @test1() { +entry: + callbr void asm sideeffect "je ${0:l}", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@test1, %a.b.normal.jump)) + to label %asm.fallthrough [label %a.b.normal.jump] + +asm.fallthrough: + ret void + +a.b.normal.jump: + ret void +} Index: test/CodeGen/X86/callbr-asm.ll =================================================================== --- test/CodeGen/X86/callbr-asm.ll +++ test/CodeGen/X86/callbr-asm.ll @@ -12,13 +12,14 @@ ; CHECK-NEXT: addl $4, %eax ; CHECK-NEXT: #APP ; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: jmp .Ltmp00 +; CHECK-NEXT: jmp .LBB0_2 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: .LBB0_1: # %normal ; CHECK-NEXT: xorl %eax, %eax ; CHECK-NEXT: retl ; CHECK-NEXT: .Ltmp0: # Block address taken ; CHECK-NEXT: .LBB0_2: # %fail +; CHECK-NEXT: # Label of block must be emitted ; CHECK-NEXT: movl $1, %eax ; CHECK-NEXT: retl entry: @@ -87,17 +88,17 @@ ; CHECK-NEXT: # Parent Loop BB2_3 Depth=3 ; CHECK-NEXT: # => This Inner Loop Header: Depth=4 ; CHECK-NEXT: #APP -; CHECK-NEXT: jmp .Ltmp10 -; CHECK-NEXT: jmp .Ltmp20 -; CHECK-NEXT: jmp .Ltmp30 +; CHECK-NEXT: jmp .LBB2_1 +; CHECK-NEXT: jmp .LBB2_2 +; CHECK-NEXT: jmp .LBB2_3 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: .LBB2_5: # %normal0 ; CHECK-NEXT: # in Loop: Header=BB2_4 Depth=4 ; CHECK-NEXT: #APP -; CHECK-NEXT: jmp .Ltmp10 -; CHECK-NEXT: jmp .Ltmp20 -; CHECK-NEXT: jmp .Ltmp30 -; CHECK-NEXT: jmp .Ltmp40 +; CHECK-NEXT: jmp .LBB2_1 +; CHECK-NEXT: jmp .LBB2_2 +; CHECK-NEXT: jmp .LBB2_3 +; CHECK-NEXT: jmp .LBB2_4 ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: .LBB2_6: # %normal1 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax