Index: llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp =================================================================== --- llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp +++ llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp @@ -388,8 +388,6 @@ MachineInstrBuilder MIBuilder = BuildMI(Block, MBIter, dl, TII->get(ARM::MVE_VPST)); - // The mask value for the VPST instruction is T = 0b1000 = 8 - MIBuilder.addImm(VPTMaskValue::T); MachineBasicBlock::iterator VPSTInsertPos = MIBuilder.getInstr(); int VPTInstCnt = 1; @@ -400,12 +398,29 @@ NextPred = getVPTInstrPredicate(*MBIter, PredReg); } while (NextPred != ARMVCC::None && NextPred == Pred && ++VPTInstCnt < 4); + switch (VPTInstCnt) { + case 1: + MIBuilder.addImm(VPTMaskValue::T); + break; + case 2: + MIBuilder.addImm(VPTMaskValue::TT); + break; + case 3: + MIBuilder.addImm(VPTMaskValue::TTT); + break; + case 4: + MIBuilder.addImm(VPTMaskValue::TTTT); + break; + default: + llvm_unreachable("Unexpected number of instruction in a VPT block"); + }; + MachineInstr *LastMI = &*MBIter; finalizeBundle(Block, VPSTInsertPos.getInstrIterator(), ++LastMI->getIterator()); Modified = true; - LLVM_DEBUG(dbgs() << "VPT block created for: "; MI->dump();); + LLVM_DEBUG(dbgs() << "VPT block created for: "; MI->dump()); ++MBIter; } Index: llvm/test/CodeGen/Thumb2/mve-vpt-block2.mir =================================================================== --- llvm/test/CodeGen/Thumb2/mve-vpt-block2.mir +++ llvm/test/CodeGen/Thumb2/mve-vpt-block2.mir @@ -64,7 +64,7 @@ bb.0.entry: liveins: $q0, $q1, $q2, $q3, $r0 - ; CHECK: MVE_VPST 8, implicit-def $p0 + ; CHECK: MVE_VPST 4, implicit-def $p0 ; CHECK-NEXT: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 ; CHECK-NEXT: renamable $q1 = nnan ninf nsz MVE_VMINNMf32 Index: llvm/test/CodeGen/Thumb2/mve-vpt-block3.mir =================================================================== --- llvm/test/CodeGen/Thumb2/mve-vpt-block3.mir +++ llvm/test/CodeGen/Thumb2/mve-vpt-block3.mir @@ -65,7 +65,7 @@ bb.0.entry: liveins: $q0, $q1, $q2, $q3, $r0 - ; CHECK: MVE_VPST 8, implicit-def $p0 + ; CHECK: MVE_VPST 1, implicit-def $p0 ; CHECK-NEXT: renamable $q2 = nnan ninf nsz MVE_VMINNMf32 ; CHECK-NEXT: renamable $q2 = nnan ninf nsz MVE_VMINNMf32 ; CHECK-NEXT: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 Index: llvm/test/CodeGen/Thumb2/mve-vpt-block4.mir =================================================================== --- llvm/test/CodeGen/Thumb2/mve-vpt-block4.mir +++ llvm/test/CodeGen/Thumb2/mve-vpt-block4.mir @@ -66,7 +66,7 @@ bb.0.entry: liveins: $q0, $q1, $q2, $q3, $r0 - ; CHECK: MVE_VPST 8, implicit-def $p0 + ; CHECK: MVE_VPST 1, implicit-def $p0 ; CHECK-NEXT: renamable $q2 = nnan ninf nsz MVE_VMINNMf32 ; CHECK-NEXT: renamable $q2 = nnan ninf nsz MVE_VMINNMf32 ; CHECK-NEXT: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 Index: llvm/test/CodeGen/Thumb2/mve-vpt-block5.mir =================================================================== --- llvm/test/CodeGen/Thumb2/mve-vpt-block5.mir +++ llvm/test/CodeGen/Thumb2/mve-vpt-block5.mir @@ -64,13 +64,13 @@ liveins: $q0, $q1, $q2, $r0 ; CHECK: BUNDLE {{.*}} { - ; CHECK-NEXT: MVE_VPST 8, implicit-def $p0 + ; CHECK-NEXT: MVE_VPST 4, implicit-def $p0 ; CHECK-NEXT: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, renamable $vpr, killed renamable $q3 ; CHECK-NEXT: renamable $q1 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q3, internal renamable $q3, 1, renamable $vpr, undef renamable $q1 ; CHECK-NEXT: $q3 = MVE_VORR $q0, $q0, 0, $noreg, internal undef $q3 ; CHECK-NEXT: } ; CHECK-NEXT: BUNDLE {{.*}} { - ; CHECK-NEXT: MVE_VPST 8, implicit-def $p0 + ; CHECK-NEXT: MVE_VPST 4, implicit-def $p0 ; CHECK-NEXT: renamable $q3 = nnan ninf nsz MVE_VMINNMf32 killed renamable $q1, renamable $q2, 1, renamable $vpr, killed renamable $q3 ; CHECK-NEXT: renamable $q0 = nnan ninf nsz MVE_VMINNMf32 internal killed renamable $q3, killed renamable $q2, 1, killed renamable $vpr, killed renamable $q0 ; CHECK-NEXT: tBX_RET 14, $noreg, implicit internal $q0