Index: llvm/lib/Target/LLVMBuild.txt =================================================================== --- llvm/lib/Target/LLVMBuild.txt +++ llvm/lib/Target/LLVMBuild.txt @@ -37,6 +37,7 @@ WebAssembly X86 XCore + Xtensa ; This is a special group whose required libraries are extended (by llvm-build) ; with the best execution engine (the native JIT, if available, or the Index: llvm/lib/Target/Xtensa/CMakeLists.txt =================================================================== --- /dev/null +++ llvm/lib/Target/Xtensa/CMakeLists.txt @@ -0,0 +1,7 @@ +add_llvm_target(XtensaCodeGen + XtensaTargetMachine.cpp + ) + +add_subdirectory(MCTargetDesc) +add_subdirectory(TargetInfo) + Index: llvm/lib/Target/Xtensa/LLVMBuild.txt =================================================================== --- /dev/null +++ llvm/lib/Target/Xtensa/LLVMBuild.txt @@ -0,0 +1,30 @@ +;===- ./lib/Target/Xtensa/LLVMBuild.txt ------------------------*- Conf -*--===; +; +; Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +; See https://llvm.org/LICENSE.txt for license information. +; SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +; +;===------------------------------------------------------------------------===; +; +; This is an LLVMBuild description file for the components in this subdirectory. +; +; For more information on the LLVMBuild system, please see: +; +; http://llvm.org/docs/LLVMBuild.html +; +;===------------------------------------------------------------------------===; + +[common] +subdirectories = TargetInfo MCTargetDesc + +[component_0] +type = TargetGroup +name = Xtensa +parent = Target + +[component_1] +type = Library +name = XtensaCodeGen +parent = Xtensa +required_libraries = CodeGen Core XtensaInfo Support Target +add_to_library_groups = Xtensa Index: llvm/lib/Target/Xtensa/MCTargetDesc/CMakeLists.txt =================================================================== --- /dev/null +++ llvm/lib/Target/Xtensa/MCTargetDesc/CMakeLists.txt @@ -0,0 +1,3 @@ +add_llvm_component_library(LLVMXtensaDesc + XtensaMCTargetDesc.cpp + ) Index: llvm/lib/Target/Xtensa/MCTargetDesc/LLVMBuild.txt =================================================================== --- /dev/null +++ llvm/lib/Target/Xtensa/MCTargetDesc/LLVMBuild.txt @@ -0,0 +1,22 @@ +;===- ./lib/Target/MCTargetDesc/LLVMBuild.txt ------------------------*- Conf -*--===; +; +; Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +; See https://llvm.org/LICENSE.txt for license information. +; SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +; +;===------------------------------------------------------------------------===; +; +; This is an LLVMBuild description file for the components in this subdirectory. +; +; For more information on the LLVMBuild system, please see: +; +; http://llvm.org/docs/LLVMBuild.html +; +;===------------------------------------------------------------------------===; + +[component_0] +type = Library +name = XtensaDesc +parent = Xtensa +required_libraries = MC XtensaInfo Support +add_to_library_groups = Xtensa Index: llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.h =================================================================== --- /dev/null +++ llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.h @@ -0,0 +1,18 @@ +//===-- XtensaMCTargetDesc.h - Xtensa Target Descriptions -------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file provides Xtensa specific target descriptions. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIB_TARGET_XTENSA_MCTARGETDESC_XTENSAMCTARGETDESC_H +#define LLVM_LIB_TARGET_XTENSA_MCTARGETDESC_XTENSAMCTARGETDESC_H + +#endif /* LLVM_LIB_TARGET_XTENSA_MCTARGETDESC_XTENSAMCTARGETDESC_H */ Index: llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.cpp =================================================================== --- /dev/null +++ llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.cpp @@ -0,0 +1,13 @@ +//===-- XtensaMCTargetDesc.cpp - Xtebsa target descriptions ---------------===// +// +// The LLVM Compiler Infrastructure +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +#include "XtensaMCTargetDesc.h" + +// We need to define this function for linking succeed +extern "C" void LLVMInitializeXtensaTargetMC() {} Index: llvm/lib/Target/Xtensa/TargetInfo/CMakeLists.txt =================================================================== --- /dev/null +++ llvm/lib/Target/Xtensa/TargetInfo/CMakeLists.txt @@ -0,0 +1,5 @@ +include_directories( ${CMAKE_CURRENT_BINARY_DIR}/.. ${CMAKE_CURRENT_SOURCE_DIR}/.. ) + +add_llvm_component_library(LLVMXtensaInfo + XtensaTargetInfo.cpp + ) Index: llvm/lib/Target/Xtensa/TargetInfo/LLVMBuild.txt =================================================================== --- /dev/null +++ llvm/lib/Target/Xtensa/TargetInfo/LLVMBuild.txt @@ -0,0 +1,22 @@ +;===- ./lib/Target/TargetInfo/LLVMBuild.txt --------------------*- Conf -*--===; +; +; Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +; See https://llvm.org/LICENSE.txt for license information. +; SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +; +;===------------------------------------------------------------------------===; +; +; This is an LLVMBuild description file for the components in this subdirectory. +; +; For more information on the LLVMBuild system, please see: +; +; http://llvm.org/docs/LLVMBuild.html +; +;===------------------------------------------------------------------------===; + +[component_0] +type = Library +name = XtensaInfo +parent = Xtensa +required_libraries = Support +add_to_library_groups = Xtensa Index: llvm/lib/Target/Xtensa/TargetInfo/XtensaTargetInfo.cpp =================================================================== --- /dev/null +++ llvm/lib/Target/Xtensa/TargetInfo/XtensaTargetInfo.cpp @@ -0,0 +1,20 @@ +//===-- XtensaTargetInfo.cpp - Xtensa Target Implementation ---------------===// +// +// The LLVM Compiler Infrastructure +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "llvm/Support/TargetRegistry.h" + +using namespace llvm; +namespace llvm { +Target TheXtensaTarget; +} +extern "C" void LLVMInitializeXtensaTargetInfo() { + RegisterTarget X(TheXtensaTarget, "xtensa", "Xtensa 32", + "XTENSA"); +} Index: llvm/lib/Target/Xtensa/XtensaTargetMachine.h =================================================================== --- /dev/null +++ llvm/lib/Target/Xtensa/XtensaTargetMachine.h @@ -0,0 +1,48 @@ +//===-- XtensaTargetMachine.h - Define TargetMachine for Xtensa -*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file declares the Xtensa specific subclass of TargetMachine. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIB_TARGET_XTENSA_XTENSATARGETMACHINE_H +#define LLVM_LIB_TARGET_XTENSA_XTENSATARGETMACHINE_H + +#include "llvm/Target/TargetMachine.h" + +namespace llvm { + +class TargetFrameLowering; + +extern Target TheXtensaTarget; + +class XtensaTargetMachine : public LLVMTargetMachine { + std::unique_ptr TLOF; + +public: + XtensaTargetMachine(const Target &T, const Triple &TT, StringRef CPU, + StringRef FS, const TargetOptions &Options, + Optional RM, Optional CM, + CodeGenOpt::Level OL, bool JIT, bool isLittle); + + XtensaTargetMachine(const Target &T, const Triple &TT, StringRef CPU, + StringRef FS, const TargetOptions &Options, + Optional RM, Optional CM, + CodeGenOpt::Level OL, bool JIT); + + // Override LLVMTargetMachine + TargetPassConfig *createPassConfig(PassManagerBase &PM) override; + TargetLoweringObjectFile *getObjFileLowering() const override { + return TLOF.get(); + } +}; +} // end namespace llvm + +#endif /* LLVM_LIB_TARGET_XTENSA_XTENSATARGETMACHINE_H */ Index: llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp =================================================================== --- /dev/null +++ llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp @@ -0,0 +1,70 @@ +//===- XtensaTargetMachine.cpp - Define TargetMachine for Xtensa ----------===// +// +// The LLVM Compiler Infrastructure +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// Implements the info about Xtensa target spec. +// +//===----------------------------------------------------------------------===// + +#include "XtensaTargetMachine.h" +#include "llvm/CodeGen/Passes.h" +#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" +#include "llvm/CodeGen/TargetPassConfig.h" +#include "llvm/IR/LegacyPassManager.h" +#include "llvm/Support/TargetRegistry.h" +#include "llvm/Transforms/IPO/PassManagerBuilder.h" +#include "llvm/Transforms/Scalar.h" + +using namespace llvm; + +extern "C" void LLVMInitializeXtensaTarget() { + // Register the target. + RegisterTargetMachine A(TheXtensaTarget); +} + +static std::string computeDataLayout(const Triple &TT, StringRef CPU, + const TargetOptions &Options, + bool isLittle) { + std::string Ret = "e-m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32"; + + return Ret; +} + +static Reloc::Model getEffectiveRelocModel(bool JIT, + Optional RM) { + if (!RM.hasValue() || JIT) + return Reloc::Static; + return *RM; +} + +XtensaTargetMachine::XtensaTargetMachine(const Target &T, const Triple &TT, + StringRef CPU, StringRef FS, + const TargetOptions &Options, + Optional RM, + Optional CM, + CodeGenOpt::Level OL, bool JIT, + bool isLittle) + : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT, + CPU, FS, Options, getEffectiveRelocModel(JIT, RM), + getEffectiveCodeModel(CM, CodeModel::Small), OL), + TLOF(std::make_unique()) { + initAsmInfo(); +} + +XtensaTargetMachine::XtensaTargetMachine(const Target &T, const Triple &TT, + StringRef CPU, StringRef FS, + const TargetOptions &Options, + Optional RM, + Optional CM, + CodeGenOpt::Level OL, bool JIT) + : XtensaTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {} + +TargetPassConfig *XtensaTargetMachine::createPassConfig(PassManagerBase &PM) { + return new TargetPassConfig(*this, PM); +}