Index: include/llvm/MC/MCExpr.h =================================================================== --- include/llvm/MC/MCExpr.h +++ include/llvm/MC/MCExpr.h @@ -296,6 +296,8 @@ VK_AMDGPU_ABS32_LO, // symbol@abs32@lo VK_AMDGPU_ABS32_HI, // symbol@abs32@hi + VK_RISCV_PCREL, + VK_TPREL, VK_DTPREL }; Index: lib/MC/MCExpr.cpp =================================================================== --- lib/MC/MCExpr.cpp +++ lib/MC/MCExpr.cpp @@ -312,6 +312,7 @@ case VK_AMDGPU_REL64: return "rel64"; case VK_AMDGPU_ABS32_LO: return "abs32@lo"; case VK_AMDGPU_ABS32_HI: return "abs32@hi"; + case VK_RISCV_PCREL: return "pcrel"; } llvm_unreachable("Invalid variant kind"); } Index: lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp =================================================================== --- lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp +++ lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp @@ -10,6 +10,7 @@ #include "MCTargetDesc/RISCVMCTargetDesc.h" #include "llvm/MC/MCELFObjectWriter.h" #include "llvm/MC/MCFixup.h" +#include "llvm/MC/MCValue.h" #include "llvm/MC/MCObjectWriter.h" #include "llvm/Support/ErrorHandling.h" @@ -48,11 +49,15 @@ const MCFixup &Fixup, bool IsPCRel) const { // Determine the type of the relocation + MCSymbolRefExpr::VariantKind Variant = Target.getAccessVariant(); switch ((unsigned)Fixup.getKind()) { default: llvm_unreachable("invalid fixup kind!"); case FK_Data_4: - return ELF::R_RISCV_32; + if (Variant == MCSymbolRefExpr::VK_RISCV_PCREL) + return ELF::R_RISCV_32_PCREL; + else + return ELF::R_RISCV_32; case FK_Data_8: return ELF::R_RISCV_64; case FK_Data_Add_1: Index: lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.h =================================================================== --- lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.h +++ lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.h @@ -23,6 +23,10 @@ public: explicit RISCVMCAsmInfo(const Triple &TargetTriple); + + const MCExpr* getExprForFDESymbol(const MCSymbol *Sym, + unsigned Encoding, + MCStreamer &Streamer) const override; }; } // namespace llvm Index: lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp =================================================================== --- lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp +++ lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp @@ -12,6 +12,8 @@ #include "RISCVMCAsmInfo.h" #include "llvm/ADT/Triple.h" +#include "llvm/BinaryFormat/Dwarf.h" +#include "llvm/MC/MCStreamer.h" using namespace llvm; void RISCVMCAsmInfo::anchor() {} @@ -25,3 +27,14 @@ Data16bitsDirective = "\t.half\t"; Data32bitsDirective = "\t.word\t"; } + +const MCExpr* +RISCVMCAsmInfo::getExprForFDESymbol(const MCSymbol *Sym, + unsigned Encoding, + MCStreamer &Streamer) const { + auto &Ctx = Streamer.getContext(); + if (Encoding | dwarf::DW_EH_PE_pcrel) + return MCSymbolRefExpr::create(Sym, MCSymbolRefExpr::VK_RISCV_PCREL, Ctx); + else + return MCSymbolRefExpr::create(Sym, Ctx); +}