[llvm-objdump] Implement syntax highlighting

[seiya]

Summary

This is a prototype implementation of syntax highlighting. I'll split into separate patches, but before that I'd like to discuss the
outline to make sure that I’m on the right track.

[jhenderson]

Something to be aware of is that people can change how the output is printed using switches like --x86-asm-syntax. If you're going down the route of parsing the text to identify how to highlight it, your parser needs to be robust enough to cope. Not only that but different architectures have different disassembly output, so there's a similar issue there.

[seiya]

• Hold the vector of marked up fragments instead of parsing the disassembly (suggested by Michael Spencer on llvm-dev).

[seiya]

It's still work-in-progress.

[seiya]

llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp

42

I think implementing operator<< would be better.

[seiya]

• Implement raw_ostream &operator<<(...).
• Support nested marked-up string (e.g., <mem:256(<reg:%rip>)>).

[seiya]

This comment was removed by seiya.

[seiya]

• Highlight symbol names.
• Fix some TODOs.

[seiya]

llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp

377

TODO: remove

[seiya]

I'll add tests and split into separate patches later but before that I'd like to discuss the outline to make sure that I’m on the right track.

[jhenderson]

Hi @seiya. As mentioned by email offline, I think this looks quite good. Please go ahead and add some reviewers, and write some tests for it. I'm happy to help out with reviewing it in more detail once it's ready.

[seiya]

I've uploaded a series of separate patches: https://reviews.llvm.org/D65191

llvm/include/llvm/MC/MCInstPrinter.h

 
 enum Style {
   C,  ///< 0xff
   Asm ///< 0ffh
 };
 
 } // end namespace HexStyle
 
+enum class MarkupType {
+  Reg,
+  Imm,
+  Mem,
+};
+
+// MarkupSpan represents a marked up range in the disassembly. For example:
+//
+//      Pos   InnerPos
+//       v    v
+//  ...  <mem:256(<reg:%rip>)> ...
+//            ~~~~~~~~~~~~~~~ InnerLenth
+//       ~~~~~~~~~~~~~~~~~~~~~ Length
+//
+struct MarkupSpan {
+  MarkupType Type;
+  // The offset of the beginning of the marked up range.
+  size_t Pos;
+  // The length of the marked up range.
+  size_t Length;
+  // The offset of the beginning of the inner text.
+  size_t InnerPos;
+  // The length of the inner text.
+  size_t InnerLength;
+  // Marked up ranges in the inner text. In the example above,
+  // InnerSpans contains one MarkupSpan which represents `<reg:%rip>`.
+  std::unique_ptr<std::vector<MarkupSpan>> InnerSpans;
+
+  MarkupSpan(MarkupType Type, size_t Pos, size_t Length, size_t InnerPos,
+             size_t InnerLength)
+      : Type(Type), Pos(Pos), Length(Length), InnerPos(InnerPos),
+        InnerLength(InnerLength), InnerSpans(new std::vector<MarkupSpan>()) {}
+};
+
+// MarkupState holds the state used by llvm::operator<<(raw_ostream&) implementaions
+// for MarkupStart and MarkupEnd.
+struct MarkupState {
+  // True if the marked up disassembly is enabled. Defaults to false in case
+  // resetMarkup() isn't called in the printer.
+  bool Enabled = false;
+  // The offset of the beginning of the disassembly in the stream.
+  size_t StartOffset;
+  // A stack which holds pointers to SpansOut_ and InnerSpans of unclosed Spans.
+  // TODO: Rename to a appropriate name.
+  std::vector<std::vector<MarkupSpan> *> UnclosedSpanInner;
+
+  void reset(raw_ostream &OS, bool Enabled_,
+             std::vector<MarkupSpan> *SpansOut_);
+  size_t offset(raw_ostream &OS) const;
+};
+
+struct MarkupStart {
+  MarkupState &State;
+  MarkupType Type;
+
+  MarkupStart(MarkupState &State, MarkupType Type) : State(State), Type(Type) {}
+  friend raw_ostream &operator<<(raw_ostream &OS, const MarkupStart &M);
+};
+
+struct MarkupEnd {
+  MarkupState &State;
+
+  MarkupEnd(MarkupState &State) : State(State) {}
+  friend raw_ostream &operator<<(raw_ostream &OS, const MarkupEnd &M);
+};
+
 /// This is an instance of a target assembly language printer that
 /// converts an MCInst to valid target assembly syntax.
 class MCInstPrinter {
 protected:
   /// A stream that comments can be emitted to if desired.  Each comment
   /// must end with a newline.  This will be null if verbose assembly emission
   /// is disabled.
   raw_ostream *CommentStream = nullptr;
   const MCAsmInfo &MAI;
   const MCInstrInfo &MII;
   const MCRegisterInfo &MRI;
 
   /// True if we are printing marked up assembly.
   bool UseMarkup = false;
 
   /// True if we are printing immediates as hex.
   bool PrintImmHex = false;
 
   /// Which style to use for printing hexadecimal values.
   HexStyle::Style PrintHexStyle = HexStyle::C;
 
+  /// Markup states.
+  MarkupState MarkupState;
+  std::vector<MarkupSpan> *MarkupSpans = nullptr;
+
   /// Utility function for printing annotations.
   void printAnnotation(raw_ostream &OS, StringRef Annot);
 
 public:
   MCInstPrinter(const MCAsmInfo &mai, const MCInstrInfo &mii,
                 const MCRegisterInfo &mri) : MAI(mai), MII(mii), MRI(mri) {}
 
   virtual ~MCInstPrinter();
public:
   StringRef getOpcodeName(unsigned Opcode) const;
 
   /// Print the assembler register name.
   virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
 
   bool getUseMarkup() const { return UseMarkup; }
   void setUseMarkup(bool Value) { UseMarkup = Value; }
 
+  // Specify an output vector of marked up ranges.
+  void setMarkupSpans(std::vector<MarkupSpan> &MS) { MarkupSpans = &MS; }
+
+  // Resets the MarkupState. This should be called first in printInst().
+  void resetMarkup(raw_ostream &OS);
+
   /// Utility functions to make adding mark ups simpler.
   StringRef markup(StringRef s) const;
   StringRef markup(StringRef a, StringRef b) const;
+  MarkupStart startMarkup(MarkupType Type);
+  MarkupEnd endMarkup();
 
   bool getPrintImmHex() const { return PrintImmHex; }
   void setPrintImmHex(bool Value) { PrintImmHex = Value; }
 
   HexStyle::Style getPrintHexStyle() const { return PrintHexStyle; }
   void setPrintHexStyle(HexStyle::Style Value) { PrintHexStyle = Value; }
 
   /// Utility function to print immediates in decimal or hex.

llvm/lib/MC/MCInstPrinter.cpp

 }
 StringRef MCInstPrinter::markup(StringRef a, StringRef b) const {
   if (getUseMarkup())
     return a;
   else
     return b;
 }
 
+void MCInstPrinter::resetMarkup(raw_ostream &OS) {
+  MarkupState.reset(OS, getUseMarkup(), MarkupSpans);
+}
+
 // For asm-style hex (e.g. 0ffh) the first digit always has to be a number.
-static bool needsLeadingZero(uint64_t Value)
-{
-  while (Value)
-  {
+static bool needsLeadingZero(uint64_t Value) {
+  while (Value) {
     uint64_t digit = (Value >> 60) & 0xf;
     if (digit != 0)
       return (digit >= 0xa);
     Value <<= 4;
   }
   return false;
 }
 
format_object<uint64_t> MCInstPrinter::formatHex(uint64_t Value) const {
   case HexStyle::Asm:
     if (needsLeadingZero(Value))
       return format("0%" PRIx64 "h", Value);
     else
       return format("%" PRIx64 "h", Value);
   }
   llvm_unreachable("unsupported print style");
 }
+
+MarkupStart MCInstPrinter::startMarkup(MarkupType Type) {
+  return MarkupStart(MarkupState, Type);
+}
+
+MarkupEnd MCInstPrinter::endMarkup() {
+  return MarkupEnd(MarkupState);
+}
+
+
+void MarkupState::reset(raw_ostream &OS, bool Enabled_,
+                        std::vector<MarkupSpan> *SpansOut) {
+  Enabled = Enabled_;
+  StartOffset = OS.tell();
+  UnclosedSpanInner.clear();
+  if (SpansOut) {
+    UnclosedSpanInner.push_back(SpansOut);
+  }
+}
+
+size_t MarkupState::offset(raw_ostream &OS) const {
+  return OS.tell() - StartOffset;
+}
+
+raw_ostream &llvm::operator<<(raw_ostream &OS, const MarkupStart &M) {
+  if (M.State.Enabled) {
+    StringRef TypeStr;
+    switch (M.Type) {
+    case MarkupType::Imm:
+      TypeStr = "imm";
+      break;
+    case MarkupType::Reg:
+      TypeStr = "reg";
+      break;
+    case MarkupType::Mem:
+      TypeStr = "mem";
+      break;
+    }
+
+    // TODO: support tag-modifier-list. As far as I investigated, it is not
+    // used though. See: https://llvm.org/docs/MarkedUpDisassembly.html
+    size_t Length = 2 + TypeStr.size();
+    if (!M.State.UnclosedSpanInner.empty()) {
+      std::vector<MarkupSpan> *CurrentInnerSpans =
+          M.State.UnclosedSpanInner.back();
+
+      /* we'll set Length and InnerLength later. */
+      MarkupSpan Span = MarkupSpan(M.Type, M.State.offset(OS), 0,
+                                   M.State.offset(OS) + Length, 0);
+
+      auto *InnerSpans =
+          const_cast<std::vector<MarkupSpan> *>(Span.InnerSpans.get());
+      CurrentInnerSpans->push_back(std::move(Span));
+      M.State.UnclosedSpanInner.push_back(InnerSpans);
+    }
+    OS << "<" << TypeStr << ":";
+  }
+
+  return OS;
+}
+
+raw_ostream &llvm::operator<<(raw_ostream &OS, const MarkupEnd &M) {
+  if (M.State.Enabled) {
+    if (!M.State.UnclosedSpanInner.empty()) {
+      assert(M.State.UnclosedSpanInner.size() > 1 &&
+             "Missing the corresponding markupStart().");
+
+      M.State.UnclosedSpanInner.pop_back();
+      MarkupSpan &Span = M.State.UnclosedSpanInner.back()->back();
+      Span.Length = M.State.offset(OS) - Span.Pos + 1;
+      Span.InnerLength = M.State.offset(OS) - Span.InnerPos;
+    }
+    OS << ">";
+  }
+
+  return OS;
+}

llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.h

void printMemOffs32(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
     printMemOffset(MI, OpNo, O);
   }
   void printMemOffs64(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
     printMemOffset(MI, OpNo, O);
   }
 
 private:
   bool HasCustomInstComment;
+
+  void printMarkedUpRegName(raw_ostream &OS, unsigned RegNo);
 };
 
 } // end namespace llvm
 
 #endif // LLVM_LIB_TARGET_X86_MCTARGETDESC_X86ATTINSTPRINTER_H

llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp

 // Include the auto-generated portion of the assembly writer.
 #define PRINT_ALIAS_INSTR
 #include "X86GenAsmWriter.inc"
 
 void X86ATTInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
   OS << markup("<reg:") << '%' << getRegisterName(RegNo) << markup(">");
 }
 
+// Since printRegName is a const method, we need this non-const version to
+// update MarkupState and MarkupSpans.
+void X86ATTInstPrinter::printMarkedUpRegName(raw_ostream &OS, unsigned RegNo) {
+  OS << startMarkup(MarkupType::Reg) << '%' << getRegisterName(RegNo)
+     << endMarkup();
+}
+
 void X86ATTInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
                                   StringRef Annot, const MCSubtargetInfo &STI) {
+  resetMarkup(OS);
+
   // If verbose assembly is enabled, we can print some informative comments.
   if (CommentStream)
     HasCustomInstComment = EmitAnyX86InstComments(MI, *CommentStream, MII);
 
   printInstFlags(MI, OS);
 
   // Output CALLpcrel32 as "callq" in 64-bit mode.
   // In Intel annotation it's always emitted as "call".
bool X86ATTInstPrinter::printVecCompareInstr(const MCInst *MI,
 
   return false;
 }
 
 void X86ATTInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
                                      raw_ostream &O) {
   const MCOperand &Op = MI->getOperand(OpNo);
   if (Op.isReg()) {
-    printRegName(O, Op.getReg());
+    printMarkedUpRegName(O, Op.getReg());
   } else if (Op.isImm()) {
     // Print immediates as signed values.
     int64_t Imm = Op.getImm();
-    O << markup("<imm:") << '$' << formatImm(Imm) << markup(">");
+    O << startMarkup(MarkupType::Imm) << '$' << formatImm(Imm) << endMarkup();
 
     // TODO: This should be in a helper function in the base class, so it can
     // be used by other printers.
 
     // If there are no instruction-specific comments, add a comment clarifying
     // the hex value of the immediate operand when it isn't in the range
     // [-256,255].
+    errs() << "CommentStream:" << ((size_t) CommentStream) << "\n";
     if (CommentStream && !HasCustomInstComment && (Imm > 255 || Imm < -256)) {
       // Don't print unnecessary hex sign bits.
       if (Imm == (int16_t)(Imm))
         *CommentStream << format("imm = 0x%" PRIX16 "\n", (uint16_t)Imm);
       else if (Imm == (int32_t)(Imm))
         *CommentStream << format("imm = 0x%" PRIX32 "\n", (uint32_t)Imm);
       else
         *CommentStream << format("imm = 0x%" PRIX64 "\n", (uint64_t)Imm);
     }
   } else {
     assert(Op.isExpr() && "unknown operand kind in printOperand");
-    O << markup("<imm:") << '$';
+    O << startMarkup(MarkupType::Imm) << '$';
     Op.getExpr()->print(O, &MAI);
-    O << markup(">");
+    O << endMarkup();
   }
 }
 
 void X86ATTInstPrinter::printMemReference(const MCInst *MI, unsigned Op,
                                           raw_ostream &O) {
   const MCOperand &BaseReg = MI->getOperand(Op + X86::AddrBaseReg);
   const MCOperand &IndexReg = MI->getOperand(Op + X86::AddrIndexReg);
   const MCOperand &DispSpec = MI->getOperand(Op + X86::AddrDisp);
 
-  O << markup("<mem:");
+  O << startMarkup(MarkupType::Mem);
 
   // If this has a segment register, print it.
   printOptionalSegReg(MI, Op + X86::AddrSegmentReg, O);
 
   if (DispSpec.isImm()) {
     int64_t DispVal = DispSpec.getImm();
     if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg()))
       O << formatImm(DispVal);
   } else {
     assert(DispSpec.isExpr() && "non-immediate displacement for LEA?");
     DispSpec.getExpr()->print(O, &MAI);
   }
 
   if (IndexReg.getReg() || BaseReg.getReg()) {
     O << '(';
     if (BaseReg.getReg())
       printOperand(MI, Op + X86::AddrBaseReg, O);
 
     if (IndexReg.getReg()) {
       O << ',';
       printOperand(MI, Op + X86::AddrIndexReg, O);
       unsigned ScaleVal = MI->getOperand(Op + X86::AddrScaleAmt).getImm();
       if (ScaleVal != 1) {
-        O << ',' << markup("<imm:") << ScaleVal // never printed in hex.
-          << markup(">");
+        O << ',' << startMarkup(MarkupType::Imm)
+          << ScaleVal // never printed in hex.
+          << endMarkup();
       }
     }
     O << ')';
   }
 
-  O << markup(">");
+  O << endMarkup();
 }
 
 void X86ATTInstPrinter::printSrcIdx(const MCInst *MI, unsigned Op,
                                     raw_ostream &O) {
-  O << markup("<mem:");
+  O << startMarkup(MarkupType::Mem);
 
   // If this has a segment register, print it.
   printOptionalSegReg(MI, Op + 1, O);
 
   O << "(";
   printOperand(MI, Op, O);
   O << ")";
 
-  O << markup(">");
+  O << endMarkup();
 }
 
 void X86ATTInstPrinter::printDstIdx(const MCInst *MI, unsigned Op,
                                     raw_ostream &O) {
-  O << markup("<mem:");
+  O << startMarkup(MarkupType::Mem);
 
   O << "%es:(";
   printOperand(MI, Op, O);
   O << ")";
 
-  O << markup(">");
+  O << endMarkup();
 }
 
 void X86ATTInstPrinter::printMemOffset(const MCInst *MI, unsigned Op,
                                        raw_ostream &O) {
   const MCOperand &DispSpec = MI->getOperand(Op);
 
-  O << markup("<mem:");
+  O << startMarkup(MarkupType::Mem);
 
   // If this has a segment register, print it.
   printOptionalSegReg(MI, Op + 1, O);
 
   if (DispSpec.isImm()) {
     O << formatImm(DispSpec.getImm());
   } else {
     assert(DispSpec.isExpr() && "non-immediate displacement?");
     DispSpec.getExpr()->print(O, &MAI);
   }
 
-  O << markup(">");
+  O << endMarkup();
 }
 
 void X86ATTInstPrinter::printU8Imm(const MCInst *MI, unsigned Op,
                                    raw_ostream &O) {
   if (MI->getOperand(Op).isExpr())
     return printOperand(MI, Op, O);
 
-  O << markup("<imm:") << '$' << formatImm(MI->getOperand(Op).getImm() & 0xff)
-    << markup(">");
+  O << startMarkup(MarkupType::Imm) << '$'
+    << formatImm(MI->getOperand(Op).getImm() & 0xff) << endMarkup();
 }
 
 void X86ATTInstPrinter::printSTiRegOperand(const MCInst *MI, unsigned OpNo,
                                            raw_ostream &OS) {
   const MCOperand &Op = MI->getOperand(OpNo);
   unsigned Reg = Op.getReg();
   // Override the default printing to print st(0) instead st.
   if (Reg == X86::ST0)
-    OS << markup("<reg:") << "%st(0)" << markup(">");
+    OS << startMarkup(MarkupType::Reg) << "%st(0)" << endMarkup();
   else
-    printRegName(OS, Reg);
+    printMarkedUpRegName(OS, Reg);
 }

llvm/tools/llvm-objdump/llvm-objdump.cpp

static cl::alias UnwindInfoShort("u", cl::desc("Alias for --unwind-info"),
                                  cl::NotHidden, cl::Grouping,
                                  cl::aliasopt(UnwindInfo));
 
 static cl::opt<bool>
     Wide("wide", cl::desc("Ignored for compatibility with GNU objdump"),
          cl::cat(ObjdumpCat));
 static cl::alias WideShort("w", cl::Grouping, cl::aliasopt(Wide));
 
+static cl::opt<bool> Highlight("highlight",
+                               cl::desc("Enable syntax highlighting"),
+                               cl::cat(ObjdumpCat));
+
 static cl::extrahelp
     HelpResponse("\nPass @FILE as argument to read options from FILE.\n");
 
 static StringSet<> DisasmFuncsSet;
 static StringSet<> FoundSectionSet;
 static StringRef ToolName;
 
 typedef std::vector<std::tuple<uint64_t, StringRef, uint8_t>> SectionSymbolsTy;

 
 class PrettyPrinter {
 public:
   virtual ~PrettyPrinter() = default;
   virtual void printInst(MCInstPrinter &IP, const MCInst *MI,
                          ArrayRef<uint8_t> Bytes,
                          object::SectionedAddress Address, raw_ostream &OS,
                          StringRef Annot, MCSubtargetInfo const &STI,
-                         SourcePrinter *SP,
+                         SourcePrinter *SP, size_t &HeaderLength,
                          std::vector<RelocationRef> *Rels = nullptr) {
+    uint64_t BeforeOffset = OS.tell();
     if (SP && (PrintSource || PrintLines))
       SP->printSourceLine(OS, Address);
 
     {
       formatted_raw_ostream FOS(OS);
       if (!NoLeadingAddr)
         FOS << format("%8" PRIx64 ":", Address.Address);
       if (!NoShowRawInsn) {
         FOS << ' ';
         dumpBytes(Bytes, FOS);
       }
       FOS.flush();
       // The output of printInst starts with a tab. Print some spaces so that
       // the tab has 1 column and advances to the target tab stop.
       unsigned TabStop = NoShowRawInsn ? 16 : 40;
       unsigned Column = FOS.getColumn();
       FOS.indent(Column < TabStop - 1 ? TabStop - 1 - Column : 7 - Column % 8);
 
       // The dtor calls flush() to ensure the indent comes before printInst().
     }
 
+    HeaderLength = OS.tell() - BeforeOffset;
     if (MI)
       IP.printInst(MI, OS, "", STI);
     else
       OS << "\t<unknown>";
   }
 };
 PrettyPrinter PrettyPrinterInst;
 
if (!NoShowRawInsn) {
       OS << "\t";
       dumpBytes(Bytes.slice(0, 4), OS);
       OS << format("\t%08" PRIx32, opcode);
     }
   }
   void printInst(MCInstPrinter &IP, const MCInst *MI, ArrayRef<uint8_t> Bytes,
                  object::SectionedAddress Address, raw_ostream &OS,
                  StringRef Annot, MCSubtargetInfo const &STI, SourcePrinter *SP,
+                 size_t &HeaderLength,
                  std::vector<RelocationRef> *Rels) override {
+    size_t StartOffset = OS.tell();
     if (SP && (PrintSource || PrintLines))
       SP->printSourceLine(OS, Address, "");
     if (!MI) {
       printLead(Bytes, Address.Address, OS);
       OS << " <unknown>";
       return;
     }
+
+    HeaderLength = OS.tell() - StartOffset;
     std::string Buffer;
     {
       raw_string_ostream TempStream(Buffer);
       IP.printInst(MI, TempStream, "", STI);
     }
     StringRef Contents(Buffer);
     // Split off bundle attributes
     auto PacketBundle = Contents.rsplit('\n');

 };
 HexagonPrettyPrinter HexagonPrettyPrinterInst;
 
 class AMDGCNPrettyPrinter : public PrettyPrinter {
 public:
   void printInst(MCInstPrinter &IP, const MCInst *MI, ArrayRef<uint8_t> Bytes,
                  object::SectionedAddress Address, raw_ostream &OS,
                  StringRef Annot, MCSubtargetInfo const &STI, SourcePrinter *SP,
+                 size_t &HeaderLength,
                  std::vector<RelocationRef> *Rels) override {
+    size_t StartOffset = OS.tell();
     if (SP && (PrintSource || PrintLines))
       SP->printSourceLine(OS, Address);
 
     if (MI) {
       SmallString<40> InstStr;
       raw_svector_ostream IS(InstStr);
 
+      HeaderLength = OS.tell() - StartOffset;
       IP.printInst(MI, IS, "", STI);
 
       OS << left_justify(IS.str(), 60);
     } else {
       // an unrecognized encoding - this is probably data so represent it
       // using the .long directive, or .byte directive if fewer than 4 bytes
       // remaining
       if (Bytes.size() >= 4) {

 };
 AMDGCNPrettyPrinter AMDGCNPrettyPrinterInst;
 
 class BPFPrettyPrinter : public PrettyPrinter {
 public:
   void printInst(MCInstPrinter &IP, const MCInst *MI, ArrayRef<uint8_t> Bytes,
                  object::SectionedAddress Address, raw_ostream &OS,
                  StringRef Annot, MCSubtargetInfo const &STI, SourcePrinter *SP,
+                 size_t &HeaderLength,
                  std::vector<RelocationRef> *Rels) override {
+    size_t StartOffset = OS.tell();
     if (SP && (PrintSource || PrintLines))
       SP->printSourceLine(OS, Address);
     if (!NoLeadingAddr)
       OS << format("%8" PRId64 ":", Address.Address / 8);
     if (!NoShowRawInsn) {
       OS << "\t";
       dumpBytes(Bytes, OS);
     }
+    HeaderLength = OS.tell() - StartOffset;
     if (MI)
       IP.printInst(MI, OS, "", STI);
     else
       OS << "\t<unknown>";
   }
 };
 BPFPrettyPrinter BPFPrettyPrinterInst;
 
if (NumBytes == 8) {
       outs() << std::string(IndentOffset, ' ') << "         ";
       outs() << reinterpret_cast<char *>(AsciiData);
       outs() << '\n';
       NumBytes = 0;
     }
   }
 }
 
+static void printMarkupSpans(StringRef Text,
+                             const std::vector<MarkupSpan> &Spans,
+                             size_t &NextPos) {
+  for (const MarkupSpan &Span : Spans) {
+    StringRef BeforeText = Text.substr(NextPos, Span.Pos - NextPos);
+    outs() << BeforeText;
+
+    if (Span.InnerSpans->empty()) {
+      switch (Span.Type)  {
+      case MarkupType::Reg:
+        outs().changeColor(raw_ostream::BLUE);
+        break;
+      case MarkupType::Imm:
+        outs().changeColor(raw_ostream::RED);
+        break;
+      default:
+        // Do nothing.
+        break;
+      }
+
+      StringRef InnerText = Text.substr(Span.InnerPos, Span.InnerLength);
+      outs() << InnerText;
+      outs().resetColor();
+    } else {
+      NextPos = Span.InnerPos;
+      printMarkupSpans(Text, *Span.InnerSpans, NextPos);
+      StringRef AfterText =
+          Text.substr(NextPos, Span.InnerLength - (NextPos - Span.InnerPos));
+      outs() << AfterText;
+    }
+
+    NextPos = Span.Pos + Span.Length;
+  }
+}
+
+static void printMarkedUpInst(StringRef Text,
+                              const std::vector<MarkupSpan> &Spans,
+                              size_t HeaderLength) {
+  if (!Highlight) {
+    outs() << Text;
+    return;
+  }
+
+  // Print hexdump, etc.
+  outs() << Text.slice(0, HeaderLength);
+
+  StringRef Disasm = Text.slice(HeaderLength, Text.size());
+  size_t NextPos = 0;
+  printMarkupSpans(Disasm, Spans, NextPos);
+
+  // Print the remaining part.
+  outs() << Disasm.substr(NextPos);
+}
+
 static void disassembleObject(const Target *TheTarget, const ObjectFile *Obj,
                               MCContext &Ctx, MCDisassembler *PrimaryDisAsm,
                               MCDisassembler *SecondaryDisAsm,
                               const MCInstrAnalysis *MIA, MCInstPrinter *IP,
                               const MCSubtargetInfo *PrimarySTI,
                               const MCSubtargetInfo *SecondarySTI,
-                              PrettyPrinter &PIP,
-                              SourcePrinter &SP, bool InlineRelocs) {
+                              PrettyPrinter &PIP, SourcePrinter &SP,
+                              bool InlineRelocs) {
   const MCSubtargetInfo *STI = PrimarySTI;
   MCDisassembler *DisAsm = PrimaryDisAsm;
   bool PrimaryIsThumb = false;
   if (isArmElf(Obj))
     PrimaryIsThumb = STI->checkFeatures("+thumb-mode");
 
   std::map<SectionRef, std::vector<RelocationRef>> RelocMap;
   if (InlineRelocs)
if (Symbols.empty() || std::get<0>(Symbols[0]) != 0) {
           Symbols.begin(),
           std::make_tuple(SectionAddr, SectionName,
                           Section.isText() ? ELF::STT_FUNC : ELF::STT_OBJECT));
     }
 
     SmallString<40> Comments;
     raw_svector_ostream CommentStream(Comments);
 
+    std::vector<MarkupSpan> MarkupSpans;
+    IP->setMarkupSpans(MarkupSpans);
+
     ArrayRef<uint8_t> Bytes = arrayRefFromStringRef(
         unwrapOrError(Section.getContents(), Obj->getFileName()));
 
     uint64_t VMAAdjustment = 0;
     if (shouldAdjustVA(Section))
       VMAAdjustment = AdjustVMA;
 
     uint64_t Size;
#endif
         // provided
         MCInst Inst;
         bool Disassembled = DisAsm->getInstruction(
             Inst, Size, Bytes.slice(Index), SectionAddr + Index, DebugOut,
             CommentStream);
         if (Size == 0)
           Size = 1;
 
-        PIP.printInst(
-            *IP, Disassembled ? &Inst : nullptr, Bytes.slice(Index, Size),
-            {SectionAddr + Index + VMAAdjustment, Section.getIndex()}, outs(),
-            "", *STI, &SP, &Rels);
+        std::string InstText;
+        raw_string_ostream InstTextStream(InstText);
+        size_t HeaderLength;
+        PIP.printInst(*IP, Disassembled ? &Inst : nullptr,
+                      Bytes.slice(Index, Size),
+                      {SectionAddr + Index + VMAAdjustment, Section.getIndex()},
+                      InstTextStream, "", *STI, &SP, HeaderLength, &Rels);
+        printMarkedUpInst(StringRef(InstTextStream.str()), MarkupSpans,
+                          HeaderLength);
         outs() << CommentStream.str();
         Comments.clear();
+        MarkupSpans.clear();
 
         // Try to resolve the target of a call, tail call, etc. to a specific
         // symbol.
         if (MIA && (MIA->isCall(Inst) || MIA->isUnconditionalBranch(Inst) ||
                     MIA->isConditionalBranch(Inst))) {
           uint64_t Target;
           if (MIA->evaluateBranch(Inst, SectionAddr + Index, Size, Target)) {
             // In a relocatable object, the target's section must reside in
#endif
                   [=](const std::tuple<uint64_t, StringRef, uint8_t> &O) {
                     return std::get<0>(O) <= Target;
                   });
             }
             if (TargetSym != TargetSectionSymbols->begin()) {
               --TargetSym;
               uint64_t TargetAddress = std::get<0>(*TargetSym);
               StringRef TargetName = std::get<1>(*TargetSym);
+              if (Highlight)
+                outs().changeColor(raw_ostream::YELLOW, true);
+
               outs() << " <" << TargetName;
               uint64_t Disp = Target - TargetAddress;
               if (Disp)
                 outs() << "+0x" << Twine::utohexstr(Disp);
               outs() << '>';
+
+              if (Highlight)
+                outs().resetColor();
             }
           }
         }
         outs() << "\n";
 
         // Hexagon does this in pretty printer
         if (Obj->getArch() != Triple::hexagon) {
           // Print relocation for instruction.
static void disassembleObject(const ObjectFile *Obj, bool InlineRelocs) {
 
   int AsmPrinterVariant = AsmInfo->getAssemblerDialect();
   std::unique_ptr<MCInstPrinter> IP(TheTarget->createMCInstPrinter(
       Triple(TripleName), AsmPrinterVariant, *AsmInfo, *MII, *MRI));
   if (!IP)
     report_error(Obj->getFileName(),
                  "no instruction printer for target " + TripleName);
   IP->setPrintImmHex(PrintImmHex);
+  IP->setUseMarkup(Highlight);
 
   PrettyPrinter &PIP = selectPrettyPrinter(Triple(TripleName));
   SourcePrinter SP(Obj, TheTarget->getName());
 
   for (StringRef Opt : DisassemblerOptions)
     if (!IP->applyTargetSpecificCLOption(Opt))
       error("Unrecognized disassembler option: " + Opt);