Index: lib/Analysis/InstructionSimplify.cpp =================================================================== --- lib/Analysis/InstructionSimplify.cpp +++ lib/Analysis/InstructionSimplify.cpp @@ -69,6 +69,39 @@ static Value *SimplifyGEPInst(Type *, ArrayRef, const SimplifyQuery &, unsigned); +/// We want to turn: +/// (select (icmp sgt x, C), lshr (X, Y), ashr (X, Y)); iff C s>= -1 +/// (select (icmp slt x, C), ashr (X, Y), lshr (X, Y)); iff C s>= 0 +/// into: +/// ashr (X, Y) +/// If either the `ashr` is non-`exact`, or `lshr` is exact too, +/// then we can just return the `ashr` instruction. +static Value *foldSelectICmpLshrAshr(const ICmpInst::Predicate Pred, + const Value *CmpLHS, const Value *CmpRHS, + Value *TrueVal, Value *FalseVal) { + Value *X, *Y; + const APInt *C; + if ((Pred != ICmpInst::ICMP_SGT || !match(CmpRHS, m_APInt(C)) || + !C->sge(-1)) && + (Pred != ICmpInst::ICMP_SLT || !match(CmpRHS, m_APInt(C)) || !C->sge(0))) + return nullptr; + + // Canonicalize so that `ashr` is in FalseVal. + if (Pred == ICmpInst::ICMP_SLT) + std::swap(TrueVal, FalseVal); + + if (match(TrueVal, m_LShr(m_Value(X), m_Value(Y))) && + match(FalseVal, m_AShr(m_Specific(X), m_Specific(Y))) && + match(CmpLHS, m_Specific(X))) { + bool OnlyAshrIsExact = !cast(TrueVal)->isExact() && + cast(FalseVal)->isExact(); + if (!OnlyAshrIsExact) + return FalseVal; + } + + return nullptr; +} + static Value *foldSelectWithBinaryOp(Value *Cond, Value *TrueVal, Value *FalseVal) { BinaryOperator::BinaryOps BinOpCode; @@ -3761,6 +3794,10 @@ return TrueVal; } + if (Value *V = + foldSelectICmpLshrAshr(Pred, CmpLHS, CmpRHS, TrueVal, FalseVal)) + return V; + return nullptr; } Index: lib/Transforms/InstCombine/InstCombineSelect.cpp =================================================================== --- lib/Transforms/InstCombine/InstCombineSelect.cpp +++ lib/Transforms/InstCombine/InstCombineSelect.cpp @@ -532,6 +532,45 @@ } /// We want to turn: +/// (select (icmp sgt x, C), lshr (X, Y), ashr (X, Y)); iff C s>= -1 +/// (select (icmp slt x, C), ashr (X, Y), lshr (X, Y)); iff C s>= 0 +/// into: +/// ashr (X, Y) +/// It is assumed that InstSimplify has already run. +static Value *foldSelectICmpLshrAshr(const ICmpInst *IC, Value *TrueVal, + Value *FalseVal, + InstCombiner::BuilderTy &Builder) { + ICmpInst::Predicate Pred = IC->getPredicate(); + Value *CmpLHS = IC->getOperand(0); + Value *CmpRHS = IC->getOperand(1); + + Value *X, *Y; + const APInt *C; + if ((Pred != ICmpInst::ICMP_SGT || !match(CmpRHS, m_APInt(C)) || + !C->sge(-1)) && + (Pred != ICmpInst::ICMP_SLT || !match(CmpRHS, m_APInt(C)) || !C->sge(0))) + return nullptr; + + // Canonicalize so that `ashr` is in FalseVal. + if (Pred == ICmpInst::ICMP_SLT) + std::swap(TrueVal, FalseVal); + + if (match(TrueVal, m_LShr(m_Value(X), m_Value(Y))) && + match(FalseVal, m_AShr(m_Specific(X), m_Specific(Y))) && + match(CmpLHS, m_Specific(X))) { + const auto *Ashr = dyn_cast(FalseVal); + if (!cast(TrueVal)->isExact() && Ashr->isExact()) { + // This new ashr must not be exact. + return Builder.CreateAShr(Ashr->getOperand(0), Ashr->getOperand(1), + Ashr->getName(), + /*isExact=*/false); + } + } + + return nullptr; +} + +/// We want to turn: /// (select (icmp eq (and X, C1), 0), Y, (or Y, C2)) /// into: /// (or (shl (and X, C1), C3), Y) @@ -1112,6 +1151,9 @@ if (Value *V = foldSelectICmpAndOr(ICI, TrueVal, FalseVal, Builder)) return replaceInstUsesWith(SI, V); + if (Value *V = foldSelectICmpLshrAshr(ICI, TrueVal, FalseVal, Builder)) + return replaceInstUsesWith(SI, V); + if (Value *V = foldSelectCttzCtlz(ICI, TrueVal, FalseVal, Builder)) return replaceInstUsesWith(SI, V); Index: test/Transforms/InstCombine/ashr-lshr.ll =================================================================== --- test/Transforms/InstCombine/ashr-lshr.ll +++ test/Transforms/InstCombine/ashr-lshr.ll @@ -3,11 +3,8 @@ define i32 @ashr_lshr(i32 %x, i32 %y) { ; CHECK-LABEL: @ashr_lshr( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], -1 -; CHECK-NEXT: [[L:%.*]] = lshr i32 [[X]], [[Y:%.*]] -; CHECK-NEXT: [[R:%.*]] = ashr exact i32 [[X]], [[Y]] -; CHECK-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 [[L]], i32 [[R]] -; CHECK-NEXT: ret i32 [[RET]] +; CHECK-NEXT: [[R1:%.*]] = ashr i32 [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: ret i32 [[R1]] ; %cmp = icmp sgt i32 %x, -1 %l = lshr i32 %x, %y @@ -18,11 +15,8 @@ define i32 @ashr_lshr2(i32 %x, i32 %y) { ; CHECK-LABEL: @ashr_lshr2( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], 5 -; CHECK-NEXT: [[L:%.*]] = lshr i32 [[X]], [[Y:%.*]] -; CHECK-NEXT: [[R:%.*]] = ashr exact i32 [[X]], [[Y]] -; CHECK-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 [[L]], i32 [[R]] -; CHECK-NEXT: ret i32 [[RET]] +; CHECK-NEXT: [[R1:%.*]] = ashr i32 [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: ret i32 [[R1]] ; %cmp = icmp sgt i32 %x, 5 %l = lshr i32 %x, %y @@ -33,11 +27,8 @@ define <2 x i32> @ashr_lshr_vec(<2 x i32> %x, <2 x i32> %y) { ; CHECK-LABEL: @ashr_lshr_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[X:%.*]], -; CHECK-NEXT: [[L:%.*]] = lshr <2 x i32> [[X]], [[Y:%.*]] -; CHECK-NEXT: [[R:%.*]] = ashr exact <2 x i32> [[X]], [[Y]] -; CHECK-NEXT: [[RET:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[L]], <2 x i32> [[R]] -; CHECK-NEXT: ret <2 x i32> [[RET]] +; CHECK-NEXT: [[R1:%.*]] = ashr <2 x i32> [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: ret <2 x i32> [[R1]] ; %cmp = icmp sgt <2 x i32> %x, %l = lshr <2 x i32> %x, %y @@ -48,11 +39,8 @@ define i32 @ashr_lshr_cst(i32 %x, i32 %y) { ; CHECK-LABEL: @ashr_lshr_cst( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 1 -; CHECK-NEXT: [[L:%.*]] = lshr i32 [[X]], 8 -; CHECK-NEXT: [[R:%.*]] = ashr exact i32 [[X]], 8 -; CHECK-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 [[R]], i32 [[L]] -; CHECK-NEXT: ret i32 [[RET]] +; CHECK-NEXT: [[R1:%.*]] = ashr i32 [[X:%.*]], 8 +; CHECK-NEXT: ret i32 [[R1]] ; %cmp = icmp slt i32 %x, 1 %l = lshr i32 %x, 8 @@ -63,11 +51,8 @@ define i32 @ashr_lshr_cst2(i32 %x, i32 %y) { ; CHECK-LABEL: @ashr_lshr_cst2( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], -1 -; CHECK-NEXT: [[L:%.*]] = lshr i32 [[X]], 8 -; CHECK-NEXT: [[R:%.*]] = ashr exact i32 [[X]], 8 -; CHECK-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 [[L]], i32 [[R]] -; CHECK-NEXT: ret i32 [[RET]] +; CHECK-NEXT: [[R1:%.*]] = ashr i32 [[X:%.*]], 8 +; CHECK-NEXT: ret i32 [[R1]] ; %cmp = icmp sgt i32 %x, -1 %l = lshr i32 %x, 8 @@ -78,11 +63,8 @@ define i32 @ashr_lshr_inv(i32 %x, i32 %y) { ; CHECK-LABEL: @ashr_lshr_inv( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 1 -; CHECK-NEXT: [[L:%.*]] = lshr i32 [[X]], [[Y:%.*]] -; CHECK-NEXT: [[R:%.*]] = ashr exact i32 [[X]], [[Y]] -; CHECK-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 [[R]], i32 [[L]] -; CHECK-NEXT: ret i32 [[RET]] +; CHECK-NEXT: [[R1:%.*]] = ashr i32 [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: ret i32 [[R1]] ; %cmp = icmp slt i32 %x, 1 %l = lshr i32 %x, %y @@ -93,11 +75,8 @@ define i32 @ashr_lshr_inv2(i32 %x, i32 %y) { ; CHECK-LABEL: @ashr_lshr_inv2( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 7 -; CHECK-NEXT: [[L:%.*]] = lshr i32 [[X]], [[Y:%.*]] -; CHECK-NEXT: [[R:%.*]] = ashr exact i32 [[X]], [[Y]] -; CHECK-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 [[R]], i32 [[L]] -; CHECK-NEXT: ret i32 [[RET]] +; CHECK-NEXT: [[R1:%.*]] = ashr i32 [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: ret i32 [[R1]] ; %cmp = icmp slt i32 %x, 7 %l = lshr i32 %x, %y @@ -108,11 +87,8 @@ define <2 x i32> @ashr_lshr_inv_vec(<2 x i32> %x, <2 x i32> %y) { ; CHECK-LABEL: @ashr_lshr_inv_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X:%.*]], -; CHECK-NEXT: [[L:%.*]] = lshr <2 x i32> [[X]], [[Y:%.*]] -; CHECK-NEXT: [[R:%.*]] = ashr exact <2 x i32> [[X]], [[Y]] -; CHECK-NEXT: [[RET:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[R]], <2 x i32> [[L]] -; CHECK-NEXT: ret <2 x i32> [[RET]] +; CHECK-NEXT: [[R1:%.*]] = ashr <2 x i32> [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: ret <2 x i32> [[R1]] ; %cmp = icmp slt <2 x i32> %x, %l = lshr <2 x i32> %x, %y @@ -303,52 +279,6 @@ ret <2 x i32> %ret } -define i32 @ashr_lshr_no_exact(i32 %x, i32 %y) { -; CHECK-LABEL: @ashr_lshr_no_exact( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], -1 -; CHECK-NEXT: [[L:%.*]] = lshr i32 [[X]], [[Y:%.*]] -; CHECK-NEXT: [[R:%.*]] = ashr i32 [[X]], [[Y]] -; CHECK-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 [[L]], i32 [[R]] -; CHECK-NEXT: ret i32 [[RET]] -; - %cmp = icmp sgt i32 %x, -1 - %l = lshr i32 %x, %y - %r = ashr i32 %x, %y - %ret = select i1 %cmp, i32 %l, i32 %r - ret i32 %ret -} - - -define i32 @ashr_lshr_exact_both(i32 %x, i32 %y) { -; CHECK-LABEL: @ashr_lshr_exact_both( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], -1 -; CHECK-NEXT: [[L:%.*]] = lshr exact i32 [[X]], [[Y:%.*]] -; CHECK-NEXT: [[R:%.*]] = ashr exact i32 [[X]], [[Y]] -; CHECK-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 [[L]], i32 [[R]] -; CHECK-NEXT: ret i32 [[RET]] -; - %cmp = icmp sgt i32 %x, -1 - %l = lshr exact i32 %x, %y - %r = ashr exact i32 %x, %y - %ret = select i1 %cmp, i32 %l, i32 %r - ret i32 %ret -} - -define i32 @ashr_lshr_exact_mismatch2(i32 %x, i32 %y) { -; CHECK-LABEL: @ashr_lshr_exact_mismatch2( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], -1 -; CHECK-NEXT: [[L:%.*]] = lshr exact i32 [[X]], [[Y:%.*]] -; CHECK-NEXT: [[R:%.*]] = ashr i32 [[X]], [[Y]] -; CHECK-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 [[L]], i32 [[R]] -; CHECK-NEXT: ret i32 [[RET]] -; - %cmp = icmp sgt i32 %x, -1 - %l = lshr exact i32 %x, %y - %r = ashr i32 %x, %y - %ret = select i1 %cmp, i32 %l, i32 %r - ret i32 %ret -} - define <2 x i32> @ashr_lshr_vec_undef(<2 x i32> %x, <2 x i32> %y) { ; CHECK-LABEL: @ashr_lshr_vec_undef( ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[X:%.*]], @@ -378,3 +308,42 @@ %ret = select <2 x i1> %cmp, <2 x i32> %r, <2 x i32> %l ret <2 x i32> %ret } + +; Simplified by InstSimplify + +define i32 @ashr_lshr_no_exact(i32 %x, i32 %y) { +; CHECK-LABEL: @ashr_lshr_no_exact( +; CHECK-NEXT: [[R:%.*]] = ashr i32 [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: ret i32 [[R]] +; + %cmp = icmp sgt i32 %x, -1 + %l = lshr i32 %x, %y + %r = ashr i32 %x, %y + %ret = select i1 %cmp, i32 %l, i32 %r + ret i32 %ret +} + + +define i32 @ashr_lshr_exact_both(i32 %x, i32 %y) { +; CHECK-LABEL: @ashr_lshr_exact_both( +; CHECK-NEXT: [[R:%.*]] = ashr exact i32 [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: ret i32 [[R]] +; + %cmp = icmp sgt i32 %x, -1 + %l = lshr exact i32 %x, %y + %r = ashr exact i32 %x, %y + %ret = select i1 %cmp, i32 %l, i32 %r + ret i32 %ret +} + +define i32 @ashr_lshr_exact_lshr_only(i32 %x, i32 %y) { +; CHECK-LABEL: @ashr_lshr_exact_lshr_only( +; CHECK-NEXT: [[R:%.*]] = ashr i32 [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: ret i32 [[R]] +; + %cmp = icmp sgt i32 %x, -1 + %l = lshr exact i32 %x, %y + %r = ashr i32 %x, %y + %ret = select i1 %cmp, i32 %l, i32 %r + ret i32 %ret +} Index: test/Transforms/InstSimplify/ashr-lshr.ll =================================================================== --- test/Transforms/InstSimplify/ashr-lshr.ll +++ test/Transforms/InstSimplify/ashr-lshr.ll @@ -3,11 +3,8 @@ define i32 @ashr_lshr(i32 %x, i32 %y) { ; CHECK-LABEL: @ashr_lshr( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], -1 -; CHECK-NEXT: [[L:%.*]] = lshr i32 [[X]], [[Y:%.*]] -; CHECK-NEXT: [[R:%.*]] = ashr i32 [[X]], [[Y]] -; CHECK-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 [[L]], i32 [[R]] -; CHECK-NEXT: ret i32 [[RET]] +; CHECK-NEXT: [[R:%.*]] = ashr i32 [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: ret i32 [[R]] ; %cmp = icmp sgt i32 %x, -1 %l = lshr i32 %x, %y @@ -18,11 +15,8 @@ define i32 @ashr_lshr2(i32 %x, i32 %y) { ; CHECK-LABEL: @ashr_lshr2( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], 8 -; CHECK-NEXT: [[L:%.*]] = lshr i32 [[X]], [[Y:%.*]] -; CHECK-NEXT: [[R:%.*]] = ashr i32 [[X]], [[Y]] -; CHECK-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 [[L]], i32 [[R]] -; CHECK-NEXT: ret i32 [[RET]] +; CHECK-NEXT: [[R:%.*]] = ashr i32 [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: ret i32 [[R]] ; %cmp = icmp sgt i32 %x, 8 %l = lshr i32 %x, %y @@ -33,11 +27,8 @@ define i32 @ashr_lshr_exact_both(i32 %x, i32 %y) { ; CHECK-LABEL: @ashr_lshr_exact_both( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], -1 -; CHECK-NEXT: [[L:%.*]] = lshr exact i32 [[X]], [[Y:%.*]] -; CHECK-NEXT: [[R:%.*]] = ashr exact i32 [[X]], [[Y]] -; CHECK-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 [[L]], i32 [[R]] -; CHECK-NEXT: ret i32 [[RET]] +; CHECK-NEXT: [[R:%.*]] = ashr exact i32 [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: ret i32 [[R]] ; %cmp = icmp sgt i32 %x, -1 %l = lshr exact i32 %x, %y @@ -48,11 +39,8 @@ define i32 @ashr_lshr_exact_lshr_only(i32 %x, i32 %y) { ; CHECK-LABEL: @ashr_lshr_exact_lshr_only( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], -1 -; CHECK-NEXT: [[L:%.*]] = lshr exact i32 [[X]], [[Y:%.*]] -; CHECK-NEXT: [[R:%.*]] = ashr i32 [[X]], [[Y]] -; CHECK-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 [[L]], i32 [[R]] -; CHECK-NEXT: ret i32 [[RET]] +; CHECK-NEXT: [[R:%.*]] = ashr i32 [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: ret i32 [[R]] ; %cmp = icmp sgt i32 %x, -1 %l = lshr exact i32 %x, %y @@ -63,11 +51,8 @@ define <2 x i32> @ashr_lshr_vec(<2 x i32> %x, <2 x i32> %y) { ; CHECK-LABEL: @ashr_lshr_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[X:%.*]], -; CHECK-NEXT: [[L:%.*]] = lshr <2 x i32> [[X]], [[Y:%.*]] -; CHECK-NEXT: [[R:%.*]] = ashr <2 x i32> [[X]], [[Y]] -; CHECK-NEXT: [[RET:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[L]], <2 x i32> [[R]] -; CHECK-NEXT: ret <2 x i32> [[RET]] +; CHECK-NEXT: [[R:%.*]] = ashr <2 x i32> [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: ret <2 x i32> [[R]] ; %cmp = icmp sgt <2 x i32> %x, %l = lshr <2 x i32> %x, %y @@ -78,11 +63,8 @@ define <2 x i32> @ashr_lshr_vec2(<2 x i32> %x, <2 x i32> %y) { ; CHECK-LABEL: @ashr_lshr_vec2( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[X:%.*]], -; CHECK-NEXT: [[L:%.*]] = lshr exact <2 x i32> [[X]], [[Y:%.*]] -; CHECK-NEXT: [[R:%.*]] = ashr exact <2 x i32> [[X]], [[Y]] -; CHECK-NEXT: [[RET:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[L]], <2 x i32> [[R]] -; CHECK-NEXT: ret <2 x i32> [[RET]] +; CHECK-NEXT: [[R:%.*]] = ashr exact <2 x i32> [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: ret <2 x i32> [[R]] ; %cmp = icmp sgt <2 x i32> %x, %l = lshr exact <2 x i32> %x, %y @@ -93,11 +75,8 @@ define <2 x i32> @ashr_lshr_vec3(<2 x i32> %x, <2 x i32> %y) { ; CHECK-LABEL: @ashr_lshr_vec3( -; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[X:%.*]], -; CHECK-NEXT: [[L:%.*]] = lshr exact <2 x i32> [[X]], [[Y:%.*]] -; CHECK-NEXT: [[R:%.*]] = ashr <2 x i32> [[X]], [[Y]] -; CHECK-NEXT: [[RET:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[L]], <2 x i32> [[R]] -; CHECK-NEXT: ret <2 x i32> [[RET]] +; CHECK-NEXT: [[R:%.*]] = ashr <2 x i32> [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: ret <2 x i32> [[R]] ; %cmp = icmp sgt <2 x i32> %x, %l = lshr exact <2 x i32> %x, %y @@ -108,11 +87,8 @@ define i32 @ashr_lshr_inv(i32 %x, i32 %y) { ; CHECK-LABEL: @ashr_lshr_inv( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 1 -; CHECK-NEXT: [[L:%.*]] = lshr i32 [[X]], [[Y:%.*]] -; CHECK-NEXT: [[R:%.*]] = ashr i32 [[X]], [[Y]] -; CHECK-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 [[R]], i32 [[L]] -; CHECK-NEXT: ret i32 [[RET]] +; CHECK-NEXT: [[R:%.*]] = ashr i32 [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: ret i32 [[R]] ; %cmp = icmp slt i32 %x, 1 %l = lshr i32 %x, %y @@ -123,11 +99,8 @@ define i32 @ashr_lshr_inv2(i32 %x, i32 %y) { ; CHECK-LABEL: @ashr_lshr_inv2( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 5 -; CHECK-NEXT: [[L:%.*]] = lshr i32 [[X]], [[Y:%.*]] -; CHECK-NEXT: [[R:%.*]] = ashr i32 [[X]], [[Y]] -; CHECK-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 [[R]], i32 [[L]] -; CHECK-NEXT: ret i32 [[RET]] +; CHECK-NEXT: [[R:%.*]] = ashr i32 [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: ret i32 [[R]] ; %cmp = icmp slt i32 %x, 5 %l = lshr i32 %x, %y @@ -138,11 +111,8 @@ define <2 x i32> @ashr_lshr_inv_vec(<2 x i32> %x, <2 x i32> %y) { ; CHECK-LABEL: @ashr_lshr_inv_vec( -; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X:%.*]], -; CHECK-NEXT: [[L:%.*]] = lshr <2 x i32> [[X]], [[Y:%.*]] -; CHECK-NEXT: [[R:%.*]] = ashr <2 x i32> [[X]], [[Y]] -; CHECK-NEXT: [[RET:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[R]], <2 x i32> [[L]] -; CHECK-NEXT: ret <2 x i32> [[RET]] +; CHECK-NEXT: [[R:%.*]] = ashr <2 x i32> [[X:%.*]], [[Y:%.*]] +; CHECK-NEXT: ret <2 x i32> [[R]] ; %cmp = icmp slt <2 x i32> %x, %l = lshr <2 x i32> %x, %y