Index: lib/CodeGen/MachineVerifier.cpp
===================================================================
--- lib/CodeGen/MachineVerifier.cpp
+++ lib/CodeGen/MachineVerifier.cpp
@@ -1176,6 +1176,10 @@
     LLT SrcTy = MRI->getType(MI->getOperand(1).getReg());
     if (DstTy.isVector() || SrcTy.isVector())
       report("G_MERGE_VALUES cannot operate on vectors", MI);
+
+    if (DstTy.getSizeInBits() !=
+        SrcTy.getSizeInBits() * (MI->getNumOperands() - 1))
+      report("G_MERGE_VALUES result size is inconsistent", MI);
     break;
   }
   case TargetOpcode::G_UNMERGE_VALUES: {
Index: test/MachineVerifier/test_g_merge_values.mir
===================================================================
--- /dev/null
+++ test/MachineVerifier/test_g_merge_values.mir
@@ -0,0 +1,23 @@
+# RUN: not llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+# REQUIRES: aarch64-registered-target
+---
+name:            g_merge_values
+tracksRegLiveness: true
+liveins:
+body:             |
+  bb.0:
+    %0:_(s32) = IMPLICIT_DEF
+    %1:_(s32) = IMPLICIT_DEF
+    %2:_(<2 x s32>) = IMPLICIT_DEF
+    %3:_(<2 x s32>) = IMPLICIT_DEF
+
+    ; CHECK: Bad machine code: G_MERGE_VALUES cannot operate on vectors
+    %4:_(<4 x s32>) = G_MERGE_VALUES %2, %3
+
+    ; CHECK: Bad machine code: G_MERGE_VALUES result size is inconsistent
+    %5:_(s64) = G_MERGE_VALUES %0
+
+    ; CHECK: Bad machine code: G_MERGE_VALUES result size is inconsistent
+    %6:_(s64) = G_MERGE_VALUES %0, %1, %1
+
+...