Index: llvm/test/CodeGen/ARM/ldst-f32-2-i32.ll =================================================================== --- llvm/test/CodeGen/ARM/ldst-f32-2-i32.ll +++ llvm/test/CodeGen/ARM/ldst-f32-2-i32.ll @@ -1,17 +1,28 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=armv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s ; Check if the f32 load / store pair are optimized to i32 load / store. ; rdar://8944252 define void @t(i32 %width, float* nocapture %src, float* nocapture %dst, i32 %index) nounwind { ; CHECK-LABEL: t: +; CHECK: +; CHECK-NEXT: @ %bb.0: @ %entry +; CHECK-NEXT: cmp r0, #0 +; CHECK-NEXT: bxeq lr +; CHECK-NEXT: LBB0_1: @ %bb +; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 +; CHECK-NEXT: ldr r9, [r1], r3 +; CHECK-NEXT: subs r0, r0, #1 +; CHECK-NEXT: str r9, [r2], #4 +; CHECK-NEXT: bne LBB0_1 +; CHECK-NEXT: @ %bb.2: @ %return +; CHECK-NEXT: bx lr entry: %src6 = bitcast float* %src to i8* %0 = icmp eq i32 %width, 0 br i1 %0, label %return, label %bb bb: -; CHECK: ldr [[REGISTER:(r[0-9]+)]], [{{r[0-9]+}}], {{r[0-9]+}} -; CHECK: str [[REGISTER]], [{{r[0-9]+}}], #4 %j.05 = phi i32 [ %2, %bb ], [ 0, %entry ] %tmp = mul i32 %j.05, %index %uglygep = getelementptr i8, i8* %src6, i32 %tmp Index: llvm/utils/UpdateTestChecks/asm.py =================================================================== --- llvm/utils/UpdateTestChecks/asm.py +++ llvm/utils/UpdateTestChecks/asm.py @@ -104,6 +104,14 @@ r'^[ \t]*;[ \t]--[ \t]End[ \t]function', flags=(re.M | re.S)) +ASM_FUNCTION_ARM_DARWIN_RE = re.compile( + r'^[ \t]*\.globl[ \t]*_(?P[^ \t])[ \t]*@[ \t]--[ \t]Begin[ \t]function[ \t](?P=func)' + r'(?P.*?)' + r'^_(?P=func):' + r'(?P.*?)' + r'^[ \t]*@[ \t]--[ \t]End[ \t]function', + flags=(re.M | re.S )) + ASM_FUNCTION_ARM_MACHO_RE = re.compile( r'^_(?P[^:]+):[ \t]*\n' r'([ \t]*.cfi_startproc\n[ \t]*)?' @@ -301,6 +309,7 @@ 'arm64': (scrub_asm_arm_eabi, ASM_FUNCTION_AARCH64_RE), 'arm64-apple-ios': (scrub_asm_arm_eabi, ASM_FUNCTION_AARCH64_DARWIN_RE), 'armv7-apple-ios' : (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_IOS_RE), + 'armv7-apple-darwin': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_DARWIN_RE), 'thumb': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_RE), 'thumb-macho': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_MACHO_RE), 'thumbv5-macho': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_MACHO_RE),