Index: llvm/trunk/include/llvm/Analysis/VectorUtils.h =================================================================== --- llvm/trunk/include/llvm/Analysis/VectorUtils.h +++ llvm/trunk/include/llvm/Analysis/VectorUtils.h @@ -36,13 +36,12 @@ } /// Identify if the intrinsic is trivially vectorizable. -/// This method returns true if the intrinsic's argument types are all -/// scalars for the scalar form of the intrinsic and all vectors for -/// the vector form of the intrinsic. +/// This method returns true if the intrinsic's argument types are all scalars +/// for the scalar form of the intrinsic and all vectors (or scalars handled by +/// hasVectorInstrinsicScalarOpd) for the vector form of the intrinsic. bool isTriviallyVectorizable(Intrinsic::ID ID); -/// Identifies if the intrinsic has a scalar operand. It checks for -/// ctlz,cttz and powi special intrinsics whose argument is scalar. +/// Identifies if the vector form of the intrinsic has a scalar operand. bool hasVectorInstrinsicScalarOpd(Intrinsic::ID ID, unsigned ScalarOpdIdx); /// Returns intrinsic ID for call. Index: llvm/trunk/lib/Analysis/VectorUtils.cpp =================================================================== --- llvm/trunk/lib/Analysis/VectorUtils.cpp +++ llvm/trunk/lib/Analysis/VectorUtils.cpp @@ -37,8 +37,9 @@ cl::init(8)); /// Return true if all of the intrinsic's arguments and return type are scalars -/// for the scalar form of the intrinsic and vectors for the vector form of the -/// intrinsic. +/// for the scalar form of the intrinsic, and vectors for the vector form of the +/// intrinsic (except operands that are marked as always being scalar by +/// hasVectorInstrinsicScalarOpd). bool llvm::isTriviallyVectorizable(Intrinsic::ID ID) { switch (ID) { case Intrinsic::bswap: // Begin integer bit-manipulation. @@ -53,6 +54,7 @@ case Intrinsic::uadd_sat: case Intrinsic::usub_sat: case Intrinsic::smul_fix: + case Intrinsic::smul_fix_sat: case Intrinsic::umul_fix: case Intrinsic::sqrt: // Begin floating-point. case Intrinsic::sin: @@ -85,8 +87,7 @@ } } -/// Identifies if the intrinsic has a scalar operand. It check for -/// ctlz,cttz and powi special intrinsics whose argument is scalar. +/// Identifies if the vector form of the intrinsic has a scalar operand. bool llvm::hasVectorInstrinsicScalarOpd(Intrinsic::ID ID, unsigned ScalarOpdIdx) { switch (ID) { @@ -95,6 +96,7 @@ case Intrinsic::powi: return (ScalarOpdIdx == 1); case Intrinsic::smul_fix: + case Intrinsic::smul_fix_sat: case Intrinsic::umul_fix: return (ScalarOpdIdx == 2); default: Index: llvm/trunk/test/Transforms/Scalarizer/intrinsics.ll =================================================================== --- llvm/trunk/test/Transforms/Scalarizer/intrinsics.ll +++ llvm/trunk/test/Transforms/Scalarizer/intrinsics.ll @@ -12,7 +12,7 @@ ; Ternary fp declare <2 x float> @llvm.fma.v2f32(<2 x float>, <2 x float>, <2 x float>) -; Binary int +; Unary int declare <2 x i32> @llvm.bswap.v2i32(<2 x i32>) ; Unary int plus constant scalar operand @@ -21,6 +21,10 @@ ; Unary fp plus any scalar operand declare <2 x float> @llvm.powi.v2f32(<2 x float>, i32) +; Binary int plus constant scalar operand +declare <2 x i32> @llvm.smul.fix.sat.v2i32(<2 x i32>, <2 x i32>, i32) + + ; CHECK-LABEL: @scalarize_sqrt_v2f32( ; CHECK: %sqrt.i0 = call float @llvm.sqrt.f32(float %x.i0) ; CHECK: %sqrt.i1 = call float @llvm.sqrt.f32(float %x.i1) @@ -108,3 +112,14 @@ %powi = call <2 x float> @llvm.powi.v2f32(<2 x float> %x, i32 %y) ret <2 x float> %powi } + +; CHECK-LABEL: @scalarize_smul_fix_sat_v2i32( +; CHECK: %smulfixsat.i0 = call i32 @llvm.smul.fix.sat.i32(i32 %x.i0, i32 5, i32 31) +; CHECK: %smulfixsat.i1 = call i32 @llvm.smul.fix.sat.i32(i32 %x.i1, i32 19, i32 31) +; CHECK: %smulfixsat.upto0 = insertelement <2 x i32> undef, i32 %smulfixsat.i0, i32 0 +; CHECK: %smulfixsat = insertelement <2 x i32> %smulfixsat.upto0, i32 %smulfixsat.i1, i32 1 +; CHECK: ret <2 x i32> %smulfixsat +define <2 x i32> @scalarize_smul_fix_sat_v2i32(<2 x i32> %x) #0 { + %smulfixsat = call <2 x i32> @llvm.smul.fix.sat.v2i32(<2 x i32> %x, <2 x i32> , i32 31) + ret <2 x i32> %smulfixsat +}