diff --git a/lib/Transforms/Scalar/LoopStrengthReduce.cpp b/lib/Transforms/Scalar/LoopStrengthReduce.cpp
--- a/lib/Transforms/Scalar/LoopStrengthReduce.cpp
+++ b/lib/Transforms/Scalar/LoopStrengthReduce.cpp
@@ -3254,9 +3254,9 @@
     PostIncLoopSet TmpPostIncLoops = U.getPostIncLoops();
 
     // Equality (== and !=) ICmps are special. We can rewrite (i == N) as
-    // (N - i == 0), and this allows (N - i) to be the expression that we work
-    // with rather than just N or i, so we can consider the register
-    // requirements for both N and i at the same time. Limiting this code to
+    // (i - N == 0), and this allows (i - N) to be the expression that we work
+    // with rather than just i or N, so we can consider the register
+    // requirements for both i and N at the same time. Limiting this code to
     // equality icmps is not a problem because all interesting loops use
     // equality icmps, thanks to IndVarSimplify.
     if (ICmpInst *CI = dyn_cast<ICmpInst>(UserInst))
@@ -3278,7 +3278,7 @@
           // to keep the result normalized.
           N = normalizeForPostIncUse(N, TmpPostIncLoops, SE);
           Kind = LSRUse::ICmpZero;
-          S = SE.getMinusSCEV(N, S);
+          S = SE.getMinusSCEV(S, N);
         }
 
         // -1 and the negations of all interesting strides (except the negation
@@ -3312,6 +3312,12 @@
     if (LU.Formulae.empty()) {
       InsertInitialFormula(S, LU, LUIdx);
       CountRegisters(LU.Formulae.back(), LUIdx);
+      if ( LU.Kind == LSRUse::ICmpZero && isSafeToExpand(S, SE)) {
+        // Account for the negated ICmpZero SCEV
+        const SCEV *Z = SE.getMinusSCEV(SE.getZero(S->getType()), S);
+        InsertSupplementalFormula(Z, LU, LUIdx);
+        CountRegisters(LU.Formulae.back(), LUIdx);
+      }
     }
   }
 
diff --git a/test/CodeGen/ARM/arm-shrink-wrapping.ll b/test/CodeGen/ARM/arm-shrink-wrapping.ll
--- a/test/CodeGen/ARM/arm-shrink-wrapping.ll
+++ b/test/CodeGen/ARM/arm-shrink-wrapping.ll
@@ -197,7 +197,7 @@
 ; ARM-ENABLE-NEXT:    push {r4, r7, lr}
 ; ARM-ENABLE-NEXT:    add r7, sp, #4
 ; ARM-ENABLE-NEXT:    mov r0, #0
-; ARM-ENABLE-NEXT:    mov r1, #10
+; ARM-ENABLE-NEXT:    mvn r1, #9
 ; ARM-ENABLE-NEXT:    @ InlineAsm Start
 ; ARM-ENABLE-NEXT:    nop
 ; ARM-ENABLE-NEXT:    @ InlineAsm End
@@ -207,8 +207,8 @@
 ; ARM-ENABLE-NEXT:    mov r2, #1
 ; ARM-ENABLE-NEXT:    @ InlineAsm End
 ; ARM-ENABLE-NEXT:    add r0, r2, r0
-; ARM-ENABLE-NEXT:    subs r1, r1, #1
-; ARM-ENABLE-NEXT:    bne LBB1_2
+; ARM-ENABLE-NEXT:    adds r1, r1, #1
+; ARM-ENABLE-NEXT:    blo LBB1_2
 ; ARM-ENABLE-NEXT:  @ %bb.3: @ %for.end
 ; ARM-ENABLE-NEXT:    lsl r0, r0, #3
 ; ARM-ENABLE-NEXT:    pop {r4, r7, pc}
@@ -224,7 +224,7 @@
 ; ARM-DISABLE-NEXT:    beq LBB1_4
 ; ARM-DISABLE-NEXT:  @ %bb.1: @ %for.preheader
 ; ARM-DISABLE-NEXT:    mov r0, #0
-; ARM-DISABLE-NEXT:    mov r1, #10
+; ARM-DISABLE-NEXT:    mvn r1, #9
 ; ARM-DISABLE-NEXT:    @ InlineAsm Start
 ; ARM-DISABLE-NEXT:    nop
 ; ARM-DISABLE-NEXT:    @ InlineAsm End
@@ -234,8 +234,8 @@
 ; ARM-DISABLE-NEXT:    mov r2, #1
 ; ARM-DISABLE-NEXT:    @ InlineAsm End
 ; ARM-DISABLE-NEXT:    add r0, r2, r0
-; ARM-DISABLE-NEXT:    subs r1, r1, #1
-; ARM-DISABLE-NEXT:    bne LBB1_2
+; ARM-DISABLE-NEXT:    adds r1, r1, #1
+; ARM-DISABLE-NEXT:    blo LBB1_2
 ; ARM-DISABLE-NEXT:  @ %bb.3: @ %for.end
 ; ARM-DISABLE-NEXT:    lsl r0, r0, #3
 ; ARM-DISABLE-NEXT:    pop {r4, r7, pc}
@@ -250,7 +250,7 @@
 ; THUMB-ENABLE-NEXT:    push {r4, r7, lr}
 ; THUMB-ENABLE-NEXT:    add r7, sp, #4
 ; THUMB-ENABLE-NEXT:    movs r0, #0
-; THUMB-ENABLE-NEXT:    movs r1, #10
+; THUMB-ENABLE-NEXT:    mvn r1, #9
 ; THUMB-ENABLE-NEXT:    @ InlineAsm Start
 ; THUMB-ENABLE-NEXT:    nop
 ; THUMB-ENABLE-NEXT:    @ InlineAsm End
@@ -260,8 +260,8 @@
 ; THUMB-ENABLE-NEXT:    mov.w r2, #1
 ; THUMB-ENABLE-NEXT:    @ InlineAsm End
 ; THUMB-ENABLE-NEXT:    add r0, r2
-; THUMB-ENABLE-NEXT:    subs r1, #1
-; THUMB-ENABLE-NEXT:    bne LBB1_2
+; THUMB-ENABLE-NEXT:    adds r1, #1
+; THUMB-ENABLE-NEXT:    blo LBB1_2
 ; THUMB-ENABLE-NEXT:  @ %bb.3: @ %for.end
 ; THUMB-ENABLE-NEXT:    lsls r0, r0, #3
 ; THUMB-ENABLE-NEXT:    pop {r4, r7, pc}
@@ -276,7 +276,7 @@
 ; THUMB-DISABLE-NEXT:    cbz r0, LBB1_4
 ; THUMB-DISABLE-NEXT:  @ %bb.1: @ %for.preheader
 ; THUMB-DISABLE-NEXT:    movs r0, #0
-; THUMB-DISABLE-NEXT:    movs r1, #10
+; THUMB-DISABLE-NEXT:    mvn r1, #9
 ; THUMB-DISABLE-NEXT:    @ InlineAsm Start
 ; THUMB-DISABLE-NEXT:    nop
 ; THUMB-DISABLE-NEXT:    @ InlineAsm End
@@ -286,8 +286,8 @@
 ; THUMB-DISABLE-NEXT:    mov.w r2, #1
 ; THUMB-DISABLE-NEXT:    @ InlineAsm End
 ; THUMB-DISABLE-NEXT:    add r0, r2
-; THUMB-DISABLE-NEXT:    subs r1, #1
-; THUMB-DISABLE-NEXT:    bne LBB1_2
+; THUMB-DISABLE-NEXT:    adds r1, #1
+; THUMB-DISABLE-NEXT:    blo LBB1_2
 ; THUMB-DISABLE-NEXT:  @ %bb.3: @ %for.end
 ; THUMB-DISABLE-NEXT:    lsls r0, r0, #3
 ; THUMB-DISABLE-NEXT:    pop {r4, r7, pc}
@@ -348,57 +348,12 @@
 ; nop
 ; pop {r4
 define i32 @freqSaveAndRestoreOutsideLoop2(i32 %cond) "no-frame-pointer-elim"="true" {
-; ARM-LABEL: freqSaveAndRestoreOutsideLoop2:
-; ARM:       @ %bb.0: @ %entry
-; ARM-NEXT:    push {r4, r7, lr}
-; ARM-NEXT:    add r7, sp, #4
-; ARM-NEXT:    mov r0, #0
-; ARM-NEXT:    mov r1, #10
-; ARM-NEXT:    @ InlineAsm Start
-; ARM-NEXT:    nop
-; ARM-NEXT:    @ InlineAsm End
-; ARM-NEXT:  LBB2_1: @ %for.body
-; ARM-NEXT:    @ =>This Inner Loop Header: Depth=1
-; ARM-NEXT:    @ InlineAsm Start
-; ARM-NEXT:    mov r2, #1
-; ARM-NEXT:    @ InlineAsm End
-; ARM-NEXT:    add r0, r2, r0
-; ARM-NEXT:    subs r1, r1, #1
-; ARM-NEXT:    bne LBB2_1
-; ARM-NEXT:  @ %bb.2: @ %for.exit
-; ARM-NEXT:    @ InlineAsm Start
-; ARM-NEXT:    nop
-; ARM-NEXT:    @ InlineAsm End
-; ARM-NEXT:    pop {r4, r7, pc}
-;
-; THUMB-LABEL: freqSaveAndRestoreOutsideLoop2:
-; THUMB:       @ %bb.0: @ %entry
-; THUMB-NEXT:    push {r4, r7, lr}
-; THUMB-NEXT:    add r7, sp, #4
-; THUMB-NEXT:    movs r0, #0
-; THUMB-NEXT:    movs r1, #10
-; THUMB-NEXT:    @ InlineAsm Start
-; THUMB-NEXT:    nop
-; THUMB-NEXT:    @ InlineAsm End
-; THUMB-NEXT:  LBB2_1: @ %for.body
-; THUMB-NEXT:    @ =>This Inner Loop Header: Depth=1
-; THUMB-NEXT:    @ InlineAsm Start
-; THUMB-NEXT:    mov.w r2, #1
-; THUMB-NEXT:    @ InlineAsm End
-; THUMB-NEXT:    add r0, r2
-; THUMB-NEXT:    subs r1, #1
-; THUMB-NEXT:    bne LBB2_1
-; THUMB-NEXT:  @ %bb.2: @ %for.exit
-; THUMB-NEXT:    @ InlineAsm Start
-; THUMB-NEXT:    nop
-; THUMB-NEXT:    @ InlineAsm End
-; THUMB-NEXT:    pop {r4, r7, pc}
 ; ARM-ENABLE-LABEL: freqSaveAndRestoreOutsideLoop2:
 ; ARM-ENABLE:       @ %bb.0: @ %entry
 ; ARM-ENABLE-NEXT:    push {r4, r7, lr}
 ; ARM-ENABLE-NEXT:    add r7, sp, #4
 ; ARM-ENABLE-NEXT:    mov r0, #0
-; ARM-ENABLE-NEXT:    mov r1, #10
+; ARM-ENABLE-NEXT:    mvn r1, #9
 ; ARM-ENABLE-NEXT:    @ InlineAsm Start
 ; ARM-ENABLE-NEXT:    nop
 ; ARM-ENABLE-NEXT:    @ InlineAsm End
@@ -408,8 +363,8 @@
 ; ARM-ENABLE-NEXT:    mov r2, #1
 ; ARM-ENABLE-NEXT:    @ InlineAsm End
 ; ARM-ENABLE-NEXT:    add r0, r2, r0
-; ARM-ENABLE-NEXT:    subs r1, r1, #1
-; ARM-ENABLE-NEXT:    bne LBB2_1
+; ARM-ENABLE-NEXT:    adds r1, r1, #1
+; ARM-ENABLE-NEXT:    blo LBB2_1
 ; ARM-ENABLE-NEXT:  @ %bb.2: @ %for.exit
 ; ARM-ENABLE-NEXT:    @ InlineAsm Start
 ; ARM-ENABLE-NEXT:    nop
@@ -421,7 +376,7 @@
 ; ARM-DISABLE-NEXT:    push {r4, r7, lr}
 ; ARM-DISABLE-NEXT:    add r7, sp, #4
 ; ARM-DISABLE-NEXT:    mov r0, #0
-; ARM-DISABLE-NEXT:    mov r1, #10
+; ARM-DISABLE-NEXT:    mvn r1, #9
 ; ARM-DISABLE-NEXT:    @ InlineAsm Start
 ; ARM-DISABLE-NEXT:    nop
 ; ARM-DISABLE-NEXT:    @ InlineAsm End
@@ -431,8 +386,8 @@
 ; ARM-DISABLE-NEXT:    mov r2, #1
 ; ARM-DISABLE-NEXT:    @ InlineAsm End
 ; ARM-DISABLE-NEXT:    add r0, r2, r0
-; ARM-DISABLE-NEXT:    subs r1, r1, #1
-; ARM-DISABLE-NEXT:    bne LBB2_1
+; ARM-DISABLE-NEXT:    adds r1, r1, #1
+; ARM-DISABLE-NEXT:    blo LBB2_1
 ; ARM-DISABLE-NEXT:  @ %bb.2: @ %for.exit
 ; ARM-DISABLE-NEXT:    @ InlineAsm Start
 ; ARM-DISABLE-NEXT:    nop
@@ -444,7 +399,7 @@
 ; THUMB-ENABLE-NEXT:    push {r4, r7, lr}
 ; THUMB-ENABLE-NEXT:    add r7, sp, #4
 ; THUMB-ENABLE-NEXT:    movs r0, #0
-; THUMB-ENABLE-NEXT:    movs r1, #10
+; THUMB-ENABLE-NEXT:    mvn r1, #9
 ; THUMB-ENABLE-NEXT:    @ InlineAsm Start
 ; THUMB-ENABLE-NEXT:    nop
 ; THUMB-ENABLE-NEXT:    @ InlineAsm End
@@ -454,8 +409,8 @@
 ; THUMB-ENABLE-NEXT:    mov.w r2, #1
 ; THUMB-ENABLE-NEXT:    @ InlineAsm End
 ; THUMB-ENABLE-NEXT:    add r0, r2
-; THUMB-ENABLE-NEXT:    subs r1, #1
-; THUMB-ENABLE-NEXT:    bne LBB2_1
+; THUMB-ENABLE-NEXT:    adds r1, #1
+; THUMB-ENABLE-NEXT:    blo LBB2_1
 ; THUMB-ENABLE-NEXT:  @ %bb.2: @ %for.exit
 ; THUMB-ENABLE-NEXT:    @ InlineAsm Start
 ; THUMB-ENABLE-NEXT:    nop
@@ -467,7 +422,7 @@
 ; THUMB-DISABLE-NEXT:    push {r4, r7, lr}
 ; THUMB-DISABLE-NEXT:    add r7, sp, #4
 ; THUMB-DISABLE-NEXT:    movs r0, #0
-; THUMB-DISABLE-NEXT:    movs r1, #10
+; THUMB-DISABLE-NEXT:    mvn r1, #9
 ; THUMB-DISABLE-NEXT:    @ InlineAsm Start
 ; THUMB-DISABLE-NEXT:    nop
 ; THUMB-DISABLE-NEXT:    @ InlineAsm End
@@ -477,8 +432,8 @@
 ; THUMB-DISABLE-NEXT:    mov.w r2, #1
 ; THUMB-DISABLE-NEXT:    @ InlineAsm End
 ; THUMB-DISABLE-NEXT:    add r0, r2
-; THUMB-DISABLE-NEXT:    subs r1, #1
-; THUMB-DISABLE-NEXT:    bne LBB2_1
+; THUMB-DISABLE-NEXT:    adds r1, #1
+; THUMB-DISABLE-NEXT:    blo LBB2_1
 ; THUMB-DISABLE-NEXT:  @ %bb.2: @ %for.exit
 ; THUMB-DISABLE-NEXT:    @ InlineAsm Start
 ; THUMB-DISABLE-NEXT:    nop
@@ -562,7 +517,7 @@
 ; ARM-ENABLE-NEXT:    push {r4, r7, lr}
 ; ARM-ENABLE-NEXT:    add r7, sp, #4
 ; ARM-ENABLE-NEXT:    mov r0, #0
-; ARM-ENABLE-NEXT:    mov r1, #10
+; ARM-ENABLE-NEXT:    mvn r1, #9
 ; ARM-ENABLE-NEXT:    @ InlineAsm Start
 ; ARM-ENABLE-NEXT:    nop
 ; ARM-ENABLE-NEXT:    @ InlineAsm End
@@ -572,8 +527,8 @@
 ; ARM-ENABLE-NEXT:    mov r2, #1
 ; ARM-ENABLE-NEXT:    @ InlineAsm End
 ; ARM-ENABLE-NEXT:    add r0, r2, r0
-; ARM-ENABLE-NEXT:    subs r1, r1, #1
-; ARM-ENABLE-NEXT:    bne LBB3_2
+; ARM-ENABLE-NEXT:    adds r1, r1, #1
+; ARM-ENABLE-NEXT:    blo LBB3_2
 ; ARM-ENABLE-NEXT:  @ %bb.3: @ %for.end
 ; ARM-ENABLE-NEXT:    lsl r0, r0, #3
 ; ARM-ENABLE-NEXT:    @ InlineAsm Start
@@ -592,7 +547,7 @@
 ; ARM-DISABLE-NEXT:    beq LBB3_4
 ; ARM-DISABLE-NEXT:  @ %bb.1: @ %for.preheader
 ; ARM-DISABLE-NEXT:    mov r0, #0
-; ARM-DISABLE-NEXT:    mov r1, #10
+; ARM-DISABLE-NEXT:    mvn r1, #9
 ; ARM-DISABLE-NEXT:    @ InlineAsm Start
 ; ARM-DISABLE-NEXT:    nop
 ; ARM-DISABLE-NEXT:    @ InlineAsm End
@@ -602,8 +557,8 @@
 ; ARM-DISABLE-NEXT:    mov r2, #1
 ; ARM-DISABLE-NEXT:    @ InlineAsm End
 ; ARM-DISABLE-NEXT:    add r0, r2, r0
-; ARM-DISABLE-NEXT:    subs r1, r1, #1
-; ARM-DISABLE-NEXT:    bne LBB3_2
+; ARM-DISABLE-NEXT:    adds r1, r1, #1
+; ARM-DISABLE-NEXT:    blo LBB3_2
 ; ARM-DISABLE-NEXT:  @ %bb.3: @ %for.end
 ; ARM-DISABLE-NEXT:    lsl r0, r0, #3
 ; ARM-DISABLE-NEXT:    @ InlineAsm Start
@@ -621,7 +576,7 @@
 ; THUMB-ENABLE-NEXT:    push {r4, r7, lr}
 ; THUMB-ENABLE-NEXT:    add r7, sp, #4
 ; THUMB-ENABLE-NEXT:    movs r0, #0
-; THUMB-ENABLE-NEXT:    movs r1, #10
+; THUMB-ENABLE-NEXT:    mvn r1, #9
 ; THUMB-ENABLE-NEXT:    @ InlineAsm Start
 ; THUMB-ENABLE-NEXT:    nop
 ; THUMB-ENABLE-NEXT:    @ InlineAsm End
@@ -631,8 +586,8 @@
 ; THUMB-ENABLE-NEXT:    mov.w r2, #1
 ; THUMB-ENABLE-NEXT:    @ InlineAsm End
 ; THUMB-ENABLE-NEXT:    add r0, r2
-; THUMB-ENABLE-NEXT:    subs r1, #1
-; THUMB-ENABLE-NEXT:    bne LBB3_2
+; THUMB-ENABLE-NEXT:    adds r1, #1
+; THUMB-ENABLE-NEXT:    blo LBB3_2
 ; THUMB-ENABLE-NEXT:  @ %bb.3: @ %for.end
 ; THUMB-ENABLE-NEXT:    lsls r0, r0, #3
 ; THUMB-ENABLE-NEXT:    @ InlineAsm Start
@@ -650,7 +605,7 @@
 ; THUMB-DISABLE-NEXT:    cbz r0, LBB3_4
 ; THUMB-DISABLE-NEXT:  @ %bb.1: @ %for.preheader
 ; THUMB-DISABLE-NEXT:    movs r0, #0
-; THUMB-DISABLE-NEXT:    movs r1, #10
+; THUMB-DISABLE-NEXT:    mvn r1, #9
 ; THUMB-DISABLE-NEXT:    @ InlineAsm Start
 ; THUMB-DISABLE-NEXT:    nop
 ; THUMB-DISABLE-NEXT:    @ InlineAsm End
@@ -660,8 +615,8 @@
 ; THUMB-DISABLE-NEXT:    mov.w r2, #1
 ; THUMB-DISABLE-NEXT:    @ InlineAsm End
 ; THUMB-DISABLE-NEXT:    add r0, r2
-; THUMB-DISABLE-NEXT:    subs r1, #1
-; THUMB-DISABLE-NEXT:    bne LBB3_2
+; THUMB-DISABLE-NEXT:    adds r1, #1
+; THUMB-DISABLE-NEXT:    blo LBB3_2
 ; THUMB-DISABLE-NEXT:  @ %bb.3: @ %for.end
 ; THUMB-DISABLE-NEXT:    lsls r0, r0, #3
 ; THUMB-DISABLE-NEXT:    @ InlineAsm Start
@@ -758,7 +713,7 @@
 ; ARM-ENABLE-NEXT:    push {r4, r7, lr}
 ; ARM-ENABLE-NEXT:    add r7, sp, #4
 ; ARM-ENABLE-NEXT:    mov r0, #0
-; ARM-ENABLE-NEXT:    mov r1, #10
+; ARM-ENABLE-NEXT:    mvn r1, #9
 ; ARM-ENABLE-NEXT:    @ InlineAsm Start
 ; ARM-ENABLE-NEXT:    nop
 ; ARM-ENABLE-NEXT:    @ InlineAsm End
@@ -768,8 +723,8 @@
 ; ARM-ENABLE-NEXT:    mov r2, #1
 ; ARM-ENABLE-NEXT:    @ InlineAsm End
 ; ARM-ENABLE-NEXT:    add r0, r2, r0
-; ARM-ENABLE-NEXT:    subs r1, r1, #1
-; ARM-ENABLE-NEXT:    bne LBB4_2
+; ARM-ENABLE-NEXT:    adds r1, r1, #1
+; ARM-ENABLE-NEXT:    blo LBB4_2
 ; ARM-ENABLE-NEXT:  @ %bb.3: @ %for.end
 ; ARM-ENABLE-NEXT:    lsl r0, r0, #3
 ; ARM-ENABLE-NEXT:    pop {r4, r7, pc}
@@ -785,7 +740,7 @@
 ; ARM-DISABLE-NEXT:    beq LBB4_4
 ; ARM-DISABLE-NEXT:  @ %bb.1: @ %if.then
 ; ARM-DISABLE-NEXT:    mov r0, #0
-; ARM-DISABLE-NEXT:    mov r1, #10
+; ARM-DISABLE-NEXT:    mvn r1, #9
 ; ARM-DISABLE-NEXT:    @ InlineAsm Start
 ; ARM-DISABLE-NEXT:    nop
 ; ARM-DISABLE-NEXT:    @ InlineAsm End
@@ -795,8 +750,8 @@
 ; ARM-DISABLE-NEXT:    mov r2, #1
 ; ARM-DISABLE-NEXT:    @ InlineAsm End
 ; ARM-DISABLE-NEXT:    add r0, r2, r0
-; ARM-DISABLE-NEXT:    subs r1, r1, #1
-; ARM-DISABLE-NEXT:    bne LBB4_2
+; ARM-DISABLE-NEXT:    adds r1, r1, #1
+; ARM-DISABLE-NEXT:    blo LBB4_2
 ; ARM-DISABLE-NEXT:  @ %bb.3: @ %for.end
 ; ARM-DISABLE-NEXT:    lsl r0, r0, #3
 ; ARM-DISABLE-NEXT:    pop {r4, r7, pc}
@@ -811,7 +766,7 @@
 ; THUMB-ENABLE-NEXT:    push {r4, r7, lr}
 ; THUMB-ENABLE-NEXT:    add r7, sp, #4
 ; THUMB-ENABLE-NEXT:    movs r0, #0
-; THUMB-ENABLE-NEXT:    movs r1, #10
+; THUMB-ENABLE-NEXT:    mvn r1, #9
 ; THUMB-ENABLE-NEXT:    @ InlineAsm Start
 ; THUMB-ENABLE-NEXT:    nop
 ; THUMB-ENABLE-NEXT:    @ InlineAsm End
@@ -821,8 +776,8 @@
 ; THUMB-ENABLE-NEXT:    mov.w r2, #1
 ; THUMB-ENABLE-NEXT:    @ InlineAsm End
 ; THUMB-ENABLE-NEXT:    add r0, r2
-; THUMB-ENABLE-NEXT:    subs r1, #1
-; THUMB-ENABLE-NEXT:    bne LBB4_2
+; THUMB-ENABLE-NEXT:    adds r1, #1
+; THUMB-ENABLE-NEXT:    blo LBB4_2
 ; THUMB-ENABLE-NEXT:  @ %bb.3: @ %for.end
 ; THUMB-ENABLE-NEXT:    lsls r0, r0, #3
 ; THUMB-ENABLE-NEXT:    pop {r4, r7, pc}
@@ -837,7 +792,7 @@
 ; THUMB-DISABLE-NEXT:    cbz r0, LBB4_4
 ; THUMB-DISABLE-NEXT:  @ %bb.1: @ %if.then
 ; THUMB-DISABLE-NEXT:    movs r0, #0
-; THUMB-DISABLE-NEXT:    movs r1, #10
+; THUMB-DISABLE-NEXT:    mvn r1, #9
 ; THUMB-DISABLE-NEXT:    @ InlineAsm Start
 ; THUMB-DISABLE-NEXT:    nop
 ; THUMB-DISABLE-NEXT:    @ InlineAsm End
@@ -847,8 +802,8 @@
 ; THUMB-DISABLE-NEXT:    mov.w r2, #1
 ; THUMB-DISABLE-NEXT:    @ InlineAsm End
 ; THUMB-DISABLE-NEXT:    add r0, r2
-; THUMB-DISABLE-NEXT:    subs r1, #1
-; THUMB-DISABLE-NEXT:    bne LBB4_2
+; THUMB-DISABLE-NEXT:    adds r1, #1
+; THUMB-DISABLE-NEXT:    blo LBB4_2
 ; THUMB-DISABLE-NEXT:  @ %bb.3: @ %for.end
 ; THUMB-DISABLE-NEXT:    lsls r0, r0, #3
 ; THUMB-DISABLE-NEXT:    pop {r4, r7, pc}
@@ -891,15 +846,6 @@
 ; mov{{s?}} r0, #0
 ; bx lr
 define i32 @emptyFrame() {
-; ARM-LABEL: emptyFrame:
-; ARM:       @ %bb.0: @ %entry
-; ARM-NEXT:    mov r0, #0
-; ARM-NEXT:    bx lr
-;
-; THUMB-LABEL: emptyFrame:
-; THUMB:       @ %bb.0: @ %entry
-; THUMB-NEXT:    movs r0, #0
-; THUMB-NEXT:    bx lr
 ; ARM-ENABLE-LABEL: emptyFrame:
 ; ARM-ENABLE:       @ %bb.0: @ %entry
 ; ARM-ENABLE-NEXT:    mov r0, #0
@@ -968,17 +914,17 @@
 ; ARM-ENABLE-NEXT:  @ %bb.1: @ %for.preheader
 ; ARM-ENABLE-NEXT:    push {r4, r7, lr}
 ; ARM-ENABLE-NEXT:    add r7, sp, #4
-; ARM-ENABLE-NEXT:    mov r0, #10
+; ARM-ENABLE-NEXT:    mvn r0, #9
 ; ARM-ENABLE-NEXT:    @ InlineAsm Start
 ; ARM-ENABLE-NEXT:    nop
 ; ARM-ENABLE-NEXT:    @ InlineAsm End
 ; ARM-ENABLE-NEXT:  LBB6_2: @ %for.body
 ; ARM-ENABLE-NEXT:    @ =>This Inner Loop Header: Depth=1
-; ARM-ENABLE-NEXT:    subs r0, r0, #1
+; ARM-ENABLE-NEXT:    adds r0, r0, #1
 ; ARM-ENABLE-NEXT:    @ InlineAsm Start
 ; ARM-ENABLE-NEXT:    add r4, r4, #1
 ; ARM-ENABLE-NEXT:    @ InlineAsm End
-; ARM-ENABLE-NEXT:    bne LBB6_2
+; ARM-ENABLE-NEXT:    blo LBB6_2
 ; ARM-ENABLE-NEXT:  @ %bb.3: @ %for.exit
 ; ARM-ENABLE-NEXT:    mov r0, #0
 ; ARM-ENABLE-NEXT:    @ InlineAsm Start
@@ -996,17 +942,17 @@
 ; ARM-DISABLE-NEXT:    cmp r0, #0
 ; ARM-DISABLE-NEXT:    beq LBB6_4
 ; ARM-DISABLE-NEXT:  @ %bb.1: @ %for.preheader
-; ARM-DISABLE-NEXT:    mov r0, #10
+; ARM-DISABLE-NEXT:    mvn r0, #9
 ; ARM-DISABLE-NEXT:    @ InlineAsm Start
 ; ARM-DISABLE-NEXT:    nop
 ; ARM-DISABLE-NEXT:    @ InlineAsm End
 ; ARM-DISABLE-NEXT:  LBB6_2: @ %for.body
 ; ARM-DISABLE-NEXT:    @ =>This Inner Loop Header: Depth=1
-; ARM-DISABLE-NEXT:    subs r0, r0, #1
+; ARM-DISABLE-NEXT:    adds r0, r0, #1
 ; ARM-DISABLE-NEXT:    @ InlineAsm Start
 ; ARM-DISABLE-NEXT:    add r4, r4, #1
 ; ARM-DISABLE-NEXT:    @ InlineAsm End
-; ARM-DISABLE-NEXT:    bne LBB6_2
+; ARM-DISABLE-NEXT:    blo LBB6_2
 ; ARM-DISABLE-NEXT:  @ %bb.3: @ %for.exit
 ; ARM-DISABLE-NEXT:    mov r0, #0
 ; ARM-DISABLE-NEXT:    @ InlineAsm Start
@@ -1023,17 +969,17 @@
 ; THUMB-ENABLE-NEXT:  @ %bb.1: @ %for.preheader
 ; THUMB-ENABLE-NEXT:    push {r4, r7, lr}
 ; THUMB-ENABLE-NEXT:    add r7, sp, #4
-; THUMB-ENABLE-NEXT:    movs r0, #10
+; THUMB-ENABLE-NEXT:    mvn r0, #9
 ; THUMB-ENABLE-NEXT:    @ InlineAsm Start
 ; THUMB-ENABLE-NEXT:    nop
 ; THUMB-ENABLE-NEXT:    @ InlineAsm End
 ; THUMB-ENABLE-NEXT:  LBB6_2: @ %for.body
 ; THUMB-ENABLE-NEXT:    @ =>This Inner Loop Header: Depth=1
-; THUMB-ENABLE-NEXT:    subs r0, #1
+; THUMB-ENABLE-NEXT:    adds r0, #1
 ; THUMB-ENABLE-NEXT:    @ InlineAsm Start
 ; THUMB-ENABLE-NEXT:    add.w r4, r4, #1
 ; THUMB-ENABLE-NEXT:    @ InlineAsm End
-; THUMB-ENABLE-NEXT:    bne LBB6_2
+; THUMB-ENABLE-NEXT:    blo LBB6_2
 ; THUMB-ENABLE-NEXT:  @ %bb.3: @ %for.exit
 ; THUMB-ENABLE-NEXT:    movs r0, #0
 ; THUMB-ENABLE-NEXT:    @ InlineAsm Start
@@ -1050,17 +996,17 @@
 ; THUMB-DISABLE-NEXT:    add r7, sp, #4
 ; THUMB-DISABLE-NEXT:    cbz r0, LBB6_4
 ; THUMB-DISABLE-NEXT:  @ %bb.1: @ %for.preheader
-; THUMB-DISABLE-NEXT:    movs r0, #10
+; THUMB-DISABLE-NEXT:    mvn r0, #9
 ; THUMB-DISABLE-NEXT:    @ InlineAsm Start
 ; THUMB-DISABLE-NEXT:    nop
 ; THUMB-DISABLE-NEXT:    @ InlineAsm End
 ; THUMB-DISABLE-NEXT:  LBB6_2: @ %for.body
 ; THUMB-DISABLE-NEXT:    @ =>This Inner Loop Header: Depth=1
-; THUMB-DISABLE-NEXT:    subs r0, #1
+; THUMB-DISABLE-NEXT:    adds r0, #1
 ; THUMB-DISABLE-NEXT:    @ InlineAsm Start
 ; THUMB-DISABLE-NEXT:    add.w r4, r4, #1
 ; THUMB-DISABLE-NEXT:    @ InlineAsm End
-; THUMB-DISABLE-NEXT:    bne LBB6_2
+; THUMB-DISABLE-NEXT:    blo LBB6_2
 ; THUMB-DISABLE-NEXT:  @ %bb.3: @ %for.exit
 ; THUMB-DISABLE-NEXT:    movs r0, #0
 ; THUMB-DISABLE-NEXT:    @ InlineAsm Start
@@ -1355,50 +1301,6 @@
 ; infiniteloop
 ; pop
 define void @infiniteloop() "no-frame-pointer-elim"="true" {
-; ARM-LABEL: infiniteloop:
-; ARM:       @ %bb.0: @ %entry
-; ARM-NEXT:    push {r4, r5, r7, lr}
-; ARM-NEXT:    add r7, sp, #8
-; ARM-NEXT:    mov r0, #0
-; ARM-NEXT:    cmp r0, #0
-; ARM-NEXT:    bne LBB9_3
-; ARM-NEXT:  @ %bb.1: @ %if.then
-; ARM-NEXT:    sub r1, sp, #16
-; ARM-NEXT:    mov sp, r1
-; ARM-NEXT:  LBB9_2: @ %for.body
-; ARM-NEXT:    @ =>This Inner Loop Header: Depth=1
-; ARM-NEXT:    @ InlineAsm Start
-; ARM-NEXT:    mov r2, #1
-; ARM-NEXT:    @ InlineAsm End
-; ARM-NEXT:    add r0, r2, r0
-; ARM-NEXT:    str r0, [r1]
-; ARM-NEXT:    b LBB9_2
-; ARM-NEXT:  LBB9_3: @ %if.end
-; ARM-NEXT:    sub sp, r7, #8
-; ARM-NEXT:    pop {r4, r5, r7, pc}
-;
-; THUMB-LABEL: infiniteloop:
-; THUMB:       @ %bb.0: @ %entry
-; THUMB-NEXT:    push {r4, r5, r7, lr}
-; THUMB-NEXT:    add r7, sp, #8
-; THUMB-NEXT:    movs r0, #0
-; THUMB-NEXT:    cbnz r0, LBB9_3
-; THUMB-NEXT:  @ %bb.1: @ %if.then
-; THUMB-NEXT:    sub.w r0, sp, #16
-; THUMB-NEXT:    mov sp, r0
-; THUMB-NEXT:    movs r1, #0
-; THUMB-NEXT:  LBB9_2: @ %for.body
-; THUMB-NEXT:    @ =>This Inner Loop Header: Depth=1
-; THUMB-NEXT:    @ InlineAsm Start
-; THUMB-NEXT:    mov.w r2, #1
-; THUMB-NEXT:    @ InlineAsm End
-; THUMB-NEXT:    add r1, r2
-; THUMB-NEXT:    str r1, [r0]
-; THUMB-NEXT:    b LBB9_2
-; THUMB-NEXT:  LBB9_3: @ %if.end
-; THUMB-NEXT:    sub.w r4, r7, #8
-; THUMB-NEXT:    mov sp, r4
-; THUMB-NEXT:    pop {r4, r5, r7, pc}
 ; ARM-ENABLE-LABEL: infiniteloop:
 ; ARM-ENABLE:       @ %bb.0: @ %entry
 ; ARM-ENABLE-NEXT:    push {r4, r5, r7, lr}
@@ -1540,59 +1442,6 @@
 ; infiniteloop3
 ; bx lr
 define void @infiniteloop3() "no-frame-pointer-elim"="true" {
-; ARM-LABEL: infiniteloop3:
-; ARM:       @ %bb.0: @ %entry
-; ARM-NEXT:    mov r0, #0
-; ARM-NEXT:    cmp r0, #0
-; ARM-NEXT:    bne LBB11_5
-; ARM-NEXT:  @ %bb.1: @ %loop2a.preheader
-; ARM-NEXT:    mov r1, #0
-; ARM-NEXT:    mov r2, r0
-; ARM-NEXT:    b LBB11_3
-; ARM-NEXT:  LBB11_2: @ %loop2b
-; ARM-NEXT:    @ in Loop: Header=BB11_3 Depth=1
-; ARM-NEXT:    str r1, [r2]
-; ARM-NEXT:    mov r2, r1
-; ARM-NEXT:    mov r1, r3
-; ARM-NEXT:  LBB11_3: @ %loop1
-; ARM-NEXT:    @ =>This Inner Loop Header: Depth=1
-; ARM-NEXT:    ldr r3, [r0]
-; ARM-NEXT:    cmp r0, #0
-; ARM-NEXT:    bne LBB11_2
-; ARM-NEXT:  @ %bb.4: @ in Loop: Header=BB11_3 Depth=1
-; ARM-NEXT:    mov r0, r1
-; ARM-NEXT:    mov r1, r3
-; ARM-NEXT:    mov r2, r0
-; ARM-NEXT:    b LBB11_3
-; ARM-NEXT:  LBB11_5: @ %end
-; ARM-NEXT:    bx lr
-;
-; THUMB-LABEL: infiniteloop3:
-; THUMB:       @ %bb.0: @ %entry
-; THUMB-NEXT:    movs r0, #0
-; THUMB-NEXT:    cbnz r0, LBB11_5
-; THUMB-NEXT:  @ %bb.1: @ %loop2a.preheader
-; THUMB-NEXT:    movs r0, #0
-; THUMB-NEXT:    movs r1, #0
-; THUMB-NEXT:    mov r2, r0
-; THUMB-NEXT:    b LBB11_3
-; THUMB-NEXT:  LBB11_2: @ %loop2b
-; THUMB-NEXT:    @ in Loop: Header=BB11_3 Depth=1
-; THUMB-NEXT:    str r1, [r2]
-; THUMB-NEXT:    mov r2, r1
-; THUMB-NEXT:    mov r1, r3
-; THUMB-NEXT:  LBB11_3: @ %loop1
-; THUMB-NEXT:    @ =>This Inner Loop Header: Depth=1
-; THUMB-NEXT:    ldr r3, [r0]
-; THUMB-NEXT:    cmp r0, #0
-; THUMB-NEXT:    bne LBB11_2
-; THUMB-NEXT:  @ %bb.4: @ in Loop: Header=BB11_3 Depth=1
-; THUMB-NEXT:    mov r0, r1
-; THUMB-NEXT:    mov r1, r3
-; THUMB-NEXT:    mov r2, r0
-; THUMB-NEXT:    b LBB11_3
-; THUMB-NEXT:  LBB11_5: @ %end
-; THUMB-NEXT:    bx lr
 ; ARM-ENABLE-LABEL: infiniteloop3:
 ; ARM-ENABLE:       @ %bb.0: @ %entry
 ; ARM-ENABLE-NEXT:    mov r0, #0
@@ -1760,102 +1609,199 @@
 ;
 ; bl
 define float @debug_info(float %gamma, float %slopeLimit, i1 %or.cond, double %tmp) "no-frame-pointer-elim"="true" {
-; ARM-LABEL: debug_info:
-; ARM:       @ %bb.0: @ %bb
-; ARM-NEXT:    push {r4, r7, lr}
-; ARM-NEXT:    add r7, sp, #4
-; ARM-NEXT:    sub r4, sp, #16
-; ARM-NEXT:    bfc r4, #0, #4
-; ARM-NEXT:    mov sp, r4
-; ARM-NEXT:    tst r2, #1
-; ARM-NEXT:    vst1.64 {d8, d9}, [r4:128]
-; ARM-NEXT:    beq LBB12_2
-; ARM-NEXT:  @ %bb.1: @ %bb3
-; ARM-NEXT:    ldr r1, [r7, #8]
-; ARM-NEXT:    vmov s16, r0
-; ARM-NEXT:    mov r0, r3
-; ARM-NEXT:    mov r2, r3
-; ARM-NEXT:    vmov d9, r3, r1
-; ARM-NEXT:    mov r3, r1
-; ARM-NEXT:    bl _pow
-; ARM-NEXT:    vmov.f32 s0, #1.000000e+00
-; ARM-NEXT:    vmov.f64 d16, #1.000000e+00
-; ARM-NEXT:    vadd.f64 d16, d9, d16
-; ARM-NEXT:    vcmpe.f32 s16, s0
-; ARM-NEXT:    vmrs APSR_nzcv, fpscr
-; ARM-NEXT:    vmov d17, r0, r1
-; ARM-NEXT:    vmov.f64 d18, d9
-; ARM-NEXT:    vadd.f64 d17, d17, d17
-; ARM-NEXT:    vmovgt.f64 d18, d16
-; ARM-NEXT:    vcmp.f64 d18, d9
-; ARM-NEXT:    vmrs APSR_nzcv, fpscr
-; ARM-NEXT:    vmovne.f64 d9, d17
-; ARM-NEXT:    vcvt.f32.f64 s0, d9
-; ARM-NEXT:    b LBB12_3
-; ARM-NEXT:  LBB12_2:
-; ARM-NEXT:    vldr s0, LCPI12_0
-; ARM-NEXT:  LBB12_3: @ %bb13
-; ARM-NEXT:    mov r4, sp
-; ARM-NEXT:    vld1.64 {d8, d9}, [r4:128]
-; ARM-NEXT:    vmov r0, s0
-; ARM-NEXT:    sub sp, r7, #4
-; ARM-NEXT:    pop {r4, r7, pc}
-; ARM-NEXT:    .p2align 2
-; ARM-NEXT:  @ %bb.4:
-; ARM-NEXT:    .data_region
-; ARM-NEXT:  LCPI12_0:
-; ARM-NEXT:    .long 0 @ float 0
-; ARM-NEXT:    .end_data_region
-;
-; THUMB-LABEL: debug_info:
-; THUMB:       @ %bb.0: @ %bb
-; THUMB-NEXT:    push {r4, r7, lr}
-; THUMB-NEXT:    add r7, sp, #4
-; THUMB-NEXT:    sub.w r4, sp, #16
-; THUMB-NEXT:    bfc r4, #0, #4
-; THUMB-NEXT:    mov sp, r4
-; THUMB-NEXT:    lsls r1, r2, #31
-; THUMB-NEXT:    vst1.64 {d8, d9}, [r4:128]
-; THUMB-NEXT:    beq LBB12_2
-; THUMB-NEXT:  @ %bb.1: @ %bb3
-; THUMB-NEXT:    ldr r1, [r7, #8]
-; THUMB-NEXT:    vmov s16, r0
-; THUMB-NEXT:    mov r0, r3
-; THUMB-NEXT:    mov r2, r3
-; THUMB-NEXT:    vmov d9, r3, r1
-; THUMB-NEXT:    mov r3, r1
-; THUMB-NEXT:    bl _pow
-; THUMB-NEXT:    vmov.f32 s0, #1.000000e+00
-; THUMB-NEXT:    vmov.f64 d16, #1.000000e+00
-; THUMB-NEXT:    vmov.f64 d18, d9
-; THUMB-NEXT:    vcmpe.f32 s16, s0
-; THUMB-NEXT:    vadd.f64 d16, d9, d16
-; THUMB-NEXT:    vmrs APSR_nzcv, fpscr
-; THUMB-NEXT:    it gt
-; THUMB-NEXT:    vmovgt.f64 d18, d16
-; THUMB-NEXT:    vcmp.f64 d18, d9
-; THUMB-NEXT:    vmov d17, r0, r1
-; THUMB-NEXT:    vmrs APSR_nzcv, fpscr
-; THUMB-NEXT:    vadd.f64 d17, d17, d17
-; THUMB-NEXT:    it ne
-; THUMB-NEXT:    vmovne.f64 d9, d17
-; THUMB-NEXT:    vcvt.f32.f64 s0, d9
-; THUMB-NEXT:    b LBB12_3
-; THUMB-NEXT:  LBB12_2:
-; THUMB-NEXT:    vldr s0, LCPI12_0
-; THUMB-NEXT:  LBB12_3: @ %bb13
-; THUMB-NEXT:    mov r4, sp
-; THUMB-NEXT:    vld1.64 {d8, d9}, [r4:128]
-; THUMB-NEXT:    subs r4, r7, #4
-; THUMB-NEXT:    vmov r0, s0
-; THUMB-NEXT:    mov sp, r4
-; THUMB-NEXT:    pop {r4, r7, pc}
-; THUMB-NEXT:    .p2align 2
-; THUMB-NEXT:  @ %bb.4:
-; THUMB-NEXT:    .data_region
-; THUMB-NEXT:  LCPI12_0:
-; THUMB-NEXT:    .long 0 @ float 0
-; THUMB-NEXT:    .end_data_region
+; ARM-ENABLE-LABEL: debug_info:
+; ARM-ENABLE:       @ %bb.0: @ %bb
+; ARM-ENABLE-NEXT:    push {r4, r7, lr}
+; ARM-ENABLE-NEXT:    add r7, sp, #4
+; ARM-ENABLE-NEXT:    sub r4, sp, #16
+; ARM-ENABLE-NEXT:    bfc r4, #0, #4
+; ARM-ENABLE-NEXT:    mov sp, r4
+; ARM-ENABLE-NEXT:    tst r2, #1
+; ARM-ENABLE-NEXT:    vst1.64 {d8, d9}, [r4:128]
+; ARM-ENABLE-NEXT:    beq LBB12_2
+; ARM-ENABLE-NEXT:  @ %bb.1: @ %bb3
+; ARM-ENABLE-NEXT:    ldr r1, [r7, #8]
+; ARM-ENABLE-NEXT:    vmov s16, r0
+; ARM-ENABLE-NEXT:    mov r0, r3
+; ARM-ENABLE-NEXT:    mov r2, r3
+; ARM-ENABLE-NEXT:    vmov d9, r3, r1
+; ARM-ENABLE-NEXT:    mov r3, r1
+; ARM-ENABLE-NEXT:    bl _pow
+; ARM-ENABLE-NEXT:    vmov.f32 s0, #1.000000e+00
+; ARM-ENABLE-NEXT:    vmov.f64 d16, #1.000000e+00
+; ARM-ENABLE-NEXT:    vadd.f64 d16, d9, d16
+; ARM-ENABLE-NEXT:    vcmpe.f32 s16, s0
+; ARM-ENABLE-NEXT:    vmrs APSR_nzcv, fpscr
+; ARM-ENABLE-NEXT:    vmov d17, r0, r1
+; ARM-ENABLE-NEXT:    vmov.f64 d18, d9
+; ARM-ENABLE-NEXT:    vadd.f64 d17, d17, d17
+; ARM-ENABLE-NEXT:    vmovgt.f64 d18, d16
+; ARM-ENABLE-NEXT:    vcmp.f64 d18, d9
+; ARM-ENABLE-NEXT:    vmrs APSR_nzcv, fpscr
+; ARM-ENABLE-NEXT:    vmovne.f64 d9, d17
+; ARM-ENABLE-NEXT:    vcvt.f32.f64 s0, d9
+; ARM-ENABLE-NEXT:    b LBB12_3
+; ARM-ENABLE-NEXT:  LBB12_2:
+; ARM-ENABLE-NEXT:    vldr s0, LCPI12_0
+; ARM-ENABLE-NEXT:  LBB12_3: @ %bb13
+; ARM-ENABLE-NEXT:    mov r4, sp
+; ARM-ENABLE-NEXT:    vld1.64 {d8, d9}, [r4:128]
+; ARM-ENABLE-NEXT:    vmov r0, s0
+; ARM-ENABLE-NEXT:    sub sp, r7, #4
+; ARM-ENABLE-NEXT:    pop {r4, r7, pc}
+; ARM-ENABLE-NEXT:    .p2align 2
+; ARM-ENABLE-NEXT:  @ %bb.4:
+; ARM-ENABLE-NEXT:    .data_region
+; ARM-ENABLE-NEXT:  LCPI12_0:
+; ARM-ENABLE-NEXT:    .long 0 @ float 0
+; ARM-ENABLE-NEXT:    .end_data_region
+;
+; ARM-DISABLE-LABEL: debug_info:
+; ARM-DISABLE:       @ %bb.0: @ %bb
+; ARM-DISABLE-NEXT:    push {r4, r7, lr}
+; ARM-DISABLE-NEXT:    add r7, sp, #4
+; ARM-DISABLE-NEXT:    sub r4, sp, #16
+; ARM-DISABLE-NEXT:    bfc r4, #0, #4
+; ARM-DISABLE-NEXT:    mov sp, r4
+; ARM-DISABLE-NEXT:    tst r2, #1
+; ARM-DISABLE-NEXT:    vst1.64 {d8, d9}, [r4:128]
+; ARM-DISABLE-NEXT:    beq LBB12_2
+; ARM-DISABLE-NEXT:  @ %bb.1: @ %bb3
+; ARM-DISABLE-NEXT:    ldr r1, [r7, #8]
+; ARM-DISABLE-NEXT:    vmov s16, r0
+; ARM-DISABLE-NEXT:    mov r0, r3
+; ARM-DISABLE-NEXT:    mov r2, r3
+; ARM-DISABLE-NEXT:    vmov d9, r3, r1
+; ARM-DISABLE-NEXT:    mov r3, r1
+; ARM-DISABLE-NEXT:    bl _pow
+; ARM-DISABLE-NEXT:    vmov.f32 s0, #1.000000e+00
+; ARM-DISABLE-NEXT:    vmov.f64 d16, #1.000000e+00
+; ARM-DISABLE-NEXT:    vadd.f64 d16, d9, d16
+; ARM-DISABLE-NEXT:    vcmpe.f32 s16, s0
+; ARM-DISABLE-NEXT:    vmrs APSR_nzcv, fpscr
+; ARM-DISABLE-NEXT:    vmov d17, r0, r1
+; ARM-DISABLE-NEXT:    vmov.f64 d18, d9
+; ARM-DISABLE-NEXT:    vadd.f64 d17, d17, d17
+; ARM-DISABLE-NEXT:    vmovgt.f64 d18, d16
+; ARM-DISABLE-NEXT:    vcmp.f64 d18, d9
+; ARM-DISABLE-NEXT:    vmrs APSR_nzcv, fpscr
+; ARM-DISABLE-NEXT:    vmovne.f64 d9, d17
+; ARM-DISABLE-NEXT:    vcvt.f32.f64 s0, d9
+; ARM-DISABLE-NEXT:    b LBB12_3
+; ARM-DISABLE-NEXT:  LBB12_2:
+; ARM-DISABLE-NEXT:    vldr s0, LCPI12_0
+; ARM-DISABLE-NEXT:  LBB12_3: @ %bb13
+; ARM-DISABLE-NEXT:    mov r4, sp
+; ARM-DISABLE-NEXT:    vld1.64 {d8, d9}, [r4:128]
+; ARM-DISABLE-NEXT:    vmov r0, s0
+; ARM-DISABLE-NEXT:    sub sp, r7, #4
+; ARM-DISABLE-NEXT:    pop {r4, r7, pc}
+; ARM-DISABLE-NEXT:    .p2align 2
+; ARM-DISABLE-NEXT:  @ %bb.4:
+; ARM-DISABLE-NEXT:    .data_region
+; ARM-DISABLE-NEXT:  LCPI12_0:
+; ARM-DISABLE-NEXT:    .long 0 @ float 0
+; ARM-DISABLE-NEXT:    .end_data_region
+;
+; THUMB-ENABLE-LABEL: debug_info:
+; THUMB-ENABLE:       @ %bb.0: @ %bb
+; THUMB-ENABLE-NEXT:    push {r4, r7, lr}
+; THUMB-ENABLE-NEXT:    add r7, sp, #4
+; THUMB-ENABLE-NEXT:    sub.w r4, sp, #16
+; THUMB-ENABLE-NEXT:    bfc r4, #0, #4
+; THUMB-ENABLE-NEXT:    mov sp, r4
+; THUMB-ENABLE-NEXT:    lsls r1, r2, #31
+; THUMB-ENABLE-NEXT:    vst1.64 {d8, d9}, [r4:128]
+; THUMB-ENABLE-NEXT:    beq LBB12_2
+; THUMB-ENABLE-NEXT:  @ %bb.1: @ %bb3
+; THUMB-ENABLE-NEXT:    ldr r1, [r7, #8]
+; THUMB-ENABLE-NEXT:    vmov s16, r0
+; THUMB-ENABLE-NEXT:    mov r0, r3
+; THUMB-ENABLE-NEXT:    mov r2, r3
+; THUMB-ENABLE-NEXT:    vmov d9, r3, r1
+; THUMB-ENABLE-NEXT:    mov r3, r1
+; THUMB-ENABLE-NEXT:    bl _pow
+; THUMB-ENABLE-NEXT:    vmov.f32 s0, #1.000000e+00
+; THUMB-ENABLE-NEXT:    vmov.f64 d16, #1.000000e+00
+; THUMB-ENABLE-NEXT:    vmov.f64 d18, d9
+; THUMB-ENABLE-NEXT:    vcmpe.f32 s16, s0
+; THUMB-ENABLE-NEXT:    vadd.f64 d16, d9, d16
+; THUMB-ENABLE-NEXT:    vmrs APSR_nzcv, fpscr
+; THUMB-ENABLE-NEXT:    it gt
+; THUMB-ENABLE-NEXT:    vmovgt.f64 d18, d16
+; THUMB-ENABLE-NEXT:    vcmp.f64 d18, d9
+; THUMB-ENABLE-NEXT:    vmov d17, r0, r1
+; THUMB-ENABLE-NEXT:    vmrs APSR_nzcv, fpscr
+; THUMB-ENABLE-NEXT:    vadd.f64 d17, d17, d17
+; THUMB-ENABLE-NEXT:    it ne
+; THUMB-ENABLE-NEXT:    vmovne.f64 d9, d17
+; THUMB-ENABLE-NEXT:    vcvt.f32.f64 s0, d9
+; THUMB-ENABLE-NEXT:    b LBB12_3
+; THUMB-ENABLE-NEXT:  LBB12_2:
+; THUMB-ENABLE-NEXT:    vldr s0, LCPI12_0
+; THUMB-ENABLE-NEXT:  LBB12_3: @ %bb13
+; THUMB-ENABLE-NEXT:    mov r4, sp
+; THUMB-ENABLE-NEXT:    vld1.64 {d8, d9}, [r4:128]
+; THUMB-ENABLE-NEXT:    subs r4, r7, #4
+; THUMB-ENABLE-NEXT:    vmov r0, s0
+; THUMB-ENABLE-NEXT:    mov sp, r4
+; THUMB-ENABLE-NEXT:    pop {r4, r7, pc}
+; THUMB-ENABLE-NEXT:    .p2align 2
+; THUMB-ENABLE-NEXT:  @ %bb.4:
+; THUMB-ENABLE-NEXT:    .data_region
+; THUMB-ENABLE-NEXT:  LCPI12_0:
+; THUMB-ENABLE-NEXT:    .long 0 @ float 0
+; THUMB-ENABLE-NEXT:    .end_data_region
+;
+; THUMB-DISABLE-LABEL: debug_info:
+; THUMB-DISABLE:       @ %bb.0: @ %bb
+; THUMB-DISABLE-NEXT:    push {r4, r7, lr}
+; THUMB-DISABLE-NEXT:    add r7, sp, #4
+; THUMB-DISABLE-NEXT:    sub.w r4, sp, #16
+; THUMB-DISABLE-NEXT:    bfc r4, #0, #4
+; THUMB-DISABLE-NEXT:    mov sp, r4
+; THUMB-DISABLE-NEXT:    lsls r1, r2, #31
+; THUMB-DISABLE-NEXT:    vst1.64 {d8, d9}, [r4:128]
+; THUMB-DISABLE-NEXT:    beq LBB12_2
+; THUMB-DISABLE-NEXT:  @ %bb.1: @ %bb3
+; THUMB-DISABLE-NEXT:    ldr r1, [r7, #8]
+; THUMB-DISABLE-NEXT:    vmov s16, r0
+; THUMB-DISABLE-NEXT:    mov r0, r3
+; THUMB-DISABLE-NEXT:    mov r2, r3
+; THUMB-DISABLE-NEXT:    vmov d9, r3, r1
+; THUMB-DISABLE-NEXT:    mov r3, r1
+; THUMB-DISABLE-NEXT:    bl _pow
+; THUMB-DISABLE-NEXT:    vmov.f32 s0, #1.000000e+00
+; THUMB-DISABLE-NEXT:    vmov.f64 d16, #1.000000e+00
+; THUMB-DISABLE-NEXT:    vmov.f64 d18, d9
+; THUMB-DISABLE-NEXT:    vcmpe.f32 s16, s0
+; THUMB-DISABLE-NEXT:    vadd.f64 d16, d9, d16
+; THUMB-DISABLE-NEXT:    vmrs APSR_nzcv, fpscr
+; THUMB-DISABLE-NEXT:    it gt
+; THUMB-DISABLE-NEXT:    vmovgt.f64 d18, d16
+; THUMB-DISABLE-NEXT:    vcmp.f64 d18, d9
+; THUMB-DISABLE-NEXT:    vmov d17, r0, r1
+; THUMB-DISABLE-NEXT:    vmrs APSR_nzcv, fpscr
+; THUMB-DISABLE-NEXT:    vadd.f64 d17, d17, d17
+; THUMB-DISABLE-NEXT:    it ne
+; THUMB-DISABLE-NEXT:    vmovne.f64 d9, d17
+; THUMB-DISABLE-NEXT:    vcvt.f32.f64 s0, d9
+; THUMB-DISABLE-NEXT:    b LBB12_3
+; THUMB-DISABLE-NEXT:  LBB12_2:
+; THUMB-DISABLE-NEXT:    vldr s0, LCPI12_0
+; THUMB-DISABLE-NEXT:  LBB12_3: @ %bb13
+; THUMB-DISABLE-NEXT:    mov r4, sp
+; THUMB-DISABLE-NEXT:    vld1.64 {d8, d9}, [r4:128]
+; THUMB-DISABLE-NEXT:    subs r4, r7, #4
+; THUMB-DISABLE-NEXT:    vmov r0, s0
+; THUMB-DISABLE-NEXT:    mov sp, r4
+; THUMB-DISABLE-NEXT:    pop {r4, r7, pc}
+; THUMB-DISABLE-NEXT:    .p2align 2
+; THUMB-DISABLE-NEXT:  @ %bb.4:
+; THUMB-DISABLE-NEXT:    .data_region
+; THUMB-DISABLE-NEXT:  LCPI12_0:
+; THUMB-DISABLE-NEXT:    .long 0 @ float 0
+; THUMB-DISABLE-NEXT:    .end_data_region
 bb:
   br i1 %or.cond, label %bb3, label %bb13
 
diff --git a/test/CodeGen/X86/avx-vzeroupper.ll b/test/CodeGen/X86/avx-vzeroupper.ll
--- a/test/CodeGen/X86/avx-vzeroupper.ll
+++ b/test/CodeGen/X86/avx-vzeroupper.ll
@@ -138,7 +138,7 @@
 ; VZ-NEXT:    testl %eax, %eax
 ; VZ-NEXT:    jne .LBB3_1
 ; VZ-NEXT:  # %bb.2: # %for.body.preheader
-; VZ-NEXT:    movl $4, %ebx
+; VZ-NEXT:    movl $-4, %ebx
 ; VZ-NEXT:    vmovaps (%rsp), %xmm0 # 16-byte Reload
 ; VZ-NEXT:    .p2align 4, 0x90
 ; VZ-NEXT:  .LBB3_3: # %for.body
@@ -147,7 +147,7 @@
 ; VZ-NEXT:    callq do_sse
 ; VZ-NEXT:    vmovaps g+{{.*}}(%rip), %xmm0
 ; VZ-NEXT:    callq do_sse
-; VZ-NEXT:    decl %ebx
+; VZ-NEXT:    incl %ebx
 ; VZ-NEXT:    jne .LBB3_3
 ; VZ-NEXT:  # %bb.4: # %for.end
 ; VZ-NEXT:    addq $16, %rsp
@@ -167,7 +167,7 @@
 ; FAST-ymm-zmm-NEXT:    testl %eax, %eax
 ; FAST-ymm-zmm-NEXT:    jne .LBB3_1
 ; FAST-ymm-zmm-NEXT:  # %bb.2: # %for.body.preheader
-; FAST-ymm-zmm-NEXT:    movl $4, %ebx
+; FAST-ymm-zmm-NEXT:    movl $-4, %ebx
 ; FAST-ymm-zmm-NEXT:    vmovaps (%rsp), %xmm0 # 16-byte Reload
 ; FAST-ymm-zmm-NEXT:    .p2align 4, 0x90
 ; FAST-ymm-zmm-NEXT:  .LBB3_3: # %for.body
@@ -176,7 +176,7 @@
 ; FAST-ymm-zmm-NEXT:    callq do_sse
 ; FAST-ymm-zmm-NEXT:    vmovaps g+{{.*}}(%rip), %xmm0
 ; FAST-ymm-zmm-NEXT:    callq do_sse
-; FAST-ymm-zmm-NEXT:    decl %ebx
+; FAST-ymm-zmm-NEXT:    incl %ebx
 ; FAST-ymm-zmm-NEXT:    jne .LBB3_3
 ; FAST-ymm-zmm-NEXT:  # %bb.4: # %for.end
 ; FAST-ymm-zmm-NEXT:    addq $16, %rsp
@@ -197,7 +197,7 @@
 ; BDVER2-NEXT:    jne .LBB3_1
 ; BDVER2-NEXT:  # %bb.2: # %for.body.preheader
 ; BDVER2-NEXT:    vmovaps (%rsp), %xmm0 # 16-byte Reload
-; BDVER2-NEXT:    movl $4, %ebx
+; BDVER2-NEXT:    movl $-4, %ebx
 ; BDVER2-NEXT:    .p2align 4, 0x90
 ; BDVER2-NEXT:  .LBB3_3: # %for.body
 ; BDVER2-NEXT:    # =>This Inner Loop Header: Depth=1
@@ -205,7 +205,7 @@
 ; BDVER2-NEXT:    callq do_sse
 ; BDVER2-NEXT:    vmovaps g+{{.*}}(%rip), %xmm0
 ; BDVER2-NEXT:    callq do_sse
-; BDVER2-NEXT:    decl %ebx
+; BDVER2-NEXT:    incl %ebx
 ; BDVER2-NEXT:    jne .LBB3_3
 ; BDVER2-NEXT:  # %bb.4: # %for.end
 ; BDVER2-NEXT:    addq $16, %rsp
@@ -226,7 +226,7 @@
 ; BTVER2-NEXT:    jne .LBB3_1
 ; BTVER2-NEXT:  # %bb.2: # %for.body.preheader
 ; BTVER2-NEXT:    vmovaps (%rsp), %xmm0 # 16-byte Reload
-; BTVER2-NEXT:    movl $4, %ebx
+; BTVER2-NEXT:    movl $-4, %ebx
 ; BTVER2-NEXT:    .p2align 4, 0x90
 ; BTVER2-NEXT:  .LBB3_3: # %for.body
 ; BTVER2-NEXT:    # =>This Inner Loop Header: Depth=1
@@ -234,7 +234,7 @@
 ; BTVER2-NEXT:    callq do_sse
 ; BTVER2-NEXT:    vmovaps g+{{.*}}(%rip), %xmm0
 ; BTVER2-NEXT:    callq do_sse
-; BTVER2-NEXT:    decl %ebx
+; BTVER2-NEXT:    incl %ebx
 ; BTVER2-NEXT:    jne .LBB3_3
 ; BTVER2-NEXT:  # %bb.4: # %for.end
 ; BTVER2-NEXT:    addq $16, %rsp
diff --git a/test/CodeGen/X86/lsr-wrap.ll b/test/CodeGen/X86/lsr-wrap.ll
--- a/test/CodeGen/X86/lsr-wrap.ll
+++ b/test/CodeGen/X86/lsr-wrap.ll
@@ -4,7 +4,7 @@
 ; not safe due to wraparound.
 
 ; CHECK: addb  $-4, %
-; CHECK: decw  %
+; CHECK: incw  %
 
 @g_19 = common global i32 0                       ; <i32*> [#uses=2]
 
diff --git a/test/CodeGen/X86/masked-iv-safe.ll b/test/CodeGen/X86/masked-iv-safe.ll
--- a/test/CodeGen/X86/masked-iv-safe.ll
+++ b/test/CodeGen/X86/masked-iv-safe.ll
@@ -5,7 +5,7 @@
 
 ; CHECK-LABEL: count_up
 ; CHECK-NOT: {{and|movz|sar|shl}}
-; CHECK: addq $8
+; CHECK: incq
 ; CHECK-NOT: {{and|movz|sar|shl}}
 ; CHECK: jne
 define void @count_up(double* %d, i64 %n) nounwind {
@@ -38,7 +38,7 @@
 
 ; CHECK-LABEL: count_down
 ; CHECK-NOT: {{and|movz|sar|shl}}
-; CHECK: addq $-8
+; CHECK: decq
 ; CHECK-NOT: {{and|movz|sar|shl}}
 ; CHECK: jne
 define void @count_down(double* %d, i64 %n) nounwind {
@@ -71,7 +71,7 @@
 
 ; CHECK-LABEL: count_up_signed
 ; CHECK-NOT: {{and|movz|sar|shl}}
-; CHECK: addq $8
+; CHECK: incq
 ; CHECK-NOT: {{and|movz|sar|shl}}
 ; CHECK: jne
 define void @count_up_signed(double* %d, i64 %n) nounwind {
@@ -106,7 +106,7 @@
 
 ; CHECK-LABEL: count_down_signed
 ; CHECK-NOT: {{and|movz|sar|shl}}
-; CHECK: addq $-8
+; CHECK: decq
 ; CHECK-NOT: {{and|movz|sar|shl}}
 ; CHECK: jne
 define void @count_down_signed(double* %d, i64 %n) nounwind {
@@ -141,7 +141,7 @@
 
 ; CHECK-LABEL: another_count_up
 ; CHECK-NOT: {{and|movz|sar|shl}}
-; CHECK: addq $8
+; CHECK: incq
 ; CHECK-NOT: {{and|movz|sar|shl}}
 ; CHECK: jne
 define void @another_count_up(double* %d, i64 %n) nounwind {
@@ -207,7 +207,7 @@
 
 ; CHECK-LABEL: another_count_up_signed
 ; CHECK-NOT: {{and|movz|sar|shl}}
-; CHECK: addq $8
+; CHECK: incq
 ; CHECK-NOT: {{and|movz|sar|shl}}
 ; CHECK: jne
 define void @another_count_up_signed(double* %d, i64 %n) nounwind {
@@ -242,7 +242,7 @@
 
 ; CHECK-LABEL: another_count_down_signed
 ; CHECK-NOT: {{and|movz|sar|shl}}
-; CHECK: addq $-8
+; CHECK: decq
 ; CHECK-NOT: {{and|movz|sar|shl}}
 ; CHECK: jne
 define void @another_count_down_signed(double* %d, i64 %n) nounwind {
diff --git a/test/CodeGen/X86/reverse_branches.ll b/test/CodeGen/X86/reverse_branches.ll
--- a/test/CodeGen/X86/reverse_branches.ll
+++ b/test/CodeGen/X86/reverse_branches.ll
@@ -89,38 +89,36 @@
 ; CHECK-NEXT:    ## Child Loop BB0_12 Depth 3
 ; CHECK-NEXT:    movq %rcx, %rdx
 ; CHECK-NEXT:    xorl %esi, %esi
-; CHECK-NEXT:    xorl %edi, %edi
-; CHECK-NEXT:    cmpl $999, %edi ## imm = 0x3E7
+; CHECK-NEXT:    cmpl $999, %esi ## imm = 0x3E7
 ; CHECK-NEXT:    jle LBB0_11
 ; CHECK-NEXT:    jmp LBB0_15
 ; CHECK-NEXT:    .p2align 4, 0x90
 ; CHECK-NEXT:  LBB0_14: ## %exit
 ; CHECK-NEXT:    ## in Loop: Header=BB0_11 Depth=2
-; CHECK-NEXT:    addq %rsi, %rbp
-; CHECK-NEXT:    incq %rdi
-; CHECK-NEXT:    decq %rsi
+; CHECK-NEXT:    addq $1000, %rdi ## imm = 0x3E8
 ; CHECK-NEXT:    addq $1001, %rdx ## imm = 0x3E9
-; CHECK-NEXT:    cmpq $-1000, %rbp ## imm = 0xFC18
+; CHECK-NEXT:    cmpq %rsi, %rdi
+; CHECK-NEXT:    leaq 1(%rsi), %rsi
 ; CHECK-NEXT:    jne LBB0_5
 ; CHECK-NEXT:  ## %bb.10: ## %for.cond18
 ; CHECK-NEXT:    ## in Loop: Header=BB0_11 Depth=2
-; CHECK-NEXT:    cmpl $999, %edi ## imm = 0x3E7
+; CHECK-NEXT:    cmpl $999, %esi ## imm = 0x3E7
 ; CHECK-NEXT:    jg LBB0_15
 ; CHECK-NEXT:  LBB0_11: ## %for.body20
 ; CHECK-NEXT:    ## Parent Loop BB0_9 Depth=1
 ; CHECK-NEXT:    ## => This Loop Header: Depth=2
 ; CHECK-NEXT:    ## Child Loop BB0_12 Depth 3
-; CHECK-NEXT:    movq $-1000, %rbp ## imm = 0xFC18
+; CHECK-NEXT:    movq $-1000, %rdi ## imm = 0xFC18
 ; CHECK-NEXT:    .p2align 4, 0x90
 ; CHECK-NEXT:  LBB0_12: ## %do.body.i
 ; CHECK-NEXT:    ## Parent Loop BB0_9 Depth=1
 ; CHECK-NEXT:    ## Parent Loop BB0_11 Depth=2
 ; CHECK-NEXT:    ## => This Inner Loop Header: Depth=3
-; CHECK-NEXT:    cmpb $120, 1000(%rdx,%rbp)
+; CHECK-NEXT:    cmpb $120, 1000(%rdx,%rdi)
 ; CHECK-NEXT:    je LBB0_14
 ; CHECK-NEXT:  ## %bb.13: ## %do.cond.i
 ; CHECK-NEXT:    ## in Loop: Header=BB0_12 Depth=3
-; CHECK-NEXT:    incq %rbp
+; CHECK-NEXT:    incq %rdi
 ; CHECK-NEXT:    jne LBB0_12
 ; CHECK-NEXT:  LBB0_5: ## %if.then
 ; CHECK-NEXT:    leaq {{.*}}(%rip), %rdi
diff --git a/test/CodeGen/X86/x86-shrink-wrapping.ll b/test/CodeGen/X86/x86-shrink-wrapping.ll
--- a/test/CodeGen/X86/x86-shrink-wrapping.ll
+++ b/test/CodeGen/X86/x86-shrink-wrapping.ll
@@ -79,7 +79,7 @@
 ; ENABLE-NEXT:    nop
 ; ENABLE-NEXT:    ## InlineAsm End
 ; ENABLE-NEXT:    xorl %eax, %eax
-; ENABLE-NEXT:    movl $10, %ecx
+; ENABLE-NEXT:    movl $-10, %ecx
 ; ENABLE-NEXT:    .p2align 4, 0x90
 ; ENABLE-NEXT:  LBB1_2: ## %for.body
 ; ENABLE-NEXT:    ## =>This Inner Loop Header: Depth=1
@@ -87,7 +87,7 @@
 ; ENABLE-NEXT:    movl $1, %edx
 ; ENABLE-NEXT:    ## InlineAsm End
 ; ENABLE-NEXT:    addl %edx, %eax
-; ENABLE-NEXT:    decl %ecx
+; ENABLE-NEXT:    incl %ecx
 ; ENABLE-NEXT:    jne LBB1_2
 ; ENABLE-NEXT:  ## %bb.3: ## %for.end
 ; ENABLE-NEXT:    shll $3, %eax
@@ -110,7 +110,7 @@
 ; DISABLE-NEXT:    nop
 ; DISABLE-NEXT:    ## InlineAsm End
 ; DISABLE-NEXT:    xorl %eax, %eax
-; DISABLE-NEXT:    movl $10, %ecx
+; DISABLE-NEXT:    movl $-10, %ecx
 ; DISABLE-NEXT:    .p2align 4, 0x90
 ; DISABLE-NEXT:  LBB1_2: ## %for.body
 ; DISABLE-NEXT:    ## =>This Inner Loop Header: Depth=1
@@ -118,7 +118,7 @@
 ; DISABLE-NEXT:    movl $1, %edx
 ; DISABLE-NEXT:    ## InlineAsm End
 ; DISABLE-NEXT:    addl %edx, %eax
-; DISABLE-NEXT:    decl %ecx
+; DISABLE-NEXT:    incl %ecx
 ; DISABLE-NEXT:    jne LBB1_2
 ; DISABLE-NEXT:  ## %bb.3: ## %for.end
 ; DISABLE-NEXT:    shll $3, %eax
@@ -173,7 +173,7 @@
 ; ENABLE-NEXT:    nop
 ; ENABLE-NEXT:    ## InlineAsm End
 ; ENABLE-NEXT:    xorl %eax, %eax
-; ENABLE-NEXT:    movl $10, %ecx
+; ENABLE-NEXT:    movl $-10, %ecx
 ; ENABLE-NEXT:    .p2align 4, 0x90
 ; ENABLE-NEXT:  LBB2_1: ## %for.body
 ; ENABLE-NEXT:    ## =>This Inner Loop Header: Depth=1
@@ -181,7 +181,7 @@
 ; ENABLE-NEXT:    movl $1, %edx
 ; ENABLE-NEXT:    ## InlineAsm End
 ; ENABLE-NEXT:    addl %edx, %eax
-; ENABLE-NEXT:    decl %ecx
+; ENABLE-NEXT:    incl %ecx
 ; ENABLE-NEXT:    jne LBB2_1
 ; ENABLE-NEXT:  ## %bb.2: ## %for.exit
 ; ENABLE-NEXT:    ## InlineAsm Start
@@ -199,7 +199,7 @@
 ; DISABLE-NEXT:    nop
 ; DISABLE-NEXT:    ## InlineAsm End
 ; DISABLE-NEXT:    xorl %eax, %eax
-; DISABLE-NEXT:    movl $10, %ecx
+; DISABLE-NEXT:    movl $-10, %ecx
 ; DISABLE-NEXT:    .p2align 4, 0x90
 ; DISABLE-NEXT:  LBB2_1: ## %for.body
 ; DISABLE-NEXT:    ## =>This Inner Loop Header: Depth=1
@@ -207,7 +207,7 @@
 ; DISABLE-NEXT:    movl $1, %edx
 ; DISABLE-NEXT:    ## InlineAsm End
 ; DISABLE-NEXT:    addl %edx, %eax
-; DISABLE-NEXT:    decl %ecx
+; DISABLE-NEXT:    incl %ecx
 ; DISABLE-NEXT:    jne LBB2_1
 ; DISABLE-NEXT:  ## %bb.2: ## %for.exit
 ; DISABLE-NEXT:    ## InlineAsm Start
@@ -254,7 +254,7 @@
 ; ENABLE-NEXT:    nop
 ; ENABLE-NEXT:    ## InlineAsm End
 ; ENABLE-NEXT:    xorl %eax, %eax
-; ENABLE-NEXT:    movl $10, %ecx
+; ENABLE-NEXT:    movl $-10, %ecx
 ; ENABLE-NEXT:    .p2align 4, 0x90
 ; ENABLE-NEXT:  LBB3_2: ## %for.body
 ; ENABLE-NEXT:    ## =>This Inner Loop Header: Depth=1
@@ -262,7 +262,7 @@
 ; ENABLE-NEXT:    movl $1, %edx
 ; ENABLE-NEXT:    ## InlineAsm End
 ; ENABLE-NEXT:    addl %edx, %eax
-; ENABLE-NEXT:    decl %ecx
+; ENABLE-NEXT:    incl %ecx
 ; ENABLE-NEXT:    jne LBB3_2
 ; ENABLE-NEXT:  ## %bb.3: ## %for.end
 ; ENABLE-NEXT:    ## InlineAsm Start
@@ -288,7 +288,7 @@
 ; DISABLE-NEXT:    nop
 ; DISABLE-NEXT:    ## InlineAsm End
 ; DISABLE-NEXT:    xorl %eax, %eax
-; DISABLE-NEXT:    movl $10, %ecx
+; DISABLE-NEXT:    movl $-10, %ecx
 ; DISABLE-NEXT:    .p2align 4, 0x90
 ; DISABLE-NEXT:  LBB3_2: ## %for.body
 ; DISABLE-NEXT:    ## =>This Inner Loop Header: Depth=1
@@ -296,7 +296,7 @@
 ; DISABLE-NEXT:    movl $1, %edx
 ; DISABLE-NEXT:    ## InlineAsm End
 ; DISABLE-NEXT:    addl %edx, %eax
-; DISABLE-NEXT:    decl %ecx
+; DISABLE-NEXT:    incl %ecx
 ; DISABLE-NEXT:    jne LBB3_2
 ; DISABLE-NEXT:  ## %bb.3: ## %for.end
 ; DISABLE-NEXT:    ## InlineAsm Start
@@ -354,7 +354,7 @@
 ; ENABLE-NEXT:    nop
 ; ENABLE-NEXT:    ## InlineAsm End
 ; ENABLE-NEXT:    xorl %eax, %eax
-; ENABLE-NEXT:    movl $10, %ecx
+; ENABLE-NEXT:    movl $-10, %ecx
 ; ENABLE-NEXT:    .p2align 4, 0x90
 ; ENABLE-NEXT:  LBB4_2: ## %for.body
 ; ENABLE-NEXT:    ## =>This Inner Loop Header: Depth=1
@@ -362,7 +362,7 @@
 ; ENABLE-NEXT:    movl $1, %edx
 ; ENABLE-NEXT:    ## InlineAsm End
 ; ENABLE-NEXT:    addl %edx, %eax
-; ENABLE-NEXT:    decl %ecx
+; ENABLE-NEXT:    incl %ecx
 ; ENABLE-NEXT:    jne LBB4_2
 ; ENABLE-NEXT:  ## %bb.3: ## %for.end
 ; ENABLE-NEXT:    shll $3, %eax
@@ -383,7 +383,7 @@
 ; DISABLE-NEXT:    nop
 ; DISABLE-NEXT:    ## InlineAsm End
 ; DISABLE-NEXT:    xorl %eax, %eax
-; DISABLE-NEXT:    movl $10, %ecx
+; DISABLE-NEXT:    movl $-10, %ecx
 ; DISABLE-NEXT:    .p2align 4, 0x90
 ; DISABLE-NEXT:  LBB4_2: ## %for.body
 ; DISABLE-NEXT:    ## =>This Inner Loop Header: Depth=1
@@ -391,7 +391,7 @@
 ; DISABLE-NEXT:    movl $1, %edx
 ; DISABLE-NEXT:    ## InlineAsm End
 ; DISABLE-NEXT:    addl %edx, %eax
-; DISABLE-NEXT:    decl %ecx
+; DISABLE-NEXT:    incl %ecx
 ; DISABLE-NEXT:    jne LBB4_2
 ; DISABLE-NEXT:  ## %bb.3: ## %for.end
 ; DISABLE-NEXT:    shll $3, %eax
@@ -460,14 +460,14 @@
 ; ENABLE-NEXT:    ## InlineAsm Start
 ; ENABLE-NEXT:    nop
 ; ENABLE-NEXT:    ## InlineAsm End
-; ENABLE-NEXT:    movl $10, %eax
+; ENABLE-NEXT:    movl $-10, %eax
 ; ENABLE-NEXT:    .p2align 4, 0x90
 ; ENABLE-NEXT:  LBB6_2: ## %for.body
 ; ENABLE-NEXT:    ## =>This Inner Loop Header: Depth=1
 ; ENABLE-NEXT:    ## InlineAsm Start
 ; ENABLE-NEXT:    addl $1, %ebx
 ; ENABLE-NEXT:    ## InlineAsm End
-; ENABLE-NEXT:    decl %eax
+; ENABLE-NEXT:    incl %eax
 ; ENABLE-NEXT:    jne LBB6_2
 ; ENABLE-NEXT:  ## %bb.3: ## %for.exit
 ; ENABLE-NEXT:    ## InlineAsm Start
@@ -492,14 +492,14 @@
 ; DISABLE-NEXT:    ## InlineAsm Start
 ; DISABLE-NEXT:    nop
 ; DISABLE-NEXT:    ## InlineAsm End
-; DISABLE-NEXT:    movl $10, %eax
+; DISABLE-NEXT:    movl $-10, %eax
 ; DISABLE-NEXT:    .p2align 4, 0x90
 ; DISABLE-NEXT:  LBB6_2: ## %for.body
 ; DISABLE-NEXT:    ## =>This Inner Loop Header: Depth=1
 ; DISABLE-NEXT:    ## InlineAsm Start
 ; DISABLE-NEXT:    addl $1, %ebx
 ; DISABLE-NEXT:    ## InlineAsm End
-; DISABLE-NEXT:    decl %eax
+; DISABLE-NEXT:    incl %eax
 ; DISABLE-NEXT:    jne LBB6_2
 ; DISABLE-NEXT:  ## %bb.3: ## %for.exit
 ; DISABLE-NEXT:    ## InlineAsm Start
diff --git a/test/CodeGen/X86/x86-win64-shrink-wrapping.ll b/test/CodeGen/X86/x86-win64-shrink-wrapping.ll
--- a/test/CodeGen/X86/x86-win64-shrink-wrapping.ll
+++ b/test/CodeGen/X86/x86-win64-shrink-wrapping.ll
@@ -62,12 +62,12 @@
 ;
 ; CHECK: nop
 ; CHECK: xorl [[SUM:%eax]], [[SUM]]
-; CHECK-NEXT: movl $10, [[IV:%e[a-z]+]]
+; CHECK-NEXT: movl $-10, [[IV:%e[a-z]+]]
 ;
 ; CHECK: [[LOOP_LABEL:.LBB[0-9_]+]]: # %for.body
 ; CHECK: movl $1, [[TMP:%e[a-z]+]]
 ; CHECK: addl [[TMP]], [[SUM]]
-; CHECK-NEXT: decl [[IV]]
+; CHECK-NEXT: incl [[IV]]
 ; CHECK-NEXT: jne [[LOOP_LABEL]]
 ; Next BB.
 ; CHECK: nop
@@ -83,7 +83,7 @@
 ; CHECK: addl %edx, %edx
 ; CHECK: movl %edx, %eax
 ;
-; DISABLE: [[EPILOG_BB]]: # %if.end
+; DISABLE: [[EPILOG_BB]]: # %for.end
 ; DISABLE-NEXT: popq %rbx
 ;
 ; CHECK: retq