Index: llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp =================================================================== --- llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp +++ llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp @@ -2818,8 +2818,10 @@ case ISD::BITREVERSE: case ISD::BSWAP: case ISD::CTLZ: + case ISD::CTLZ_ZERO_UNDEF: case ISD::CTPOP: case ISD::CTTZ: + case ISD::CTTZ_ZERO_UNDEF: case ISD::FNEG: case ISD::FCANONICALIZE: Res = WidenVecRes_Unary(N); Index: llvm/test/CodeGen/PowerPC/vec_clz.ll =================================================================== --- llvm/test/CodeGen/PowerPC/vec_clz.ll +++ llvm/test/CodeGen/PowerPC/vec_clz.ll @@ -38,3 +38,21 @@ ; CHECK: vclzd 2, 2 ; CHECK: blr } + +declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1 immarg) + +define <2 x i32> @illegal_ctlz(<2 x i32> %v1) { + %v2 = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %v1, i1 true) + ret <2 x i32> %v2 +} +; CHECK-LABEL: @illegal_ctlz +; CHECK: vclzw + +declare <2 x i32> @llvm.cttz.v2i32(<2 x i32>, i1 immarg) + +define <2 x i32> @illegal_cttz(<2 x i32> %v1) { + %v2 = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %v1, i1 true) + ret <2 x i32> %v2 +} +; CHECK-LABEL: @illegal_cttz +; CHECK: vpopcntw