Index: llvm/lib/Target/ARM/ARM.h =================================================================== --- llvm/lib/Target/ARM/ARM.h +++ llvm/lib/Target/ARM/ARM.h @@ -69,6 +69,7 @@ void initializeARMConstantIslandsPass(PassRegistry &); void initializeARMExpandPseudoPass(PassRegistry &); void initializeThumb2SizeReducePass(PassRegistry &); +void initializeThumb2ITBlockPass(PassRegistry &); void initializeMVEVPTBlockPass(PassRegistry &); } // end namespace llvm Index: llvm/lib/Target/ARM/Thumb2CondExecution.cpp =================================================================== --- llvm/lib/Target/ARM/Thumb2CondExecution.cpp +++ llvm/lib/Target/ARM/Thumb2CondExecution.cpp @@ -1,4 +1,4 @@ -//===-- Thumb2ITBlockPass.cpp - Insert Thumb-2 IT blocks ------------------===// +//===-- Thumb2CondExecution.cpp - Insert Thumb-2 IT and MVE VPT blocks ----===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. @@ -31,13 +31,16 @@ using namespace llvm; #define DEBUG_TYPE "thumb2-it" +#define PASS_NAME "Thumb IT blocks insertion pass" STATISTIC(NumITs, "Number of IT blocks inserted"); STATISTIC(NumMovedInsts, "Number of predicated instructions moved"); +using RegisterSet = SmallSet; + namespace { - class Thumb2ITBlockPass : public MachineFunctionPass { + class Thumb2ITBlock : public MachineFunctionPass { public: static char ID; @@ -46,7 +49,7 @@ const TargetRegisterInfo *TRI; ARMFunctionInfo *AFI; - Thumb2ITBlockPass() : MachineFunctionPass(ID) {} + Thumb2ITBlock() : MachineFunctionPass(ID) {} bool runOnMachineFunction(MachineFunction &Fn) override; @@ -56,33 +59,32 @@ } StringRef getPassName() const override { - return "Thumb IT blocks insertion pass"; + return PASS_NAME; } private: bool MoveCopyOutOfITBlock(MachineInstr *MI, ARMCC::CondCodes CC, ARMCC::CondCodes OCC, - SmallSet &Defs, - SmallSet &Uses); - bool InsertITInstructions(MachineBasicBlock &MBB); + RegisterSet &Defs, RegisterSet &Uses); + bool InsertITInstructions(MachineBasicBlock &Block); }; - char Thumb2ITBlockPass::ID = 0; + char Thumb2ITBlock::ID = 0; } // end anonymous namespace +INITIALIZE_PASS(Thumb2ITBlock, DEBUG_TYPE, PASS_NAME, false, false) + /// TrackDefUses - Tracking what registers are being defined and used by /// instructions in the IT block. This also tracks "dependencies", i.e. uses /// in the IT block that are defined before the IT instruction. -static void TrackDefUses(MachineInstr *MI, - SmallSet &Defs, - SmallSet &Uses, +static void TrackDefUses(MachineInstr *MI, RegisterSet &Defs, RegisterSet &Uses, const TargetRegisterInfo *TRI) { - SmallVector LocalDefs; - SmallVector LocalUses; + using RegList = SmallVector; + RegList LocalDefs; + RegList LocalUses; - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { - MachineOperand &MO = MI->getOperand(i); + for (auto &MO : MI->operands()) { if (!MO.isReg()) continue; unsigned Reg = MO.getReg(); @@ -94,27 +96,21 @@ LocalDefs.push_back(Reg); } - for (unsigned i = 0, e = LocalUses.size(); i != e; ++i) { - unsigned Reg = LocalUses[i]; - for (MCSubRegIterator Subreg(Reg, TRI, /*IncludeSelf=*/true); - Subreg.isValid(); ++Subreg) - Uses.insert(*Subreg); - } + auto InsertUsesDefs = [&](RegList &Regs) { + for (unsigned Reg : Regs) + for (MCSubRegIterator Subreg(Reg, TRI, /*IncludeSelf=*/true); + Subreg.isValid(); ++Subreg) + Uses.insert(*Subreg); + }; - for (unsigned i = 0, e = LocalDefs.size(); i != e; ++i) { - unsigned Reg = LocalDefs[i]; - for (MCSubRegIterator Subreg(Reg, TRI, /*IncludeSelf=*/true); - Subreg.isValid(); ++Subreg) - Defs.insert(*Subreg); - if (Reg == ARM::CPSR) - continue; - } + InsertUsesDefs(LocalDefs); + InsertUsesDefs(LocalUses); } /// Clear kill flags for any uses in the given set. This will likely /// conservatively remove more kill flags than are necessary, but removing them /// is safer than incorrect kill flags remaining on instructions. -static void ClearKillFlags(MachineInstr *MI, SmallSet &Uses) { +static void ClearKillFlags(MachineInstr *MI, RegisterSet &Uses) { for (MachineOperand &MO : MI->operands()) { if (!MO.isReg() || MO.isDef() || !MO.isKill()) continue; @@ -137,10 +133,9 @@ } bool -Thumb2ITBlockPass::MoveCopyOutOfITBlock(MachineInstr *MI, - ARMCC::CondCodes CC, ARMCC::CondCodes OCC, - SmallSet &Defs, - SmallSet &Uses) { +Thumb2ITBlock::MoveCopyOutOfITBlock(MachineInstr *MI, + ARMCC::CondCodes CC, ARMCC::CondCodes OCC, + RegisterSet &Defs, RegisterSet &Uses) { if (!isCopy(MI)) return false; // llvm models select's as two-address instructions. That means a copy @@ -180,10 +175,13 @@ // Then peek at the next instruction to see if it's predicated on CC or OCC. // If not, then there is nothing to be gained by moving the copy. - MachineBasicBlock::iterator I = MI; ++I; + MachineBasicBlock::iterator I = MI; + ++I; MachineBasicBlock::iterator E = MI->getParent()->end(); + while (I != E && I->isDebugInstr()) ++I; + if (I != E) { unsigned NPredReg = 0; ARMCC::CondCodes NCC = getITInstrPredicate(*I, NPredReg); @@ -193,19 +191,19 @@ return false; } -bool Thumb2ITBlockPass::InsertITInstructions(MachineBasicBlock &MBB) { +bool Thumb2ITBlock::InsertITInstructions(MachineBasicBlock &Block) { bool Modified = false; + RegisterSet Defs, Uses; + MachineBasicBlock::iterator BlockIter = Block.begin(); + MachineBasicBlock::iterator EndIter = Block.end(); - SmallSet Defs; - SmallSet Uses; - MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end(); - while (MBBI != E) { - MachineInstr *MI = &*MBBI; + while (BlockIter != EndIter) { + MachineInstr *MI = &*BlockIter; DebugLoc dl = MI->getDebugLoc(); unsigned PredReg = 0; ARMCC::CondCodes CC = getITInstrPredicate(*MI, PredReg); if (CC == ARMCC::AL) { - ++MBBI; + ++BlockIter; continue; } @@ -214,7 +212,7 @@ TrackDefUses(MI, Defs, Uses, TRI); // Insert an IT instruction. - MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(ARM::t2IT)) + MachineInstrBuilder MIB = BuildMI(Block, BlockIter, dl, TII->get(ARM::t2IT)) .addImm(CC); // Add implicit use of ITSTATE to IT block instructions. @@ -223,7 +221,7 @@ MachineInstr *LastITMI = MI; MachineBasicBlock::iterator InsertPos = MIB.getInstr(); - ++MBBI; + ++BlockIter; // Form IT block. ARMCC::CondCodes OCC = ARMCC::getOppositeCondition(CC); @@ -234,12 +232,12 @@ if (!restrictIT) { // Branches, including tricky ones like LDM_RET, need to end an IT // block so check the instruction we just put in the block. - for (; MBBI != E && Pos && - (!MI->isBranch() && !MI->isReturn()) ; ++MBBI) { - if (MBBI->isDebugInstr()) + for (; BlockIter != EndIter && Pos && + (!MI->isBranch() && !MI->isReturn()) ; ++BlockIter) { + if (BlockIter->isDebugInstr()) continue; - MachineInstr *NMI = &*MBBI; + MachineInstr *NMI = &*BlockIter; MI = NMI; unsigned NPredReg = 0; @@ -248,14 +246,15 @@ Mask |= ((NCC ^ CC) & 1) << Pos; // Add implicit use of ITSTATE. NMI->addOperand(MachineOperand::CreateReg(ARM::ITSTATE, false/*ifDef*/, - true/*isImp*/, false/*isKill*/)); + true/*isImp*/, + false/*isKill*/)); LastITMI = NMI; } else { if (NCC == ARMCC::AL && MoveCopyOutOfITBlock(NMI, CC, OCC, Defs, Uses)) { - --MBBI; - MBB.remove(NMI); - MBB.insert(InsertPos, NMI); + --BlockIter; + Block.remove(NMI); + Block.insert(InsertPos, NMI); ClearKillFlags(MI, Uses); ++NumMovedInsts; continue; @@ -275,7 +274,7 @@ LastITMI->findRegisterUseOperand(ARM::ITSTATE)->setIsKill(); // Finalize the bundle. - finalizeBundle(MBB, InsertPos.getInstrIterator(), + finalizeBundle(Block, InsertPos.getInstrIterator(), ++LastITMI->getIterator()); Modified = true; @@ -285,7 +284,7 @@ return Modified; } -bool Thumb2ITBlockPass::runOnMachineFunction(MachineFunction &Fn) { +bool Thumb2ITBlock::runOnMachineFunction(MachineFunction &Fn) { const ARMSubtarget &STI = static_cast(Fn.getSubtarget()); if (!STI.isThumb2()) @@ -299,11 +298,8 @@ return false; bool Modified = false; - for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E; ) { - MachineBasicBlock &MBB = *MFI; - ++MFI; + for (auto &MBB : Fn ) Modified |= InsertITInstructions(MBB); - } if (Modified) AFI->setHasITBlocks(true); @@ -313,9 +309,7 @@ /// createThumb2ITBlockPass - Returns an instance of the Thumb2 IT blocks /// insertion pass. -FunctionPass *llvm::createThumb2ITBlockPass() { - return new Thumb2ITBlockPass(); -} +FunctionPass *llvm::createThumb2ITBlockPass() { return new Thumb2ITBlock(); } #undef DEBUG_TYPE #define DEBUG_TYPE "arm-mve-vpt" @@ -396,14 +390,14 @@ MachineInstrBuilder MIBuilder = BuildMI(Block, MBIter, dl, TII->get(ARM::t2VPST)); - MachineInstr *LastITMI = MI; + MachineInstr *LastMI = MI; MachineBasicBlock::iterator InsertPos = MIBuilder.getInstr(); // The mask value for the VPST instruction is T = 0b1000 = 8 MIBuilder.addImm(VPTMaskValue::T); finalizeBundle(Block, InsertPos.getInstrIterator(), - ++LastITMI->getIterator()); + ++LastMI->getIterator()); Modified = true; LLVM_DEBUG(dbgs() << "VPT block created for: "; MI->dump(););