Index: lib/Basic/Targets/RISCV.h =================================================================== --- lib/Basic/Targets/RISCV.h +++ lib/Basic/Targets/RISCV.h @@ -57,6 +57,15 @@ ArrayRef getGCCRegNames() const override; + int getEHDataRegisterNumber(unsigned RegNo) const override { + if (RegNo == 0) + return 10; + else if (RegNo == 1) + return 11; + else + return -1; + } + ArrayRef getGCCRegAliases() const override; bool validateAsmConstraint(const char *&Name, Index: test/CodeGen/builtins-riscv.c =================================================================== --- /dev/null +++ test/CodeGen/builtins-riscv.c @@ -0,0 +1,11 @@ +// RUN: %clang_cc1 -Wall -Werror -triple riscv32 -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s +// RUN: %clang_cc1 -Wall -Werror -triple riscv64 -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s + +void test_eh_return_data_regno() +{ + // CHECK: store volatile i32 10 + // CHECK: store volatile i32 11 + volatile int res; + res = __builtin_eh_return_data_regno(0); + res = __builtin_eh_return_data_regno(1); +}