Index: ELF/Arch/RISCV.cpp
===================================================================
--- ELF/Arch/RISCV.cpp
+++ ELF/Arch/RISCV.cpp
@@ -32,10 +32,16 @@
   RelExpr getRelExpr(RelType Type, const Symbol &S,
                      const uint8_t *Loc) const override;
   void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
+  void relaxTlsGdToIe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
+  void relaxTlsGdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
+  void relaxTlsLdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
+  void relaxTlsIeToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
 };
 
 } // end anonymous namespace
 
+static uint64_t DTPOffset = 0x800;
+
 enum Op {
   ADDI = 0x13,
   AUIPC = 0x17,
@@ -73,6 +79,15 @@
   PltRel = R_RISCV_JUMP_SLOT;
   RelativeRel = R_RISCV_RELATIVE;
   SymbolicRel = Config->Is64 ? R_RISCV_64 : R_RISCV_32;
+  if (Config->Is64) {
+    TlsModuleIndexRel = R_RISCV_TLS_DTPMOD64;
+    TlsOffsetRel = R_RISCV_TLS_DTPREL64;
+    TlsGotRel = R_RISCV_TLS_TPREL64;
+  } else {
+    TlsModuleIndexRel = R_RISCV_TLS_DTPMOD32;
+    TlsOffsetRel = R_RISCV_TLS_DTPREL32;
+    TlsGotRel = R_RISCV_TLS_TPREL32;
+  }
   GotRel = SymbolicRel;
 
   // .got[0] = _DYNAMIC
@@ -202,6 +217,10 @@
   case R_RISCV_PCREL_LO12_I:
   case R_RISCV_PCREL_LO12_S:
     return R_RISCV_PC_INDIRECT;
+  case R_RISCV_TLS_GD_HI20:
+    return R_TLSGD_PC;
+  case R_RISCV_TLS_GOT_HI20:
+    return R_GOT_OFF;
   case R_RISCV_RELAX:
   case R_RISCV_ALIGN:
     return R_HINT;
@@ -317,7 +336,8 @@
 
   case R_RISCV_GOT_HI20:
   case R_RISCV_PCREL_HI20:
-  case R_RISCV_HI20: {
+  case R_RISCV_HI20:
+  case R_RISCV_TLS_GD_HI20: {
     uint64_t Hi = Val + 0x800;
     checkInt(Loc, SignExtend64(Hi, Bits) >> 12, 20, Type);
     write32le(Loc, (read32le(Loc) & 0xFFF) | (Hi & 0xFFFFF000));
@@ -383,6 +403,13 @@
     write32le(Loc, Val);
     return;
 
+  case R_RISCV_TLS_DTPREL32:
+    write32le(Loc, Val - DTPOffset);
+    break;
+  case R_RISCV_TLS_DTPREL64:
+    write64le(Loc, Val - DTPOffset);
+    break;
+
   case R_RISCV_ALIGN:
   case R_RISCV_RELAX:
     return; // Ignored (for now)
@@ -404,6 +431,22 @@
   }
 }
 
+void RISCV::relaxTlsGdToIe(uint8_t *Loc, RelType Type, uint64_t Val) const {
+  relocateOne(Loc, Type, Val);
+}
+
+void RISCV::relaxTlsGdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const {
+  relocateOne(Loc, Type, Val);
+}
+
+void RISCV::relaxTlsLdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const {
+  relocateOne(Loc, Type, Val);
+}
+
+void RISCV::relaxTlsIeToLe(uint8_t *Loc, RelType Type, uint64_t Val) const {
+  relocateOne(Loc, Type, Val);
+}
+
 TargetInfo *elf::getRISCVTargetInfo() {
   static RISCV Target;
   return &Target;
Index: ELF/InputSection.cpp
===================================================================
--- ELF/InputSection.cpp
+++ ELF/InputSection.cpp
@@ -587,7 +587,8 @@
                        });
 
   for (auto It = Range.first; It != Range.second; ++It)
-    if (It->Type == R_RISCV_PCREL_HI20 || It->Type == R_RISCV_GOT_HI20)
+    if (It->Type == R_RISCV_PCREL_HI20 || It->Type == R_RISCV_GOT_HI20 ||
+        It->Type == R_RISCV_TLS_GD_HI20)
       return &*It;
 
   error("R_RISCV_PCREL_LO12 relocation points to " + IS->getObjMsg(D->Value) +
@@ -620,6 +621,8 @@
     // offset to reach 0x1000 of TCB/thread-library data and 0xf000 of the
     // program's TLS segment.
     return S.getVA(0) - 0x7000;
+  case EM_RISCV:
+    return S.getVA(0);
   default:
     llvm_unreachable("unhandled Config->EMachine");
   }
Index: ELF/Relocations.cpp
===================================================================
--- ELF/Relocations.cpp
+++ ELF/Relocations.cpp
@@ -217,6 +217,9 @@
   if (Config->EMachine == EM_MIPS)
     return handleMipsTlsRelocation(Type, Sym, C, Offset, Addend, Expr);
 
+  // RISC-V psABI doesn't specify TLS relaxation.
+  bool NoRelax = Config->EMachine == EM_RISCV;
+
   if (oneof<R_AARCH64_TLSDESC_PAGE, R_TLSDESC, R_TLSDESC_CALL, R_TLSDESC_PC>(
           Expr) &&
       Config->Shared) {
@@ -271,10 +274,14 @@
 
   if (oneof<R_AARCH64_TLSDESC_PAGE, R_TLSDESC, R_TLSDESC_CALL, R_TLSDESC_PC,
             R_TLSGD_GOT, R_TLSGD_GOTPLT, R_TLSGD_PC>(Expr)) {
-    if (Config->Shared) {
+    if (NoRelax || Config->Shared) {
       if (In.Got->addDynTlsEntry(Sym)) {
         uint64_t Off = In.Got->getGlobalDynOffset(Sym);
-        Main->RelaDyn->addReloc(Target->TlsModuleIndexRel, In.Got, Off, &Sym);
+        if (Config->Shared)
+          Main->RelaDyn->addReloc(Target->TlsModuleIndexRel, In.Got, Off, &Sym);
+        else
+          // DTPMOD is constant 1 when producing an executable for RISC-V.
+          In.Got->Relocations.push_back({R_ADDEND, Target->SymbolicRel, Off, 1, &Sym});
 
         // If the symbol is preemptible we need the dynamic linker to write
         // the offset too.
Index: ELF/Writer.cpp
===================================================================
--- ELF/Writer.cpp
+++ ELF/Writer.cpp
@@ -416,9 +416,10 @@
 
       Add(Part.Dynamic);
       Add(Part.DynStrTab);
-      Add(Part.RelaDyn);
     }
 
+    Add(Part.RelaDyn);
+
     if (Config->RelrPackDynRelocs) {
       Part.RelrDyn = make<RelrSection<ELFT>>();
       Add(Part.RelrDyn);
Index: test/ELF/riscv-tls-gd.s
===================================================================
--- /dev/null
+++ test/ELF/riscv-tls-gd.s
@@ -0,0 +1,119 @@
+# REQUIRES: riscv
+# RUN: echo '.tbss; .globl b, c; b: .zero 4; c:' > %t.s
+# RUN: echo '.globl __tls_get_addr; __tls_get_addr:' > %tga.s
+
+## RISC-V psABI doesn't specify TLS relaxation. The instructions are not relaxed.
+## We should verify that dynamic relocations and the contents of .got are correct.
+
+# RUN: llvm-mc -filetype=obj -triple=riscv32 %s -o %t.o
+# RUN: llvm-mc -filetype=obj -triple=riscv32 %t.s -o %t1.o
+# RUN: ld.lld -shared -soname=t1.so %t1.o -o %t1.so
+# RUN: llvm-mc -filetype=obj -triple=riscv32 %tga.s -o %tga.o
+## 32-bit GD
+# RUN: ld.lld -shared %t.o %t1.o -o %t.so
+# RUN: llvm-readobj -r %t.so | FileCheck --check-prefix=GD32-REL %s
+# RUN: llvm-objdump -d --no-show-raw-insn %t.so | FileCheck --check-prefix=GD32 %s
+## 32-bit GD->LE
+# RUN: ld.lld %t.o %t1.o %tga.o -o %t
+# RUN: llvm-readelf -r %t | FileCheck --check-prefix=NOREL %s
+# RUN: llvm-readelf -x .got %t | FileCheck --check-prefix=LE32-GOT %s
+# RUN: ld.lld -pie %t.o %t1.o %tga.o -o %t
+# RUN: llvm-readelf -r %t | FileCheck --check-prefix=NOREL %s
+# RUN: llvm-readelf -x .got %t | FileCheck --check-prefix=LE32-GOT %s
+## 32-bit GD->IE
+# RUN: ld.lld %t.o %t1.so %tga.o -o %t
+# RUN: llvm-readobj -r %t | FileCheck --check-prefix=IE32-REL %s
+# RUN: llvm-readelf -x .got %t | FileCheck --check-prefix=IE32-GOT %s
+
+# RUN: llvm-mc -filetype=obj -triple=riscv64 %s -o %t.o
+# RUN: llvm-mc -filetype=obj -triple=riscv64 %t.s -o %t1.o
+# RUN: ld.lld -shared -soname=t1.so %t1.o -o %t1.so
+# RUN: llvm-mc -filetype=obj -triple=riscv64 %tga.s -o %tga.o
+## 64-bit GD
+# RUN: ld.lld -shared %t.o %t1.o -o %t.so
+# RUN: llvm-readobj -r %t.so | FileCheck --check-prefix=GD64-REL %s
+# RUN: llvm-objdump -d --no-show-raw-insn %t.so | FileCheck --check-prefix=GD64 %s
+## 64-bit GD->LE
+# RUN: ld.lld %t.o %t1.o %tga.o -o %t
+# RUN: llvm-readelf -r %t | FileCheck --check-prefix=NOREL %s
+# RUN: llvm-readelf -x .got %t | FileCheck --check-prefix=LE64-GOT %s
+# RUN: ld.lld -pie %t.o %t1.o %tga.o -o %t
+# RUN: llvm-readelf -r %t | FileCheck --check-prefix=NOREL %s
+# RUN: llvm-readelf -x .got %t | FileCheck --check-prefix=LE64-GOT %s
+## 64-bit GD->IE
+# RUN: ld.lld %t.o %t1.so %tga.o -o %t
+# RUN: llvm-readobj -r %t | FileCheck --check-prefix=IE64-REL %s
+# RUN: llvm-readelf -x .got %t | FileCheck --check-prefix=IE64-GOT %s
+
+# GD32-REL:      .rela.dyn {
+# GD32-REL-NEXT:   0x2070 R_RISCV_TLS_DTPMOD32 a 0x0
+# GD32-REL-NEXT:   0x2074 R_RISCV_TLS_DTPREL32 a 0x0
+# GD32-REL-NEXT:   0x2078 R_RISCV_TLS_DTPMOD32 b 0x0
+# GD32-REL-NEXT:   0x207C R_RISCV_TLS_DTPREL32 b 0x0
+# GD32-REL-NEXT: }
+
+## &DTPMOD(a) - . = 0x2070 - 0x1000 = 4096*1+112
+# GD32:      1000: auipc a0, 1
+# GD32-NEXT:       addi a0, a0, 112
+# GD32-NEXT:       auipc ra, 0
+# GD32-NEXT:       jalr ra, ra, 56
+
+## &DTPMOD(b) - . = 0x2078 - 0x1010 = 4096*1+104
+# GD32:      1010: auipc a0, 1
+# GD32-NEXT:       addi a0, a0, 104
+# GD32-NEXT:       auipc ra, 0
+# GD32-NEXT:       jalr ra, ra, 40
+
+# GD64-REL:      .rela.dyn {
+# GD64-REL-NEXT:   0x20E0 R_RISCV_TLS_DTPMOD64 a 0x0
+# GD64-REL-NEXT:   0x20E8 R_RISCV_TLS_DTPREL64 a 0x0
+# GD64-REL-NEXT:   0x20F0 R_RISCV_TLS_DTPMOD64 b 0x0
+# GD64-REL-NEXT:   0x20F8 R_RISCV_TLS_DTPREL64 b 0x0
+# GD64-REL-NEXT: }
+
+## &DTPMOD(a) - . = 0x20e0 - 0x1010 = 4096*1+224
+# GD64:      1000: auipc a0, 1
+# GD64-NEXT:       addi a0, a0, 224
+# GD64-NEXT:       auipc ra, 0
+# GD64-NEXT:       jalr ra, ra, 56
+
+## &DTPMOD(b) - . = 0x20f0 - 0x1010 = 4096*1+224
+# GD64:      1010: auipc a0, 1
+# GD64-NEXT:       addi a0, a0, 224
+# GD64-NEXT:       auipc ra, 0
+# GD64-NEXT:       jalr ra, ra, 40
+
+# NOREL: no relocations
+
+## .got contains pre-populated values: [a@dtpmod, a@dtprel, b@dtpmod, b@dtprel]
+# LE32-GOT: section '.got':
+# LE32-GOT-NEXT: 0x{{[0-9a-f]+}} 01000000 08f8ffff 01000000 0cf8ffff
+# LE64-GOT: section '.got':
+# LE64-GOT-NEXT: 0x{{[0-9a-f]+}} 01000000 00000000 08f8ffff ffffffff
+# LE64-GOT-NEXT: 0x{{[0-9a-f]+}} 01000000 00000000 0cf8ffff ffffffff
+
+## b is external
+# IE32-REL:      .rela.dyn {
+# IE32-REL-NEXT:   0x1206C R_RISCV_TLS_DTPREL32 b 0x0
+# IE32-REL-NEXT: }
+# IE32-GOT:      section '.got':
+# IE32-GOT-NEXT: 0x00012060 01000000 08f8ffff 01000000 00000000
+
+# IE64-REL:      .rela.dyn {
+# IE64-REL-NEXT:   0x120D8 R_RISCV_TLS_DTPREL64 b 0x0
+# IE64-REL-NEXT: }
+# IE64-GOT:      section '.got':
+# IE64-GOT-NEXT: 0x000120c0 01000000 00000000 08f8ffff ffffffff
+# IE64-GOT-NEXT: 0x000120d0 01000000 00000000 00000000 00000000
+
+la.tls.gd a0,a
+call __tls_get_addr@plt
+
+la.tls.gd a0,b
+call __tls_get_addr@plt
+
+.section .tbss
+.globl a
+.zero 8
+a:
+.zero 4