Index: llvm/trunk/utils/gn/TODO.txt
===================================================================
--- llvm/trunk/utils/gn/TODO.txt
+++ llvm/trunk/utils/gn/TODO.txt
@@ -4,7 +4,7 @@
   - once there are more projects, have an llvm_enable_projects arg, modeled
     after llvm_targets_to_build in the GN build
   - a check-all build target that runs test of all projects
-- more targets (AMDGPU ARC AVR MSP430 NVPTX XCore)
+- more targets (AMDGPU ARC AVR MSP430 XCore)
   - example: https://reviews.llvm.org/D56416
 - investigate feasibility of working `gn check`
 
Index: llvm/trunk/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
===================================================================
--- llvm/trunk/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
+++ llvm/trunk/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
@@ -1,5 +1,7 @@
 import("//llvm/lib/DebugInfo/PDB/enable_dia.gni")
 import("//llvm/lib/Target/targets.gni")
+import("//llvm/lib/Target/targets_with_asm_parsers.gni")
+import("//llvm/lib/Target/targets_with_disassemblers.gni")
 import("//llvm/triples.gni")
 import("//llvm/utils/gn/build/buildflags.gni")
 import("//llvm/utils/gn/build/libs/edit/enable.gni")
@@ -367,12 +369,18 @@
     input = "$target_name.in"
     output = "$target_gen_dir/$target_name"
 
+    if (defined(invoker.all_targets)) {
+      all_targets = invoker.all_targets
+    } else {
+      all_targets = llvm_targets_to_build
+    }
+
     # Build something like
     # `LLVM_ENUM_ASM_PARSERS=LLVM_ASM_PARSER(ARM)\nLLVM_ASM_PARSER(X86)\n`. Note
     # that \n is a literal '\' followed by a literal 'n', not a newline
     # character.  (write_cmake_config.py replaces that with a real newline).
     value = ""
-    foreach(target, llvm_targets_to_build) {
+    foreach(target, all_targets) {
       value = "$value${invoker.value}($target)\n"
     }
     values = [ "${invoker.key}=$value" ]
@@ -382,6 +390,7 @@
 write_target_def_file("AsmParsers.def") {
   key = "LLVM_ENUM_ASM_PARSERS"
   value = "LLVM_ASM_PARSER"
+  all_targets = targets_with_asm_parsers
 }
 
 write_target_def_file("AsmPrinters.def") {
@@ -392,6 +401,7 @@
 write_target_def_file("Disassemblers.def") {
   key = "LLVM_ENUM_DISASSEMBLERS"
   value = "LLVM_DISASSEMBLER"
+  all_targets = targets_with_disassemblers
 }
 
 write_target_def_file("Targets.def") {
Index: llvm/trunk/utils/gn/secondary/llvm/lib/Target/BUILD.gn
===================================================================
--- llvm/trunk/utils/gn/secondary/llvm/lib/Target/BUILD.gn
+++ llvm/trunk/utils/gn/secondary/llvm/lib/Target/BUILD.gn
@@ -1,4 +1,6 @@
 import("//llvm/lib/Target/targets.gni")
+import("//llvm/lib/Target/targets_with_asm_parsers.gni")
+import("//llvm/lib/Target/targets_with_disassemblers.gni")
 
 # This build file has two parts:
 # 1. The actual //llvm/lib/Target build target, which is just a static
@@ -56,7 +58,7 @@
 
 group("AllTargetsAsmParsers") {
   deps = []
-  foreach(target, llvm_targets_to_build) {
+  foreach(target, targets_with_asm_parsers) {
     deps += [ "$target/AsmParser" ]
   }
 }
@@ -70,7 +72,7 @@
 
 group("AllTargetsDisassemblers") {
   deps = []
-  foreach(target, llvm_targets_to_build) {
+  foreach(target, targets_with_disassemblers) {
     deps += [ "$target/Disassembler" ]
   }
 }
Index: llvm/trunk/utils/gn/secondary/llvm/lib/Target/NVPTX/BUILD.gn
===================================================================
--- llvm/trunk/utils/gn/secondary/llvm/lib/Target/NVPTX/BUILD.gn
+++ llvm/trunk/utils/gn/secondary/llvm/lib/Target/NVPTX/BUILD.gn
@@ -0,0 +1,69 @@
+import("//llvm/utils/TableGen/tablegen.gni")
+
+tablegen("NVPTXGenDAGISel") {
+  visibility = [ ":LLVMNVPTXCodeGen" ]
+  args = [ "-gen-dag-isel" ]
+  td_file = "NVPTX.td"
+}
+
+static_library("LLVMNVPTXCodeGen") {
+  deps = [
+    ":NVPTXGenDAGISel",
+    "MCTargetDesc",
+    "TargetInfo",
+    "//llvm/include/llvm/Config:llvm-config",
+    "//llvm/lib/Analysis",
+    "//llvm/lib/CodeGen",
+    "//llvm/lib/CodeGen/AsmPrinter",
+    "//llvm/lib/CodeGen/SelectionDAG",
+    "//llvm/lib/IR",
+    "//llvm/lib/MC",
+    "//llvm/lib/Support",
+    "//llvm/lib/Target",
+    "//llvm/lib/Transforms/IPO",
+    "//llvm/lib/Transforms/Scalar",
+    "//llvm/lib/Transforms/Utils",
+    "//llvm/lib/Transforms/Vectorize",
+  ]
+  include_dirs = [ "." ]
+  sources = [
+    "NVPTXAllocaHoisting.cpp",
+    "NVPTXAsmPrinter.cpp",
+    "NVPTXAssignValidGlobalNames.cpp",
+    "NVPTXFrameLowering.cpp",
+    "NVPTXGenericToNVVM.cpp",
+    "NVPTXISelDAGToDAG.cpp",
+    "NVPTXISelLowering.cpp",
+    "NVPTXImageOptimizer.cpp",
+    "NVPTXInstrInfo.cpp",
+    "NVPTXLowerAggrCopies.cpp",
+    "NVPTXLowerAlloca.cpp",
+    "NVPTXLowerArgs.cpp",
+    "NVPTXMCExpr.cpp",
+    "NVPTXPeephole.cpp",
+    "NVPTXPrologEpilogPass.cpp",
+    "NVPTXProxyRegErasure.cpp",
+    "NVPTXRegisterInfo.cpp",
+    "NVPTXReplaceImageHandles.cpp",
+    "NVPTXSubtarget.cpp",
+    "NVPTXTargetMachine.cpp",
+    "NVPTXTargetTransformInfo.cpp",
+    "NVPTXUtilities.cpp",
+    "NVVMIntrRange.cpp",
+    "NVVMReflect.cpp",
+  ]
+}
+
+# This is a bit different from most build files: Due to this group
+# having the directory's name, "//llvm/lib/Target/NVPTX" will refer to this
+# target, which pulls in the code in this directory *and all subdirectories*.
+# For most other directories, "//llvm/lib/Foo" only pulls in the code directly
+# in "llvm/lib/Foo". The forwarding targets in //llvm/lib/Target expect this
+# different behavior.
+group("NVPTX") {
+  deps = [
+    ":LLVMNVPTXCodeGen",
+    "MCTargetDesc",
+    "TargetInfo",
+  ]
+}
Index: llvm/trunk/utils/gn/secondary/llvm/lib/Target/NVPTX/MCTargetDesc/BUILD.gn
===================================================================
--- llvm/trunk/utils/gn/secondary/llvm/lib/Target/NVPTX/MCTargetDesc/BUILD.gn
+++ llvm/trunk/utils/gn/secondary/llvm/lib/Target/NVPTX/MCTargetDesc/BUILD.gn
@@ -0,0 +1,51 @@
+import("//llvm/utils/TableGen/tablegen.gni")
+
+tablegen("NVPTXGenAsmWriter") {
+  visibility = [ ":MCTargetDesc" ]
+  args = [ "-gen-asm-writer" ]
+  td_file = "../NVPTX.td"
+}
+
+tablegen("NVPTXGenInstrInfo") {
+  visibility = [ ":MCTargetDesc" ]
+  args = [ "-gen-instr-info" ]
+  td_file = "../NVPTX.td"
+}
+
+tablegen("NVPTXGenRegisterInfo") {
+  visibility = [ ":MCTargetDesc" ]
+  args = [ "-gen-register-info" ]
+  td_file = "../NVPTX.td"
+}
+
+tablegen("NVPTXGenSubtargetInfo") {
+  visibility = [ ":MCTargetDesc" ]
+  args = [ "-gen-subtarget" ]
+  td_file = "../NVPTX.td"
+}
+
+static_library("MCTargetDesc") {
+  output_name = "LLVMNVPTXDesc"
+
+  # This should contain tablegen targets generating .inc files included
+  # by other targets. .inc files only used by .cpp files in this directory
+  # should be in deps on the static_library instead.
+  public_deps = [
+    ":NVPTXGenInstrInfo",
+    ":NVPTXGenRegisterInfo",
+    ":NVPTXGenSubtargetInfo",
+  ]
+  deps = [
+    ":NVPTXGenAsmWriter",
+    "//llvm/lib/MC",
+    "//llvm/lib/Support",
+    "//llvm/lib/Target/NVPTX/TargetInfo",
+  ]
+  include_dirs = [ ".." ]
+  sources = [
+    "NVPTXInstPrinter.cpp",
+    "NVPTXMCAsmInfo.cpp",
+    "NVPTXMCTargetDesc.cpp",
+    "NVPTXTargetStreamer.cpp",
+  ]
+}
Index: llvm/trunk/utils/gn/secondary/llvm/lib/Target/NVPTX/TargetInfo/BUILD.gn
===================================================================
--- llvm/trunk/utils/gn/secondary/llvm/lib/Target/NVPTX/TargetInfo/BUILD.gn
+++ llvm/trunk/utils/gn/secondary/llvm/lib/Target/NVPTX/TargetInfo/BUILD.gn
@@ -0,0 +1,10 @@
+static_library("TargetInfo") {
+  output_name = "LLVMNVPTXInfo"
+  deps = [
+    "//llvm/lib/Support",
+  ]
+  include_dirs = [ ".." ]
+  sources = [
+    "NVPTXTargetInfo.cpp",
+  ]
+}
Index: llvm/trunk/utils/gn/secondary/llvm/lib/Target/targets.gni
===================================================================
--- llvm/trunk/utils/gn/secondary/llvm/lib/Target/targets.gni
+++ llvm/trunk/utils/gn/secondary/llvm/lib/Target/targets.gni
@@ -26,6 +26,7 @@
     "Hexagon",
     "Lanai",
     "Mips",
+    "NVPTX",
     "PowerPC",
     "Sparc",
     "SystemZ",
@@ -55,6 +56,8 @@
     # Nothing to do.
   } else if (target == "Mips") {
     # Nothing to do.
+  } else if (target == "NVPTX") {
+    # Nothing to do.
   } else if (target == "PowerPC") {
     llvm_build_PowerPC = true
   } else if (target == "RISCV") {
Index: llvm/trunk/utils/gn/secondary/llvm/lib/Target/targets_with_asm_parsers.gni
===================================================================
--- llvm/trunk/utils/gn/secondary/llvm/lib/Target/targets_with_asm_parsers.gni
+++ llvm/trunk/utils/gn/secondary/llvm/lib/Target/targets_with_asm_parsers.gni
@@ -0,0 +1,9 @@
+import("//llvm/lib/Target/targets.gni")
+
+targets_with_asm_parsers = []
+foreach(target, llvm_targets_to_build) {
+  # These targets don't have AsmParsers.
+  if (target != "ARC" && target != "NVPTX" && target != "XCore") {
+    targets_with_asm_parsers += [ target ]
+  }
+}
Index: llvm/trunk/utils/gn/secondary/llvm/lib/Target/targets_with_disassemblers.gni
===================================================================
--- llvm/trunk/utils/gn/secondary/llvm/lib/Target/targets_with_disassemblers.gni
+++ llvm/trunk/utils/gn/secondary/llvm/lib/Target/targets_with_disassemblers.gni
@@ -0,0 +1,9 @@
+import("//llvm/lib/Target/targets.gni")
+
+targets_with_disassemblers = []
+foreach(target, llvm_targets_to_build) {
+  # These targets don't have Disassemblers.
+  if (target != "NVPTX") {
+    targets_with_disassemblers += [ target ]
+  }
+}