Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -6304,7 +6304,7 @@
   // to the same base address. Collect bytes offsets from Base address into 
   // ByteOffsets. 
   SDValue CombinedValue;
-  SmallVector<int64_t, 4> ByteOffsets(Width);
+  SmallVector<int64_t, 4> ByteOffsets(Width, INT64_MAX);
   int64_t FirstOffset = INT64_MAX;
   StoreSDNode *FirstStore = nullptr;
   Optional<BaseIndexOffset> Base;
@@ -6365,8 +6365,9 @@
       FirstStore = Store;
       FirstOffset = ByteOffsetFromBase;
     }
-    // Map the offset in the store and the offset in the combined value.
-    if (Offset < 0 || Offset >= Width)
+    // Map the offset in the store and the offset in the combined value, and
+    // early return if it has been set before.
+    if (Offset < 0 || Offset >= Width || ByteOffsets[Offset] != INT64_MAX)
       return SDValue();
     ByteOffsets[Offset] = ByteOffsetFromBase;
   }
Index: llvm/test/CodeGen/PowerPC/store-combine.ll
===================================================================
--- llvm/test/CodeGen/PowerPC/store-combine.ll
+++ llvm/test/CodeGen/PowerPC/store-combine.ll
@@ -574,3 +574,23 @@
   store i8 %conv5, i8* %arrayidx6, align 1
   ret void
 }
+; This was found when testing the hexxagon in testsuite
+; i8* p; i8 v;
+; p[0] = v;
+; p[1] = v;
+define void @store_same_value_to_consecutive_mem(i8* %p, i8 zeroext %v) {
+; CHECK-PPC64LE-LABEL: store_same_value_to_consecutive_mem 
+; CHECK-PPC64LE:       # %bb.0: # %entry 
+; CHECK-PPC64LE-NEXT:    stb 4, 0(3) 
+; CHECK-PPC64LE-NEXT:    stb 4, 1(3) 
+;
+; CHECK-PPC64-LABEL: store_same_value_to_consecutive_mem 
+; CHECK-PPC64:       # %bb.0: # %entry
+; CHECK-PPC64-NEXT:    stb 4, 0(3)
+; CHECK-PPC64-NEXT:    stb 4, 1(3)
+entry:
+  store i8 %v, i8* %p, align 1
+  %arrayidx1 = getelementptr inbounds i8, i8* %p, i64 1
+  store i8 %v, i8* %arrayidx1, align 1
+  ret void
+}