Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -12588,6 +12588,10 @@
   SDValue N0 = N->getOperand(0);
   EVT VT = N->getValueType(0);
 
+  // fold (fp_to_sint undef) -> undef
+  if (N0.isUndef())
+    return DAG.getUNDEF(VT);
+
   // fold (fp_to_sint c1fp) -> c1
   if (isConstantFPBuildVectorOrConstantFP(N0))
     return DAG.getNode(ISD::FP_TO_SINT, SDLoc(N), VT, N0);
@@ -12599,6 +12603,10 @@
   SDValue N0 = N->getOperand(0);
   EVT VT = N->getValueType(0);
 
+  // fold (fp_to_uint undef) -> undef
+  if (N0.isUndef())
+    return DAG.getUNDEF(VT);
+
   // fold (fp_to_uint c1fp) -> c1
   if (isConstantFPBuildVectorOrConstantFP(N0))
     return DAG.getNode(ISD::FP_TO_UINT, SDLoc(N), VT, N0);
Index: lib/CodeGen/SelectionDAG/SelectionDAG.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -4440,6 +4440,11 @@
     if (Operand.isUndef())
       return getUNDEF(VT);
     break;
+  case ISD::FP_TO_SINT:
+  case ISD::FP_TO_UINT:
+    if (Operand.isUndef())
+      return getUNDEF(VT);
+    break;
   case ISD::SINT_TO_FP:
   case ISD::UINT_TO_FP:
     // [us]itofp(undef) = 0, because the result value is bounded.
Index: test/CodeGen/WebAssembly/target-features.ll
===================================================================
--- test/CodeGen/WebAssembly/target-features.ll
+++ test/CodeGen/WebAssembly/target-features.ll
@@ -9,16 +9,16 @@
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
-define void @foo(i32* %p1) #0 {
+define void @foo(i32* %p1, float %f2) #0 {
   %a = atomicrmw min i32* undef, i32 42 seq_cst
-  %v = fptoui float undef to i32
+  %v = fptoui float %f2 to i32
   store i32 %v, i32* %p1
   ret void
 }
 
-define void @bar(i32* %p1) #1 {
+define void @bar(i32* %p1, float %f2) #1 {
   %a = atomicrmw min i32* undef, i32 42 seq_cst
-  %v = fptoui float undef to i32
+  %v = fptoui float %f2 to i32
   store i32 %v, i32* %p1
   ret void
 }
Index: test/CodeGen/X86/vec_fp_to_int-widen.ll
===================================================================
--- test/CodeGen/X86/vec_fp_to_int-widen.ll
+++ test/CodeGen/X86/vec_fp_to_int-widen.ll
@@ -106,9 +106,7 @@
 define <4 x i32> @fptosi_4f64_to_2i32(<2 x double> %a) {
 ; SSE-LABEL: fptosi_4f64_to_2i32:
 ; SSE:       # %bb.0:
-; SSE-NEXT:    cvttpd2dq %xmm0, %xmm1
 ; SSE-NEXT:    cvttpd2dq %xmm0, %xmm0
-; SSE-NEXT:    unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
 ; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: fptosi_4f64_to_2i32:
Index: test/CodeGen/X86/vec_fp_to_int.ll
===================================================================
--- test/CodeGen/X86/vec_fp_to_int.ll
+++ test/CodeGen/X86/vec_fp_to_int.ll
@@ -108,9 +108,7 @@
 define <4 x i32> @fptosi_4f64_to_2i32(<2 x double> %a) {
 ; SSE-LABEL: fptosi_4f64_to_2i32:
 ; SSE:       # %bb.0:
-; SSE-NEXT:    cvttpd2dq %xmm0, %xmm1
 ; SSE-NEXT:    cvttpd2dq %xmm0, %xmm0
-; SSE-NEXT:    unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
 ; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: fptosi_4f64_to_2i32: