Index: lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp =================================================================== --- lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp +++ lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp @@ -166,12 +166,20 @@ for (uint64_t Byte = 0, End = PltContents.size(); Byte + 7 < End; Byte += 4) { uint32_t Insn = support::endian::read32le(PltContents.data() + Byte); + uint64_t Off = 0; + // Check for optional bti c that prefixes adrp in BTI enabled entries + if ((Insn & 0xd503245f) == 0xd503245f) { + Off = 4; + Insn = support::endian::read32le(PltContents.data() + Byte + Off); + } // Check for adrp. if ((Insn & 0x9f000000) != 0x90000000) continue; + Off += 4; uint64_t Imm = (((PltSectionVA + Byte) >> 12) << 12) + (((Insn >> 29) & 3) << 12) + (((Insn >> 5) & 0x3ffff) << 14); - uint32_t Insn2 = support::endian::read32le(PltContents.data() + Byte + 4); + uint32_t Insn2 = + support::endian::read32le(PltContents.data() + Byte + Off); // Check for: ldr Xt, [Xn, #pimm]. if (Insn2 >> 22 == 0x3e5) { Imm += ((Insn2 >> 10) & 0xfff) << 3; Index: test/tools/llvm-objdump/AArch64/plt.test =================================================================== --- test/tools/llvm-objdump/AArch64/plt.test +++ test/tools/llvm-objdump/AArch64/plt.test @@ -2,4 +2,21 @@ # CHECK: Disassembly of section .plt: # CHECK: __cfi_slowpath@plt: +# CHECK-NEXT: adrp x16, {{.*}} # CHECK: bl {{.*}} <__cfi_slowpath@plt> + +// RUN: llvm-objdump -d -mattr=+bti %p/Inputs/bti-pac-plt.elf-aarch64 | \ +// RUN: FileCheck --check-prefix=CHECK-BTI %s +# CHECK-BTI: bl {{.*}} +# CHECK-BTI: bl {{.*}} +# CHECK-BTI: bl {{.*}} +# CHECK-BTI: Disassembly of section .plt: +# CHECK-BTI: f1@plt: +# CHECK-BTI-NEXT: bti c +# CHECK-BTI-NEXT: adrp x16, {{.*}} +# CHECK-BTI: f2@plt: +# CHECK-BTI-NEXT: bti c +# CHECK-BTI-NEXT: adrp x16, {{.*}} +# CHECK-BTI: f3@plt: +# CHECK-BTI-NEXT: bti c +# CHECK-BTI-NEXT: adrp x16, {{.*}}