diff --git a/llvm/lib/CodeGen/LiveDebugValues.cpp b/llvm/lib/CodeGen/LiveDebugValues.cpp --- a/llvm/lib/CodeGen/LiveDebugValues.cpp +++ b/llvm/lib/CodeGen/LiveDebugValues.cpp @@ -430,9 +430,15 @@ MachineFunction *MF = MI.getParent()->getParent(); MachineInstr *NewDebugInstr; - auto ProcessVarLoc = [&MI, &OpenRanges, &Transfers, + auto ProcessVarLoc = [&MI, &OpenRanges, &Transfers, &DebugInstr, &VarLocIDs](VarLoc &VL, MachineInstr *NewDebugInstr) { unsigned LocId = VarLocIDs.insert(VL); + + // Close this variable's previous location range. + DebugVariable V(DebugInstr->getDebugVariable(), + DebugInstr->getDebugLoc()->getInlinedAt()); + OpenRanges.erase(V); + OpenRanges.insert(LocId, VL.Var); // The newly created DBG_VALUE instruction NewDebugInstr must be inserted // after MI. Keep track of the pairing. @@ -714,6 +720,10 @@ }); VarLocSet &VLS = OutLocs[CurMBB]; Changed = VLS |= OpenRanges.getVarLocs(); + // New OutLocs set may be different due to spill, restore or register + // copy instruction processing. + if (Changed) + VLS = OpenRanges.getVarLocs(); OpenRanges.clear(); return Changed; } diff --git a/llvm/test/DebugInfo/X86/fission-ranges.ll b/llvm/test/DebugInfo/X86/fission-ranges.ll --- a/llvm/test/DebugInfo/X86/fission-ranges.ll +++ b/llvm/test/DebugInfo/X86/fission-ranges.ll @@ -5,6 +5,18 @@ ; RUN: llc -dwarf-version=5 -O0 %s -mtriple=x86_64-unknown-linux-gnu -filetype=obj -o %t ; RUN: llvm-dwarfdump -v %t | FileCheck --check-prefix=V5RNGLISTS %s +; RUN: llc -O0 %s -mtriple=x86_64-unknown-linux-gnu -stop-after=livedebugvalues -o -| FileCheck --check-prefix=CHECK-MIR %s + +; LiveDebugValues should produce DBG_VALUEs for variable "b" in successive +; blocks once we recognize that it is spilled. +; CHECK-MIR: ![[BDIVAR:[0-9]+]] = !DILocalVariable(name: "b" +; CHECK-MIR: DBG_VALUE $rsp, 0, ![[BDIVAR]], !DIExpression(DW_OP_constu, 32, DW_OP_minus) +; CHECK-MIR-LABEL: bb.6.for.inc13: +; CHECK-MIR: DBG_VALUE $rsp, 0, ![[BDIVAR]], !DIExpression(DW_OP_constu, 32, DW_OP_minus) +; CHECK-MIR-LABEL: bb.7.for.inc16: +; CHECK-MIR: DBG_VALUE $rsp, 0, ![[BDIVAR]], !DIExpression(DW_OP_constu, 32, DW_OP_minus) + + ; CHECK: .debug_info contents: ; CHECK: DW_TAG_compile_unit ; CHECK-NEXT: DW_AT_stmt_list @@ -31,22 +43,25 @@ ; CHECK: [[A]]: ; CHECK-NEXT: Addr idx 2 (w/ length 169): DW_OP_consts +0, DW_OP_stack_value -; CHECK-NEXT: Addr idx 3 (w/ length 25): DW_OP_reg0 RAX +; CHECK-NEXT: Addr idx 3 (w/ length 15): DW_OP_reg0 RAX +; CHECK-NEXT: Addr idx 4 (w/ length 18): DW_OP_breg7 RSP-8 ; CHECK: [[E]]: -; CHECK-NEXT: Addr idx 4 (w/ length 19): DW_OP_reg0 RAX +; CHECK-NEXT: Addr idx 5 (w/ length 23): DW_OP_reg0 RAX ; CHECK: [[B]]: -; CHECK-NEXT: Addr idx 5 (w/ length 17): DW_OP_reg0 RAX +; CHECK-NEXT: Addr idx 6 (w/ length 15): DW_OP_reg0 RAX +; CHECK-NEXT: Addr idx 7 (w/ length 66): DW_OP_breg7 RSP-32 ; CHECK: [[D]]: -; CHECK-NEXT: Addr idx 6 (w/ length 17): DW_OP_reg0 RAX +; CHECK-NEXT: Addr idx 8 (w/ length 15): DW_OP_reg0 RAX +; CHECK-NEXT: Addr idx 9 (w/ length 42): DW_OP_breg7 RSP-20 ; Make sure we don't produce any relocations in any .dwo section (though in particular, debug_info.dwo) ; HDR-NOT: .rela.{{.*}}.dwo ; Make sure we have enough stuff in the debug_addr to cover the address indexes -; (6 is the last index in debug_loc.dwo, making 7 entries of 8 bytes each, 7 * 8 -; == 56 base 10 == 38 base 16) +; (9 is the last index in debug_loc.dwo, making 10 entries of 8 bytes each, +; 10 * 8 == 80 base 10 == 50 base 16) -; HDR: .debug_addr 00000038 +; HDR: .debug_addr 00000050 ; HDR-NOT: .rela.{{.*}}.dwo ; Check for the existence of a DWARF v5-style range list table in the .debug_rnglists @@ -134,13 +149,13 @@ tail call void @llvm.dbg.value(metadata i32* @c, metadata !19, metadata !DIExpression()), !dbg !40 %and = and i32 %and2, 1, !dbg !32 %inc = add i32 %e.01, 1, !dbg !39 - tail call void @llvm.dbg.value(metadata i32 %inc, metadata !18, metadata !DIExpression()), !dbg !39 + tail call void @llvm.dbg.value(metadata i32 %inc, metadata !18, metadata !DIExpression()), !dbg !42 %exitcond = icmp eq i32 %inc, 30, !dbg !39 br i1 %exitcond, label %for.inc10, label %for.body9, !dbg !39 for.inc10: ; preds = %for.body9 %inc11 = add nsw i32 %b.03, 1, !dbg !38 - tail call void @llvm.dbg.value(metadata i32 %inc11, metadata !15, metadata !DIExpression()), !dbg !38 + tail call void @llvm.dbg.value(metadata i32 %inc11, metadata !15, metadata !DIExpression()), !dbg !42 %exitcond11 = icmp eq i32 %inc11, 30, !dbg !38 br i1 %exitcond11, label %for.inc13, label %for.cond7.preheader, !dbg !38