Index: llvm/lib/Target/AArch64/AArch64InstrInfo.h =================================================================== --- llvm/lib/Target/AArch64/AArch64InstrInfo.h +++ llvm/lib/Target/AArch64/AArch64InstrInfo.h @@ -267,6 +267,13 @@ #define GET_INSTRINFO_HELPER_DECLS #include "AArch64GenInstrInfo.inc" +protected: + /// If the specific machine instruction is a instruction that moves/copies + /// value from one register to another register return true along with + /// @Source machine operand and @Destination machine operand. + bool isCopyInstrImpl(const MachineInstr &MI, const MachineOperand *&Source, + const MachineOperand *&Destination) const override; + private: /// Sets the offsets on outlined instructions in \p MBB which use SP /// so that they will be valid post-outlining. Index: llvm/lib/Target/AArch64/AArch64InstrInfo.cpp =================================================================== --- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp +++ llvm/lib/Target/AArch64/AArch64InstrInfo.cpp @@ -5505,5 +5505,22 @@ return MF.getFunction().hasMinSize(); } +bool AArch64InstrInfo::isCopyInstrImpl(const MachineInstr &MI, const MachineOperand *&Source, + const MachineOperand *&Destination) const { + + // AArch64::ORRWrs and AArch64::ORRXrs with zero immediate + // used as an alias for mov instruction. + if ( MI.getOpcode() == AArch64::ORRWrs || MI.getOpcode() == AArch64::ORRXrs ) { + if ( MI.getOperand(3).isImm() && MI.getOperand(3).getImm() == 0x0 ) { + Destination = &MI.getOperand(0); + Source = &MI.getOperand(2); + return true; + } + } + + return false; +} + + #define GET_INSTRINFO_HELPERS #include "AArch64GenInstrInfo.inc" Index: llvm/test/CodeGen/AArch64/aarch64-mov-debug-locs.ll =================================================================== --- /dev/null +++ llvm/test/CodeGen/AArch64/aarch64-mov-debug-locs.ll @@ -0,0 +1,120 @@ + +; RUN: llc -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -O=1 < %s | FileCheck %s + +; +; This test is for the problem from https://bugs.llvm.org/show_bug.cgi?id=38714. +; +; Specifically, Simple Register Coalescing creates following conversion : +; +; undef %0.sub_32:gpr64 = ORRWrs $wzr, %3:gpr32common, 0, debug-location !24; +; +; It copies 32-bit value from gpr32 into gpr64. But later Live DEBUG_VALUE analysis +; is not able to create debug location record for that instruction. The fix is +; to write custom isCopyInstrImpl() which would recognize the ORRWrs instr as +; move instruction. +; +; The LLVM-IR below was produced by clang on the following C++ code: +; +; int printf(const char* restrict format, ...); +; +; +; int main( int argc, char **argv ) +; { +; for(int i = 1; i < argc; ++i) { +; printf("Argument %d: %s\n", i, argv[i]); +; } +; return 0; +; } +; + +; CHECK-LABEL: main +; CHECK: //DEBUG_VALUE: main:argc <- $w0 +; CHECK: mov [[REG1:w[0-9]+]], w0 +; CHECK: //DEBUG_VALUE: main:argc <- $[[REG1]] + +; ModuleID = 'test.c' +source_filename = "test.c" +target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" +target triple = "aarch64-unknown-linux" + +@.str = private unnamed_addr constant [17 x i8] c"Argument %d: %s\0A\00", align 1 + +; Function Attrs: nounwind +define dso_local i32 @main(i32 %argc, i8** nocapture readonly %argv) local_unnamed_addr #0 !dbg !7 { +entry: + call void @llvm.dbg.value(metadata i32 %argc, metadata !15, metadata !DIExpression()), !dbg !19 + call void @llvm.dbg.value(metadata i8** %argv, metadata !16, metadata !DIExpression()), !dbg !19 + call void @llvm.dbg.value(metadata i32 1, metadata !17, metadata !DIExpression()), !dbg !20 + %cmp5 = icmp sgt i32 %argc, 1, !dbg !21 + br i1 %cmp5, label %for.body.preheader, label %for.cond.cleanup, !dbg !23 + +for.body.preheader: ; preds = %entry + %wide.trip.count = zext i32 %argc to i64, !dbg !24 + br label %for.body, !dbg !25 + +for.cond.cleanup: ; preds = %for.body, %entry + ret i32 0, !dbg !27 + +for.body: ; preds = %for.body, %for.body.preheader + %indvars.iv = phi i64 [ 1, %for.body.preheader ], [ %indvars.iv.next, %for.body ] + call void @llvm.dbg.value(metadata i64 %indvars.iv, metadata !17, metadata !DIExpression()), !dbg !20 + %arrayidx = getelementptr inbounds i8*, i8** %argv, i64 %indvars.iv, !dbg !25 + %0 = load i8*, i8** %arrayidx, align 8, !dbg !25, !tbaa !28 + %1 = trunc i64 %indvars.iv to i32, !dbg !32 + %call = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %1, i8* %0), !dbg !32 + %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1, !dbg !33 + call void @llvm.dbg.value(metadata i32 undef, metadata !17, metadata !DIExpression(DW_OP_plus_uconst, 1, DW_OP_stack_value)), !dbg !20 + %exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count, !dbg !21 + br i1 %exitcond, label %for.cond.cleanup, label %for.body, !dbg !23, !llvm.loop !34 +} + +; Function Attrs: nounwind +declare dso_local i32 @printf(i8* nocapture readonly, ...) local_unnamed_addr #1 + +; Function Attrs: nounwind readnone speculatable +declare void @llvm.dbg.value(metadata, metadata, metadata) #2 + +attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+neon" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+neon" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #2 = { nounwind readnone speculatable } + +!llvm.dbg.cu = !{!0} +!llvm.module.flags = !{!3, !4, !5} +!llvm.ident = !{!6} + +!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 9.0.0 ", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, nameTableKind: None) +!1 = !DIFile(filename: "test.c", directory: "test") +!2 = !{} +!3 = !{i32 2, !"Dwarf Version", i32 4} +!4 = !{i32 2, !"Debug Info Version", i32 3} +!5 = !{i32 1, !"wchar_size", i32 4} +!6 = !{!"clang version 9.0.0 "} +!7 = distinct !DISubprogram(name: "main", scope: !1, file: !1, line: 6, type: !8, scopeLine: 7, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !14) +!8 = !DISubroutineType(types: !9) +!9 = !{!10, !10, !11} +!10 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed) +!11 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !12, size: 64) +!12 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !13, size: 64) +!13 = !DIBasicType(name: "char", size: 8, encoding: DW_ATE_unsigned_char) +!14 = !{!15, !16, !17} +!15 = !DILocalVariable(name: "argc", arg: 1, scope: !7, file: !1, line: 6, type: !10) +!16 = !DILocalVariable(name: "argv", arg: 2, scope: !7, file: !1, line: 6, type: !11) +!17 = !DILocalVariable(name: "i", scope: !18, file: !1, line: 8, type: !10) +!18 = distinct !DILexicalBlock(scope: !7, file: !1, line: 8, column: 3) +!19 = !DILocation(line: 0, scope: !7) +!20 = !DILocation(line: 0, scope: !18) +!21 = !DILocation(line: 8, column: 20, scope: !22) +!22 = distinct !DILexicalBlock(scope: !18, file: !1, line: 8, column: 3) +!23 = !DILocation(line: 8, column: 3, scope: !18) +!24 = !DILocation(line: 0, scope: !22) +!25 = !DILocation(line: 9, column: 36, scope: !26) +!26 = distinct !DILexicalBlock(scope: !22, file: !1, line: 8, column: 33) +!27 = !DILocation(line: 11, column: 3, scope: !7) +!28 = !{!29, !29, i64 0} +!29 = !{!"any pointer", !30, i64 0} +!30 = !{!"omnipotent char", !31, i64 0} +!31 = !{!"Simple C/C++ TBAA"} +!32 = !DILocation(line: 9, column: 5, scope: !26) +!33 = !DILocation(line: 8, column: 28, scope: !22) +!34 = distinct !{!34, !23, !35} +!35 = !DILocation(line: 10, column: 3, scope: !18)