Index: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp =================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp @@ -26456,9 +26456,10 @@ Ops, MVT::i64, Node->getMemOperand()); - // If this is a sequentially consistent store, also emit an mfence. + // If this is a sequentially consistent store, also emit an appropriate + // barrier. if (IsSeqCst) - Chain = DAG.getNode(X86ISD::MFENCE, dl, MVT::Other, Chain); + Chain = emitLockedStackOp(DAG, Subtarget, Chain, dl); return Chain; } Index: llvm/trunk/test/CodeGen/X86/atomic-load-store-wide.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/atomic-load-store-wide.ll +++ llvm/trunk/test/CodeGen/X86/atomic-load-store-wide.ll @@ -11,7 +11,7 @@ ; SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax ; SSE42-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; SSE42-NEXT: movlps %xmm0, (%eax) -; SSE42-NEXT: mfence +; SSE42-NEXT: lock orl $0, (%esp) ; SSE42-NEXT: retl ; ; NOSSE-LABEL: test1: Index: llvm/trunk/test/CodeGen/X86/atomic-non-integer.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/atomic-non-integer.ll +++ llvm/trunk/test/CodeGen/X86/atomic-non-integer.ll @@ -710,7 +710,7 @@ ; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-SSE2-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; X86-SSE2-NEXT: movlps %xmm0, (%eax) -; X86-SSE2-NEXT: mfence +; X86-SSE2-NEXT: lock orl $0, (%esp) ; X86-SSE2-NEXT: retl ; ; X86-AVX-LABEL: store_double_seq_cst: @@ -718,7 +718,7 @@ ; X86-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero ; X86-AVX-NEXT: vmovlps %xmm0, (%eax) -; X86-AVX-NEXT: mfence +; X86-AVX-NEXT: lock orl $0, (%esp) ; X86-AVX-NEXT: retl ; ; X86-NOSSE-LABEL: store_double_seq_cst: