Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp =================================================================== --- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -4484,6 +4484,8 @@ Operand.getOperand(0), Flags); if (OpOpcode == ISD::FNEG) // --X -> X return Operand.getOperand(0); + if (OpOpcode == ISD::UNDEF) + return getUNDEF(VT); break; case ISD::FABS: if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) Index: llvm/lib/IR/ConstantFold.h =================================================================== --- llvm/lib/IR/ConstantFold.h +++ llvm/lib/IR/ConstantFold.h @@ -43,6 +43,7 @@ ArrayRef Idxs); Constant *ConstantFoldInsertValueInstruction(Constant *Agg, Constant *Val, ArrayRef Idxs); + Constant *ConstantFoldUnaryInstruction(unsigned Opcode, Constant *V); Constant *ConstantFoldBinaryInstruction(unsigned Opcode, Constant *V1, Constant *V2); Constant *ConstantFoldCompareInstruction(unsigned short predicate, Index: llvm/lib/IR/ConstantFold.cpp =================================================================== --- llvm/lib/IR/ConstantFold.cpp +++ llvm/lib/IR/ConstantFold.cpp @@ -918,6 +918,54 @@ return ConstantVector::get(Result); } +Constant *llvm::ConstantFoldUnaryInstruction(unsigned Opcode, Constant *C) { + assert(Instruction::isUnaryOp(Opcode) && "Non-unary instruction detected"); + + // Handle scalar UndefValue. Vectors are always evaluated per element. + bool HasScalarUndef = !C->getType()->isVectorTy() && isa(C); + + if (HasScalarUndef) { + switch (static_cast(Opcode)) { + case Instruction::FNeg: + return C; // -undef -> undef + case Instruction::UnaryOpsEnd: + llvm_unreachable("Invalid UnaryOp"); + } + } + + // Constant should not be UndefValue, unless these are vector constants. + assert(!HasScalarUndef && "Unexpected UndefValue"); + // We only have FP UnaryOps right now. + assert(!isa(C) && "Unexpected Integer UnaryOp"); + + if (ConstantFP *CFP = dyn_cast(C)) { + const APFloat &CV = CFP->getValueAPF(); + APFloat C1V = CV; // copy for modification + switch (Opcode) { + default: + break; + case Instruction::FNeg: + (void)C1V.changeSign(); + return ConstantFP::get(C->getContext(), C1V); + } + } else if (VectorType *VTy = dyn_cast(C->getType())) { + // Fold each element and create a vector constant from those constants. + SmallVector Result; + Type *Ty = IntegerType::get(VTy->getContext(), 32); + for (unsigned i = 0, e = VTy->getNumElements(); i != e; ++i) { + Constant *ExtractIdx = ConstantInt::get(Ty, i); + Constant *Elt = ConstantExpr::getExtractElement(C, ExtractIdx); + + Result.push_back(ConstantExpr::get(Opcode, Elt)); + } + + return ConstantVector::get(Result); + } + + // We don't know how to fold this. + return nullptr; +} + Constant *llvm::ConstantFoldBinaryInstruction(unsigned Opcode, Constant *C1, Constant *C2) { assert(Instruction::isBinaryOp(Opcode) && "Non-binary instruction detected"); Index: llvm/lib/IR/Constants.cpp =================================================================== --- llvm/lib/IR/Constants.cpp +++ llvm/lib/IR/Constants.cpp @@ -1830,7 +1830,8 @@ } #endif - // TODO: Try to constant fold operation. + if (Constant *FC = ConstantFoldUnaryInstruction(Opcode, C)) + return FC; // Fold a few common cases. if (OnlyIfReducedTy == C->getType()) return nullptr; @@ -2235,7 +2236,7 @@ Constant *ConstantExpr::getFNeg(Constant *C) { assert(C->getType()->isFPOrFPVectorTy() && "Cannot FNEG a non-floating-point value!"); - return getFSub(ConstantFP::getZeroValueForNegation(C->getType()), C); + return get(Instruction::FNeg, C); } Constant *ConstantExpr::getNot(Constant *C) { @@ -3025,6 +3026,8 @@ return CmpInst::Create((Instruction::OtherOps)getOpcode(), (CmpInst::Predicate)getPredicate(), Ops[0], Ops[1]); + case Instruction::FNeg: + return UnaryOperator::Create((Instruction::UnaryOps)getOpcode(), Ops[0]); default: assert(getNumOperands() == 2 && "Must be binary operator?"); BinaryOperator *BO = Index: llvm/test/CodeGen/X86/fp-fold.ll =================================================================== --- llvm/test/CodeGen/X86/fp-fold.ll +++ llvm/test/CodeGen/X86/fp-fold.ll @@ -223,3 +223,20 @@ %r = fmul reassoc float %mul, 4.0 ret float %r } + +define float @fneg_undef() { +; ANY-LABEL: fneg_undef: +; ANY: # %bb.0: +; ANY-NEXT: retq + %r = fneg float undef + ret float %r +} + +define float @fneg_zero() { +; ANY-LABEL: fneg_zero: +; ANY: # %bb.0: +; ANY-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero +; ANY-NEXT: retq + %r = fneg float 0.0 + ret float %r +} Index: llvm/test/CodeGen/X86/vec_fneg.ll =================================================================== --- llvm/test/CodeGen/X86/vec_fneg.ll +++ llvm/test/CodeGen/X86/vec_fneg.ll @@ -141,4 +141,44 @@ ret <4 x float> %tmp } +; fneg constant folding +define <4 x float> @fneg_constant_elts_v4f32() { +; X32-SSE-LABEL: fneg_constant_elts_v4f32: +; X32-SSE: # %bb.0: +; X32-SSE-NEXT: movaps {{.*#+}} xmm0 = [0.0E+0,-0.0E+0,1.0E+0,-1.0E+0] +; X32-SSE-NEXT: retl +; +; X64-SSE-LABEL: fneg_constant_elts_v4f32: +; X64-SSE: # %bb.0: +; X64-SSE-NEXT: movaps {{.*#+}} xmm0 = [0.0E+0,-0.0E+0,1.0E+0,-1.0E+0] +; X64-SSE-NEXT: retq + %r = fneg <4 x float> + ret <4 x float> %r +} + +define <4 x float> @fneg_constant_undef_elts_v4f32() { +; X32-SSE-LABEL: fneg_constant_undef_elts_v4f32: +; X32-SSE: # %bb.0: +; X32-SSE-NEXT: movaps {{.*#+}} xmm0 = <0.0E+0,u,u,-1.0E+0> +; X32-SSE-NEXT: retl +; +; X64-SSE-LABEL: fneg_constant_undef_elts_v4f32: +; X64-SSE: # %bb.0: +; X64-SSE-NEXT: movaps {{.*#+}} xmm0 = <0.0E+0,u,u,-1.0E+0> +; X64-SSE-NEXT: retq + %r = fneg <4 x float> + ret <4 x float> %r +} + +define <4 x float> @fneg_constant_all_undef_elts_v4f32() { +; X32-SSE-LABEL: fneg_constant_all_undef_elts_v4f32: +; X32-SSE: # %bb.0: +; X32-SSE-NEXT: retl +; +; X64-SSE-LABEL: fneg_constant_all_undef_elts_v4f32: +; X64-SSE: # %bb.0: +; X64-SSE-NEXT: retq + %r = fneg <4 x float> + ret <4 x float> %r +} Index: llvm/test/Transforms/InstCombine/fneg.ll =================================================================== --- llvm/test/Transforms/InstCombine/fneg.ll +++ llvm/test/Transforms/InstCombine/fneg.ll @@ -46,7 +46,7 @@ define <4 x double> @fmul_fneg_vec(<4 x double> %x) { ; CHECK-LABEL: @fmul_fneg_vec( -; CHECK-NEXT: [[R:%.*]] = fmul <4 x double> [[X:%.*]], +; CHECK-NEXT: [[R:%.*]] = fmul <4 x double> [[X:%.*]], ; CHECK-NEXT: ret <4 x double> [[R]] ; %m = fmul <4 x double> %x, @@ -97,7 +97,7 @@ define <4 x double> @fdiv_op1_constant_fneg_vec(<4 x double> %x) { ; CHECK-LABEL: @fdiv_op1_constant_fneg_vec( -; CHECK-NEXT: [[R:%.*]] = fdiv <4 x double> [[X:%.*]], +; CHECK-NEXT: [[R:%.*]] = fdiv <4 x double> [[X:%.*]], ; CHECK-NEXT: ret <4 x double> [[R]] ; %d = fdiv <4 x double> %x, @@ -148,7 +148,7 @@ define <4 x double> @fdiv_op0_constant_fneg_vec(<4 x double> %x) { ; CHECK-LABEL: @fdiv_op0_constant_fneg_vec( -; CHECK-NEXT: [[R:%.*]] = fdiv <4 x double> , [[X:%.*]] +; CHECK-NEXT: [[R:%.*]] = fdiv <4 x double> , [[X:%.*]] ; CHECK-NEXT: ret <4 x double> [[R]] ; %d = fdiv <4 x double> , %x Index: llvm/test/Transforms/InstCombine/fsub.ll =================================================================== --- llvm/test/Transforms/InstCombine/fsub.ll +++ llvm/test/Transforms/InstCombine/fsub.ll @@ -64,8 +64,8 @@ define float @sub_add_neg_x(float %x, float %y) { ; CHECK-LABEL: @sub_add_neg_x( -; CHECK-NEXT: [[TMP1:%.*]] = fmul reassoc nsz float [[X:%.*]], -5.000000e+00 -; CHECK-NEXT: ret float [[TMP1]] +; CHECK-NEXT: [[R:%.*]] = fmul reassoc nsz float [[X:%.*]], -5.000000e+00 +; CHECK-NEXT: ret float [[R]] ; %mul = fmul float %x, 5.000000e+00 %add = fadd float %mul, %y @@ -121,7 +121,7 @@ define <2 x float> @constant_op1_vec_undef(<2 x float> %x, <2 x float> %y) { ; CHECK-LABEL: @constant_op1_vec_undef( -; CHECK-NEXT: [[R:%.*]] = fadd <2 x float> [[X:%.*]], +; CHECK-NEXT: [[R:%.*]] = fadd <2 x float> [[X:%.*]], ; CHECK-NEXT: ret <2 x float> [[R]] ; %r = fsub <2 x float> %x, Index: llvm/test/Transforms/InstCombine/inselt-binop.ll =================================================================== --- llvm/test/Transforms/InstCombine/inselt-binop.ll +++ llvm/test/Transforms/InstCombine/inselt-binop.ll @@ -504,7 +504,7 @@ define <2 x float> @fsub_constant_op1(float %x) { ; CHECK-LABEL: @fsub_constant_op1( ; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x float> undef, float [[X:%.*]], i32 1 -; CHECK-NEXT: [[BO:%.*]] = fadd <2 x float> [[INS]], +; CHECK-NEXT: [[BO:%.*]] = fadd <2 x float> [[INS]], ; CHECK-NEXT: ret <2 x float> [[BO]] ; %ins = insertelement <2 x float> undef, float %x, i32 1 Index: llvm/test/Transforms/Reassociate/crash2.ll =================================================================== --- llvm/test/Transforms/Reassociate/crash2.ll +++ llvm/test/Transforms/Reassociate/crash2.ll @@ -7,7 +7,7 @@ define float @undef1() { ; CHECK-LABEL: @undef1( -; CHECK-NEXT: ret float fadd (float bitcast (i32 ptrtoint (i32* @g to i32) to float), float fadd (float bitcast (i32 ptrtoint (i32* @g to i32) to float), float fadd (float fsub (float -0.000000e+00, float bitcast (i32 ptrtoint (i32* @g to i32) to float)), float fsub (float -0.000000e+00, float bitcast (i32 ptrtoint (i32* @g to i32) to float))))) +; CHECK-NEXT: ret float fadd (float bitcast (i32 ptrtoint (i32* @g to i32) to float), float fadd (float bitcast (i32 ptrtoint (i32* @g to i32) to float), float fadd (float fneg (float bitcast (i32 ptrtoint (i32* @g to i32) to float)), float fneg (float bitcast (i32 ptrtoint (i32* @g to i32) to float))))) ; %t0 = fadd fast float bitcast (i32 ptrtoint (i32* @g to i32) to float), bitcast (i32 ptrtoint (i32* @g to i32) to float) %t1 = fsub fast float bitcast (i32 ptrtoint (i32* @g to i32) to float), %t0 Index: llvm/unittests/IR/ConstantsTest.cpp =================================================================== --- llvm/unittests/IR/ConstantsTest.cpp +++ llvm/unittests/IR/ConstantsTest.cpp @@ -229,7 +229,7 @@ #define P6STR "bitcast (i32 ptrtoint (i32** @dummy2 to i32) to <2 x i16>)" CHECK(ConstantExpr::getNeg(P0), "sub i32 0, " P0STR); - CHECK(ConstantExpr::getFNeg(P1), "fsub float -0.000000e+00, " P1STR); + CHECK(ConstantExpr::getFNeg(P1), "fneg float " P1STR); CHECK(ConstantExpr::getNot(P0), "xor i32 " P0STR ", -1"); CHECK(ConstantExpr::getAdd(P0, P0), "add i32 " P0STR ", " P0STR); CHECK(ConstantExpr::getAdd(P0, P0, false, true), "add nsw i32 " P0STR ", "