diff --git a/llvm/lib/Transforms/Utils/PredicateInfo.cpp b/llvm/lib/Transforms/Utils/PredicateInfo.cpp
--- a/llvm/lib/Transforms/Utils/PredicateInfo.cpp
+++ b/llvm/lib/Transforms/Utils/PredicateInfo.cpp
@@ -338,6 +338,11 @@
       collectCmpOps(Cmp, CmpOperands);
       // Now add our copy infos for our operands
       for (auto *Op : CmpOperands) {
+        // Unreachable Ops are out of interest.
+        if (Instruction *I = dyn_cast<Instruction>(Op))
+          if (!DT.getNode(I->getParent()))
+            continue;
+
         auto *PA = new PredicateAssume(Op, II, Cmp);
         addInfoFor(OpsToRename, Op, PA);
       }
@@ -346,6 +351,10 @@
       // Otherwise, it should be an AND.
       assert(BinOp->getOpcode() == Instruction::And &&
              "Should have been an AND");
+      // Unreachable Ops are out of interest.
+      if (!DT.getNode(BinOp->getParent()))
+        continue;
+
       auto *PA = new PredicateAssume(BinOp, II, BinOp);
       addInfoFor(OpsToRename, BinOp, PA);
     } else {
@@ -366,6 +375,11 @@
   SmallVector<Value *, 2> ConditionsToProcess;
 
   auto InsertHelper = [&](Value *Op, bool isAnd, bool isOr, Value *Cond) {
+    // Unreachable Ops are out of interest.
+    if (Instruction *I = dyn_cast<Instruction>(Op))
+      if (!DT.getNode(I->getParent()))
+        return;
+
     for (auto *Succ : SuccsToProcess) {
       // Don't try to insert on a self-edge. This is mainly because we will
       // eliminate during renaming anyway.
@@ -432,6 +446,11 @@
   if ((!isa<Instruction>(Op) && !isa<Argument>(Op)) || Op->hasOneUse())
     return;
 
+  // Unreachable Ops are out of interest.
+  if (Instruction *I = dyn_cast<Instruction>(Op))
+    if (!DT.getNode(I->getParent()))
+      return;
+
   // Remember how many outgoing edges there are to every successor.
   SmallDenseMap<BasicBlock *, unsigned, 16> SwitchEdges;
   for (unsigned i = 0, e = SI->getNumSuccessors(); i != e; ++i) {