diff --git a/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp b/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
--- a/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
+++ b/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
@@ -1683,8 +1683,8 @@
     int64_t Value;
     MCExpr const &Expr = *Imm.getExpr();
     bool Absolute = Expr.evaluateAsAbsolute(Value);
-    assert(Absolute);
-    (void)Absolute;
+    if (!Absolute)
+      return Match_InvalidOperand;
     if (!HexagonMCInstrInfo::mustExtend(Expr) &&
         ((Value <= -256) || Value >= 256))
       return Match_InvalidOperand;
@@ -1706,8 +1706,8 @@
     MCInst TmpInst;
     int64_t Value;
     bool Absolute = Imm.getExpr()->evaluateAsAbsolute(Value);
-    assert(Absolute);
-    (void)Absolute;
+    if (!Absolute)
+      return Match_InvalidOperand;
     if (Value == 0) { // convert to $Rd = $Rs
       TmpInst.setOpcode(Hexagon::A2_tfr);
       MCOperand &Rd = Inst.getOperand(0);
@@ -1736,8 +1736,8 @@
     MCOperand &Imm = Inst.getOperand(2);
     int64_t Value;
     bool Absolute = Imm.getExpr()->evaluateAsAbsolute(Value);
-    assert(Absolute);
-    (void)Absolute;
+    if (!Absolute)
+      return Match_InvalidOperand;
     if (Value == 0) { // convert to $Rdd = combine ($Rs[0], $Rs[1])
       MCInst TmpInst;
       unsigned int RegPairNum = RI->getEncodingValue(Rss.getReg());
@@ -1860,8 +1860,8 @@
     MCOperand &Imm = Inst.getOperand(2);
     int64_t Value;
     bool Absolute = Imm.getExpr()->evaluateAsAbsolute(Value);
-    assert(Absolute);
-    (void)Absolute;
+    if (!Absolute)
+      return Match_InvalidOperand;
     if (Value == 0)
       Inst.setOpcode(Hexagon::S2_vsathub);
     else {
@@ -1880,8 +1880,8 @@
     MCOperand &Imm = Inst.getOperand(2);
     int64_t Value;
     bool Absolute = Imm.getExpr()->evaluateAsAbsolute(Value);
-    assert(Absolute);
-    (void)Absolute;
+    if (!Absolute)
+      return Match_InvalidOperand;
     if (Value == 0) {
       MCInst TmpInst;
       unsigned int RegPairNum = RI->getEncodingValue(Rss.getReg());
diff --git a/llvm/test/MC/Hexagon/hex-immediates.s b/llvm/test/MC/Hexagon/hex-immediates.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/Hexagon/hex-immediates.s
@@ -0,0 +1,6 @@
+# RUN: llvm-mc -filetype=obj -arch=hexagon %s | llvm-objdump -d --print-imm-hex - | FileCheck %s
+
+# CHECK: r3 = ##0x70000240
+r3 = ##1879048768
+# CHECK: r3 = ##-0x70000240
+r3 = ##-1879048768
diff --git a/llvm/test/MC/Hexagon/inval_immed.s b/llvm/test/MC/Hexagon/inval_immed.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/Hexagon/inval_immed.s
@@ -0,0 +1,6 @@
+# RUN: not llvm-mc -filetype=asm -arch=hexagon %s 2>%t; FileCheck %s < %t
+
+    .text
+r0=mpyi(r0,#m9)
+
+# CHECK: error: invalid operand for instruction