Index: lib/Transforms/Vectorize/SLPVectorizer.cpp
===================================================================
--- lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -785,7 +785,7 @@
           break;
         case ReorderingMode::Opcode:
           // We accept both Instructions and Undefs, but with different scores.
-          if ((isa<Instruction>(Op) &&
+          if ((isa<Instruction>(Op) && isa<Instruction>(OpLastLane) &&
                cast<Instruction>(Op)->getOpcode() ==
                    cast<Instruction>(OpLastLane)->getOpcode()) ||
               isa<UndefValue>(Op)) {
Index: test/Transforms/SLPVectorizer/X86/crash_reordering_undefs.ll
===================================================================
--- /dev/null
+++ test/Transforms/SLPVectorizer/X86/crash_reordering_undefs.ll
@@ -0,0 +1,25 @@
+; RUN: opt -slp-vectorizer -S < %s -mtriple=x86_64-unknown-linux -mcpu=corei7-avx
+target triple = "x86_64-unknown-linux-gnu"
+
+define i32 @test_id_1() {
+entry:
+  %.compoundliteral593.sroa.0.0.insert.insert = or i64 undef, undef
+  %cmp600 = icmp eq i64 undef, %.compoundliteral593.sroa.0.0.insert.insert
+  %add604 = select i1 %cmp600, i32 65536, i32 65537
+  %add605 = add i32 undef, %add604
+  %cmp619 = icmp eq i64 undef, undef
+  %add623 = select i1 %cmp619, i32 65536, i32 65537
+  %add624 = add i32 %add605, %add623
+  %cmp638 = icmp eq i64 undef, undef
+  %add642 = select i1 %cmp638, i32 65536, i32 65537
+  %add643 = add i32 %add624, %add642
+  %add662 = add i32 %add643, undef
+  %add681 = add i32 %add662, undef
+  %add700 = add i32 %add681, undef
+  %.compoundliteral708.sroa.0.0.insert.insert = or i64 undef, undef
+  %cmp714 = icmp eq i64 undef, %.compoundliteral708.sroa.0.0.insert.insert
+  %add718 = select i1 %cmp714, i32 65536, i32 65537
+  %add719 = add i32 %add700, %add718
+  %add738 = add i32 %add719, undef
+  ret i32 %add738
+}