Index: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -11038,6 +11038,12 @@
     return getTestBitOperand(Op->getOperand(0), Bit, Invert, DAG);
   }
 
+  // (tbz (any_ext x), b) -> (tbz x, b) if we don't use the extended bits.
+  if (Op->getOpcode() == ISD::ANY_EXTEND &&
+      Bit < Op->getOperand(0).getValueSizeInBits()) {
+    return getTestBitOperand(Op->getOperand(0), Bit, Invert, DAG);
+  }
+
   if (Op->getNumOperands() != 2)
     return Op;
 
Index: llvm/test/CodeGen/AArch64/tbz-tbnz.ll
===================================================================
--- llvm/test/CodeGen/AArch64/tbz-tbnz.ll
+++ llvm/test/CodeGen/AArch64/tbz-tbnz.ll
@@ -368,9 +368,8 @@
   %cond = icmp eq i64 %and, 0
   br i1 %cond, label %then, label %end
 
-; FIXME: Should be no lsl
-; CHECK: lsl w8, w0, #3
-; CHECK: tbnz w8, #5
+; CHECK-NOT: lsl
+; CHECK: tbnz w0, #2
 
 then:
   call void @t()