diff --git a/llvm/include/llvm/Analysis/TargetTransformInfo.h b/llvm/include/llvm/Analysis/TargetTransformInfo.h --- a/llvm/include/llvm/Analysis/TargetTransformInfo.h +++ b/llvm/include/llvm/Analysis/TargetTransformInfo.h @@ -592,17 +592,35 @@ /// Don't restrict interleaved unrolling to small loops. bool enableAggressiveInterleaving(bool LoopHasReductions) const; - /// If not nullptr, enable inline expansion of memcmp. IsZeroCmp is - /// true if this is the expansion of memcmp(p1, p2, s) == 0. + /// Returns options for expansion of memcmp. IsZeroCmp is + // true if this is the expansion of memcmp(p1, p2, s) == 0. struct MemCmpExpansionOptions { + // Return true if memcmp expansion is enabled. + operator bool() const { return MaxNumLoads > 0; } + + // Maximum number of load operations. + unsigned MaxNumLoads = 0; + // The list of available load sizes (in bytes), sorted in decreasing order. SmallVector LoadSizes; + + // For memcmp expansion when the memcmp result is only compared equal or + // not-equal to 0, allow up to this number of load pairs per block. As an + // example, this may allow 'memcmp(a, b, 3) == 0' in a single block: + // a0 = load2bytes &a[0] + // b0 = load2bytes &b[0] + // a2 = load1byte &a[2] + // b2 = load1byte &b[2] + // r = cmp eq (a0 ^ b0 | a2 ^ b2), 0 + unsigned NumLoadsPerBlock = 1; + // Set to true to allow overlapping loads. For example, 7-byte compares can // be done with two 4-byte compares instead of 4+2+1-byte compares. This // requires all loads in LoadSizes to be doable in an unaligned way. bool AllowOverlappingLoads = false; }; - const MemCmpExpansionOptions *enableMemCmpExpansion(bool IsZeroCmp) const; + MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize, + bool IsZeroCmp) const; /// Enable matching of interleaved access groups. bool enableInterleavedAccessVectorization() const; @@ -1113,8 +1131,8 @@ unsigned VF) = 0; virtual bool supportsEfficientVectorElementLoadStore() = 0; virtual bool enableAggressiveInterleaving(bool LoopHasReductions) = 0; - virtual const MemCmpExpansionOptions *enableMemCmpExpansion( - bool IsZeroCmp) const = 0; + virtual MemCmpExpansionOptions + enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const = 0; virtual bool enableInterleavedAccessVectorization() = 0; virtual bool enableMaskedInterleavedAccessVectorization() = 0; virtual bool isFPVectorizationPotentiallyUnsafe() = 0; @@ -1402,9 +1420,9 @@ bool enableAggressiveInterleaving(bool LoopHasReductions) override { return Impl.enableAggressiveInterleaving(LoopHasReductions); } - const MemCmpExpansionOptions *enableMemCmpExpansion( - bool IsZeroCmp) const override { - return Impl.enableMemCmpExpansion(IsZeroCmp); + MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize, + bool IsZeroCmp) const override { + return Impl.enableMemCmpExpansion(OptSize, IsZeroCmp); } bool enableInterleavedAccessVectorization() override { return Impl.enableInterleavedAccessVectorization(); diff --git a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h --- a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h +++ b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h @@ -275,9 +275,9 @@ bool enableAggressiveInterleaving(bool LoopHasReductions) { return false; } - const TTI::MemCmpExpansionOptions *enableMemCmpExpansion( - bool IsZeroCmp) const { - return nullptr; + TTI::MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize, + bool IsZeroCmp) const { + return {}; } bool enableInterleavedAccessVectorization() { return false; } diff --git a/llvm/include/llvm/CodeGen/Passes.h b/llvm/include/llvm/CodeGen/Passes.h --- a/llvm/include/llvm/CodeGen/Passes.h +++ b/llvm/include/llvm/CodeGen/Passes.h @@ -434,9 +434,6 @@ /// shuffles. FunctionPass *createExpandReductionsPass(); - // This pass expands memcmp() to load/stores. - FunctionPass *createExpandMemCmpPass(); - /// Creates Break False Dependencies pass. \see BreakFalseDeps.cpp FunctionPass *createBreakFalseDeps(); diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h --- a/llvm/include/llvm/CodeGen/TargetLowering.h +++ b/llvm/include/llvm/CodeGen/TargetLowering.h @@ -1369,18 +1369,6 @@ return OptSize ? MaxLoadsPerMemcmpOptSize : MaxLoadsPerMemcmp; } - /// For memcmp expansion when the memcmp result is only compared equal or - /// not-equal to 0, allow up to this number of load pairs per block. As an - /// example, this may allow 'memcmp(a, b, 3) == 0' in a single block: - /// a0 = load2bytes &a[0] - /// b0 = load2bytes &b[0] - /// a2 = load1byte &a[2] - /// b2 = load1byte &b[2] - /// r = cmp eq (a0 ^ b0 | a2 ^ b2), 0 - virtual unsigned getMemcmpEqZeroLoadsPerBlock() const { - return 1; - } - /// Get maximum # of store operations permitted for llvm.memmove /// /// This function returns the maximum number of store operations permitted diff --git a/llvm/include/llvm/Transforms/IPO/PassManagerBuilder.h b/llvm/include/llvm/Transforms/IPO/PassManagerBuilder.h --- a/llvm/include/llvm/Transforms/IPO/PassManagerBuilder.h +++ b/llvm/include/llvm/Transforms/IPO/PassManagerBuilder.h @@ -195,6 +195,7 @@ void addPGOInstrPasses(legacy::PassManagerBase &MPM, bool IsCS); void addFunctionSimplificationPasses(legacy::PassManagerBase &MPM); void addInstructionCombiningPass(legacy::PassManagerBase &MPM) const; + void addMemcmpPasses(legacy::PassManagerBase &MPM) const; public: /// populateFunctionPassManager - This fills in the function pass manager, diff --git a/llvm/include/llvm/Transforms/Scalar.h b/llvm/include/llvm/Transforms/Scalar.h --- a/llvm/include/llvm/Transforms/Scalar.h +++ b/llvm/include/llvm/Transforms/Scalar.h @@ -373,6 +373,12 @@ // Pass *createMergeICmpsPass(); +//===----------------------------------------------------------------------===// +// +// ExpandMemCmp - This pass expands memcmp() to load/stores. +// +Pass *createExpandMemCmpPass(); + //===----------------------------------------------------------------------===// // // ValuePropagation - Propagate CFG-derived value information diff --git a/llvm/lib/Analysis/TargetTransformInfo.cpp b/llvm/lib/Analysis/TargetTransformInfo.cpp --- a/llvm/lib/Analysis/TargetTransformInfo.cpp +++ b/llvm/lib/Analysis/TargetTransformInfo.cpp @@ -273,9 +273,9 @@ return TTIImpl->enableAggressiveInterleaving(LoopHasReductions); } -const TargetTransformInfo::MemCmpExpansionOptions * -TargetTransformInfo::enableMemCmpExpansion(bool IsZeroCmp) const { - return TTIImpl->enableMemCmpExpansion(IsZeroCmp); +TargetTransformInfo::MemCmpExpansionOptions +TargetTransformInfo::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const { + return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp); } bool TargetTransformInfo::enableInterleavedAccessVectorization() const { diff --git a/llvm/lib/CodeGen/CMakeLists.txt b/llvm/lib/CodeGen/CMakeLists.txt --- a/llvm/lib/CodeGen/CMakeLists.txt +++ b/llvm/lib/CodeGen/CMakeLists.txt @@ -22,7 +22,6 @@ EdgeBundles.cpp ExecutionDomainFix.cpp ExpandISelPseudos.cpp - ExpandMemCmp.cpp ExpandPostRAPseudos.cpp ExpandReductions.cpp FaultMaps.cpp diff --git a/llvm/lib/CodeGen/CodeGen.cpp b/llvm/lib/CodeGen/CodeGen.cpp --- a/llvm/lib/CodeGen/CodeGen.cpp +++ b/llvm/lib/CodeGen/CodeGen.cpp @@ -31,7 +31,6 @@ initializeEarlyMachineLICMPass(Registry); initializeEarlyTailDuplicatePass(Registry); initializeExpandISelPseudosPass(Registry); - initializeExpandMemCmpPassPass(Registry); initializeExpandPostRAPass(Registry); initializeFEntryInserterPass(Registry); initializeFinalizeMachineBundlesPass(Registry); diff --git a/llvm/lib/CodeGen/TargetPassConfig.cpp b/llvm/lib/CodeGen/TargetPassConfig.cpp --- a/llvm/lib/CodeGen/TargetPassConfig.cpp +++ b/llvm/lib/CodeGen/TargetPassConfig.cpp @@ -99,9 +99,6 @@ "enable-implicit-null-checks", cl::desc("Fold null checks into faulting memory operations"), cl::init(false), cl::Hidden); -static cl::opt DisableMergeICmps("disable-mergeicmps", - cl::desc("Disable MergeICmps Pass"), - cl::init(false), cl::Hidden); static cl::opt PrintLSR("print-lsr-output", cl::Hidden, cl::desc("Print LLVM IR produced by the loop-reduce pass")); static cl::opt PrintISelInput("print-isel-input", cl::Hidden, @@ -640,16 +637,6 @@ addPass(createPrintFunctionPass(dbgs(), "\n\n*** Code after LSR ***\n")); } - if (getOptLevel() != CodeGenOpt::None) { - // The MergeICmpsPass tries to create memcmp calls by grouping sequences of - // loads and compares. ExpandMemCmpPass then tries to expand those calls - // into optimally-sized loads and compares. The transforms are enabled by a - // target lowering hook. - if (!DisableMergeICmps) - addPass(createMergeICmpsPass()); - addPass(createExpandMemCmpPass()); - } - // Run GC lowering passes for builtin collectors // TODO: add a pass insertion point here addPass(createGCLoweringPass()); diff --git a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h --- a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h +++ b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h @@ -62,8 +62,8 @@ /// @{ bool useColdCCForColdCall(Function &F); bool enableAggressiveInterleaving(bool LoopHasReductions); - const TTI::MemCmpExpansionOptions *enableMemCmpExpansion( - bool IsZeroCmp) const; + TTI::MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize, + bool IsZeroCmp) const; bool enableInterleavedAccessVectorization(); unsigned getNumberOfRegisters(bool Vector); unsigned getRegisterBitWidth(bool Vector) const; diff --git a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp --- a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp +++ b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp @@ -238,17 +238,12 @@ return LoopHasReductions; } -const PPCTTIImpl::TTI::MemCmpExpansionOptions * -PPCTTIImpl::enableMemCmpExpansion(bool IsZeroCmp) const { - static const auto Options = []() { - TTI::MemCmpExpansionOptions Options; - Options.LoadSizes.push_back(8); - Options.LoadSizes.push_back(4); - Options.LoadSizes.push_back(2); - Options.LoadSizes.push_back(1); - return Options; - }(); - return &Options; +PPCTTIImpl::TTI::MemCmpExpansionOptions +PPCTTIImpl::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const { + TTI::MemCmpExpansionOptions Options; + Options.LoadSizes = {8, 4, 2, 1}; + Options.MaxNumLoads = TLI->getMaxExpandSizeMemcmp(OptSize); + return Options; } bool PPCTTIImpl::enableInterleavedAccessVectorization() { diff --git a/llvm/lib/Target/X86/X86ISelLowering.h b/llvm/lib/Target/X86/X86ISelLowering.h --- a/llvm/lib/Target/X86/X86ISelLowering.h +++ b/llvm/lib/Target/X86/X86ISelLowering.h @@ -855,11 +855,6 @@ /// Vector-sized comparisons are fast using PCMPEQ + PMOVMSK or PTEST. MVT hasFastEqualityCompare(unsigned NumBits) const override; - /// Allow multiple load pairs per block for smaller and faster code. - unsigned getMemcmpEqZeroLoadsPerBlock() const override { - return 2; - } - /// Return the value type to use for ISD::SETCC. EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context, EVT VT) const override; diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.h b/llvm/lib/Target/X86/X86TargetTransformInfo.h --- a/llvm/lib/Target/X86/X86TargetTransformInfo.h +++ b/llvm/lib/Target/X86/X86TargetTransformInfo.h @@ -195,8 +195,8 @@ bool areFunctionArgsABICompatible(const Function *Caller, const Function *Callee, SmallPtrSetImpl &Args) const; - const TTI::MemCmpExpansionOptions *enableMemCmpExpansion( - bool IsZeroCmp) const; + TTI::MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize, + bool IsZeroCmp) const; bool enableInterleavedAccessVectorization(); private: int getGSScalarCost(unsigned Opcode, Type *DataTy, bool VariableMask, diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp --- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp +++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp @@ -3169,38 +3169,29 @@ TM.getSubtarget(*Callee).useAVX512Regs(); } -const X86TTIImpl::TTI::MemCmpExpansionOptions * -X86TTIImpl::enableMemCmpExpansion(bool IsZeroCmp) const { - // Only enable vector loads for equality comparison. - // Right now the vector version is not as fast, see #33329. - static const auto ThreeWayOptions = [this]() { - TTI::MemCmpExpansionOptions Options; - if (ST->is64Bit()) { - Options.LoadSizes.push_back(8); - } - Options.LoadSizes.push_back(4); - Options.LoadSizes.push_back(2); - Options.LoadSizes.push_back(1); - return Options; - }(); - static const auto EqZeroOptions = [this]() { - TTI::MemCmpExpansionOptions Options; +X86TTIImpl::TTI::MemCmpExpansionOptions +X86TTIImpl::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const { + TTI::MemCmpExpansionOptions Options; + Options.MaxNumLoads = TLI->getMaxExpandSizeMemcmp(OptSize); + Options.NumLoadsPerBlock = 2; + if (IsZeroCmp) { + // Only enable vector loads for equality comparison. Right now the vector + // version is not as fast for three way compare (see #33329). // TODO: enable AVX512 when the DAG is ready. // if (ST->hasAVX512()) Options.LoadSizes.push_back(64); if (ST->hasAVX2()) Options.LoadSizes.push_back(32); if (ST->hasSSE2()) Options.LoadSizes.push_back(16); - if (ST->is64Bit()) { - Options.LoadSizes.push_back(8); - } - Options.LoadSizes.push_back(4); - Options.LoadSizes.push_back(2); - Options.LoadSizes.push_back(1); // All GPR and vector loads can be unaligned. SIMD compare requires integer // vectors (SSE2/AVX2). Options.AllowOverlappingLoads = true; - return Options; - }(); - return IsZeroCmp ? &EqZeroOptions : &ThreeWayOptions; + } + if (ST->is64Bit()) { + Options.LoadSizes.push_back(8); + } + Options.LoadSizes.push_back(4); + Options.LoadSizes.push_back(2); + Options.LoadSizes.push_back(1); + return Options; } bool X86TTIImpl::enableInterleavedAccessVectorization() { diff --git a/llvm/lib/Transforms/IPO/PassManagerBuilder.cpp b/llvm/lib/Transforms/IPO/PassManagerBuilder.cpp --- a/llvm/lib/Transforms/IPO/PassManagerBuilder.cpp +++ b/llvm/lib/Transforms/IPO/PassManagerBuilder.cpp @@ -253,6 +253,18 @@ PM.add(createInstructionCombiningPass(ExpensiveCombines)); } +void PassManagerBuilder::addMemcmpPasses(legacy::PassManagerBase &PM) const { + if (OptLevel > 0) { + // The MergeICmpsPass tries to create memcmp calls by grouping sequences of + // loads and compares. ExpandMemCmpPass then tries to expand those calls + // into optimally-sized loads and compares. The transforms are enabled by a + // target transform info hook. + PM.add(createMergeICmpsPass()); + PM.add(createExpandMemCmpPass()); + PM.add(createEarlyCSEPass()); + } +} + void PassManagerBuilder::populateFunctionPassManager( legacy::FunctionPassManager &FPM) { addExtensionsToPM(EP_EarlyAsPossible, FPM); @@ -398,6 +410,7 @@ : createGVNPass(DisableGVNLoadPRE)); // Remove redundancies } MPM.add(createMemCpyOptPass()); // Remove memcpy / form memset + addMemcmpPasses(MPM); // Merge/Expand comparisons. MPM.add(createSCCPPass()); // Constant prop with SCCP // Delete dead bit computations (instcombine runs after to fold away the dead @@ -909,6 +922,7 @@ PM.add(NewGVN ? createNewGVNPass() : createGVNPass(DisableGVNLoadPRE)); // Remove redundancies. PM.add(createMemCpyOptPass()); // Remove dead memcpys. + addMemcmpPasses(PM); // Merge/Expand comparisons. // Nuke dead stores. PM.add(createDeadStoreEliminationPass()); diff --git a/llvm/lib/Transforms/Scalar/CMakeLists.txt b/llvm/lib/Transforms/Scalar/CMakeLists.txt --- a/llvm/lib/Transforms/Scalar/CMakeLists.txt +++ b/llvm/lib/Transforms/Scalar/CMakeLists.txt @@ -10,6 +10,7 @@ DeadStoreElimination.cpp DivRemPairs.cpp EarlyCSE.cpp + ExpandMemCmp.cpp FlattenCFGPass.cpp Float2Int.cpp GuardWidening.cpp diff --git a/llvm/lib/CodeGen/ExpandMemCmp.cpp b/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp rename from llvm/lib/CodeGen/ExpandMemCmp.cpp rename to llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp --- a/llvm/lib/CodeGen/ExpandMemCmp.cpp +++ b/llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp @@ -13,13 +13,13 @@ #include "llvm/ADT/Statistic.h" #include "llvm/Analysis/ConstantFolding.h" +#include "llvm/Analysis/GlobalsModRef.h" #include "llvm/Analysis/TargetLibraryInfo.h" #include "llvm/Analysis/TargetTransformInfo.h" #include "llvm/Analysis/ValueTracking.h" -#include "llvm/CodeGen/TargetLowering.h" -#include "llvm/CodeGen/TargetPassConfig.h" #include "llvm/CodeGen/TargetSubtargetInfo.h" #include "llvm/IR/IRBuilder.h" +#include "llvm/Transforms/Scalar.h" using namespace llvm; @@ -46,7 +46,6 @@ namespace { - // This class provides helper functions to expand a memcmp library call into an // inline expansion. class MemCmpExpansion { @@ -75,8 +74,7 @@ // 1x1-byte load, which would be represented as [{16, 0}, {16, 16}, {32, 1}. struct LoadEntry { LoadEntry(unsigned LoadSize, uint64_t Offset) - : LoadSize(LoadSize), Offset(Offset) { - } + : LoadSize(LoadSize), Offset(Offset) {} // The size of the load for this block, in bytes. unsigned LoadSize; @@ -113,8 +111,7 @@ public: MemCmpExpansion(CallInst *CI, uint64_t Size, const TargetTransformInfo::MemCmpExpansionOptions &Options, - unsigned MaxNumLoads, const bool IsUsedForZeroCmp, - unsigned MaxLoadsPerBlockForZeroCmp, const DataLayout &TheDataLayout); + const bool IsUsedForZeroCmp, const DataLayout &TheDataLayout); unsigned getNumBlocks(); uint64_t getNumLoads() const { return LoadSequence.size(); } @@ -203,16 +200,10 @@ MemCmpExpansion::MemCmpExpansion( CallInst *const CI, uint64_t Size, const TargetTransformInfo::MemCmpExpansionOptions &Options, - const unsigned MaxNumLoads, const bool IsUsedForZeroCmp, - const unsigned MaxLoadsPerBlockForZeroCmp, const DataLayout &TheDataLayout) - : CI(CI), - Size(Size), - MaxLoadSize(0), - NumLoadsNonOneByte(0), - NumLoadsPerBlockForZeroCmp(MaxLoadsPerBlockForZeroCmp), - IsUsedForZeroCmp(IsUsedForZeroCmp), - DL(TheDataLayout), - Builder(CI) { + const bool IsUsedForZeroCmp, const DataLayout &TheDataLayout) + : CI(CI), Size(Size), MaxLoadSize(0), NumLoadsNonOneByte(0), + NumLoadsPerBlockForZeroCmp(Options.NumLoadsPerBlock), + IsUsedForZeroCmp(IsUsedForZeroCmp), DL(TheDataLayout), Builder(CI) { assert(Size > 0 && "zero blocks"); // Scale the max size down if the target can load more bytes than we need. llvm::ArrayRef LoadSizes(Options.LoadSizes); @@ -223,17 +214,17 @@ MaxLoadSize = LoadSizes.front(); // Compute the decomposition. unsigned GreedyNumLoadsNonOneByte = 0; - LoadSequence = computeGreedyLoadSequence(Size, LoadSizes, MaxNumLoads, + LoadSequence = computeGreedyLoadSequence(Size, LoadSizes, Options.MaxNumLoads, GreedyNumLoadsNonOneByte); NumLoadsNonOneByte = GreedyNumLoadsNonOneByte; - assert(LoadSequence.size() <= MaxNumLoads && "broken invariant"); + assert(LoadSequence.size() <= Options.MaxNumLoads && "broken invariant"); // If we allow overlapping loads and the load sequence is not already optimal, // use overlapping loads. if (Options.AllowOverlappingLoads && (LoadSequence.empty() || LoadSequence.size() > 2)) { unsigned OverlappingNumLoadsNonOneByte = 0; auto OverlappingLoads = computeOverlappingLoadSequence( - Size, MaxLoadSize, MaxNumLoads, OverlappingNumLoadsNonOneByte); + Size, MaxLoadSize, Options.MaxNumLoads, OverlappingNumLoadsNonOneByte); if (!OverlappingLoads.empty() && (LoadSequence.empty() || OverlappingLoads.size() < LoadSequence.size())) { @@ -241,7 +232,7 @@ NumLoadsNonOneByte = OverlappingNumLoadsNonOneByte; } } - assert(LoadSequence.size() <= MaxNumLoads && "broken invariant"); + assert(LoadSequence.size() <= Options.MaxNumLoads && "broken invariant"); } unsigned MemCmpExpansion::getNumBlocks() { @@ -624,7 +615,8 @@ // calculate which source was larger. The calculation requires the // two loaded source values of each load compare block. // These will be saved in the phi nodes created by setupResultBlockPHINodes. - if (!IsUsedForZeroCmp) setupResultBlockPHINodes(); + if (!IsUsedForZeroCmp) + setupResultBlockPHINodes(); // Create the number of required load compare basic blocks. createLoadCmpBlocks(); @@ -725,7 +717,7 @@ /// %phi.res = phi i32 [ %48, %loadbb3 ], [ %11, %res_block ] /// ret i32 %phi.res static bool expandMemCmp(CallInst *CI, const TargetTransformInfo *TTI, - const TargetLowering *TLI, const DataLayout *DL) { + const DataLayout *DL) { NumMemCmpCalls++; // Early exit from expansion if -Oz. @@ -746,23 +738,20 @@ // TTI call to check if target would like to expand memcmp. Also, get the // available load sizes. const bool IsUsedForZeroCmp = isOnlyUsedInZeroEqualityComparison(CI); - const auto *const Options = TTI->enableMemCmpExpansion(IsUsedForZeroCmp); - if (!Options) return false; + auto Options = TTI->enableMemCmpExpansion(CI->getFunction()->hasOptSize(), + IsUsedForZeroCmp); + if (!Options) + return false; - const unsigned MaxNumLoads = CI->getFunction()->hasOptSize() - ? (MaxLoadsPerMemcmpOptSize.getNumOccurrences() - ? MaxLoadsPerMemcmpOptSize - : TLI->getMaxExpandSizeMemcmp(true)) - : (MaxLoadsPerMemcmp.getNumOccurrences() - ? MaxLoadsPerMemcmp - : TLI->getMaxExpandSizeMemcmp(false)); + if (MemCmpEqZeroNumLoadsPerBlock.getNumOccurrences()) + Options.NumLoadsPerBlock = MemCmpEqZeroNumLoadsPerBlock; - unsigned NumLoadsPerBlock = MemCmpEqZeroNumLoadsPerBlock.getNumOccurrences() - ? MemCmpEqZeroNumLoadsPerBlock - : TLI->getMemcmpEqZeroLoadsPerBlock(); + if (CI->getFunction()->hasOptSize() && MaxLoadsPerMemcmpOptSize.getNumOccurrences()) + Options.MaxNumLoads = MaxLoadsPerMemcmpOptSize; + if (!CI->getFunction()->hasOptSize() && MaxLoadsPerMemcmp.getNumOccurrences()) + Options.MaxNumLoads = MaxLoadsPerMemcmp; - MemCmpExpansion Expansion(CI, SizeVal, *Options, MaxNumLoads, - IsUsedForZeroCmp, NumLoadsPerBlock, *DL); + MemCmpExpansion Expansion(CI, SizeVal, Options, IsUsedForZeroCmp, *DL); // Don't expand if this will require more loads than desired by the target. if (Expansion.getNumLoads() == 0) { @@ -781,8 +770,6 @@ return true; } - - class ExpandMemCmpPass : public FunctionPass { public: static char ID; @@ -792,20 +779,14 @@ } bool runOnFunction(Function &F) override { - if (skipFunction(F)) return false; - - auto *TPC = getAnalysisIfAvailable(); - if (!TPC) { + if (skipFunction(F)) return false; - } - const TargetLowering* TL = - TPC->getTM().getSubtargetImpl(F)->getTargetLowering(); const TargetLibraryInfo *TLI = &getAnalysis().getTLI(); const TargetTransformInfo *TTI = &getAnalysis().getTTI(F); - auto PA = runImpl(F, TLI, TTI, TL); + auto PA = runImpl(F, TLI, TTI); return !PA.areAllPreserved(); } @@ -813,23 +794,21 @@ void getAnalysisUsage(AnalysisUsage &AU) const override { AU.addRequired(); AU.addRequired(); + AU.addPreserved(); FunctionPass::getAnalysisUsage(AU); } PreservedAnalyses runImpl(Function &F, const TargetLibraryInfo *TLI, - const TargetTransformInfo *TTI, - const TargetLowering* TL); + const TargetTransformInfo *TTI); // Returns true if a change was made. bool runOnBlock(BasicBlock &BB, const TargetLibraryInfo *TLI, - const TargetTransformInfo *TTI, const TargetLowering* TL, - const DataLayout& DL); + const TargetTransformInfo *TTI, const DataLayout &DL); }; -bool ExpandMemCmpPass::runOnBlock( - BasicBlock &BB, const TargetLibraryInfo *TLI, - const TargetTransformInfo *TTI, const TargetLowering* TL, - const DataLayout& DL) { - for (Instruction& I : BB) { +bool ExpandMemCmpPass::runOnBlock(BasicBlock &BB, const TargetLibraryInfo *TLI, + const TargetTransformInfo *TTI, + const DataLayout &DL) { + for (Instruction &I : BB) { CallInst *CI = dyn_cast(&I); if (!CI) { continue; @@ -837,21 +816,20 @@ LibFunc Func; if (TLI->getLibFunc(ImmutableCallSite(CI), Func) && (Func == LibFunc_memcmp || Func == LibFunc_bcmp) && - expandMemCmp(CI, TTI, TL, &DL)) { + expandMemCmp(CI, TTI, &DL)) { return true; } } return false; } - -PreservedAnalyses ExpandMemCmpPass::runImpl( - Function &F, const TargetLibraryInfo *TLI, const TargetTransformInfo *TTI, - const TargetLowering* TL) { - const DataLayout& DL = F.getParent()->getDataLayout(); +PreservedAnalyses ExpandMemCmpPass::runImpl(Function &F, + const TargetLibraryInfo *TLI, + const TargetTransformInfo *TTI) { + const DataLayout &DL = F.getParent()->getDataLayout(); bool MadeChanges = false; for (auto BBIt = F.begin(); BBIt != F.end();) { - if (runOnBlock(*BBIt, TLI, TTI, TL, DL)) { + if (runOnBlock(*BBIt, TLI, TTI, DL)) { MadeChanges = true; // If changes were made, restart the function from the beginning, since // the structure of the function was changed. @@ -860,7 +838,11 @@ ++BBIt; } } - return MadeChanges ? PreservedAnalyses::none() : PreservedAnalyses::all(); + if (!MadeChanges) + return PreservedAnalyses::all(); + PreservedAnalyses PA; + PA.preserve(); + return PA; } } // namespace @@ -873,6 +855,4 @@ INITIALIZE_PASS_END(ExpandMemCmpPass, "expandmemcmp", "Expand memcmp() to load/stores", false, false) -FunctionPass *llvm::createExpandMemCmpPass() { - return new ExpandMemCmpPass(); -} +Pass *llvm::createExpandMemCmpPass() { return new ExpandMemCmpPass(); } diff --git a/llvm/lib/Transforms/Scalar/MergeICmps.cpp b/llvm/lib/Transforms/Scalar/MergeICmps.cpp --- a/llvm/lib/Transforms/Scalar/MergeICmps.cpp +++ b/llvm/lib/Transforms/Scalar/MergeICmps.cpp @@ -42,6 +42,7 @@ //===----------------------------------------------------------------------===// #include "llvm/Analysis/Loads.h" +#include "llvm/Analysis/GlobalsModRef.h" #include "llvm/Analysis/TargetLibraryInfo.h" #include "llvm/Analysis/TargetTransformInfo.h" #include "llvm/IR/Function.h" @@ -824,6 +825,7 @@ AU.addRequired(); AU.addRequired(); AU.addRequired(); + AU.addPreserved(); } PreservedAnalyses runImpl(Function &F, const TargetLibraryInfo *TLI, @@ -837,7 +839,8 @@ // We only try merging comparisons if the target wants to expand memcmp later. // The rationale is to avoid turning small chains into memcmp calls. - if (!TTI->enableMemCmpExpansion(true)) return PreservedAnalyses::all(); + if (!TTI->enableMemCmpExpansion(F.hasOptSize(), /*IsZeroCmp*/ true)) + return PreservedAnalyses::all(); // If we don't have memcmp avaiable we can't emit calls to it. if (!TLI->has(LibFunc_memcmp)) @@ -851,8 +854,10 @@ MadeChange |= processPhi(*Phi, TLI, AA); } - if (MadeChange) return PreservedAnalyses::none(); - return PreservedAnalyses::all(); + if (!MadeChange) return PreservedAnalyses::all(); + PreservedAnalyses PA; + PA.preserve(); + return PA; } } // namespace diff --git a/llvm/lib/Transforms/Scalar/Scalar.cpp b/llvm/lib/Transforms/Scalar/Scalar.cpp --- a/llvm/lib/Transforms/Scalar/Scalar.cpp +++ b/llvm/lib/Transforms/Scalar/Scalar.cpp @@ -84,6 +84,7 @@ initializeLowerWidenableConditionLegacyPassPass(Registry); initializeMemCpyOptLegacyPassPass(Registry); initializeMergeICmpsPass(Registry); + initializeExpandMemCmpPassPass(Registry); initializeMergedLoadStoreMotionLegacyPassPass(Registry); initializeNaryReassociateLegacyPassPass(Registry); initializePartiallyInlineLibCallsLegacyPassPass(Registry); diff --git a/llvm/test/CodeGen/AArch64/O3-pipeline.ll b/llvm/test/CodeGen/AArch64/O3-pipeline.ll --- a/llvm/test/CodeGen/AArch64/O3-pipeline.ll +++ b/llvm/test/CodeGen/AArch64/O3-pipeline.ll @@ -32,10 +32,6 @@ ; CHECK-NEXT: Loop Pass Manager ; CHECK-NEXT: Induction Variable Users ; CHECK-NEXT: Loop Strength Reduction -; CHECK-NEXT: Basic Alias Analysis (stateless AA impl) -; CHECK-NEXT: Function Alias Analysis Results -; CHECK-NEXT: Merge contiguous icmps into a memcmp -; CHECK-NEXT: Expand memcmp() to load/stores ; CHECK-NEXT: Lower Garbage Collection Instructions ; CHECK-NEXT: Shadow Stack GC Lowering ; CHECK-NEXT: Remove unreachable blocks from the CFG diff --git a/llvm/test/CodeGen/ARM/O3-pipeline.ll b/llvm/test/CodeGen/ARM/O3-pipeline.ll --- a/llvm/test/CodeGen/ARM/O3-pipeline.ll +++ b/llvm/test/CodeGen/ARM/O3-pipeline.ll @@ -16,10 +16,6 @@ ; CHECK: Loop Pass Manager ; CHECK: Induction Variable Users ; CHECK: Loop Strength Reduction -; CHECK: Basic Alias Analysis (stateless AA impl) -; CHECK: Function Alias Analysis Results -; CHECK: Merge contiguous icmps into a memcmp -; CHECK: Expand memcmp() to load/stores ; CHECK: Lower Garbage Collection Instructions ; CHECK: Shadow Stack GC Lowering ; CHECK: Remove unreachable blocks from the CFG diff --git a/llvm/test/CodeGen/Generic/llc-start-stop.ll b/llvm/test/CodeGen/Generic/llc-start-stop.ll --- a/llvm/test/CodeGen/Generic/llc-start-stop.ll +++ b/llvm/test/CodeGen/Generic/llc-start-stop.ll @@ -13,15 +13,15 @@ ; STOP-BEFORE-NOT: Loop Strength Reduction ; RUN: llc < %s -debug-pass=Structure -start-after=loop-reduce -o /dev/null 2>&1 | FileCheck %s -check-prefix=START-AFTER -; START-AFTER: -aa -mergeicmps +; START-AFTER: -gc-lowering ; START-AFTER: FunctionPass Manager -; START-AFTER-NEXT: Dominator Tree Construction +; START-AFTER-NEXT: Lower Garbage Collection Instructions ; RUN: llc < %s -debug-pass=Structure -start-before=loop-reduce -o /dev/null 2>&1 | FileCheck %s -check-prefix=START-BEFORE ; START-BEFORE: -machine-branch-prob -domtree ; START-BEFORE: FunctionPass Manager ; START-BEFORE: Loop Strength Reduction -; START-BEFORE-NEXT: Basic Alias Analysis (stateless AA impl) +; START-BEFORE-NEXT: Lower Garbage Collection Instructions ; RUN: not llc < %s -start-before=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-START-BEFORE ; RUN: not llc < %s -stop-before=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-STOP-BEFORE diff --git a/llvm/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll b/llvm/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll deleted file mode 100644 --- a/llvm/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll +++ /dev/null @@ -1,220 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc -ppc-gpr-icmps=all -verify-machineinstrs -mcpu=pwr8 < %s | FileCheck %s -target datalayout = "e-m:e-i64:64-n32:64" -target triple = "powerpc64le-unknown-linux-gnu" - -@zeroEqualityTest01.buffer1 = private unnamed_addr constant [3 x i32] [i32 1, i32 2, i32 4], align 4 -@zeroEqualityTest01.buffer2 = private unnamed_addr constant [3 x i32] [i32 1, i32 2, i32 3], align 4 -@zeroEqualityTest02.buffer1 = private unnamed_addr constant [4 x i32] [i32 4, i32 0, i32 0, i32 0], align 4 -@zeroEqualityTest02.buffer2 = private unnamed_addr constant [4 x i32] [i32 3, i32 0, i32 0, i32 0], align 4 -@zeroEqualityTest03.buffer1 = private unnamed_addr constant [4 x i32] [i32 0, i32 0, i32 0, i32 3], align 4 -@zeroEqualityTest03.buffer2 = private unnamed_addr constant [4 x i32] [i32 0, i32 0, i32 0, i32 4], align 4 -@zeroEqualityTest04.buffer1 = private unnamed_addr constant [15 x i32] [i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14], align 4 -@zeroEqualityTest04.buffer2 = private unnamed_addr constant [15 x i32] [i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 13], align 4 - -declare signext i32 @memcmp(i8* nocapture, i8* nocapture, i64) local_unnamed_addr #1 - -; Check 4 bytes - requires 1 load for each param. -define signext i32 @zeroEqualityTest02(i8* %x, i8* %y) { -; CHECK-LABEL: zeroEqualityTest02: -; CHECK: # %bb.0: -; CHECK-NEXT: lwz 3, 0(3) -; CHECK-NEXT: lwz 4, 0(4) -; CHECK-NEXT: xor 3, 3, 4 -; CHECK-NEXT: cntlzw 3, 3 -; CHECK-NEXT: srwi 3, 3, 5 -; CHECK-NEXT: xori 3, 3, 1 -; CHECK-NEXT: blr - %call = tail call signext i32 @memcmp(i8* %x, i8* %y, i64 4) - %not.cmp = icmp ne i32 %call, 0 - %. = zext i1 %not.cmp to i32 - ret i32 %. -} - -; Check 16 bytes - requires 2 loads for each param (or use vectors?). -define signext i32 @zeroEqualityTest01(i8* %x, i8* %y) { -; CHECK-LABEL: zeroEqualityTest01: -; CHECK: # %bb.0: -; CHECK-NEXT: ld 5, 0(3) -; CHECK-NEXT: ld 6, 0(4) -; CHECK-NEXT: cmpld 5, 6 -; CHECK-NEXT: bne 0, .LBB1_2 -; CHECK-NEXT: # %bb.1: # %loadbb1 -; CHECK-NEXT: ld 3, 8(3) -; CHECK-NEXT: ld 4, 8(4) -; CHECK-NEXT: cmpld 3, 4 -; CHECK-NEXT: li 3, 0 -; CHECK-NEXT: beq 0, .LBB1_3 -; CHECK-NEXT: .LBB1_2: # %res_block -; CHECK-NEXT: li 3, 1 -; CHECK-NEXT: .LBB1_3: # %endblock -; CHECK-NEXT: clrldi 3, 3, 32 -; CHECK-NEXT: blr - %call = tail call signext i32 @memcmp(i8* %x, i8* %y, i64 16) - %not.tobool = icmp ne i32 %call, 0 - %. = zext i1 %not.tobool to i32 - ret i32 %. -} - -; Check 7 bytes - requires 3 loads for each param. -define signext i32 @zeroEqualityTest03(i8* %x, i8* %y) { -; CHECK-LABEL: zeroEqualityTest03: -; CHECK: # %bb.0: -; CHECK-NEXT: lwz 5, 0(3) -; CHECK-NEXT: lwz 6, 0(4) -; CHECK-NEXT: cmplw 5, 6 -; CHECK-NEXT: bne 0, .LBB2_3 -; CHECK-NEXT: # %bb.1: # %loadbb1 -; CHECK-NEXT: lhz 5, 4(3) -; CHECK-NEXT: lhz 6, 4(4) -; CHECK-NEXT: cmplw 5, 6 -; CHECK-NEXT: bne 0, .LBB2_3 -; CHECK-NEXT: # %bb.2: # %loadbb2 -; CHECK-NEXT: lbz 3, 6(3) -; CHECK-NEXT: lbz 4, 6(4) -; CHECK-NEXT: cmplw 3, 4 -; CHECK-NEXT: li 3, 0 -; CHECK-NEXT: beq 0, .LBB2_4 -; CHECK-NEXT: .LBB2_3: # %res_block -; CHECK-NEXT: li 3, 1 -; CHECK-NEXT: .LBB2_4: # %endblock -; CHECK-NEXT: clrldi 3, 3, 32 -; CHECK-NEXT: blr - %call = tail call signext i32 @memcmp(i8* %x, i8* %y, i64 7) - %not.lnot = icmp ne i32 %call, 0 - %cond = zext i1 %not.lnot to i32 - ret i32 %cond -} - -; Validate with > 0 -define signext i32 @zeroEqualityTest04() { -; CHECK-LABEL: zeroEqualityTest04: -; CHECK: # %bb.0: -; CHECK-NEXT: addis 3, 2, .LzeroEqualityTest02.buffer1@toc@ha -; CHECK-NEXT: addis 4, 2, .LzeroEqualityTest02.buffer2@toc@ha -; CHECK-NEXT: addi 6, 3, .LzeroEqualityTest02.buffer1@toc@l -; CHECK-NEXT: addi 5, 4, .LzeroEqualityTest02.buffer2@toc@l -; CHECK-NEXT: ldbrx 3, 0, 6 -; CHECK-NEXT: ldbrx 4, 0, 5 -; CHECK-NEXT: cmpld 3, 4 -; CHECK-NEXT: bne 0, .LBB3_2 -; CHECK-NEXT: # %bb.1: # %loadbb1 -; CHECK-NEXT: li 4, 8 -; CHECK-NEXT: ldbrx 3, 6, 4 -; CHECK-NEXT: ldbrx 4, 5, 4 -; CHECK-NEXT: li 5, 0 -; CHECK-NEXT: cmpld 3, 4 -; CHECK-NEXT: beq 0, .LBB3_3 -; CHECK-NEXT: .LBB3_2: # %res_block -; CHECK-NEXT: cmpld 3, 4 -; CHECK-NEXT: li 3, 1 -; CHECK-NEXT: li 4, -1 -; CHECK-NEXT: isel 5, 4, 3, 0 -; CHECK-NEXT: .LBB3_3: # %endblock -; CHECK-NEXT: extsw 3, 5 -; CHECK-NEXT: neg 3, 3 -; CHECK-NEXT: rldicl 3, 3, 1, 63 -; CHECK-NEXT: xori 3, 3, 1 -; CHECK-NEXT: blr - %call = tail call signext i32 @memcmp(i8* bitcast ([4 x i32]* @zeroEqualityTest02.buffer1 to i8*), i8* bitcast ([4 x i32]* @zeroEqualityTest02.buffer2 to i8*), i64 16) - %not.cmp = icmp slt i32 %call, 1 - %. = zext i1 %not.cmp to i32 - ret i32 %. -} - -; Validate with < 0 -define signext i32 @zeroEqualityTest05() { -; CHECK-LABEL: zeroEqualityTest05: -; CHECK: # %bb.0: -; CHECK-NEXT: addis 3, 2, .LzeroEqualityTest03.buffer1@toc@ha -; CHECK-NEXT: addis 4, 2, .LzeroEqualityTest03.buffer2@toc@ha -; CHECK-NEXT: addi 6, 3, .LzeroEqualityTest03.buffer1@toc@l -; CHECK-NEXT: addi 5, 4, .LzeroEqualityTest03.buffer2@toc@l -; CHECK-NEXT: ldbrx 3, 0, 6 -; CHECK-NEXT: ldbrx 4, 0, 5 -; CHECK-NEXT: cmpld 3, 4 -; CHECK-NEXT: bne 0, .LBB4_2 -; CHECK-NEXT: # %bb.1: # %loadbb1 -; CHECK-NEXT: li 4, 8 -; CHECK-NEXT: ldbrx 3, 6, 4 -; CHECK-NEXT: ldbrx 4, 5, 4 -; CHECK-NEXT: li 5, 0 -; CHECK-NEXT: cmpld 3, 4 -; CHECK-NEXT: beq 0, .LBB4_3 -; CHECK-NEXT: .LBB4_2: # %res_block -; CHECK-NEXT: cmpld 3, 4 -; CHECK-NEXT: li 3, 1 -; CHECK-NEXT: li 4, -1 -; CHECK-NEXT: isel 5, 4, 3, 0 -; CHECK-NEXT: .LBB4_3: # %endblock -; CHECK-NEXT: nor 3, 5, 5 -; CHECK-NEXT: rlwinm 3, 3, 1, 31, 31 -; CHECK-NEXT: blr - %call = tail call signext i32 @memcmp(i8* bitcast ([4 x i32]* @zeroEqualityTest03.buffer1 to i8*), i8* bitcast ([4 x i32]* @zeroEqualityTest03.buffer2 to i8*), i64 16) - %call.lobit = lshr i32 %call, 31 - %call.lobit.not = xor i32 %call.lobit, 1 - ret i32 %call.lobit.not -} - -; Validate with memcmp()?: -define signext i32 @equalityFoldTwoConstants() { -; CHECK-LABEL: equalityFoldTwoConstants: -; CHECK: # %bb.0: # %loadbb -; CHECK-NEXT: li 3, 1 -; CHECK-NEXT: blr - %call = tail call signext i32 @memcmp(i8* bitcast ([15 x i32]* @zeroEqualityTest04.buffer1 to i8*), i8* bitcast ([15 x i32]* @zeroEqualityTest04.buffer2 to i8*), i64 16) - %not.tobool = icmp eq i32 %call, 0 - %cond = zext i1 %not.tobool to i32 - ret i32 %cond -} - -define signext i32 @equalityFoldOneConstant(i8* %X) { -; CHECK-LABEL: equalityFoldOneConstant: -; CHECK: # %bb.0: -; CHECK-NEXT: ld 4, 0(3) -; CHECK-NEXT: li 5, 1 -; CHECK-NEXT: sldi 5, 5, 32 -; CHECK-NEXT: cmpld 4, 5 -; CHECK-NEXT: bne 0, .LBB6_2 -; CHECK-NEXT: # %bb.1: # %loadbb1 -; CHECK-NEXT: li 4, 3 -; CHECK-NEXT: ld 3, 8(3) -; CHECK-NEXT: sldi 4, 4, 32 -; CHECK-NEXT: ori 4, 4, 2 -; CHECK-NEXT: cmpld 3, 4 -; CHECK-NEXT: li 3, 0 -; CHECK-NEXT: beq 0, .LBB6_3 -; CHECK-NEXT: .LBB6_2: # %res_block -; CHECK-NEXT: li 3, 1 -; CHECK-NEXT: .LBB6_3: # %endblock -; CHECK-NEXT: cntlzw 3, 3 -; CHECK-NEXT: srwi 3, 3, 5 -; CHECK-NEXT: blr - %call = tail call signext i32 @memcmp(i8* bitcast ([15 x i32]* @zeroEqualityTest04.buffer1 to i8*), i8* %X, i64 16) - %not.tobool = icmp eq i32 %call, 0 - %cond = zext i1 %not.tobool to i32 - ret i32 %cond -} - -define i1 @length2_eq_nobuiltin_attr(i8* %X, i8* %Y) { -; CHECK-LABEL: length2_eq_nobuiltin_attr: -; CHECK: # %bb.0: -; CHECK-NEXT: mflr 0 -; CHECK-NEXT: std 0, 16(1) -; CHECK-NEXT: stdu 1, -32(1) -; CHECK-NEXT: .cfi_def_cfa_offset 32 -; CHECK-NEXT: .cfi_offset lr, 16 -; CHECK-NEXT: li 5, 2 -; CHECK-NEXT: bl memcmp -; CHECK-NEXT: nop -; CHECK-NEXT: cntlzw 3, 3 -; CHECK-NEXT: rlwinm 3, 3, 27, 31, 31 -; CHECK-NEXT: addi 1, 1, 32 -; CHECK-NEXT: ld 0, 16(1) -; CHECK-NEXT: mtlr 0 -; CHECK-NEXT: blr - %m = tail call signext i32 @memcmp(i8* %X, i8* %Y, i64 2) nobuiltin - %c = icmp eq i32 %m, 0 - ret i1 %c -} - diff --git a/llvm/test/CodeGen/PowerPC/memcmp-mergeexpand.ll b/llvm/test/CodeGen/PowerPC/memcmp-mergeexpand.ll deleted file mode 100644 --- a/llvm/test/CodeGen/PowerPC/memcmp-mergeexpand.ll +++ /dev/null @@ -1,40 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64le-unknown-gnu-linux < %s | FileCheck %s -check-prefix=PPC64LE - -; This tests interaction between MergeICmp and ExpandMemCmp. - -%"struct.std::pair" = type { i32, i32 } - -define zeroext i1 @opeq1( -; PPC64LE-LABEL: opeq1: -; PPC64LE: # %bb.0: # %entry -; PPC64LE-NEXT: ld 3, 0(3) -; PPC64LE-NEXT: ld 4, 0(4) -; PPC64LE-NEXT: xor 3, 3, 4 -; PPC64LE-NEXT: cntlzd 3, 3 -; PPC64LE-NEXT: rldicl 3, 3, 58, 63 -; PPC64LE-NEXT: blr - %"struct.std::pair"* nocapture readonly dereferenceable(8) %a, - %"struct.std::pair"* nocapture readonly dereferenceable(8) %b) local_unnamed_addr #0 { -entry: - %first.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %a, i64 0, i32 0 - %0 = load i32, i32* %first.i, align 4 - %first1.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %b, i64 0, i32 0 - %1 = load i32, i32* %first1.i, align 4 - %cmp.i = icmp eq i32 %0, %1 - br i1 %cmp.i, label %land.rhs.i, label %opeq1.exit - -land.rhs.i: - %second.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %a, i64 0, i32 1 - %2 = load i32, i32* %second.i, align 4 - %second2.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %b, i64 0, i32 1 - %3 = load i32, i32* %second2.i, align 4 - %cmp3.i = icmp eq i32 %2, %3 - br label %opeq1.exit - -opeq1.exit: - %4 = phi i1 [ false, %entry ], [ %cmp3.i, %land.rhs.i ] - ret i1 %4 -} - - diff --git a/llvm/test/CodeGen/PowerPC/memcmp.ll b/llvm/test/CodeGen/PowerPC/memcmp.ll deleted file mode 100644 --- a/llvm/test/CodeGen/PowerPC/memcmp.ll +++ /dev/null @@ -1,70 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64le-unknown-gnu-linux < %s | FileCheck %s -check-prefix=CHECK - -define signext i32 @memcmp8(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) { -; CHECK-LABEL: memcmp8: -; CHECK: # %bb.0: -; CHECK-NEXT: ldbrx 3, 0, 3 -; CHECK-NEXT: ldbrx 4, 0, 4 -; CHECK-NEXT: subfc 5, 3, 4 -; CHECK-NEXT: subfe 5, 4, 4 -; CHECK-NEXT: subfc 4, 4, 3 -; CHECK-NEXT: subfe 3, 3, 3 -; CHECK-NEXT: neg 4, 5 -; CHECK-NEXT: neg 3, 3 -; CHECK-NEXT: subf 3, 3, 4 -; CHECK-NEXT: extsw 3, 3 -; CHECK-NEXT: blr - %t0 = bitcast i32* %buffer1 to i8* - %t1 = bitcast i32* %buffer2 to i8* - %call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 8) - ret i32 %call -} - -define signext i32 @memcmp4(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) { -; CHECK-LABEL: memcmp4: -; CHECK: # %bb.0: -; CHECK-NEXT: lwbrx 3, 0, 3 -; CHECK-NEXT: lwbrx 4, 0, 4 -; CHECK-NEXT: sub 5, 4, 3 -; CHECK-NEXT: sub 3, 3, 4 -; CHECK-NEXT: rldicl 4, 5, 1, 63 -; CHECK-NEXT: rldicl 3, 3, 1, 63 -; CHECK-NEXT: subf 3, 3, 4 -; CHECK-NEXT: extsw 3, 3 -; CHECK-NEXT: blr - %t0 = bitcast i32* %buffer1 to i8* - %t1 = bitcast i32* %buffer2 to i8* - %call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 4) - ret i32 %call -} - -define signext i32 @memcmp2(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) { -; CHECK-LABEL: memcmp2: -; CHECK: # %bb.0: -; CHECK-NEXT: lhbrx 3, 0, 3 -; CHECK-NEXT: lhbrx 4, 0, 4 -; CHECK-NEXT: subf 3, 4, 3 -; CHECK-NEXT: extsw 3, 3 -; CHECK-NEXT: blr - %t0 = bitcast i32* %buffer1 to i8* - %t1 = bitcast i32* %buffer2 to i8* - %call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 2) - ret i32 %call -} - -define signext i32 @memcmp1(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) { -; CHECK-LABEL: memcmp1: -; CHECK: # %bb.0: -; CHECK-NEXT: lbz 3, 0(3) -; CHECK-NEXT: lbz 4, 0(4) -; CHECK-NEXT: subf 3, 4, 3 -; CHECK-NEXT: extsw 3, 3 -; CHECK-NEXT: blr - %t0 = bitcast i32* %buffer1 to i8* - %t1 = bitcast i32* %buffer2 to i8* - %call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 1) #2 - ret i32 %call -} - -declare signext i32 @memcmp(i8*, i8*, i64) diff --git a/llvm/test/CodeGen/PowerPC/memcmpIR.ll b/llvm/test/CodeGen/PowerPC/memcmpIR.ll deleted file mode 100644 --- a/llvm/test/CodeGen/PowerPC/memcmpIR.ll +++ /dev/null @@ -1,192 +0,0 @@ -; RUN: llc -o - -mtriple=powerpc64le-unknown-gnu-linux -stop-after codegenprepare %s | FileCheck %s -; RUN: llc -o - -mtriple=powerpc64-unknown-gnu-linux -stop-after codegenprepare %s | FileCheck %s --check-prefix=CHECK-BE - -define signext i32 @test1(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) { -entry: - ; CHECK-LABEL: @test1( - ; CHECK: [[LOAD1:%[0-9]+]] = load i64, i64* - ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64* - ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD1]]) - ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD2]]) - ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[BSWAP1]], [[BSWAP2]] - ; CHECK-NEXT: br i1 [[ICMP]], label %loadbb1, label %res_block - - ; CHECK-LABEL: res_block:{{.*}} - ; CHECK: [[ICMP2:%[0-9]+]] = icmp ult i64 - ; CHECK-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1 - ; CHECK-NEXT: br label %endblock - - ; CHECK-LABEL: loadbb1:{{.*}} - ; CHECK: [[BCC1:%[0-9]+]] = bitcast i32* {{.*}} to i8* - ; CHECK-NEXT: [[BCC2:%[0-9]+]] = bitcast i32* {{.*}} to i8* - ; CHECK-NEXT: [[GEP1:%[0-9]+]] = getelementptr i8, i8* [[BCC2]], i8 8 - ; CHECK-NEXT: [[BCL1:%[0-9]+]] = bitcast i8* [[GEP1]] to i64* - ; CHECK-NEXT: [[GEP2:%[0-9]+]] = getelementptr i8, i8* [[BCC1]], i8 8 - ; CHECK-NEXT: [[BCL2:%[0-9]+]] = bitcast i8* [[GEP2]] to i64* - ; CHECK-NEXT: [[LOAD1:%[0-9]+]] = load i64, i64* [[BCL1]] - ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64* [[BCL2]] - ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD1]]) - ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD2]]) - ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[BSWAP1]], [[BSWAP2]] - ; CHECK-NEXT: br i1 [[ICMP]], label %endblock, label %res_block - - ; CHECK-BE-LABEL: @test1( - ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i64, i64* - ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64* - ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[LOAD1]], [[LOAD2]] - ; CHECK-BE-NEXT: br i1 [[ICMP]], label %loadbb1, label %res_block - - ; CHECK-BE-LABEL: res_block:{{.*}} - ; CHECK-BE: [[ICMP2:%[0-9]+]] = icmp ult i64 - ; CHECK-BE-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1 - ; CHECK-BE-NEXT: br label %endblock - - ; CHECK-BE-LABEL: loadbb1:{{.*}} - ; CHECK-BE: [[BCC1:%[0-9]+]] = bitcast i32* {{.*}} to i8* - ; CHECK-BE-NEXT: [[BCC2:%[0-9]+]] = bitcast i32* {{.*}} to i8* - ; CHECK-BE-NEXT: [[GEP1:%[0-9]+]] = getelementptr i8, i8* [[BCC2]], i8 8 - ; CHECK-BE-NEXT: [[BCL1:%[0-9]+]] = bitcast i8* [[GEP1]] to i64* - ; CHECK-BE-NEXT: [[GEP2:%[0-9]+]] = getelementptr i8, i8* [[BCC1]], i8 8 - ; CHECK-BE-NEXT: [[BCL2:%[0-9]+]] = bitcast i8* [[GEP2]] to i64* - ; CHECK-BE-NEXT: [[LOAD1:%[0-9]+]] = load i64, i64* [[BCL1]] - ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64* [[BCL2]] - ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[LOAD1]], [[LOAD2]] - ; CHECK-BE-NEXT: br i1 [[ICMP]], label %endblock, label %res_block - - %0 = bitcast i32* %buffer1 to i8* - %1 = bitcast i32* %buffer2 to i8* - %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 16) - ret i32 %call -} - -declare signext i32 @memcmp(i8* nocapture, i8* nocapture, i64) local_unnamed_addr #1 - -define signext i32 @test2(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) { - ; CHECK-LABEL: @test2( - ; CHECK: [[LOAD1:%[0-9]+]] = load i32, i32* - ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32* - ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD1]]) - ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD2]]) - ; CHECK-NEXT: [[CMP1:%[0-9]+]] = icmp ugt i32 [[BSWAP1]], [[BSWAP2]] - ; CHECK-NEXT: [[CMP2:%[0-9]+]] = icmp ult i32 [[BSWAP1]], [[BSWAP2]] - ; CHECK-NEXT: [[Z1:%[0-9]+]] = zext i1 [[CMP1]] to i32 - ; CHECK-NEXT: [[Z2:%[0-9]+]] = zext i1 [[CMP2]] to i32 - ; CHECK-NEXT: [[SUB:%[0-9]+]] = sub i32 [[Z1]], [[Z2]] - ; CHECK-NEXT: ret i32 [[SUB]] - - ; CHECK-BE-LABEL: @test2( - ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i32, i32* - ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32* - ; CHECK-BE-NEXT: [[CMP1:%[0-9]+]] = icmp ugt i32 [[LOAD1]], [[LOAD2]] - ; CHECK-BE-NEXT: [[CMP2:%[0-9]+]] = icmp ult i32 [[LOAD1]], [[LOAD2]] - ; CHECK-BE-NEXT: [[Z1:%[0-9]+]] = zext i1 [[CMP1]] to i32 - ; CHECK-BE-NEXT: [[Z2:%[0-9]+]] = zext i1 [[CMP2]] to i32 - ; CHECK-BE-NEXT: [[SUB:%[0-9]+]] = sub i32 [[Z1]], [[Z2]] - ; CHECK-BE-NEXT: ret i32 [[SUB]] - -entry: - %0 = bitcast i32* %buffer1 to i8* - %1 = bitcast i32* %buffer2 to i8* - %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 4) - ret i32 %call -} - -define signext i32 @test3(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) { - ; CHECK: [[LOAD1:%[0-9]+]] = load i64, i64* - ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64* - ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD1]]) - ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD2]]) - ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[BSWAP1]], [[BSWAP2]] - ; CHECK-NEXT: br i1 [[ICMP]], label %loadbb1, label %res_block - - ; CHECK-LABEL: res_block:{{.*}} - ; CHECK: [[ICMP2:%[0-9]+]] = icmp ult i64 - ; CHECK-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1 - ; CHECK-NEXT: br label %endblock - - ; CHECK-LABEL: loadbb1:{{.*}} - ; CHECK: [[LOAD1:%[0-9]+]] = load i32, i32* - ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32* - ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD1]]) - ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD2]]) - ; CHECK-NEXT: [[ZEXT1:%[0-9]+]] = zext i32 [[BSWAP1]] to i64 - ; CHECK-NEXT: [[ZEXT2:%[0-9]+]] = zext i32 [[BSWAP2]] to i64 - ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[ZEXT1]], [[ZEXT2]] - ; CHECK-NEXT: br i1 [[ICMP]], label %loadbb2, label %res_block - - ; CHECK-LABEL: loadbb2:{{.*}} - ; CHECK: [[LOAD1:%[0-9]+]] = load i16, i16* - ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i16, i16* - ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i16 @llvm.bswap.i16(i16 [[LOAD1]]) - ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i16 @llvm.bswap.i16(i16 [[LOAD2]]) - ; CHECK-NEXT: [[ZEXT1:%[0-9]+]] = zext i16 [[BSWAP1]] to i64 - ; CHECK-NEXT: [[ZEXT2:%[0-9]+]] = zext i16 [[BSWAP2]] to i64 - ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[ZEXT1]], [[ZEXT2]] - ; CHECK-NEXT: br i1 [[ICMP]], label %loadbb3, label %res_block - - ; CHECK-LABEL: loadbb3:{{.*}} - ; CHECK: [[LOAD1:%[0-9]+]] = load i8, i8* - ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i8, i8* - ; CHECK-NEXT: [[ZEXT1:%[0-9]+]] = zext i8 [[LOAD1]] to i32 - ; CHECK-NEXT: [[ZEXT2:%[0-9]+]] = zext i8 [[LOAD2]] to i32 - ; CHECK-NEXT: [[SUB:%[0-9]+]] = sub i32 [[ZEXT1]], [[ZEXT2]] - ; CHECK-NEXT: br label %endblock - - ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i64, i64* - ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64* - ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[LOAD1]], [[LOAD2]] - ; CHECK-BE-NEXT: br i1 [[ICMP]], label %loadbb1, label %res_block - - ; CHECK-BE-LABEL: res_block:{{.*}} - ; CHECK-BE: [[ICMP2:%[0-9]+]] = icmp ult i64 - ; CHECK-BE-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1 - ; CHECK-BE-NEXT: br label %endblock - - ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i32, i32* - ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32* - ; CHECK-BE-NEXT: [[ZEXT1:%[0-9]+]] = zext i32 [[LOAD1]] to i64 - ; CHECK-BE-NEXT: [[ZEXT2:%[0-9]+]] = zext i32 [[LOAD2]] to i64 - ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[ZEXT1]], [[ZEXT2]] - ; CHECK-BE-NEXT: br i1 [[ICMP]], label %loadbb2, label %res_block - - ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i16, i16* - ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i16, i16* - ; CHECK-BE-NEXT: [[ZEXT1:%[0-9]+]] = zext i16 [[LOAD1]] to i64 - ; CHECK-BE-NEXT: [[ZEXT2:%[0-9]+]] = zext i16 [[LOAD2]] to i64 - ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[ZEXT1]], [[ZEXT2]] - ; CHECK-BE-NEXT: br i1 [[ICMP]], label %loadbb3, label %res_block - - ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i8, i8* - ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i8, i8* - ; CHECK-BE-NEXT: [[ZEXT1:%[0-9]+]] = zext i8 [[LOAD1]] to i32 - ; CHECK-BE-NEXT: [[ZEXT2:%[0-9]+]] = zext i8 [[LOAD2]] to i32 - ; CHECK-BE-NEXT: [[SUB:%[0-9]+]] = sub i32 [[ZEXT1]], [[ZEXT2]] - ; CHECK-BE-NEXT: br label %endblock - -entry: - %0 = bitcast i32* %buffer1 to i8* - %1 = bitcast i32* %buffer2 to i8* - %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 15) - ret i32 %call -} - ; CHECK: call = tail call signext i32 @memcmp - ; CHECK-BE: call = tail call signext i32 @memcmp -define signext i32 @test4(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) { - -entry: - %0 = bitcast i32* %buffer1 to i8* - %1 = bitcast i32* %buffer2 to i8* - %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 65) - ret i32 %call -} - -define signext i32 @test5(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2, i32 signext %SIZE) { - ; CHECK: call = tail call signext i32 @memcmp - ; CHECK-BE: call = tail call signext i32 @memcmp -entry: - %0 = bitcast i32* %buffer1 to i8* - %1 = bitcast i32* %buffer2 to i8* - %conv = sext i32 %SIZE to i64 - %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 %conv) - ret i32 %call -} diff --git a/llvm/test/CodeGen/X86/O3-pipeline.ll b/llvm/test/CodeGen/X86/O3-pipeline.ll --- a/llvm/test/CodeGen/X86/O3-pipeline.ll +++ b/llvm/test/CodeGen/X86/O3-pipeline.ll @@ -29,10 +29,6 @@ ; CHECK-NEXT: Loop Pass Manager ; CHECK-NEXT: Induction Variable Users ; CHECK-NEXT: Loop Strength Reduction -; CHECK-NEXT: Basic Alias Analysis (stateless AA impl) -; CHECK-NEXT: Function Alias Analysis Results -; CHECK-NEXT: Merge contiguous icmps into a memcmp -; CHECK-NEXT: Expand memcmp() to load/stores ; CHECK-NEXT: Lower Garbage Collection Instructions ; CHECK-NEXT: Shadow Stack GC Lowering ; CHECK-NEXT: Remove unreachable blocks from the CFG diff --git a/llvm/test/CodeGen/X86/memcmp-mergeexpand.ll b/llvm/test/CodeGen/X86/memcmp-mergeexpand.ll deleted file mode 100644 --- a/llvm/test/CodeGen/X86/memcmp-mergeexpand.ll +++ /dev/null @@ -1,51 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86 -; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64 - -; This tests interaction between MergeICmp and ExpandMemCmp. - -%"struct.std::pair" = type { i32, i32 } - -define zeroext i1 @opeq1( -; X86-LABEL: opeq1: -; X86: # %bb.0: # %entry -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-NEXT: movl (%ecx), %edx -; X86-NEXT: movl 4(%ecx), %ecx -; X86-NEXT: xorl (%eax), %edx -; X86-NEXT: xorl 4(%eax), %ecx -; X86-NEXT: orl %edx, %ecx -; X86-NEXT: sete %al -; X86-NEXT: retl -; -; X64-LABEL: opeq1: -; X64: # %bb.0: # %entry -; X64-NEXT: movq (%rdi), %rax -; X64-NEXT: cmpq (%rsi), %rax -; X64-NEXT: sete %al -; X64-NEXT: retq - %"struct.std::pair"* nocapture readonly dereferenceable(8) %a, - %"struct.std::pair"* nocapture readonly dereferenceable(8) %b) local_unnamed_addr #0 { -entry: - %first.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %a, i64 0, i32 0 - %0 = load i32, i32* %first.i, align 4 - %first1.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %b, i64 0, i32 0 - %1 = load i32, i32* %first1.i, align 4 - %cmp.i = icmp eq i32 %0, %1 - br i1 %cmp.i, label %land.rhs.i, label %opeq1.exit - -land.rhs.i: - %second.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %a, i64 0, i32 1 - %2 = load i32, i32* %second.i, align 4 - %second2.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %b, i64 0, i32 1 - %3 = load i32, i32* %second2.i, align 4 - %cmp3.i = icmp eq i32 %2, %3 - br label %opeq1.exit - -opeq1.exit: - %4 = phi i1 [ false, %entry ], [ %cmp3.i, %land.rhs.i ] - ret i1 %4 -} - - diff --git a/llvm/test/CodeGen/X86/memcmp-optsize.ll b/llvm/test/CodeGen/X86/memcmp-optsize.ll deleted file mode 100644 --- a/llvm/test/CodeGen/X86/memcmp-optsize.ll +++ /dev/null @@ -1,1013 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=cmov | FileCheck %s --check-prefix=X86 --check-prefix=X86-NOSSE -; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86 --check-prefix=X86-SSE2 -; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64 --check-prefix=X64-SSE2 -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefix=X64 --check-prefix=X64-AVX2 - -; This tests codegen time inlining/optimization of memcmp -; rdar://6480398 - -@.str = private constant [65 x i8] c"0123456789012345678901234567890123456789012345678901234567890123\00", align 1 - -declare i32 @memcmp(i8*, i8*, i64) -declare i32 @bcmp(i8*, i8*, i64) - -define i32 @length2(i8* %X, i8* %Y) nounwind optsize { -; X86-LABEL: length2: -; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-NEXT: movzwl (%ecx), %ecx -; X86-NEXT: movzwl (%eax), %edx -; X86-NEXT: rolw $8, %cx -; X86-NEXT: rolw $8, %dx -; X86-NEXT: movzwl %cx, %eax -; X86-NEXT: movzwl %dx, %ecx -; X86-NEXT: subl %ecx, %eax -; X86-NEXT: retl -; -; X64-LABEL: length2: -; X64: # %bb.0: -; X64-NEXT: movzwl (%rdi), %eax -; X64-NEXT: movzwl (%rsi), %ecx -; X64-NEXT: rolw $8, %ax -; X64-NEXT: rolw $8, %cx -; X64-NEXT: movzwl %ax, %eax -; X64-NEXT: movzwl %cx, %ecx -; X64-NEXT: subl %ecx, %eax -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 2) nounwind - ret i32 %m -} - -define i1 @length2_eq(i8* %X, i8* %Y) nounwind optsize { -; X86-LABEL: length2_eq: -; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-NEXT: movzwl (%ecx), %ecx -; X86-NEXT: cmpw (%eax), %cx -; X86-NEXT: sete %al -; X86-NEXT: retl -; -; X64-LABEL: length2_eq: -; X64: # %bb.0: -; X64-NEXT: movzwl (%rdi), %eax -; X64-NEXT: cmpw (%rsi), %ax -; X64-NEXT: sete %al -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 2) nounwind - %c = icmp eq i32 %m, 0 - ret i1 %c -} - -define i1 @length2_eq_const(i8* %X) nounwind optsize { -; X86-LABEL: length2_eq_const: -; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movzwl (%eax), %eax -; X86-NEXT: cmpl $12849, %eax # imm = 0x3231 -; X86-NEXT: setne %al -; X86-NEXT: retl -; -; X64-LABEL: length2_eq_const: -; X64: # %bb.0: -; X64-NEXT: movzwl (%rdi), %eax -; X64-NEXT: cmpl $12849, %eax # imm = 0x3231 -; X64-NEXT: setne %al -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 1), i64 2) nounwind - %c = icmp ne i32 %m, 0 - ret i1 %c -} - -define i1 @length2_eq_nobuiltin_attr(i8* %X, i8* %Y) nounwind optsize { -; X86-LABEL: length2_eq_nobuiltin_attr: -; X86: # %bb.0: -; X86-NEXT: pushl $0 -; X86-NEXT: pushl $2 -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: calll memcmp -; X86-NEXT: addl $16, %esp -; X86-NEXT: testl %eax, %eax -; X86-NEXT: sete %al -; X86-NEXT: retl -; -; X64-LABEL: length2_eq_nobuiltin_attr: -; X64: # %bb.0: -; X64-NEXT: pushq %rax -; X64-NEXT: movl $2, %edx -; X64-NEXT: callq memcmp -; X64-NEXT: testl %eax, %eax -; X64-NEXT: sete %al -; X64-NEXT: popq %rcx -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 2) nounwind nobuiltin - %c = icmp eq i32 %m, 0 - ret i1 %c -} - -define i32 @length3(i8* %X, i8* %Y) nounwind optsize { -; X86-LABEL: length3: -; X86: # %bb.0: # %loadbb -; X86-NEXT: pushl %esi -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movzwl (%eax), %edx -; X86-NEXT: movzwl (%ecx), %esi -; X86-NEXT: rolw $8, %dx -; X86-NEXT: rolw $8, %si -; X86-NEXT: cmpw %si, %dx -; X86-NEXT: jne .LBB4_1 -; X86-NEXT: # %bb.2: # %loadbb1 -; X86-NEXT: movzbl 2(%eax), %eax -; X86-NEXT: movzbl 2(%ecx), %ecx -; X86-NEXT: subl %ecx, %eax -; X86-NEXT: jmp .LBB4_3 -; X86-NEXT: .LBB4_1: # %res_block -; X86-NEXT: setae %al -; X86-NEXT: movzbl %al, %eax -; X86-NEXT: leal -1(%eax,%eax), %eax -; X86-NEXT: .LBB4_3: # %endblock -; X86-NEXT: popl %esi -; X86-NEXT: retl -; -; X64-LABEL: length3: -; X64: # %bb.0: # %loadbb -; X64-NEXT: movzwl (%rdi), %eax -; X64-NEXT: movzwl (%rsi), %ecx -; X64-NEXT: rolw $8, %ax -; X64-NEXT: rolw $8, %cx -; X64-NEXT: cmpw %cx, %ax -; X64-NEXT: jne .LBB4_1 -; X64-NEXT: # %bb.2: # %loadbb1 -; X64-NEXT: movzbl 2(%rdi), %eax -; X64-NEXT: movzbl 2(%rsi), %ecx -; X64-NEXT: subl %ecx, %eax -; X64-NEXT: retq -; X64-NEXT: .LBB4_1: # %res_block -; X64-NEXT: setae %al -; X64-NEXT: movzbl %al, %eax -; X64-NEXT: leal -1(%rax,%rax), %eax -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 3) nounwind - ret i32 %m -} - -define i1 @length3_eq(i8* %X, i8* %Y) nounwind optsize { -; X86-LABEL: length3_eq: -; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-NEXT: movzwl (%ecx), %edx -; X86-NEXT: xorw (%eax), %dx -; X86-NEXT: movb 2(%ecx), %cl -; X86-NEXT: xorb 2(%eax), %cl -; X86-NEXT: movzbl %cl, %eax -; X86-NEXT: orw %dx, %ax -; X86-NEXT: setne %al -; X86-NEXT: retl -; -; X64-LABEL: length3_eq: -; X64: # %bb.0: -; X64-NEXT: movzwl (%rdi), %eax -; X64-NEXT: xorw (%rsi), %ax -; X64-NEXT: movb 2(%rdi), %cl -; X64-NEXT: xorb 2(%rsi), %cl -; X64-NEXT: movzbl %cl, %ecx -; X64-NEXT: orw %ax, %cx -; X64-NEXT: setne %al -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 3) nounwind - %c = icmp ne i32 %m, 0 - ret i1 %c -} - -define i32 @length4(i8* %X, i8* %Y) nounwind optsize { -; X86-LABEL: length4: -; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-NEXT: movl (%ecx), %ecx -; X86-NEXT: movl (%eax), %edx -; X86-NEXT: bswapl %ecx -; X86-NEXT: bswapl %edx -; X86-NEXT: xorl %eax, %eax -; X86-NEXT: cmpl %edx, %ecx -; X86-NEXT: seta %al -; X86-NEXT: sbbl $0, %eax -; X86-NEXT: retl -; -; X64-LABEL: length4: -; X64: # %bb.0: -; X64-NEXT: movl (%rdi), %ecx -; X64-NEXT: movl (%rsi), %edx -; X64-NEXT: bswapl %ecx -; X64-NEXT: bswapl %edx -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: cmpl %edx, %ecx -; X64-NEXT: seta %al -; X64-NEXT: sbbl $0, %eax -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 4) nounwind - ret i32 %m -} - -define i1 @length4_eq(i8* %X, i8* %Y) nounwind optsize { -; X86-LABEL: length4_eq: -; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-NEXT: movl (%ecx), %ecx -; X86-NEXT: cmpl (%eax), %ecx -; X86-NEXT: setne %al -; X86-NEXT: retl -; -; X64-LABEL: length4_eq: -; X64: # %bb.0: -; X64-NEXT: movl (%rdi), %eax -; X64-NEXT: cmpl (%rsi), %eax -; X64-NEXT: setne %al -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 4) nounwind - %c = icmp ne i32 %m, 0 - ret i1 %c -} - -define i1 @length4_eq_const(i8* %X) nounwind optsize { -; X86-LABEL: length4_eq_const: -; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: cmpl $875770417, (%eax) # imm = 0x34333231 -; X86-NEXT: sete %al -; X86-NEXT: retl -; -; X64-LABEL: length4_eq_const: -; X64: # %bb.0: -; X64-NEXT: cmpl $875770417, (%rdi) # imm = 0x34333231 -; X64-NEXT: sete %al -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 1), i64 4) nounwind - %c = icmp eq i32 %m, 0 - ret i1 %c -} - -define i32 @length5(i8* %X, i8* %Y) nounwind optsize { -; X86-LABEL: length5: -; X86: # %bb.0: # %loadbb -; X86-NEXT: pushl %esi -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl (%eax), %edx -; X86-NEXT: movl (%ecx), %esi -; X86-NEXT: bswapl %edx -; X86-NEXT: bswapl %esi -; X86-NEXT: cmpl %esi, %edx -; X86-NEXT: jne .LBB9_1 -; X86-NEXT: # %bb.2: # %loadbb1 -; X86-NEXT: movzbl 4(%eax), %eax -; X86-NEXT: movzbl 4(%ecx), %ecx -; X86-NEXT: subl %ecx, %eax -; X86-NEXT: jmp .LBB9_3 -; X86-NEXT: .LBB9_1: # %res_block -; X86-NEXT: setae %al -; X86-NEXT: movzbl %al, %eax -; X86-NEXT: leal -1(%eax,%eax), %eax -; X86-NEXT: .LBB9_3: # %endblock -; X86-NEXT: popl %esi -; X86-NEXT: retl -; -; X64-LABEL: length5: -; X64: # %bb.0: # %loadbb -; X64-NEXT: movl (%rdi), %eax -; X64-NEXT: movl (%rsi), %ecx -; X64-NEXT: bswapl %eax -; X64-NEXT: bswapl %ecx -; X64-NEXT: cmpl %ecx, %eax -; X64-NEXT: jne .LBB9_1 -; X64-NEXT: # %bb.2: # %loadbb1 -; X64-NEXT: movzbl 4(%rdi), %eax -; X64-NEXT: movzbl 4(%rsi), %ecx -; X64-NEXT: subl %ecx, %eax -; X64-NEXT: retq -; X64-NEXT: .LBB9_1: # %res_block -; X64-NEXT: setae %al -; X64-NEXT: movzbl %al, %eax -; X64-NEXT: leal -1(%rax,%rax), %eax -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 5) nounwind - ret i32 %m -} - -define i1 @length5_eq(i8* %X, i8* %Y) nounwind optsize { -; X86-LABEL: length5_eq: -; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-NEXT: movl (%ecx), %edx -; X86-NEXT: xorl (%eax), %edx -; X86-NEXT: movb 4(%ecx), %cl -; X86-NEXT: xorb 4(%eax), %cl -; X86-NEXT: movzbl %cl, %eax -; X86-NEXT: orl %edx, %eax -; X86-NEXT: setne %al -; X86-NEXT: retl -; -; X64-LABEL: length5_eq: -; X64: # %bb.0: -; X64-NEXT: movl (%rdi), %eax -; X64-NEXT: xorl (%rsi), %eax -; X64-NEXT: movb 4(%rdi), %cl -; X64-NEXT: xorb 4(%rsi), %cl -; X64-NEXT: movzbl %cl, %ecx -; X64-NEXT: orl %eax, %ecx -; X64-NEXT: setne %al -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 5) nounwind - %c = icmp ne i32 %m, 0 - ret i1 %c -} - -define i32 @length8(i8* %X, i8* %Y) nounwind optsize { -; X86-LABEL: length8: -; X86: # %bb.0: -; X86-NEXT: pushl %esi -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl {{[0-9]+}}(%esp), %esi -; X86-NEXT: movl (%esi), %ecx -; X86-NEXT: movl (%eax), %edx -; X86-NEXT: bswapl %ecx -; X86-NEXT: bswapl %edx -; X86-NEXT: cmpl %edx, %ecx -; X86-NEXT: jne .LBB11_2 -; X86-NEXT: # %bb.1: # %loadbb1 -; X86-NEXT: movl 4(%esi), %ecx -; X86-NEXT: movl 4(%eax), %edx -; X86-NEXT: bswapl %ecx -; X86-NEXT: bswapl %edx -; X86-NEXT: xorl %eax, %eax -; X86-NEXT: cmpl %edx, %ecx -; X86-NEXT: je .LBB11_3 -; X86-NEXT: .LBB11_2: # %res_block -; X86-NEXT: xorl %eax, %eax -; X86-NEXT: cmpl %edx, %ecx -; X86-NEXT: setae %al -; X86-NEXT: leal -1(%eax,%eax), %eax -; X86-NEXT: .LBB11_3: # %endblock -; X86-NEXT: popl %esi -; X86-NEXT: retl -; -; X64-LABEL: length8: -; X64: # %bb.0: -; X64-NEXT: movq (%rdi), %rcx -; X64-NEXT: movq (%rsi), %rdx -; X64-NEXT: bswapq %rcx -; X64-NEXT: bswapq %rdx -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: cmpq %rdx, %rcx -; X64-NEXT: seta %al -; X64-NEXT: sbbl $0, %eax -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 8) nounwind - ret i32 %m -} - -define i1 @length8_eq(i8* %X, i8* %Y) nounwind optsize { -; X86-LABEL: length8_eq: -; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-NEXT: movl (%ecx), %edx -; X86-NEXT: movl 4(%ecx), %ecx -; X86-NEXT: xorl (%eax), %edx -; X86-NEXT: xorl 4(%eax), %ecx -; X86-NEXT: orl %edx, %ecx -; X86-NEXT: sete %al -; X86-NEXT: retl -; -; X64-LABEL: length8_eq: -; X64: # %bb.0: -; X64-NEXT: movq (%rdi), %rax -; X64-NEXT: cmpq (%rsi), %rax -; X64-NEXT: sete %al -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 8) nounwind - %c = icmp eq i32 %m, 0 - ret i1 %c -} - -define i1 @length8_eq_const(i8* %X) nounwind optsize { -; X86-LABEL: length8_eq_const: -; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl $858927408, %ecx # imm = 0x33323130 -; X86-NEXT: xorl (%eax), %ecx -; X86-NEXT: movl $926299444, %edx # imm = 0x37363534 -; X86-NEXT: xorl 4(%eax), %edx -; X86-NEXT: orl %ecx, %edx -; X86-NEXT: setne %al -; X86-NEXT: retl -; -; X64-LABEL: length8_eq_const: -; X64: # %bb.0: -; X64-NEXT: movabsq $3978425819141910832, %rax # imm = 0x3736353433323130 -; X64-NEXT: cmpq %rax, (%rdi) -; X64-NEXT: setne %al -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 8) nounwind - %c = icmp ne i32 %m, 0 - ret i1 %c -} - -define i1 @length12_eq(i8* %X, i8* %Y) nounwind optsize { -; X86-LABEL: length12_eq: -; X86: # %bb.0: -; X86-NEXT: pushl $0 -; X86-NEXT: pushl $12 -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: calll memcmp -; X86-NEXT: addl $16, %esp -; X86-NEXT: testl %eax, %eax -; X86-NEXT: setne %al -; X86-NEXT: retl -; -; X64-LABEL: length12_eq: -; X64: # %bb.0: -; X64-NEXT: movq (%rdi), %rax -; X64-NEXT: xorq (%rsi), %rax -; X64-NEXT: movl 8(%rdi), %ecx -; X64-NEXT: xorl 8(%rsi), %ecx -; X64-NEXT: orq %rax, %rcx -; X64-NEXT: setne %al -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 12) nounwind - %c = icmp ne i32 %m, 0 - ret i1 %c -} - -define i32 @length12(i8* %X, i8* %Y) nounwind optsize { -; X86-LABEL: length12: -; X86: # %bb.0: -; X86-NEXT: pushl $0 -; X86-NEXT: pushl $12 -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: calll memcmp -; X86-NEXT: addl $16, %esp -; X86-NEXT: retl -; -; X64-LABEL: length12: -; X64: # %bb.0: -; X64-NEXT: movq (%rdi), %rcx -; X64-NEXT: movq (%rsi), %rdx -; X64-NEXT: bswapq %rcx -; X64-NEXT: bswapq %rdx -; X64-NEXT: cmpq %rdx, %rcx -; X64-NEXT: jne .LBB15_2 -; X64-NEXT: # %bb.1: # %loadbb1 -; X64-NEXT: movl 8(%rdi), %ecx -; X64-NEXT: movl 8(%rsi), %edx -; X64-NEXT: bswapl %ecx -; X64-NEXT: bswapl %edx -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: cmpq %rdx, %rcx -; X64-NEXT: je .LBB15_3 -; X64-NEXT: .LBB15_2: # %res_block -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: cmpq %rdx, %rcx -; X64-NEXT: setae %al -; X64-NEXT: leal -1(%rax,%rax), %eax -; X64-NEXT: .LBB15_3: # %endblock -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 12) nounwind - ret i32 %m -} - -; PR33329 - https://bugs.llvm.org/show_bug.cgi?id=33329 - -define i32 @length16(i8* %X, i8* %Y) nounwind optsize { -; X86-LABEL: length16: -; X86: # %bb.0: -; X86-NEXT: pushl $0 -; X86-NEXT: pushl $16 -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: calll memcmp -; X86-NEXT: addl $16, %esp -; X86-NEXT: retl -; -; X64-LABEL: length16: -; X64: # %bb.0: -; X64-NEXT: movq (%rdi), %rcx -; X64-NEXT: movq (%rsi), %rdx -; X64-NEXT: bswapq %rcx -; X64-NEXT: bswapq %rdx -; X64-NEXT: cmpq %rdx, %rcx -; X64-NEXT: jne .LBB16_2 -; X64-NEXT: # %bb.1: # %loadbb1 -; X64-NEXT: movq 8(%rdi), %rcx -; X64-NEXT: movq 8(%rsi), %rdx -; X64-NEXT: bswapq %rcx -; X64-NEXT: bswapq %rdx -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: cmpq %rdx, %rcx -; X64-NEXT: je .LBB16_3 -; X64-NEXT: .LBB16_2: # %res_block -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: cmpq %rdx, %rcx -; X64-NEXT: setae %al -; X64-NEXT: leal -1(%rax,%rax), %eax -; X64-NEXT: .LBB16_3: # %endblock -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 16) nounwind - ret i32 %m -} - -define i1 @length16_eq(i8* %x, i8* %y) nounwind optsize { -; X86-NOSSE-LABEL: length16_eq: -; X86-NOSSE: # %bb.0: -; X86-NOSSE-NEXT: pushl $0 -; X86-NOSSE-NEXT: pushl $16 -; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NOSSE-NEXT: calll memcmp -; X86-NOSSE-NEXT: addl $16, %esp -; X86-NOSSE-NEXT: testl %eax, %eax -; X86-NOSSE-NEXT: setne %al -; X86-NOSSE-NEXT: retl -; -; X86-SSE2-LABEL: length16_eq: -; X86-SSE2: # %bb.0: -; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-SSE2-NEXT: movdqu (%ecx), %xmm0 -; X86-SSE2-NEXT: movdqu (%eax), %xmm1 -; X86-SSE2-NEXT: pcmpeqb %xmm0, %xmm1 -; X86-SSE2-NEXT: pmovmskb %xmm1, %eax -; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X86-SSE2-NEXT: setne %al -; X86-SSE2-NEXT: retl -; -; X64-SSE2-LABEL: length16_eq: -; X64-SSE2: # %bb.0: -; X64-SSE2-NEXT: movdqu (%rdi), %xmm0 -; X64-SSE2-NEXT: movdqu (%rsi), %xmm1 -; X64-SSE2-NEXT: pcmpeqb %xmm0, %xmm1 -; X64-SSE2-NEXT: pmovmskb %xmm1, %eax -; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X64-SSE2-NEXT: setne %al -; X64-SSE2-NEXT: retq -; -; X64-AVX2-LABEL: length16_eq: -; X64-AVX2: # %bb.0: -; X64-AVX2-NEXT: vmovdqu (%rdi), %xmm0 -; X64-AVX2-NEXT: vpcmpeqb (%rsi), %xmm0, %xmm0 -; X64-AVX2-NEXT: vpmovmskb %xmm0, %eax -; X64-AVX2-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X64-AVX2-NEXT: setne %al -; X64-AVX2-NEXT: retq - %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 16) nounwind - %cmp = icmp ne i32 %call, 0 - ret i1 %cmp -} - -define i1 @length16_eq_const(i8* %X) nounwind optsize { -; X86-NOSSE-LABEL: length16_eq_const: -; X86-NOSSE: # %bb.0: -; X86-NOSSE-NEXT: pushl $0 -; X86-NOSSE-NEXT: pushl $16 -; X86-NOSSE-NEXT: pushl $.L.str -; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NOSSE-NEXT: calll memcmp -; X86-NOSSE-NEXT: addl $16, %esp -; X86-NOSSE-NEXT: testl %eax, %eax -; X86-NOSSE-NEXT: sete %al -; X86-NOSSE-NEXT: retl -; -; X86-SSE2-LABEL: length16_eq_const: -; X86-SSE2: # %bb.0: -; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-SSE2-NEXT: movdqu (%eax), %xmm0 -; X86-SSE2-NEXT: pcmpeqb {{\.LCPI.*}}, %xmm0 -; X86-SSE2-NEXT: pmovmskb %xmm0, %eax -; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X86-SSE2-NEXT: sete %al -; X86-SSE2-NEXT: retl -; -; X64-SSE2-LABEL: length16_eq_const: -; X64-SSE2: # %bb.0: -; X64-SSE2-NEXT: movdqu (%rdi), %xmm0 -; X64-SSE2-NEXT: pcmpeqb {{.*}}(%rip), %xmm0 -; X64-SSE2-NEXT: pmovmskb %xmm0, %eax -; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X64-SSE2-NEXT: sete %al -; X64-SSE2-NEXT: retq -; -; X64-AVX2-LABEL: length16_eq_const: -; X64-AVX2: # %bb.0: -; X64-AVX2-NEXT: vmovdqu (%rdi), %xmm0 -; X64-AVX2-NEXT: vpcmpeqb {{.*}}(%rip), %xmm0, %xmm0 -; X64-AVX2-NEXT: vpmovmskb %xmm0, %eax -; X64-AVX2-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X64-AVX2-NEXT: sete %al -; X64-AVX2-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 16) nounwind - %c = icmp eq i32 %m, 0 - ret i1 %c -} - -; PR33914 - https://bugs.llvm.org/show_bug.cgi?id=33914 - -define i32 @length24(i8* %X, i8* %Y) nounwind optsize { -; X86-LABEL: length24: -; X86: # %bb.0: -; X86-NEXT: pushl $0 -; X86-NEXT: pushl $24 -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: calll memcmp -; X86-NEXT: addl $16, %esp -; X86-NEXT: retl -; -; X64-LABEL: length24: -; X64: # %bb.0: -; X64-NEXT: movl $24, %edx -; X64-NEXT: jmp memcmp # TAILCALL - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 24) nounwind - ret i32 %m -} - -define i1 @length24_eq(i8* %x, i8* %y) nounwind optsize { -; X86-NOSSE-LABEL: length24_eq: -; X86-NOSSE: # %bb.0: -; X86-NOSSE-NEXT: pushl $0 -; X86-NOSSE-NEXT: pushl $24 -; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NOSSE-NEXT: calll memcmp -; X86-NOSSE-NEXT: addl $16, %esp -; X86-NOSSE-NEXT: testl %eax, %eax -; X86-NOSSE-NEXT: sete %al -; X86-NOSSE-NEXT: retl -; -; X86-SSE2-LABEL: length24_eq: -; X86-SSE2: # %bb.0: -; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-SSE2-NEXT: movdqu (%ecx), %xmm0 -; X86-SSE2-NEXT: movdqu 8(%ecx), %xmm1 -; X86-SSE2-NEXT: movdqu (%eax), %xmm2 -; X86-SSE2-NEXT: pcmpeqb %xmm0, %xmm2 -; X86-SSE2-NEXT: movdqu 8(%eax), %xmm0 -; X86-SSE2-NEXT: pcmpeqb %xmm1, %xmm0 -; X86-SSE2-NEXT: pand %xmm2, %xmm0 -; X86-SSE2-NEXT: pmovmskb %xmm0, %eax -; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X86-SSE2-NEXT: sete %al -; X86-SSE2-NEXT: retl -; -; X64-SSE2-LABEL: length24_eq: -; X64-SSE2: # %bb.0: -; X64-SSE2-NEXT: movdqu (%rdi), %xmm0 -; X64-SSE2-NEXT: movdqu (%rsi), %xmm1 -; X64-SSE2-NEXT: pcmpeqb %xmm0, %xmm1 -; X64-SSE2-NEXT: movq {{.*#+}} xmm0 = mem[0],zero -; X64-SSE2-NEXT: movq {{.*#+}} xmm2 = mem[0],zero -; X64-SSE2-NEXT: pcmpeqb %xmm0, %xmm2 -; X64-SSE2-NEXT: pand %xmm1, %xmm2 -; X64-SSE2-NEXT: pmovmskb %xmm2, %eax -; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X64-SSE2-NEXT: sete %al -; X64-SSE2-NEXT: retq -; -; X64-AVX2-LABEL: length24_eq: -; X64-AVX2: # %bb.0: -; X64-AVX2-NEXT: vmovdqu (%rdi), %xmm0 -; X64-AVX2-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero -; X64-AVX2-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero -; X64-AVX2-NEXT: vpcmpeqb %xmm2, %xmm1, %xmm1 -; X64-AVX2-NEXT: vpcmpeqb (%rsi), %xmm0, %xmm0 -; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0 -; X64-AVX2-NEXT: vpmovmskb %xmm0, %eax -; X64-AVX2-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X64-AVX2-NEXT: sete %al -; X64-AVX2-NEXT: retq - %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 24) nounwind - %cmp = icmp eq i32 %call, 0 - ret i1 %cmp -} - -define i1 @length24_eq_const(i8* %X) nounwind optsize { -; X86-NOSSE-LABEL: length24_eq_const: -; X86-NOSSE: # %bb.0: -; X86-NOSSE-NEXT: pushl $0 -; X86-NOSSE-NEXT: pushl $24 -; X86-NOSSE-NEXT: pushl $.L.str -; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NOSSE-NEXT: calll memcmp -; X86-NOSSE-NEXT: addl $16, %esp -; X86-NOSSE-NEXT: testl %eax, %eax -; X86-NOSSE-NEXT: setne %al -; X86-NOSSE-NEXT: retl -; -; X86-SSE2-LABEL: length24_eq_const: -; X86-SSE2: # %bb.0: -; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-SSE2-NEXT: movdqu (%eax), %xmm0 -; X86-SSE2-NEXT: movdqu 8(%eax), %xmm1 -; X86-SSE2-NEXT: pcmpeqb {{\.LCPI.*}}, %xmm1 -; X86-SSE2-NEXT: pcmpeqb {{\.LCPI.*}}, %xmm0 -; X86-SSE2-NEXT: pand %xmm1, %xmm0 -; X86-SSE2-NEXT: pmovmskb %xmm0, %eax -; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X86-SSE2-NEXT: setne %al -; X86-SSE2-NEXT: retl -; -; X64-SSE2-LABEL: length24_eq_const: -; X64-SSE2: # %bb.0: -; X64-SSE2-NEXT: movdqu (%rdi), %xmm0 -; X64-SSE2-NEXT: movq {{.*#+}} xmm1 = mem[0],zero -; X64-SSE2-NEXT: pcmpeqb {{.*}}(%rip), %xmm1 -; X64-SSE2-NEXT: pcmpeqb {{.*}}(%rip), %xmm0 -; X64-SSE2-NEXT: pand %xmm1, %xmm0 -; X64-SSE2-NEXT: pmovmskb %xmm0, %eax -; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X64-SSE2-NEXT: setne %al -; X64-SSE2-NEXT: retq -; -; X64-AVX2-LABEL: length24_eq_const: -; X64-AVX2: # %bb.0: -; X64-AVX2-NEXT: vmovdqu (%rdi), %xmm0 -; X64-AVX2-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero -; X64-AVX2-NEXT: vpcmpeqb {{.*}}(%rip), %xmm1, %xmm1 -; X64-AVX2-NEXT: vpcmpeqb {{.*}}(%rip), %xmm0, %xmm0 -; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0 -; X64-AVX2-NEXT: vpmovmskb %xmm0, %eax -; X64-AVX2-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X64-AVX2-NEXT: setne %al -; X64-AVX2-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 24) nounwind - %c = icmp ne i32 %m, 0 - ret i1 %c -} - -define i32 @length32(i8* %X, i8* %Y) nounwind optsize { -; X86-LABEL: length32: -; X86: # %bb.0: -; X86-NEXT: pushl $0 -; X86-NEXT: pushl $32 -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: calll memcmp -; X86-NEXT: addl $16, %esp -; X86-NEXT: retl -; -; X64-LABEL: length32: -; X64: # %bb.0: -; X64-NEXT: movl $32, %edx -; X64-NEXT: jmp memcmp # TAILCALL - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 32) nounwind - ret i32 %m -} - -; PR33325 - https://bugs.llvm.org/show_bug.cgi?id=33325 - -define i1 @length32_eq(i8* %x, i8* %y) nounwind optsize { -; X86-NOSSE-LABEL: length32_eq: -; X86-NOSSE: # %bb.0: -; X86-NOSSE-NEXT: pushl $0 -; X86-NOSSE-NEXT: pushl $32 -; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NOSSE-NEXT: calll memcmp -; X86-NOSSE-NEXT: addl $16, %esp -; X86-NOSSE-NEXT: testl %eax, %eax -; X86-NOSSE-NEXT: sete %al -; X86-NOSSE-NEXT: retl -; -; X86-SSE2-LABEL: length32_eq: -; X86-SSE2: # %bb.0: -; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-SSE2-NEXT: movdqu (%ecx), %xmm0 -; X86-SSE2-NEXT: movdqu 16(%ecx), %xmm1 -; X86-SSE2-NEXT: movdqu (%eax), %xmm2 -; X86-SSE2-NEXT: pcmpeqb %xmm0, %xmm2 -; X86-SSE2-NEXT: movdqu 16(%eax), %xmm0 -; X86-SSE2-NEXT: pcmpeqb %xmm1, %xmm0 -; X86-SSE2-NEXT: pand %xmm2, %xmm0 -; X86-SSE2-NEXT: pmovmskb %xmm0, %eax -; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X86-SSE2-NEXT: sete %al -; X86-SSE2-NEXT: retl -; -; X64-SSE2-LABEL: length32_eq: -; X64-SSE2: # %bb.0: -; X64-SSE2-NEXT: movdqu (%rdi), %xmm0 -; X64-SSE2-NEXT: movdqu 16(%rdi), %xmm1 -; X64-SSE2-NEXT: movdqu (%rsi), %xmm2 -; X64-SSE2-NEXT: pcmpeqb %xmm0, %xmm2 -; X64-SSE2-NEXT: movdqu 16(%rsi), %xmm0 -; X64-SSE2-NEXT: pcmpeqb %xmm1, %xmm0 -; X64-SSE2-NEXT: pand %xmm2, %xmm0 -; X64-SSE2-NEXT: pmovmskb %xmm0, %eax -; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X64-SSE2-NEXT: sete %al -; X64-SSE2-NEXT: retq -; -; X64-AVX2-LABEL: length32_eq: -; X64-AVX2: # %bb.0: -; X64-AVX2-NEXT: vmovdqu (%rdi), %ymm0 -; X64-AVX2-NEXT: vpcmpeqb (%rsi), %ymm0, %ymm0 -; X64-AVX2-NEXT: vpmovmskb %ymm0, %eax -; X64-AVX2-NEXT: cmpl $-1, %eax -; X64-AVX2-NEXT: sete %al -; X64-AVX2-NEXT: vzeroupper -; X64-AVX2-NEXT: retq - %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 32) nounwind - %cmp = icmp eq i32 %call, 0 - ret i1 %cmp -} - -define i1 @length32_eq_const(i8* %X) nounwind optsize { -; X86-NOSSE-LABEL: length32_eq_const: -; X86-NOSSE: # %bb.0: -; X86-NOSSE-NEXT: pushl $0 -; X86-NOSSE-NEXT: pushl $32 -; X86-NOSSE-NEXT: pushl $.L.str -; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NOSSE-NEXT: calll memcmp -; X86-NOSSE-NEXT: addl $16, %esp -; X86-NOSSE-NEXT: testl %eax, %eax -; X86-NOSSE-NEXT: setne %al -; X86-NOSSE-NEXT: retl -; -; X86-SSE2-LABEL: length32_eq_const: -; X86-SSE2: # %bb.0: -; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-SSE2-NEXT: movdqu (%eax), %xmm0 -; X86-SSE2-NEXT: movdqu 16(%eax), %xmm1 -; X86-SSE2-NEXT: pcmpeqb {{\.LCPI.*}}, %xmm1 -; X86-SSE2-NEXT: pcmpeqb {{\.LCPI.*}}, %xmm0 -; X86-SSE2-NEXT: pand %xmm1, %xmm0 -; X86-SSE2-NEXT: pmovmskb %xmm0, %eax -; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X86-SSE2-NEXT: setne %al -; X86-SSE2-NEXT: retl -; -; X64-SSE2-LABEL: length32_eq_const: -; X64-SSE2: # %bb.0: -; X64-SSE2-NEXT: movdqu (%rdi), %xmm0 -; X64-SSE2-NEXT: movdqu 16(%rdi), %xmm1 -; X64-SSE2-NEXT: pcmpeqb {{.*}}(%rip), %xmm1 -; X64-SSE2-NEXT: pcmpeqb {{.*}}(%rip), %xmm0 -; X64-SSE2-NEXT: pand %xmm1, %xmm0 -; X64-SSE2-NEXT: pmovmskb %xmm0, %eax -; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X64-SSE2-NEXT: setne %al -; X64-SSE2-NEXT: retq -; -; X64-AVX2-LABEL: length32_eq_const: -; X64-AVX2: # %bb.0: -; X64-AVX2-NEXT: vmovdqu (%rdi), %ymm0 -; X64-AVX2-NEXT: vpcmpeqb {{.*}}(%rip), %ymm0, %ymm0 -; X64-AVX2-NEXT: vpmovmskb %ymm0, %eax -; X64-AVX2-NEXT: cmpl $-1, %eax -; X64-AVX2-NEXT: setne %al -; X64-AVX2-NEXT: vzeroupper -; X64-AVX2-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 32) nounwind - %c = icmp ne i32 %m, 0 - ret i1 %c -} - -define i32 @length64(i8* %X, i8* %Y) nounwind optsize { -; X86-LABEL: length64: -; X86: # %bb.0: -; X86-NEXT: pushl $0 -; X86-NEXT: pushl $64 -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: calll memcmp -; X86-NEXT: addl $16, %esp -; X86-NEXT: retl -; -; X64-LABEL: length64: -; X64: # %bb.0: -; X64-NEXT: movl $64, %edx -; X64-NEXT: jmp memcmp # TAILCALL - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 64) nounwind - ret i32 %m -} - -define i1 @length64_eq(i8* %x, i8* %y) nounwind optsize { -; X86-LABEL: length64_eq: -; X86: # %bb.0: -; X86-NEXT: pushl $0 -; X86-NEXT: pushl $64 -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: calll memcmp -; X86-NEXT: addl $16, %esp -; X86-NEXT: testl %eax, %eax -; X86-NEXT: setne %al -; X86-NEXT: retl -; -; X64-SSE2-LABEL: length64_eq: -; X64-SSE2: # %bb.0: -; X64-SSE2-NEXT: pushq %rax -; X64-SSE2-NEXT: movl $64, %edx -; X64-SSE2-NEXT: callq memcmp -; X64-SSE2-NEXT: testl %eax, %eax -; X64-SSE2-NEXT: setne %al -; X64-SSE2-NEXT: popq %rcx -; X64-SSE2-NEXT: retq -; -; X64-AVX2-LABEL: length64_eq: -; X64-AVX2: # %bb.0: -; X64-AVX2-NEXT: vmovdqu (%rdi), %ymm0 -; X64-AVX2-NEXT: vmovdqu 32(%rdi), %ymm1 -; X64-AVX2-NEXT: vpcmpeqb 32(%rsi), %ymm1, %ymm1 -; X64-AVX2-NEXT: vpcmpeqb (%rsi), %ymm0, %ymm0 -; X64-AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0 -; X64-AVX2-NEXT: vpmovmskb %ymm0, %eax -; X64-AVX2-NEXT: cmpl $-1, %eax -; X64-AVX2-NEXT: setne %al -; X64-AVX2-NEXT: vzeroupper -; X64-AVX2-NEXT: retq - %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 64) nounwind - %cmp = icmp ne i32 %call, 0 - ret i1 %cmp -} - -define i1 @length64_eq_const(i8* %X) nounwind optsize { -; X86-LABEL: length64_eq_const: -; X86: # %bb.0: -; X86-NEXT: pushl $0 -; X86-NEXT: pushl $64 -; X86-NEXT: pushl $.L.str -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: calll memcmp -; X86-NEXT: addl $16, %esp -; X86-NEXT: testl %eax, %eax -; X86-NEXT: sete %al -; X86-NEXT: retl -; -; X64-SSE2-LABEL: length64_eq_const: -; X64-SSE2: # %bb.0: -; X64-SSE2-NEXT: pushq %rax -; X64-SSE2-NEXT: movl $.L.str, %esi -; X64-SSE2-NEXT: movl $64, %edx -; X64-SSE2-NEXT: callq memcmp -; X64-SSE2-NEXT: testl %eax, %eax -; X64-SSE2-NEXT: sete %al -; X64-SSE2-NEXT: popq %rcx -; X64-SSE2-NEXT: retq -; -; X64-AVX2-LABEL: length64_eq_const: -; X64-AVX2: # %bb.0: -; X64-AVX2-NEXT: vmovdqu (%rdi), %ymm0 -; X64-AVX2-NEXT: vmovdqu 32(%rdi), %ymm1 -; X64-AVX2-NEXT: vpcmpeqb {{.*}}(%rip), %ymm1, %ymm1 -; X64-AVX2-NEXT: vpcmpeqb {{.*}}(%rip), %ymm0, %ymm0 -; X64-AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0 -; X64-AVX2-NEXT: vpmovmskb %ymm0, %eax -; X64-AVX2-NEXT: cmpl $-1, %eax -; X64-AVX2-NEXT: sete %al -; X64-AVX2-NEXT: vzeroupper -; X64-AVX2-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 64) nounwind - %c = icmp eq i32 %m, 0 - ret i1 %c -} - -define i32 @bcmp_length2(i8* %X, i8* %Y) nounwind optsize { -; X86-LABEL: bcmp_length2: -; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-NEXT: movzwl (%ecx), %ecx -; X86-NEXT: movzwl (%eax), %edx -; X86-NEXT: rolw $8, %cx -; X86-NEXT: rolw $8, %dx -; X86-NEXT: movzwl %cx, %eax -; X86-NEXT: movzwl %dx, %ecx -; X86-NEXT: subl %ecx, %eax -; X86-NEXT: retl -; -; X64-LABEL: bcmp_length2: -; X64: # %bb.0: -; X64-NEXT: movzwl (%rdi), %eax -; X64-NEXT: movzwl (%rsi), %ecx -; X64-NEXT: rolw $8, %ax -; X64-NEXT: rolw $8, %cx -; X64-NEXT: movzwl %ax, %eax -; X64-NEXT: movzwl %cx, %ecx -; X64-NEXT: subl %ecx, %eax -; X64-NEXT: retq - %m = tail call i32 @bcmp(i8* %X, i8* %Y, i64 2) nounwind - ret i32 %m -} - diff --git a/llvm/test/CodeGen/X86/memcmp.ll b/llvm/test/CodeGen/X86/memcmp.ll deleted file mode 100644 --- a/llvm/test/CodeGen/X86/memcmp.ll +++ /dev/null @@ -1,1614 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=cmov | FileCheck %s --check-prefix=X86 --check-prefix=X86-NOSSE -; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse | FileCheck %s --check-prefix=X86 --check-prefix=SSE --check-prefix=X86-SSE1 -; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86 --check-prefix=SSE --check-prefix=X86-SSE2 -; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64 --check-prefix=X64-SSE2 -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=X64 --check-prefix=X64-AVX --check-prefix=X64-AVX1 -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefix=X64 --check-prefix=X64-AVX --check-prefix=X64-AVX2 - -; This tests codegen time inlining/optimization of memcmp -; rdar://6480398 - -@.str = private constant [65 x i8] c"0123456789012345678901234567890123456789012345678901234567890123\00", align 1 - -declare i32 @memcmp(i8*, i8*, i64) - -define i32 @length0(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length0: -; X86: # %bb.0: -; X86-NEXT: xorl %eax, %eax -; X86-NEXT: retl -; -; X64-LABEL: length0: -; X64: # %bb.0: -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 0) nounwind - ret i32 %m - } - -define i1 @length0_eq(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length0_eq: -; X86: # %bb.0: -; X86-NEXT: movb $1, %al -; X86-NEXT: retl -; -; X64-LABEL: length0_eq: -; X64: # %bb.0: -; X64-NEXT: movb $1, %al -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 0) nounwind - %c = icmp eq i32 %m, 0 - ret i1 %c -} - -define i1 @length0_lt(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length0_lt: -; X86: # %bb.0: -; X86-NEXT: xorl %eax, %eax -; X86-NEXT: retl -; -; X64-LABEL: length0_lt: -; X64: # %bb.0: -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 0) nounwind - %c = icmp slt i32 %m, 0 - ret i1 %c -} - -define i32 @length2(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length2: -; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-NEXT: movzwl (%ecx), %ecx -; X86-NEXT: movzwl (%eax), %edx -; X86-NEXT: rolw $8, %cx -; X86-NEXT: rolw $8, %dx -; X86-NEXT: movzwl %cx, %eax -; X86-NEXT: movzwl %dx, %ecx -; X86-NEXT: subl %ecx, %eax -; X86-NEXT: retl -; -; X64-LABEL: length2: -; X64: # %bb.0: -; X64-NEXT: movzwl (%rdi), %eax -; X64-NEXT: movzwl (%rsi), %ecx -; X64-NEXT: rolw $8, %ax -; X64-NEXT: rolw $8, %cx -; X64-NEXT: movzwl %ax, %eax -; X64-NEXT: movzwl %cx, %ecx -; X64-NEXT: subl %ecx, %eax -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 2) nounwind - ret i32 %m -} - -define i1 @length2_eq(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length2_eq: -; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-NEXT: movzwl (%ecx), %ecx -; X86-NEXT: cmpw (%eax), %cx -; X86-NEXT: sete %al -; X86-NEXT: retl -; -; X64-LABEL: length2_eq: -; X64: # %bb.0: -; X64-NEXT: movzwl (%rdi), %eax -; X64-NEXT: cmpw (%rsi), %ax -; X64-NEXT: sete %al -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 2) nounwind - %c = icmp eq i32 %m, 0 - ret i1 %c -} - -define i1 @length2_lt(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length2_lt: -; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-NEXT: movzwl (%ecx), %ecx -; X86-NEXT: movzwl (%eax), %edx -; X86-NEXT: rolw $8, %cx -; X86-NEXT: rolw $8, %dx -; X86-NEXT: movzwl %cx, %eax -; X86-NEXT: movzwl %dx, %ecx -; X86-NEXT: subl %ecx, %eax -; X86-NEXT: shrl $31, %eax -; X86-NEXT: # kill: def $al killed $al killed $eax -; X86-NEXT: retl -; -; X64-LABEL: length2_lt: -; X64: # %bb.0: -; X64-NEXT: movzwl (%rdi), %eax -; X64-NEXT: movzwl (%rsi), %ecx -; X64-NEXT: rolw $8, %ax -; X64-NEXT: rolw $8, %cx -; X64-NEXT: movzwl %ax, %eax -; X64-NEXT: movzwl %cx, %ecx -; X64-NEXT: subl %ecx, %eax -; X64-NEXT: shrl $31, %eax -; X64-NEXT: # kill: def $al killed $al killed $eax -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 2) nounwind - %c = icmp slt i32 %m, 0 - ret i1 %c -} - -define i1 @length2_gt(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length2_gt: -; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-NEXT: movzwl (%ecx), %ecx -; X86-NEXT: movzwl (%eax), %eax -; X86-NEXT: rolw $8, %cx -; X86-NEXT: rolw $8, %ax -; X86-NEXT: movzwl %cx, %ecx -; X86-NEXT: movzwl %ax, %eax -; X86-NEXT: subl %eax, %ecx -; X86-NEXT: testl %ecx, %ecx -; X86-NEXT: setg %al -; X86-NEXT: retl -; -; X64-LABEL: length2_gt: -; X64: # %bb.0: -; X64-NEXT: movzwl (%rdi), %eax -; X64-NEXT: movzwl (%rsi), %ecx -; X64-NEXT: rolw $8, %ax -; X64-NEXT: rolw $8, %cx -; X64-NEXT: movzwl %ax, %eax -; X64-NEXT: movzwl %cx, %ecx -; X64-NEXT: subl %ecx, %eax -; X64-NEXT: testl %eax, %eax -; X64-NEXT: setg %al -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 2) nounwind - %c = icmp sgt i32 %m, 0 - ret i1 %c -} - -define i1 @length2_eq_const(i8* %X) nounwind { -; X86-LABEL: length2_eq_const: -; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movzwl (%eax), %eax -; X86-NEXT: cmpl $12849, %eax # imm = 0x3231 -; X86-NEXT: setne %al -; X86-NEXT: retl -; -; X64-LABEL: length2_eq_const: -; X64: # %bb.0: -; X64-NEXT: movzwl (%rdi), %eax -; X64-NEXT: cmpl $12849, %eax # imm = 0x3231 -; X64-NEXT: setne %al -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 1), i64 2) nounwind - %c = icmp ne i32 %m, 0 - ret i1 %c -} - -define i1 @length2_eq_nobuiltin_attr(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length2_eq_nobuiltin_attr: -; X86: # %bb.0: -; X86-NEXT: pushl $0 -; X86-NEXT: pushl $2 -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: calll memcmp -; X86-NEXT: addl $16, %esp -; X86-NEXT: testl %eax, %eax -; X86-NEXT: sete %al -; X86-NEXT: retl -; -; X64-LABEL: length2_eq_nobuiltin_attr: -; X64: # %bb.0: -; X64-NEXT: pushq %rax -; X64-NEXT: movl $2, %edx -; X64-NEXT: callq memcmp -; X64-NEXT: testl %eax, %eax -; X64-NEXT: sete %al -; X64-NEXT: popq %rcx -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 2) nounwind nobuiltin - %c = icmp eq i32 %m, 0 - ret i1 %c -} - -define i32 @length3(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length3: -; X86: # %bb.0: # %loadbb -; X86-NEXT: pushl %esi -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movzwl (%eax), %edx -; X86-NEXT: movzwl (%ecx), %esi -; X86-NEXT: rolw $8, %dx -; X86-NEXT: rolw $8, %si -; X86-NEXT: cmpw %si, %dx -; X86-NEXT: jne .LBB9_1 -; X86-NEXT: # %bb.2: # %loadbb1 -; X86-NEXT: movzbl 2(%eax), %eax -; X86-NEXT: movzbl 2(%ecx), %ecx -; X86-NEXT: subl %ecx, %eax -; X86-NEXT: popl %esi -; X86-NEXT: retl -; X86-NEXT: .LBB9_1: # %res_block -; X86-NEXT: setae %al -; X86-NEXT: movzbl %al, %eax -; X86-NEXT: leal -1(%eax,%eax), %eax -; X86-NEXT: popl %esi -; X86-NEXT: retl -; -; X64-LABEL: length3: -; X64: # %bb.0: # %loadbb -; X64-NEXT: movzwl (%rdi), %eax -; X64-NEXT: movzwl (%rsi), %ecx -; X64-NEXT: rolw $8, %ax -; X64-NEXT: rolw $8, %cx -; X64-NEXT: cmpw %cx, %ax -; X64-NEXT: jne .LBB9_1 -; X64-NEXT: # %bb.2: # %loadbb1 -; X64-NEXT: movzbl 2(%rdi), %eax -; X64-NEXT: movzbl 2(%rsi), %ecx -; X64-NEXT: subl %ecx, %eax -; X64-NEXT: retq -; X64-NEXT: .LBB9_1: # %res_block -; X64-NEXT: setae %al -; X64-NEXT: movzbl %al, %eax -; X64-NEXT: leal -1(%rax,%rax), %eax -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 3) nounwind - ret i32 %m -} - -define i1 @length3_eq(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length3_eq: -; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-NEXT: movzwl (%ecx), %edx -; X86-NEXT: xorw (%eax), %dx -; X86-NEXT: movb 2(%ecx), %cl -; X86-NEXT: xorb 2(%eax), %cl -; X86-NEXT: movzbl %cl, %eax -; X86-NEXT: orw %dx, %ax -; X86-NEXT: setne %al -; X86-NEXT: retl -; -; X64-LABEL: length3_eq: -; X64: # %bb.0: -; X64-NEXT: movzwl (%rdi), %eax -; X64-NEXT: xorw (%rsi), %ax -; X64-NEXT: movb 2(%rdi), %cl -; X64-NEXT: xorb 2(%rsi), %cl -; X64-NEXT: movzbl %cl, %ecx -; X64-NEXT: orw %ax, %cx -; X64-NEXT: setne %al -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 3) nounwind - %c = icmp ne i32 %m, 0 - ret i1 %c -} - -define i32 @length4(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length4: -; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-NEXT: movl (%ecx), %ecx -; X86-NEXT: movl (%eax), %edx -; X86-NEXT: bswapl %ecx -; X86-NEXT: bswapl %edx -; X86-NEXT: xorl %eax, %eax -; X86-NEXT: cmpl %edx, %ecx -; X86-NEXT: seta %al -; X86-NEXT: sbbl $0, %eax -; X86-NEXT: retl -; -; X64-LABEL: length4: -; X64: # %bb.0: -; X64-NEXT: movl (%rdi), %ecx -; X64-NEXT: movl (%rsi), %edx -; X64-NEXT: bswapl %ecx -; X64-NEXT: bswapl %edx -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: cmpl %edx, %ecx -; X64-NEXT: seta %al -; X64-NEXT: sbbl $0, %eax -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 4) nounwind - ret i32 %m -} - -define i1 @length4_eq(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length4_eq: -; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-NEXT: movl (%ecx), %ecx -; X86-NEXT: cmpl (%eax), %ecx -; X86-NEXT: setne %al -; X86-NEXT: retl -; -; X64-LABEL: length4_eq: -; X64: # %bb.0: -; X64-NEXT: movl (%rdi), %eax -; X64-NEXT: cmpl (%rsi), %eax -; X64-NEXT: setne %al -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 4) nounwind - %c = icmp ne i32 %m, 0 - ret i1 %c -} - -define i1 @length4_lt(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length4_lt: -; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-NEXT: movl (%ecx), %ecx -; X86-NEXT: movl (%eax), %edx -; X86-NEXT: bswapl %ecx -; X86-NEXT: bswapl %edx -; X86-NEXT: xorl %eax, %eax -; X86-NEXT: cmpl %edx, %ecx -; X86-NEXT: seta %al -; X86-NEXT: sbbl $0, %eax -; X86-NEXT: shrl $31, %eax -; X86-NEXT: # kill: def $al killed $al killed $eax -; X86-NEXT: retl -; -; X64-LABEL: length4_lt: -; X64: # %bb.0: -; X64-NEXT: movl (%rdi), %ecx -; X64-NEXT: movl (%rsi), %edx -; X64-NEXT: bswapl %ecx -; X64-NEXT: bswapl %edx -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: cmpl %edx, %ecx -; X64-NEXT: seta %al -; X64-NEXT: sbbl $0, %eax -; X64-NEXT: shrl $31, %eax -; X64-NEXT: # kill: def $al killed $al killed $eax -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 4) nounwind - %c = icmp slt i32 %m, 0 - ret i1 %c -} - -define i1 @length4_gt(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length4_gt: -; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-NEXT: movl (%ecx), %ecx -; X86-NEXT: movl (%eax), %eax -; X86-NEXT: bswapl %ecx -; X86-NEXT: bswapl %eax -; X86-NEXT: xorl %edx, %edx -; X86-NEXT: cmpl %eax, %ecx -; X86-NEXT: seta %dl -; X86-NEXT: sbbl $0, %edx -; X86-NEXT: testl %edx, %edx -; X86-NEXT: setg %al -; X86-NEXT: retl -; -; X64-LABEL: length4_gt: -; X64: # %bb.0: -; X64-NEXT: movl (%rdi), %eax -; X64-NEXT: movl (%rsi), %ecx -; X64-NEXT: bswapl %eax -; X64-NEXT: bswapl %ecx -; X64-NEXT: xorl %edx, %edx -; X64-NEXT: cmpl %ecx, %eax -; X64-NEXT: seta %dl -; X64-NEXT: sbbl $0, %edx -; X64-NEXT: testl %edx, %edx -; X64-NEXT: setg %al -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 4) nounwind - %c = icmp sgt i32 %m, 0 - ret i1 %c -} - -define i1 @length4_eq_const(i8* %X) nounwind { -; X86-LABEL: length4_eq_const: -; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: cmpl $875770417, (%eax) # imm = 0x34333231 -; X86-NEXT: sete %al -; X86-NEXT: retl -; -; X64-LABEL: length4_eq_const: -; X64: # %bb.0: -; X64-NEXT: cmpl $875770417, (%rdi) # imm = 0x34333231 -; X64-NEXT: sete %al -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 1), i64 4) nounwind - %c = icmp eq i32 %m, 0 - ret i1 %c -} - -define i32 @length5(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length5: -; X86: # %bb.0: # %loadbb -; X86-NEXT: pushl %esi -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl (%eax), %edx -; X86-NEXT: movl (%ecx), %esi -; X86-NEXT: bswapl %edx -; X86-NEXT: bswapl %esi -; X86-NEXT: cmpl %esi, %edx -; X86-NEXT: jne .LBB16_1 -; X86-NEXT: # %bb.2: # %loadbb1 -; X86-NEXT: movzbl 4(%eax), %eax -; X86-NEXT: movzbl 4(%ecx), %ecx -; X86-NEXT: subl %ecx, %eax -; X86-NEXT: popl %esi -; X86-NEXT: retl -; X86-NEXT: .LBB16_1: # %res_block -; X86-NEXT: setae %al -; X86-NEXT: movzbl %al, %eax -; X86-NEXT: leal -1(%eax,%eax), %eax -; X86-NEXT: popl %esi -; X86-NEXT: retl -; -; X64-LABEL: length5: -; X64: # %bb.0: # %loadbb -; X64-NEXT: movl (%rdi), %eax -; X64-NEXT: movl (%rsi), %ecx -; X64-NEXT: bswapl %eax -; X64-NEXT: bswapl %ecx -; X64-NEXT: cmpl %ecx, %eax -; X64-NEXT: jne .LBB16_1 -; X64-NEXT: # %bb.2: # %loadbb1 -; X64-NEXT: movzbl 4(%rdi), %eax -; X64-NEXT: movzbl 4(%rsi), %ecx -; X64-NEXT: subl %ecx, %eax -; X64-NEXT: retq -; X64-NEXT: .LBB16_1: # %res_block -; X64-NEXT: setae %al -; X64-NEXT: movzbl %al, %eax -; X64-NEXT: leal -1(%rax,%rax), %eax -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 5) nounwind - ret i32 %m -} - -define i1 @length5_eq(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length5_eq: -; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-NEXT: movl (%ecx), %edx -; X86-NEXT: xorl (%eax), %edx -; X86-NEXT: movb 4(%ecx), %cl -; X86-NEXT: xorb 4(%eax), %cl -; X86-NEXT: movzbl %cl, %eax -; X86-NEXT: orl %edx, %eax -; X86-NEXT: setne %al -; X86-NEXT: retl -; -; X64-LABEL: length5_eq: -; X64: # %bb.0: -; X64-NEXT: movl (%rdi), %eax -; X64-NEXT: xorl (%rsi), %eax -; X64-NEXT: movb 4(%rdi), %cl -; X64-NEXT: xorb 4(%rsi), %cl -; X64-NEXT: movzbl %cl, %ecx -; X64-NEXT: orl %eax, %ecx -; X64-NEXT: setne %al -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 5) nounwind - %c = icmp ne i32 %m, 0 - ret i1 %c -} - -define i1 @length5_lt(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length5_lt: -; X86: # %bb.0: # %loadbb -; X86-NEXT: pushl %esi -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl (%eax), %edx -; X86-NEXT: movl (%ecx), %esi -; X86-NEXT: bswapl %edx -; X86-NEXT: bswapl %esi -; X86-NEXT: cmpl %esi, %edx -; X86-NEXT: jne .LBB18_1 -; X86-NEXT: # %bb.2: # %loadbb1 -; X86-NEXT: movzbl 4(%eax), %eax -; X86-NEXT: movzbl 4(%ecx), %ecx -; X86-NEXT: subl %ecx, %eax -; X86-NEXT: jmp .LBB18_3 -; X86-NEXT: .LBB18_1: # %res_block -; X86-NEXT: setae %al -; X86-NEXT: movzbl %al, %eax -; X86-NEXT: leal -1(%eax,%eax), %eax -; X86-NEXT: .LBB18_3: # %endblock -; X86-NEXT: shrl $31, %eax -; X86-NEXT: # kill: def $al killed $al killed $eax -; X86-NEXT: popl %esi -; X86-NEXT: retl -; -; X64-LABEL: length5_lt: -; X64: # %bb.0: # %loadbb -; X64-NEXT: movl (%rdi), %eax -; X64-NEXT: movl (%rsi), %ecx -; X64-NEXT: bswapl %eax -; X64-NEXT: bswapl %ecx -; X64-NEXT: cmpl %ecx, %eax -; X64-NEXT: jne .LBB18_1 -; X64-NEXT: # %bb.2: # %loadbb1 -; X64-NEXT: movzbl 4(%rdi), %eax -; X64-NEXT: movzbl 4(%rsi), %ecx -; X64-NEXT: subl %ecx, %eax -; X64-NEXT: shrl $31, %eax -; X64-NEXT: # kill: def $al killed $al killed $eax -; X64-NEXT: retq -; X64-NEXT: .LBB18_1: # %res_block -; X64-NEXT: setae %al -; X64-NEXT: movzbl %al, %eax -; X64-NEXT: leal -1(%rax,%rax), %eax -; X64-NEXT: shrl $31, %eax -; X64-NEXT: # kill: def $al killed $al killed $eax -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 5) nounwind - %c = icmp slt i32 %m, 0 - ret i1 %c -} - -define i1 @length7_eq(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length7_eq: -; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-NEXT: movl (%ecx), %edx -; X86-NEXT: movl 3(%ecx), %ecx -; X86-NEXT: xorl (%eax), %edx -; X86-NEXT: xorl 3(%eax), %ecx -; X86-NEXT: orl %edx, %ecx -; X86-NEXT: setne %al -; X86-NEXT: retl -; -; X64-LABEL: length7_eq: -; X64: # %bb.0: -; X64-NEXT: movl (%rdi), %eax -; X64-NEXT: movl 3(%rdi), %ecx -; X64-NEXT: xorl (%rsi), %eax -; X64-NEXT: xorl 3(%rsi), %ecx -; X64-NEXT: orl %eax, %ecx -; X64-NEXT: setne %al -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 7) nounwind - %c = icmp ne i32 %m, 0 - ret i1 %c -} - -define i32 @length8(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length8: -; X86: # %bb.0: -; X86-NEXT: pushl %esi -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl {{[0-9]+}}(%esp), %esi -; X86-NEXT: movl (%esi), %ecx -; X86-NEXT: movl (%eax), %edx -; X86-NEXT: bswapl %ecx -; X86-NEXT: bswapl %edx -; X86-NEXT: cmpl %edx, %ecx -; X86-NEXT: jne .LBB20_2 -; X86-NEXT: # %bb.1: # %loadbb1 -; X86-NEXT: movl 4(%esi), %ecx -; X86-NEXT: movl 4(%eax), %edx -; X86-NEXT: bswapl %ecx -; X86-NEXT: bswapl %edx -; X86-NEXT: xorl %eax, %eax -; X86-NEXT: cmpl %edx, %ecx -; X86-NEXT: je .LBB20_3 -; X86-NEXT: .LBB20_2: # %res_block -; X86-NEXT: xorl %eax, %eax -; X86-NEXT: cmpl %edx, %ecx -; X86-NEXT: setae %al -; X86-NEXT: leal -1(%eax,%eax), %eax -; X86-NEXT: .LBB20_3: # %endblock -; X86-NEXT: popl %esi -; X86-NEXT: retl -; -; X64-LABEL: length8: -; X64: # %bb.0: -; X64-NEXT: movq (%rdi), %rcx -; X64-NEXT: movq (%rsi), %rdx -; X64-NEXT: bswapq %rcx -; X64-NEXT: bswapq %rdx -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: cmpq %rdx, %rcx -; X64-NEXT: seta %al -; X64-NEXT: sbbl $0, %eax -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 8) nounwind - ret i32 %m -} - -define i1 @length8_eq(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length8_eq: -; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-NEXT: movl (%ecx), %edx -; X86-NEXT: movl 4(%ecx), %ecx -; X86-NEXT: xorl (%eax), %edx -; X86-NEXT: xorl 4(%eax), %ecx -; X86-NEXT: orl %edx, %ecx -; X86-NEXT: sete %al -; X86-NEXT: retl -; -; X64-LABEL: length8_eq: -; X64: # %bb.0: -; X64-NEXT: movq (%rdi), %rax -; X64-NEXT: cmpq (%rsi), %rax -; X64-NEXT: sete %al -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 8) nounwind - %c = icmp eq i32 %m, 0 - ret i1 %c -} - -define i1 @length8_eq_const(i8* %X) nounwind { -; X86-LABEL: length8_eq_const: -; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl $858927408, %ecx # imm = 0x33323130 -; X86-NEXT: xorl (%eax), %ecx -; X86-NEXT: movl $926299444, %edx # imm = 0x37363534 -; X86-NEXT: xorl 4(%eax), %edx -; X86-NEXT: orl %ecx, %edx -; X86-NEXT: setne %al -; X86-NEXT: retl -; -; X64-LABEL: length8_eq_const: -; X64: # %bb.0: -; X64-NEXT: movabsq $3978425819141910832, %rax # imm = 0x3736353433323130 -; X64-NEXT: cmpq %rax, (%rdi) -; X64-NEXT: setne %al -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 8) nounwind - %c = icmp ne i32 %m, 0 - ret i1 %c -} - -define i1 @length9_eq(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length9_eq: -; X86: # %bb.0: -; X86-NEXT: pushl $0 -; X86-NEXT: pushl $9 -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: calll memcmp -; X86-NEXT: addl $16, %esp -; X86-NEXT: testl %eax, %eax -; X86-NEXT: sete %al -; X86-NEXT: retl -; -; X64-LABEL: length9_eq: -; X64: # %bb.0: -; X64-NEXT: movq (%rdi), %rax -; X64-NEXT: xorq (%rsi), %rax -; X64-NEXT: movb 8(%rdi), %cl -; X64-NEXT: xorb 8(%rsi), %cl -; X64-NEXT: movzbl %cl, %ecx -; X64-NEXT: orq %rax, %rcx -; X64-NEXT: sete %al -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 9) nounwind - %c = icmp eq i32 %m, 0 - ret i1 %c -} - -define i1 @length10_eq(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length10_eq: -; X86: # %bb.0: -; X86-NEXT: pushl $0 -; X86-NEXT: pushl $10 -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: calll memcmp -; X86-NEXT: addl $16, %esp -; X86-NEXT: testl %eax, %eax -; X86-NEXT: sete %al -; X86-NEXT: retl -; -; X64-LABEL: length10_eq: -; X64: # %bb.0: -; X64-NEXT: movq (%rdi), %rax -; X64-NEXT: xorq (%rsi), %rax -; X64-NEXT: movzwl 8(%rdi), %ecx -; X64-NEXT: xorw 8(%rsi), %cx -; X64-NEXT: movzwl %cx, %ecx -; X64-NEXT: orq %rax, %rcx -; X64-NEXT: sete %al -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 10) nounwind - %c = icmp eq i32 %m, 0 - ret i1 %c -} - -define i1 @length11_eq(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length11_eq: -; X86: # %bb.0: -; X86-NEXT: pushl $0 -; X86-NEXT: pushl $11 -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: calll memcmp -; X86-NEXT: addl $16, %esp -; X86-NEXT: testl %eax, %eax -; X86-NEXT: sete %al -; X86-NEXT: retl -; -; X64-LABEL: length11_eq: -; X64: # %bb.0: -; X64-NEXT: movq (%rdi), %rax -; X64-NEXT: movq 3(%rdi), %rcx -; X64-NEXT: xorq (%rsi), %rax -; X64-NEXT: xorq 3(%rsi), %rcx -; X64-NEXT: orq %rax, %rcx -; X64-NEXT: sete %al -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 11) nounwind - %c = icmp eq i32 %m, 0 - ret i1 %c -} - -define i1 @length12_eq(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length12_eq: -; X86: # %bb.0: -; X86-NEXT: pushl $0 -; X86-NEXT: pushl $12 -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: calll memcmp -; X86-NEXT: addl $16, %esp -; X86-NEXT: testl %eax, %eax -; X86-NEXT: setne %al -; X86-NEXT: retl -; -; X64-LABEL: length12_eq: -; X64: # %bb.0: -; X64-NEXT: movq (%rdi), %rax -; X64-NEXT: xorq (%rsi), %rax -; X64-NEXT: movl 8(%rdi), %ecx -; X64-NEXT: xorl 8(%rsi), %ecx -; X64-NEXT: orq %rax, %rcx -; X64-NEXT: setne %al -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 12) nounwind - %c = icmp ne i32 %m, 0 - ret i1 %c -} - -define i32 @length12(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length12: -; X86: # %bb.0: -; X86-NEXT: pushl $0 -; X86-NEXT: pushl $12 -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: calll memcmp -; X86-NEXT: addl $16, %esp -; X86-NEXT: retl -; -; X64-LABEL: length12: -; X64: # %bb.0: -; X64-NEXT: movq (%rdi), %rcx -; X64-NEXT: movq (%rsi), %rdx -; X64-NEXT: bswapq %rcx -; X64-NEXT: bswapq %rdx -; X64-NEXT: cmpq %rdx, %rcx -; X64-NEXT: jne .LBB27_2 -; X64-NEXT: # %bb.1: # %loadbb1 -; X64-NEXT: movl 8(%rdi), %ecx -; X64-NEXT: movl 8(%rsi), %edx -; X64-NEXT: bswapl %ecx -; X64-NEXT: bswapl %edx -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: cmpq %rdx, %rcx -; X64-NEXT: je .LBB27_3 -; X64-NEXT: .LBB27_2: # %res_block -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: cmpq %rdx, %rcx -; X64-NEXT: setae %al -; X64-NEXT: leal -1(%rax,%rax), %eax -; X64-NEXT: .LBB27_3: # %endblock -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 12) nounwind - ret i32 %m -} - -define i1 @length13_eq(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length13_eq: -; X86: # %bb.0: -; X86-NEXT: pushl $0 -; X86-NEXT: pushl $13 -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: calll memcmp -; X86-NEXT: addl $16, %esp -; X86-NEXT: testl %eax, %eax -; X86-NEXT: sete %al -; X86-NEXT: retl -; -; X64-LABEL: length13_eq: -; X64: # %bb.0: -; X64-NEXT: movq (%rdi), %rax -; X64-NEXT: movq 5(%rdi), %rcx -; X64-NEXT: xorq (%rsi), %rax -; X64-NEXT: xorq 5(%rsi), %rcx -; X64-NEXT: orq %rax, %rcx -; X64-NEXT: sete %al -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 13) nounwind - %c = icmp eq i32 %m, 0 - ret i1 %c -} - -define i1 @length14_eq(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length14_eq: -; X86: # %bb.0: -; X86-NEXT: pushl $0 -; X86-NEXT: pushl $14 -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: calll memcmp -; X86-NEXT: addl $16, %esp -; X86-NEXT: testl %eax, %eax -; X86-NEXT: sete %al -; X86-NEXT: retl -; -; X64-LABEL: length14_eq: -; X64: # %bb.0: -; X64-NEXT: movq (%rdi), %rax -; X64-NEXT: movq 6(%rdi), %rcx -; X64-NEXT: xorq (%rsi), %rax -; X64-NEXT: xorq 6(%rsi), %rcx -; X64-NEXT: orq %rax, %rcx -; X64-NEXT: sete %al -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 14) nounwind - %c = icmp eq i32 %m, 0 - ret i1 %c -} - -define i1 @length15_eq(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length15_eq: -; X86: # %bb.0: -; X86-NEXT: pushl $0 -; X86-NEXT: pushl $15 -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: calll memcmp -; X86-NEXT: addl $16, %esp -; X86-NEXT: testl %eax, %eax -; X86-NEXT: sete %al -; X86-NEXT: retl -; -; X64-LABEL: length15_eq: -; X64: # %bb.0: -; X64-NEXT: movq (%rdi), %rax -; X64-NEXT: movq 7(%rdi), %rcx -; X64-NEXT: xorq (%rsi), %rax -; X64-NEXT: xorq 7(%rsi), %rcx -; X64-NEXT: orq %rax, %rcx -; X64-NEXT: sete %al -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 15) nounwind - %c = icmp eq i32 %m, 0 - ret i1 %c -} - -; PR33329 - https://bugs.llvm.org/show_bug.cgi?id=33329 - -define i32 @length16(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length16: -; X86: # %bb.0: -; X86-NEXT: pushl $0 -; X86-NEXT: pushl $16 -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: calll memcmp -; X86-NEXT: addl $16, %esp -; X86-NEXT: retl -; -; X64-LABEL: length16: -; X64: # %bb.0: -; X64-NEXT: movq (%rdi), %rcx -; X64-NEXT: movq (%rsi), %rdx -; X64-NEXT: bswapq %rcx -; X64-NEXT: bswapq %rdx -; X64-NEXT: cmpq %rdx, %rcx -; X64-NEXT: jne .LBB31_2 -; X64-NEXT: # %bb.1: # %loadbb1 -; X64-NEXT: movq 8(%rdi), %rcx -; X64-NEXT: movq 8(%rsi), %rdx -; X64-NEXT: bswapq %rcx -; X64-NEXT: bswapq %rdx -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: cmpq %rdx, %rcx -; X64-NEXT: je .LBB31_3 -; X64-NEXT: .LBB31_2: # %res_block -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: cmpq %rdx, %rcx -; X64-NEXT: setae %al -; X64-NEXT: leal -1(%rax,%rax), %eax -; X64-NEXT: .LBB31_3: # %endblock -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 16) nounwind - ret i32 %m -} - -define i1 @length16_eq(i8* %x, i8* %y) nounwind { -; X86-NOSSE-LABEL: length16_eq: -; X86-NOSSE: # %bb.0: -; X86-NOSSE-NEXT: pushl $0 -; X86-NOSSE-NEXT: pushl $16 -; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NOSSE-NEXT: calll memcmp -; X86-NOSSE-NEXT: addl $16, %esp -; X86-NOSSE-NEXT: testl %eax, %eax -; X86-NOSSE-NEXT: setne %al -; X86-NOSSE-NEXT: retl -; -; X86-SSE1-LABEL: length16_eq: -; X86-SSE1: # %bb.0: -; X86-SSE1-NEXT: pushl $0 -; X86-SSE1-NEXT: pushl $16 -; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp) -; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp) -; X86-SSE1-NEXT: calll memcmp -; X86-SSE1-NEXT: addl $16, %esp -; X86-SSE1-NEXT: testl %eax, %eax -; X86-SSE1-NEXT: setne %al -; X86-SSE1-NEXT: retl -; -; X86-SSE2-LABEL: length16_eq: -; X86-SSE2: # %bb.0: -; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-SSE2-NEXT: movdqu (%ecx), %xmm0 -; X86-SSE2-NEXT: movdqu (%eax), %xmm1 -; X86-SSE2-NEXT: pcmpeqb %xmm0, %xmm1 -; X86-SSE2-NEXT: pmovmskb %xmm1, %eax -; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X86-SSE2-NEXT: setne %al -; X86-SSE2-NEXT: retl -; -; X64-SSE2-LABEL: length16_eq: -; X64-SSE2: # %bb.0: -; X64-SSE2-NEXT: movdqu (%rdi), %xmm0 -; X64-SSE2-NEXT: movdqu (%rsi), %xmm1 -; X64-SSE2-NEXT: pcmpeqb %xmm0, %xmm1 -; X64-SSE2-NEXT: pmovmskb %xmm1, %eax -; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X64-SSE2-NEXT: setne %al -; X64-SSE2-NEXT: retq -; -; X64-AVX-LABEL: length16_eq: -; X64-AVX: # %bb.0: -; X64-AVX-NEXT: vmovdqu (%rdi), %xmm0 -; X64-AVX-NEXT: vpcmpeqb (%rsi), %xmm0, %xmm0 -; X64-AVX-NEXT: vpmovmskb %xmm0, %eax -; X64-AVX-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X64-AVX-NEXT: setne %al -; X64-AVX-NEXT: retq - %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 16) nounwind - %cmp = icmp ne i32 %call, 0 - ret i1 %cmp -} - -define i1 @length16_eq_const(i8* %X) nounwind { -; X86-NOSSE-LABEL: length16_eq_const: -; X86-NOSSE: # %bb.0: -; X86-NOSSE-NEXT: pushl $0 -; X86-NOSSE-NEXT: pushl $16 -; X86-NOSSE-NEXT: pushl $.L.str -; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NOSSE-NEXT: calll memcmp -; X86-NOSSE-NEXT: addl $16, %esp -; X86-NOSSE-NEXT: testl %eax, %eax -; X86-NOSSE-NEXT: sete %al -; X86-NOSSE-NEXT: retl -; -; X86-SSE1-LABEL: length16_eq_const: -; X86-SSE1: # %bb.0: -; X86-SSE1-NEXT: pushl $0 -; X86-SSE1-NEXT: pushl $16 -; X86-SSE1-NEXT: pushl $.L.str -; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp) -; X86-SSE1-NEXT: calll memcmp -; X86-SSE1-NEXT: addl $16, %esp -; X86-SSE1-NEXT: testl %eax, %eax -; X86-SSE1-NEXT: sete %al -; X86-SSE1-NEXT: retl -; -; X86-SSE2-LABEL: length16_eq_const: -; X86-SSE2: # %bb.0: -; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-SSE2-NEXT: movdqu (%eax), %xmm0 -; X86-SSE2-NEXT: pcmpeqb {{\.LCPI.*}}, %xmm0 -; X86-SSE2-NEXT: pmovmskb %xmm0, %eax -; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X86-SSE2-NEXT: sete %al -; X86-SSE2-NEXT: retl -; -; X64-SSE2-LABEL: length16_eq_const: -; X64-SSE2: # %bb.0: -; X64-SSE2-NEXT: movdqu (%rdi), %xmm0 -; X64-SSE2-NEXT: pcmpeqb {{.*}}(%rip), %xmm0 -; X64-SSE2-NEXT: pmovmskb %xmm0, %eax -; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X64-SSE2-NEXT: sete %al -; X64-SSE2-NEXT: retq -; -; X64-AVX-LABEL: length16_eq_const: -; X64-AVX: # %bb.0: -; X64-AVX-NEXT: vmovdqu (%rdi), %xmm0 -; X64-AVX-NEXT: vpcmpeqb {{.*}}(%rip), %xmm0, %xmm0 -; X64-AVX-NEXT: vpmovmskb %xmm0, %eax -; X64-AVX-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X64-AVX-NEXT: sete %al -; X64-AVX-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 16) nounwind - %c = icmp eq i32 %m, 0 - ret i1 %c -} - -; PR33914 - https://bugs.llvm.org/show_bug.cgi?id=33914 - -define i32 @length24(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length24: -; X86: # %bb.0: -; X86-NEXT: pushl $0 -; X86-NEXT: pushl $24 -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: calll memcmp -; X86-NEXT: addl $16, %esp -; X86-NEXT: retl -; -; X64-LABEL: length24: -; X64: # %bb.0: -; X64-NEXT: movl $24, %edx -; X64-NEXT: jmp memcmp # TAILCALL - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 24) nounwind - ret i32 %m -} - -define i1 @length24_eq(i8* %x, i8* %y) nounwind { -; X86-NOSSE-LABEL: length24_eq: -; X86-NOSSE: # %bb.0: -; X86-NOSSE-NEXT: pushl $0 -; X86-NOSSE-NEXT: pushl $24 -; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NOSSE-NEXT: calll memcmp -; X86-NOSSE-NEXT: addl $16, %esp -; X86-NOSSE-NEXT: testl %eax, %eax -; X86-NOSSE-NEXT: sete %al -; X86-NOSSE-NEXT: retl -; -; X86-SSE1-LABEL: length24_eq: -; X86-SSE1: # %bb.0: -; X86-SSE1-NEXT: pushl $0 -; X86-SSE1-NEXT: pushl $24 -; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp) -; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp) -; X86-SSE1-NEXT: calll memcmp -; X86-SSE1-NEXT: addl $16, %esp -; X86-SSE1-NEXT: testl %eax, %eax -; X86-SSE1-NEXT: sete %al -; X86-SSE1-NEXT: retl -; -; X86-SSE2-LABEL: length24_eq: -; X86-SSE2: # %bb.0: -; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-SSE2-NEXT: movdqu (%ecx), %xmm0 -; X86-SSE2-NEXT: movdqu 8(%ecx), %xmm1 -; X86-SSE2-NEXT: movdqu (%eax), %xmm2 -; X86-SSE2-NEXT: pcmpeqb %xmm0, %xmm2 -; X86-SSE2-NEXT: movdqu 8(%eax), %xmm0 -; X86-SSE2-NEXT: pcmpeqb %xmm1, %xmm0 -; X86-SSE2-NEXT: pand %xmm2, %xmm0 -; X86-SSE2-NEXT: pmovmskb %xmm0, %eax -; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X86-SSE2-NEXT: sete %al -; X86-SSE2-NEXT: retl -; -; X64-SSE2-LABEL: length24_eq: -; X64-SSE2: # %bb.0: -; X64-SSE2-NEXT: movdqu (%rdi), %xmm0 -; X64-SSE2-NEXT: movdqu (%rsi), %xmm1 -; X64-SSE2-NEXT: pcmpeqb %xmm0, %xmm1 -; X64-SSE2-NEXT: movq {{.*#+}} xmm0 = mem[0],zero -; X64-SSE2-NEXT: movq {{.*#+}} xmm2 = mem[0],zero -; X64-SSE2-NEXT: pcmpeqb %xmm0, %xmm2 -; X64-SSE2-NEXT: pand %xmm1, %xmm2 -; X64-SSE2-NEXT: pmovmskb %xmm2, %eax -; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X64-SSE2-NEXT: sete %al -; X64-SSE2-NEXT: retq -; -; X64-AVX-LABEL: length24_eq: -; X64-AVX: # %bb.0: -; X64-AVX-NEXT: vmovdqu (%rdi), %xmm0 -; X64-AVX-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero -; X64-AVX-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero -; X64-AVX-NEXT: vpcmpeqb %xmm2, %xmm1, %xmm1 -; X64-AVX-NEXT: vpcmpeqb (%rsi), %xmm0, %xmm0 -; X64-AVX-NEXT: vpand %xmm1, %xmm0, %xmm0 -; X64-AVX-NEXT: vpmovmskb %xmm0, %eax -; X64-AVX-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X64-AVX-NEXT: sete %al -; X64-AVX-NEXT: retq - %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 24) nounwind - %cmp = icmp eq i32 %call, 0 - ret i1 %cmp -} - -define i1 @length24_eq_const(i8* %X) nounwind { -; X86-NOSSE-LABEL: length24_eq_const: -; X86-NOSSE: # %bb.0: -; X86-NOSSE-NEXT: pushl $0 -; X86-NOSSE-NEXT: pushl $24 -; X86-NOSSE-NEXT: pushl $.L.str -; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NOSSE-NEXT: calll memcmp -; X86-NOSSE-NEXT: addl $16, %esp -; X86-NOSSE-NEXT: testl %eax, %eax -; X86-NOSSE-NEXT: setne %al -; X86-NOSSE-NEXT: retl -; -; X86-SSE1-LABEL: length24_eq_const: -; X86-SSE1: # %bb.0: -; X86-SSE1-NEXT: pushl $0 -; X86-SSE1-NEXT: pushl $24 -; X86-SSE1-NEXT: pushl $.L.str -; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp) -; X86-SSE1-NEXT: calll memcmp -; X86-SSE1-NEXT: addl $16, %esp -; X86-SSE1-NEXT: testl %eax, %eax -; X86-SSE1-NEXT: setne %al -; X86-SSE1-NEXT: retl -; -; X86-SSE2-LABEL: length24_eq_const: -; X86-SSE2: # %bb.0: -; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-SSE2-NEXT: movdqu (%eax), %xmm0 -; X86-SSE2-NEXT: movdqu 8(%eax), %xmm1 -; X86-SSE2-NEXT: pcmpeqb {{\.LCPI.*}}, %xmm1 -; X86-SSE2-NEXT: pcmpeqb {{\.LCPI.*}}, %xmm0 -; X86-SSE2-NEXT: pand %xmm1, %xmm0 -; X86-SSE2-NEXT: pmovmskb %xmm0, %eax -; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X86-SSE2-NEXT: setne %al -; X86-SSE2-NEXT: retl -; -; X64-SSE2-LABEL: length24_eq_const: -; X64-SSE2: # %bb.0: -; X64-SSE2-NEXT: movdqu (%rdi), %xmm0 -; X64-SSE2-NEXT: movq {{.*#+}} xmm1 = mem[0],zero -; X64-SSE2-NEXT: pcmpeqb {{.*}}(%rip), %xmm1 -; X64-SSE2-NEXT: pcmpeqb {{.*}}(%rip), %xmm0 -; X64-SSE2-NEXT: pand %xmm1, %xmm0 -; X64-SSE2-NEXT: pmovmskb %xmm0, %eax -; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X64-SSE2-NEXT: setne %al -; X64-SSE2-NEXT: retq -; -; X64-AVX-LABEL: length24_eq_const: -; X64-AVX: # %bb.0: -; X64-AVX-NEXT: vmovdqu (%rdi), %xmm0 -; X64-AVX-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero -; X64-AVX-NEXT: vpcmpeqb {{.*}}(%rip), %xmm1, %xmm1 -; X64-AVX-NEXT: vpcmpeqb {{.*}}(%rip), %xmm0, %xmm0 -; X64-AVX-NEXT: vpand %xmm1, %xmm0, %xmm0 -; X64-AVX-NEXT: vpmovmskb %xmm0, %eax -; X64-AVX-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X64-AVX-NEXT: setne %al -; X64-AVX-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 24) nounwind - %c = icmp ne i32 %m, 0 - ret i1 %c -} - -define i32 @length32(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length32: -; X86: # %bb.0: -; X86-NEXT: pushl $0 -; X86-NEXT: pushl $32 -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: calll memcmp -; X86-NEXT: addl $16, %esp -; X86-NEXT: retl -; -; X64-LABEL: length32: -; X64: # %bb.0: -; X64-NEXT: movl $32, %edx -; X64-NEXT: jmp memcmp # TAILCALL - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 32) nounwind - ret i32 %m -} - -; PR33325 - https://bugs.llvm.org/show_bug.cgi?id=33325 - -define i1 @length32_eq(i8* %x, i8* %y) nounwind { -; X86-NOSSE-LABEL: length32_eq: -; X86-NOSSE: # %bb.0: -; X86-NOSSE-NEXT: pushl $0 -; X86-NOSSE-NEXT: pushl $32 -; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NOSSE-NEXT: calll memcmp -; X86-NOSSE-NEXT: addl $16, %esp -; X86-NOSSE-NEXT: testl %eax, %eax -; X86-NOSSE-NEXT: sete %al -; X86-NOSSE-NEXT: retl -; -; X86-SSE1-LABEL: length32_eq: -; X86-SSE1: # %bb.0: -; X86-SSE1-NEXT: pushl $0 -; X86-SSE1-NEXT: pushl $32 -; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp) -; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp) -; X86-SSE1-NEXT: calll memcmp -; X86-SSE1-NEXT: addl $16, %esp -; X86-SSE1-NEXT: testl %eax, %eax -; X86-SSE1-NEXT: sete %al -; X86-SSE1-NEXT: retl -; -; X86-SSE2-LABEL: length32_eq: -; X86-SSE2: # %bb.0: -; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-SSE2-NEXT: movdqu (%ecx), %xmm0 -; X86-SSE2-NEXT: movdqu 16(%ecx), %xmm1 -; X86-SSE2-NEXT: movdqu (%eax), %xmm2 -; X86-SSE2-NEXT: pcmpeqb %xmm0, %xmm2 -; X86-SSE2-NEXT: movdqu 16(%eax), %xmm0 -; X86-SSE2-NEXT: pcmpeqb %xmm1, %xmm0 -; X86-SSE2-NEXT: pand %xmm2, %xmm0 -; X86-SSE2-NEXT: pmovmskb %xmm0, %eax -; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X86-SSE2-NEXT: sete %al -; X86-SSE2-NEXT: retl -; -; X64-SSE2-LABEL: length32_eq: -; X64-SSE2: # %bb.0: -; X64-SSE2-NEXT: movdqu (%rdi), %xmm0 -; X64-SSE2-NEXT: movdqu 16(%rdi), %xmm1 -; X64-SSE2-NEXT: movdqu (%rsi), %xmm2 -; X64-SSE2-NEXT: pcmpeqb %xmm0, %xmm2 -; X64-SSE2-NEXT: movdqu 16(%rsi), %xmm0 -; X64-SSE2-NEXT: pcmpeqb %xmm1, %xmm0 -; X64-SSE2-NEXT: pand %xmm2, %xmm0 -; X64-SSE2-NEXT: pmovmskb %xmm0, %eax -; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X64-SSE2-NEXT: sete %al -; X64-SSE2-NEXT: retq -; -; X64-AVX1-LABEL: length32_eq: -; X64-AVX1: # %bb.0: -; X64-AVX1-NEXT: vmovdqu (%rdi), %xmm0 -; X64-AVX1-NEXT: vmovdqu 16(%rdi), %xmm1 -; X64-AVX1-NEXT: vpcmpeqb 16(%rsi), %xmm1, %xmm1 -; X64-AVX1-NEXT: vpcmpeqb (%rsi), %xmm0, %xmm0 -; X64-AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0 -; X64-AVX1-NEXT: vpmovmskb %xmm0, %eax -; X64-AVX1-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X64-AVX1-NEXT: sete %al -; X64-AVX1-NEXT: retq -; -; X64-AVX2-LABEL: length32_eq: -; X64-AVX2: # %bb.0: -; X64-AVX2-NEXT: vmovdqu (%rdi), %ymm0 -; X64-AVX2-NEXT: vpcmpeqb (%rsi), %ymm0, %ymm0 -; X64-AVX2-NEXT: vpmovmskb %ymm0, %eax -; X64-AVX2-NEXT: cmpl $-1, %eax -; X64-AVX2-NEXT: sete %al -; X64-AVX2-NEXT: vzeroupper -; X64-AVX2-NEXT: retq - %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 32) nounwind - %cmp = icmp eq i32 %call, 0 - ret i1 %cmp -} - -define i1 @length32_eq_const(i8* %X) nounwind { -; X86-NOSSE-LABEL: length32_eq_const: -; X86-NOSSE: # %bb.0: -; X86-NOSSE-NEXT: pushl $0 -; X86-NOSSE-NEXT: pushl $32 -; X86-NOSSE-NEXT: pushl $.L.str -; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NOSSE-NEXT: calll memcmp -; X86-NOSSE-NEXT: addl $16, %esp -; X86-NOSSE-NEXT: testl %eax, %eax -; X86-NOSSE-NEXT: setne %al -; X86-NOSSE-NEXT: retl -; -; X86-SSE1-LABEL: length32_eq_const: -; X86-SSE1: # %bb.0: -; X86-SSE1-NEXT: pushl $0 -; X86-SSE1-NEXT: pushl $32 -; X86-SSE1-NEXT: pushl $.L.str -; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp) -; X86-SSE1-NEXT: calll memcmp -; X86-SSE1-NEXT: addl $16, %esp -; X86-SSE1-NEXT: testl %eax, %eax -; X86-SSE1-NEXT: setne %al -; X86-SSE1-NEXT: retl -; -; X86-SSE2-LABEL: length32_eq_const: -; X86-SSE2: # %bb.0: -; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-SSE2-NEXT: movdqu (%eax), %xmm0 -; X86-SSE2-NEXT: movdqu 16(%eax), %xmm1 -; X86-SSE2-NEXT: pcmpeqb {{\.LCPI.*}}, %xmm1 -; X86-SSE2-NEXT: pcmpeqb {{\.LCPI.*}}, %xmm0 -; X86-SSE2-NEXT: pand %xmm1, %xmm0 -; X86-SSE2-NEXT: pmovmskb %xmm0, %eax -; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X86-SSE2-NEXT: setne %al -; X86-SSE2-NEXT: retl -; -; X64-SSE2-LABEL: length32_eq_const: -; X64-SSE2: # %bb.0: -; X64-SSE2-NEXT: movdqu (%rdi), %xmm0 -; X64-SSE2-NEXT: movdqu 16(%rdi), %xmm1 -; X64-SSE2-NEXT: pcmpeqb {{.*}}(%rip), %xmm1 -; X64-SSE2-NEXT: pcmpeqb {{.*}}(%rip), %xmm0 -; X64-SSE2-NEXT: pand %xmm1, %xmm0 -; X64-SSE2-NEXT: pmovmskb %xmm0, %eax -; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X64-SSE2-NEXT: setne %al -; X64-SSE2-NEXT: retq -; -; X64-AVX1-LABEL: length32_eq_const: -; X64-AVX1: # %bb.0: -; X64-AVX1-NEXT: vmovdqu (%rdi), %xmm0 -; X64-AVX1-NEXT: vmovdqu 16(%rdi), %xmm1 -; X64-AVX1-NEXT: vpcmpeqb {{.*}}(%rip), %xmm1, %xmm1 -; X64-AVX1-NEXT: vpcmpeqb {{.*}}(%rip), %xmm0, %xmm0 -; X64-AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0 -; X64-AVX1-NEXT: vpmovmskb %xmm0, %eax -; X64-AVX1-NEXT: cmpl $65535, %eax # imm = 0xFFFF -; X64-AVX1-NEXT: setne %al -; X64-AVX1-NEXT: retq -; -; X64-AVX2-LABEL: length32_eq_const: -; X64-AVX2: # %bb.0: -; X64-AVX2-NEXT: vmovdqu (%rdi), %ymm0 -; X64-AVX2-NEXT: vpcmpeqb {{.*}}(%rip), %ymm0, %ymm0 -; X64-AVX2-NEXT: vpmovmskb %ymm0, %eax -; X64-AVX2-NEXT: cmpl $-1, %eax -; X64-AVX2-NEXT: setne %al -; X64-AVX2-NEXT: vzeroupper -; X64-AVX2-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 32) nounwind - %c = icmp ne i32 %m, 0 - ret i1 %c -} - -define i32 @length64(i8* %X, i8* %Y) nounwind { -; X86-LABEL: length64: -; X86: # %bb.0: -; X86-NEXT: pushl $0 -; X86-NEXT: pushl $64 -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: calll memcmp -; X86-NEXT: addl $16, %esp -; X86-NEXT: retl -; -; X64-LABEL: length64: -; X64: # %bb.0: -; X64-NEXT: movl $64, %edx -; X64-NEXT: jmp memcmp # TAILCALL - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 64) nounwind - ret i32 %m -} - -define i1 @length64_eq(i8* %x, i8* %y) nounwind { -; X86-LABEL: length64_eq: -; X86: # %bb.0: -; X86-NEXT: pushl $0 -; X86-NEXT: pushl $64 -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: calll memcmp -; X86-NEXT: addl $16, %esp -; X86-NEXT: testl %eax, %eax -; X86-NEXT: setne %al -; X86-NEXT: retl -; -; X64-SSE2-LABEL: length64_eq: -; X64-SSE2: # %bb.0: -; X64-SSE2-NEXT: pushq %rax -; X64-SSE2-NEXT: movl $64, %edx -; X64-SSE2-NEXT: callq memcmp -; X64-SSE2-NEXT: testl %eax, %eax -; X64-SSE2-NEXT: setne %al -; X64-SSE2-NEXT: popq %rcx -; X64-SSE2-NEXT: retq -; -; X64-AVX1-LABEL: length64_eq: -; X64-AVX1: # %bb.0: -; X64-AVX1-NEXT: pushq %rax -; X64-AVX1-NEXT: movl $64, %edx -; X64-AVX1-NEXT: callq memcmp -; X64-AVX1-NEXT: testl %eax, %eax -; X64-AVX1-NEXT: setne %al -; X64-AVX1-NEXT: popq %rcx -; X64-AVX1-NEXT: retq -; -; X64-AVX2-LABEL: length64_eq: -; X64-AVX2: # %bb.0: -; X64-AVX2-NEXT: vmovdqu (%rdi), %ymm0 -; X64-AVX2-NEXT: vmovdqu 32(%rdi), %ymm1 -; X64-AVX2-NEXT: vpcmpeqb 32(%rsi), %ymm1, %ymm1 -; X64-AVX2-NEXT: vpcmpeqb (%rsi), %ymm0, %ymm0 -; X64-AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0 -; X64-AVX2-NEXT: vpmovmskb %ymm0, %eax -; X64-AVX2-NEXT: cmpl $-1, %eax -; X64-AVX2-NEXT: setne %al -; X64-AVX2-NEXT: vzeroupper -; X64-AVX2-NEXT: retq - %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 64) nounwind - %cmp = icmp ne i32 %call, 0 - ret i1 %cmp -} - -define i1 @length64_eq_const(i8* %X) nounwind { -; X86-LABEL: length64_eq_const: -; X86: # %bb.0: -; X86-NEXT: pushl $0 -; X86-NEXT: pushl $64 -; X86-NEXT: pushl $.L.str -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: calll memcmp -; X86-NEXT: addl $16, %esp -; X86-NEXT: testl %eax, %eax -; X86-NEXT: sete %al -; X86-NEXT: retl -; -; X64-SSE2-LABEL: length64_eq_const: -; X64-SSE2: # %bb.0: -; X64-SSE2-NEXT: pushq %rax -; X64-SSE2-NEXT: movl $.L.str, %esi -; X64-SSE2-NEXT: movl $64, %edx -; X64-SSE2-NEXT: callq memcmp -; X64-SSE2-NEXT: testl %eax, %eax -; X64-SSE2-NEXT: sete %al -; X64-SSE2-NEXT: popq %rcx -; X64-SSE2-NEXT: retq -; -; X64-AVX1-LABEL: length64_eq_const: -; X64-AVX1: # %bb.0: -; X64-AVX1-NEXT: pushq %rax -; X64-AVX1-NEXT: movl $.L.str, %esi -; X64-AVX1-NEXT: movl $64, %edx -; X64-AVX1-NEXT: callq memcmp -; X64-AVX1-NEXT: testl %eax, %eax -; X64-AVX1-NEXT: sete %al -; X64-AVX1-NEXT: popq %rcx -; X64-AVX1-NEXT: retq -; -; X64-AVX2-LABEL: length64_eq_const: -; X64-AVX2: # %bb.0: -; X64-AVX2-NEXT: vmovdqu (%rdi), %ymm0 -; X64-AVX2-NEXT: vmovdqu 32(%rdi), %ymm1 -; X64-AVX2-NEXT: vpcmpeqb {{.*}}(%rip), %ymm1, %ymm1 -; X64-AVX2-NEXT: vpcmpeqb {{.*}}(%rip), %ymm0, %ymm0 -; X64-AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0 -; X64-AVX2-NEXT: vpmovmskb %ymm0, %eax -; X64-AVX2-NEXT: cmpl $-1, %eax -; X64-AVX2-NEXT: sete %al -; X64-AVX2-NEXT: vzeroupper -; X64-AVX2-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 64) nounwind - %c = icmp eq i32 %m, 0 - ret i1 %c -} - -; This checks that we do not do stupid things with huge sizes. -define i32 @huge_length(i8* %X, i8* %Y) nounwind { -; X86-LABEL: huge_length: -; X86: # %bb.0: -; X86-NEXT: pushl $2147483647 # imm = 0x7FFFFFFF -; X86-NEXT: pushl $-1 -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: calll memcmp -; X86-NEXT: addl $16, %esp -; X86-NEXT: retl -; -; X64-LABEL: huge_length: -; X64: # %bb.0: -; X64-NEXT: movabsq $9223372036854775807, %rdx # imm = 0x7FFFFFFFFFFFFFFF -; X64-NEXT: jmp memcmp # TAILCALL - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 9223372036854775807) nounwind - ret i32 %m -} - -define i1 @huge_length_eq(i8* %X, i8* %Y) nounwind { -; X86-LABEL: huge_length_eq: -; X86: # %bb.0: -; X86-NEXT: pushl $2147483647 # imm = 0x7FFFFFFF -; X86-NEXT: pushl $-1 -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: calll memcmp -; X86-NEXT: addl $16, %esp -; X86-NEXT: testl %eax, %eax -; X86-NEXT: sete %al -; X86-NEXT: retl -; -; X64-LABEL: huge_length_eq: -; X64: # %bb.0: -; X64-NEXT: pushq %rax -; X64-NEXT: movabsq $9223372036854775807, %rdx # imm = 0x7FFFFFFFFFFFFFFF -; X64-NEXT: callq memcmp -; X64-NEXT: testl %eax, %eax -; X64-NEXT: sete %al -; X64-NEXT: popq %rcx -; X64-NEXT: retq - - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 9223372036854775807) nounwind - %c = icmp eq i32 %m, 0 - ret i1 %c -} - -; This checks non-constant sizes. -define i32 @nonconst_length(i8* %X, i8* %Y, i64 %size) nounwind { -; X86-LABEL: nonconst_length: -; X86: # %bb.0: -; X86-NEXT: jmp memcmp # TAILCALL -; -; X64-LABEL: nonconst_length: -; X64: # %bb.0: -; X64-NEXT: jmp memcmp # TAILCALL - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 %size) nounwind - ret i32 %m -} - -define i1 @nonconst_length_eq(i8* %X, i8* %Y, i64 %size) nounwind { -; X86-LABEL: nonconst_length_eq: -; X86: # %bb.0: -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: pushl {{[0-9]+}}(%esp) -; X86-NEXT: calll memcmp -; X86-NEXT: addl $16, %esp -; X86-NEXT: testl %eax, %eax -; X86-NEXT: sete %al -; X86-NEXT: retl -; -; X64-LABEL: nonconst_length_eq: -; X64: # %bb.0: -; X64-NEXT: pushq %rax -; X64-NEXT: callq memcmp -; X64-NEXT: testl %eax, %eax -; X64-NEXT: sete %al -; X64-NEXT: popq %rcx -; X64-NEXT: retq - %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 %size) nounwind - %c = icmp eq i32 %m, 0 - ret i1 %c -} diff --git a/llvm/test/Other/opt-O2-pipeline.ll b/llvm/test/Other/opt-O2-pipeline.ll --- a/llvm/test/Other/opt-O2-pipeline.ll +++ b/llvm/test/Other/opt-O2-pipeline.ll @@ -135,6 +135,12 @@ ; CHECK-NEXT: Function Alias Analysis Results ; CHECK-NEXT: Memory Dependence Analysis ; CHECK-NEXT: MemCpy Optimization +; CHECK-NEXT: Basic Alias Analysis (stateless AA impl) +; CHECK-NEXT: Function Alias Analysis Results +; CHECK-NEXT: Merge contiguous icmps into a memcmp +; CHECK-NEXT: Expand memcmp() to load/stores +; CHECK-NEXT: Dominator Tree Construction +; CHECK-NEXT: Early CSE ; CHECK-NEXT: Sparse Conditional Constant Propagation ; CHECK-NEXT: Demanded bits analysis ; CHECK-NEXT: Bit-Tracking Dead Code Elimination diff --git a/llvm/test/Other/opt-O3-pipeline.ll b/llvm/test/Other/opt-O3-pipeline.ll --- a/llvm/test/Other/opt-O3-pipeline.ll +++ b/llvm/test/Other/opt-O3-pipeline.ll @@ -140,6 +140,12 @@ ; CHECK-NEXT: Function Alias Analysis Results ; CHECK-NEXT: Memory Dependence Analysis ; CHECK-NEXT: MemCpy Optimization +; CHECK-NEXT: Basic Alias Analysis (stateless AA impl) +; CHECK-NEXT: Function Alias Analysis Results +; CHECK-NEXT: Merge contiguous icmps into a memcmp +; CHECK-NEXT: Expand memcmp() to load/stores +; CHECK-NEXT: Dominator Tree Construction +; CHECK-NEXT: Early CSE ; CHECK-NEXT: Sparse Conditional Constant Propagation ; CHECK-NEXT: Demanded bits analysis ; CHECK-NEXT: Bit-Tracking Dead Code Elimination diff --git a/llvm/test/Other/opt-Os-pipeline.ll b/llvm/test/Other/opt-Os-pipeline.ll --- a/llvm/test/Other/opt-Os-pipeline.ll +++ b/llvm/test/Other/opt-Os-pipeline.ll @@ -122,6 +122,12 @@ ; CHECK-NEXT: Function Alias Analysis Results ; CHECK-NEXT: Memory Dependence Analysis ; CHECK-NEXT: MemCpy Optimization +; CHECK-NEXT: Basic Alias Analysis (stateless AA impl) +; CHECK-NEXT: Function Alias Analysis Results +; CHECK-NEXT: Merge contiguous icmps into a memcmp +; CHECK-NEXT: Expand memcmp() to load/stores +; CHECK-NEXT: Dominator Tree Construction +; CHECK-NEXT: Early CSE ; CHECK-NEXT: Sparse Conditional Constant Propagation ; CHECK-NEXT: Demanded bits analysis ; CHECK-NEXT: Bit-Tracking Dead Code Elimination diff --git a/llvm/test/Transforms/ExpandMemCmp/PowerPC/lit.local.cfg b/llvm/test/Transforms/ExpandMemCmp/PowerPC/lit.local.cfg new file mode 100644 --- /dev/null +++ b/llvm/test/Transforms/ExpandMemCmp/PowerPC/lit.local.cfg @@ -0,0 +1,3 @@ +if not 'PowerPC' in config.root.targets: + config.unsupported = True + diff --git a/llvm/test/Transforms/ExpandMemCmp/PowerPC/memcmpIR.ll b/llvm/test/Transforms/ExpandMemCmp/PowerPC/memcmpIR.ll new file mode 100644 --- /dev/null +++ b/llvm/test/Transforms/ExpandMemCmp/PowerPC/memcmpIR.ll @@ -0,0 +1,294 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -S -expandmemcmp -mtriple=powerpc64le-unknown-gnu-linux -data-layout="e-m:e-i64:64-n32:64" | FileCheck %s +; RUN: opt < %s -S -expandmemcmp -mtriple=powerpc64-unknown-gnu-linux -data-layout="E-m:e-i64:64-n32:64" | FileCheck %s --check-prefix=CHECK-BE + +define signext i32 @test1(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) { +; CHECK-LABEL: @test1( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8* +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8* +; CHECK-NEXT: br label [[LOADBB:%.*]] +; CHECK: res_block: +; CHECK-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP8:%.*]], [[LOADBB]] ], [ [[TMP17:%.*]], [[LOADBB1:%.*]] ] +; CHECK-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP9:%.*]], [[LOADBB]] ], [ [[TMP18:%.*]], [[LOADBB1]] ] +; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]] +; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i32 -1, i32 1 +; CHECK-NEXT: br label [[ENDBLOCK:%.*]] +; CHECK: loadbb: +; CHECK-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i64* +; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP1]] to i64* +; CHECK-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP4]] +; CHECK-NEXT: [[TMP7:%.*]] = load i64, i64* [[TMP5]] +; CHECK-NEXT: [[TMP8]] = call i64 @llvm.bswap.i64(i64 [[TMP6]]) +; CHECK-NEXT: [[TMP9]] = call i64 @llvm.bswap.i64(i64 [[TMP7]]) +; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[TMP8]], [[TMP9]] +; CHECK-NEXT: br i1 [[TMP10]], label [[LOADBB1]], label [[RES_BLOCK:%.*]] +; CHECK: loadbb1: +; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[TMP0]], i8 8 +; CHECK-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to i64* +; CHECK-NEXT: [[TMP13:%.*]] = getelementptr i8, i8* [[TMP1]], i8 8 +; CHECK-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i64* +; CHECK-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP12]] +; CHECK-NEXT: [[TMP16:%.*]] = load i64, i64* [[TMP14]] +; CHECK-NEXT: [[TMP17]] = call i64 @llvm.bswap.i64(i64 [[TMP15]]) +; CHECK-NEXT: [[TMP18]] = call i64 @llvm.bswap.i64(i64 [[TMP16]]) +; CHECK-NEXT: [[TMP19:%.*]] = icmp eq i64 [[TMP17]], [[TMP18]] +; CHECK-NEXT: br i1 [[TMP19]], label [[ENDBLOCK]], label [[RES_BLOCK]] +; CHECK: endblock: +; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP3]], [[RES_BLOCK]] ] +; CHECK-NEXT: ret i32 [[PHI_RES]] +; +; CHECK-BE-LABEL: @test1( +; CHECK-BE-NEXT: entry: +; CHECK-BE-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8* +; CHECK-BE-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8* +; CHECK-BE-NEXT: br label [[LOADBB:%.*]] +; CHECK-BE: res_block: +; CHECK-BE-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP6:%.*]], [[LOADBB]] ], [ [[TMP13:%.*]], [[LOADBB1:%.*]] ] +; CHECK-BE-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP7:%.*]], [[LOADBB]] ], [ [[TMP14:%.*]], [[LOADBB1]] ] +; CHECK-BE-NEXT: [[TMP2:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]] +; CHECK-BE-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i32 -1, i32 1 +; CHECK-BE-NEXT: br label [[ENDBLOCK:%.*]] +; CHECK-BE: loadbb: +; CHECK-BE-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i64* +; CHECK-BE-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP1]] to i64* +; CHECK-BE-NEXT: [[TMP6]] = load i64, i64* [[TMP4]] +; CHECK-BE-NEXT: [[TMP7]] = load i64, i64* [[TMP5]] +; CHECK-BE-NEXT: [[TMP8:%.*]] = icmp eq i64 [[TMP6]], [[TMP7]] +; CHECK-BE-NEXT: br i1 [[TMP8]], label [[LOADBB1]], label [[RES_BLOCK:%.*]] +; CHECK-BE: loadbb1: +; CHECK-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, i8* [[TMP0]], i8 8 +; CHECK-BE-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i64* +; CHECK-BE-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[TMP1]], i8 8 +; CHECK-BE-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to i64* +; CHECK-BE-NEXT: [[TMP13]] = load i64, i64* [[TMP10]] +; CHECK-BE-NEXT: [[TMP14]] = load i64, i64* [[TMP12]] +; CHECK-BE-NEXT: [[TMP15:%.*]] = icmp eq i64 [[TMP13]], [[TMP14]] +; CHECK-BE-NEXT: br i1 [[TMP15]], label [[ENDBLOCK]], label [[RES_BLOCK]] +; CHECK-BE: endblock: +; CHECK-BE-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP3]], [[RES_BLOCK]] ] +; CHECK-BE-NEXT: ret i32 [[PHI_RES]] +; +entry: + + + + + + + %0 = bitcast i32* %buffer1 to i8* + %1 = bitcast i32* %buffer2 to i8* + %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 16) + ret i32 %call +} + +declare signext i32 @memcmp(i8* nocapture, i8* nocapture, i64) local_unnamed_addr #1 + +define signext i32 @test2(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) { +; CHECK-LABEL: @test2( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8* +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8* +; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP0]] to i32* +; CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP1]] to i32* +; CHECK-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]] +; CHECK-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP3]] +; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP4]]) +; CHECK-NEXT: [[TMP7:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP5]]) +; CHECK-NEXT: [[TMP8:%.*]] = icmp ugt i32 [[TMP6]], [[TMP7]] +; CHECK-NEXT: [[TMP9:%.*]] = icmp ult i32 [[TMP6]], [[TMP7]] +; CHECK-NEXT: [[TMP10:%.*]] = zext i1 [[TMP8]] to i32 +; CHECK-NEXT: [[TMP11:%.*]] = zext i1 [[TMP9]] to i32 +; CHECK-NEXT: [[TMP12:%.*]] = sub i32 [[TMP10]], [[TMP11]] +; CHECK-NEXT: ret i32 [[TMP12]] +; +; CHECK-BE-LABEL: @test2( +; CHECK-BE-NEXT: entry: +; CHECK-BE-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8* +; CHECK-BE-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8* +; CHECK-BE-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP0]] to i32* +; CHECK-BE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP1]] to i32* +; CHECK-BE-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]] +; CHECK-BE-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP3]] +; CHECK-BE-NEXT: [[TMP6:%.*]] = icmp ugt i32 [[TMP4]], [[TMP5]] +; CHECK-BE-NEXT: [[TMP7:%.*]] = icmp ult i32 [[TMP4]], [[TMP5]] +; CHECK-BE-NEXT: [[TMP8:%.*]] = zext i1 [[TMP6]] to i32 +; CHECK-BE-NEXT: [[TMP9:%.*]] = zext i1 [[TMP7]] to i32 +; CHECK-BE-NEXT: [[TMP10:%.*]] = sub i32 [[TMP8]], [[TMP9]] +; CHECK-BE-NEXT: ret i32 [[TMP10]] +; + + +entry: + %0 = bitcast i32* %buffer1 to i8* + %1 = bitcast i32* %buffer2 to i8* + %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 4) + ret i32 %call +} + +define signext i32 @test3(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) { +; CHECK-LABEL: @test3( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8* +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8* +; CHECK-NEXT: br label [[LOADBB:%.*]] +; CHECK: res_block: +; CHECK-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP8:%.*]], [[LOADBB]] ], [ [[TMP19:%.*]], [[LOADBB1:%.*]] ], [ [[TMP30:%.*]], [[LOADBB2:%.*]] ] +; CHECK-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP9:%.*]], [[LOADBB]] ], [ [[TMP20:%.*]], [[LOADBB1]] ], [ [[TMP31:%.*]], [[LOADBB2]] ] +; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]] +; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i32 -1, i32 1 +; CHECK-NEXT: br label [[ENDBLOCK:%.*]] +; CHECK: loadbb: +; CHECK-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i64* +; CHECK-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP1]] to i64* +; CHECK-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP4]] +; CHECK-NEXT: [[TMP7:%.*]] = load i64, i64* [[TMP5]] +; CHECK-NEXT: [[TMP8]] = call i64 @llvm.bswap.i64(i64 [[TMP6]]) +; CHECK-NEXT: [[TMP9]] = call i64 @llvm.bswap.i64(i64 [[TMP7]]) +; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[TMP8]], [[TMP9]] +; CHECK-NEXT: br i1 [[TMP10]], label [[LOADBB1]], label [[RES_BLOCK:%.*]] +; CHECK: loadbb1: +; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[TMP0]], i8 8 +; CHECK-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to i32* +; CHECK-NEXT: [[TMP13:%.*]] = getelementptr i8, i8* [[TMP1]], i8 8 +; CHECK-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32* +; CHECK-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP12]] +; CHECK-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP14]] +; CHECK-NEXT: [[TMP17:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP15]]) +; CHECK-NEXT: [[TMP18:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP16]]) +; CHECK-NEXT: [[TMP19]] = zext i32 [[TMP17]] to i64 +; CHECK-NEXT: [[TMP20]] = zext i32 [[TMP18]] to i64 +; CHECK-NEXT: [[TMP21:%.*]] = icmp eq i64 [[TMP19]], [[TMP20]] +; CHECK-NEXT: br i1 [[TMP21]], label [[LOADBB2]], label [[RES_BLOCK]] +; CHECK: loadbb2: +; CHECK-NEXT: [[TMP22:%.*]] = getelementptr i8, i8* [[TMP0]], i8 12 +; CHECK-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to i16* +; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, i8* [[TMP1]], i8 12 +; CHECK-NEXT: [[TMP25:%.*]] = bitcast i8* [[TMP24]] to i16* +; CHECK-NEXT: [[TMP26:%.*]] = load i16, i16* [[TMP23]] +; CHECK-NEXT: [[TMP27:%.*]] = load i16, i16* [[TMP25]] +; CHECK-NEXT: [[TMP28:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP26]]) +; CHECK-NEXT: [[TMP29:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP27]]) +; CHECK-NEXT: [[TMP30]] = zext i16 [[TMP28]] to i64 +; CHECK-NEXT: [[TMP31]] = zext i16 [[TMP29]] to i64 +; CHECK-NEXT: [[TMP32:%.*]] = icmp eq i64 [[TMP30]], [[TMP31]] +; CHECK-NEXT: br i1 [[TMP32]], label [[LOADBB3:%.*]], label [[RES_BLOCK]] +; CHECK: loadbb3: +; CHECK-NEXT: [[TMP33:%.*]] = getelementptr i8, i8* [[TMP0]], i8 14 +; CHECK-NEXT: [[TMP34:%.*]] = getelementptr i8, i8* [[TMP1]], i8 14 +; CHECK-NEXT: [[TMP35:%.*]] = load i8, i8* [[TMP33]] +; CHECK-NEXT: [[TMP36:%.*]] = load i8, i8* [[TMP34]] +; CHECK-NEXT: [[TMP37:%.*]] = zext i8 [[TMP35]] to i32 +; CHECK-NEXT: [[TMP38:%.*]] = zext i8 [[TMP36]] to i32 +; CHECK-NEXT: [[TMP39:%.*]] = sub i32 [[TMP37]], [[TMP38]] +; CHECK-NEXT: br label [[ENDBLOCK]] +; CHECK: endblock: +; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ [[TMP39]], [[LOADBB3]] ], [ [[TMP3]], [[RES_BLOCK]] ] +; CHECK-NEXT: ret i32 [[PHI_RES]] +; +; CHECK-BE-LABEL: @test3( +; CHECK-BE-NEXT: entry: +; CHECK-BE-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8* +; CHECK-BE-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8* +; CHECK-BE-NEXT: br label [[LOADBB:%.*]] +; CHECK-BE: res_block: +; CHECK-BE-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP6:%.*]], [[LOADBB]] ], [ [[TMP15:%.*]], [[LOADBB1:%.*]] ], [ [[TMP24:%.*]], [[LOADBB2:%.*]] ] +; CHECK-BE-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP7:%.*]], [[LOADBB]] ], [ [[TMP16:%.*]], [[LOADBB1]] ], [ [[TMP25:%.*]], [[LOADBB2]] ] +; CHECK-BE-NEXT: [[TMP2:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]] +; CHECK-BE-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i32 -1, i32 1 +; CHECK-BE-NEXT: br label [[ENDBLOCK:%.*]] +; CHECK-BE: loadbb: +; CHECK-BE-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i64* +; CHECK-BE-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP1]] to i64* +; CHECK-BE-NEXT: [[TMP6]] = load i64, i64* [[TMP4]] +; CHECK-BE-NEXT: [[TMP7]] = load i64, i64* [[TMP5]] +; CHECK-BE-NEXT: [[TMP8:%.*]] = icmp eq i64 [[TMP6]], [[TMP7]] +; CHECK-BE-NEXT: br i1 [[TMP8]], label [[LOADBB1]], label [[RES_BLOCK:%.*]] +; CHECK-BE: loadbb1: +; CHECK-BE-NEXT: [[TMP9:%.*]] = getelementptr i8, i8* [[TMP0]], i8 8 +; CHECK-BE-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i32* +; CHECK-BE-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[TMP1]], i8 8 +; CHECK-BE-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to i32* +; CHECK-BE-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP10]] +; CHECK-BE-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP12]] +; CHECK-BE-NEXT: [[TMP15]] = zext i32 [[TMP13]] to i64 +; CHECK-BE-NEXT: [[TMP16]] = zext i32 [[TMP14]] to i64 +; CHECK-BE-NEXT: [[TMP17:%.*]] = icmp eq i64 [[TMP15]], [[TMP16]] +; CHECK-BE-NEXT: br i1 [[TMP17]], label [[LOADBB2]], label [[RES_BLOCK]] +; CHECK-BE: loadbb2: +; CHECK-BE-NEXT: [[TMP18:%.*]] = getelementptr i8, i8* [[TMP0]], i8 12 +; CHECK-BE-NEXT: [[TMP19:%.*]] = bitcast i8* [[TMP18]] to i16* +; CHECK-BE-NEXT: [[TMP20:%.*]] = getelementptr i8, i8* [[TMP1]], i8 12 +; CHECK-BE-NEXT: [[TMP21:%.*]] = bitcast i8* [[TMP20]] to i16* +; CHECK-BE-NEXT: [[TMP22:%.*]] = load i16, i16* [[TMP19]] +; CHECK-BE-NEXT: [[TMP23:%.*]] = load i16, i16* [[TMP21]] +; CHECK-BE-NEXT: [[TMP24]] = zext i16 [[TMP22]] to i64 +; CHECK-BE-NEXT: [[TMP25]] = zext i16 [[TMP23]] to i64 +; CHECK-BE-NEXT: [[TMP26:%.*]] = icmp eq i64 [[TMP24]], [[TMP25]] +; CHECK-BE-NEXT: br i1 [[TMP26]], label [[LOADBB3:%.*]], label [[RES_BLOCK]] +; CHECK-BE: loadbb3: +; CHECK-BE-NEXT: [[TMP27:%.*]] = getelementptr i8, i8* [[TMP0]], i8 14 +; CHECK-BE-NEXT: [[TMP28:%.*]] = getelementptr i8, i8* [[TMP1]], i8 14 +; CHECK-BE-NEXT: [[TMP29:%.*]] = load i8, i8* [[TMP27]] +; CHECK-BE-NEXT: [[TMP30:%.*]] = load i8, i8* [[TMP28]] +; CHECK-BE-NEXT: [[TMP31:%.*]] = zext i8 [[TMP29]] to i32 +; CHECK-BE-NEXT: [[TMP32:%.*]] = zext i8 [[TMP30]] to i32 +; CHECK-BE-NEXT: [[TMP33:%.*]] = sub i32 [[TMP31]], [[TMP32]] +; CHECK-BE-NEXT: br label [[ENDBLOCK]] +; CHECK-BE: endblock: +; CHECK-BE-NEXT: [[PHI_RES:%.*]] = phi i32 [ [[TMP33]], [[LOADBB3]] ], [ [[TMP3]], [[RES_BLOCK]] ] +; CHECK-BE-NEXT: ret i32 [[PHI_RES]] +; +entry: + %0 = bitcast i32* %buffer1 to i8* + %1 = bitcast i32* %buffer2 to i8* + %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 15) + ret i32 %call +} + +define signext i32 @test4(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) { +; CHECK-LABEL: @test4( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8* +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8* +; CHECK-NEXT: [[CALL:%.*]] = tail call signext i32 @memcmp(i8* [[TMP0]], i8* [[TMP1]], i64 65) +; CHECK-NEXT: ret i32 [[CALL]] +; +; CHECK-BE-LABEL: @test4( +; CHECK-BE-NEXT: entry: +; CHECK-BE-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8* +; CHECK-BE-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8* +; CHECK-BE-NEXT: [[CALL:%.*]] = tail call signext i32 @memcmp(i8* [[TMP0]], i8* [[TMP1]], i64 65) +; CHECK-BE-NEXT: ret i32 [[CALL]] +; +entry: + %0 = bitcast i32* %buffer1 to i8* + %1 = bitcast i32* %buffer2 to i8* + %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 65) + ret i32 %call +} + +define signext i32 @test5(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2, i32 signext %SIZE) { +; CHECK-LABEL: @test5( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8* +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8* +; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[SIZE:%.*]] to i64 +; CHECK-NEXT: [[CALL:%.*]] = tail call signext i32 @memcmp(i8* [[TMP0]], i8* [[TMP1]], i64 [[CONV]]) +; CHECK-NEXT: ret i32 [[CALL]] +; +; CHECK-BE-LABEL: @test5( +; CHECK-BE-NEXT: entry: +; CHECK-BE-NEXT: [[TMP0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8* +; CHECK-BE-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8* +; CHECK-BE-NEXT: [[CONV:%.*]] = sext i32 [[SIZE:%.*]] to i64 +; CHECK-BE-NEXT: [[CALL:%.*]] = tail call signext i32 @memcmp(i8* [[TMP0]], i8* [[TMP1]], i64 [[CONV]]) +; CHECK-BE-NEXT: ret i32 [[CALL]] +; +entry: + %0 = bitcast i32* %buffer1 to i8* + %1 = bitcast i32* %buffer2 to i8* + %conv = sext i32 %SIZE to i64 + %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 %conv) + ret i32 %call +} diff --git a/llvm/test/Transforms/ExpandMemCmp/X86/pr36421.ll b/llvm/test/Transforms/ExpandMemCmp/X86/pr36421.ll new file mode 100644 --- /dev/null +++ b/llvm/test/Transforms/ExpandMemCmp/X86/pr36421.ll @@ -0,0 +1,79 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -expandmemcmp -S | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-unknown-unknown" + +@.str = private unnamed_addr constant [7 x i8] c"abcdef\00", align 1 +@.str.1 = private unnamed_addr constant [7 x i8] c"ABCDEF\00", align 1 + +define i32 @test(i8* nocapture readonly %string, i32 %len) local_unnamed_addr #0 { +; CHECK-LABEL: @test( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[LEN:%.*]], 6 +; CHECK-NEXT: br i1 [[COND]], label [[SW_BB:%.*]], label [[RETURN:%.*]] +; CHECK: sw.bb: +; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[STRING:%.*]] to i32* +; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]] +; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[TMP1]], 1684234849 +; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, i8* [[STRING]], i8 4 +; CHECK-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to i16* +; CHECK-NEXT: [[TMP5:%.*]] = load i16, i16* [[TMP4]] +; CHECK-NEXT: [[TMP6:%.*]] = zext i16 [[TMP5]] to i32 +; CHECK-NEXT: [[TMP7:%.*]] = xor i32 [[TMP6]], 26213 +; CHECK-NEXT: [[TMP8:%.*]] = or i32 [[TMP2]], [[TMP7]] +; CHECK-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 +; CHECK-NEXT: [[TMP10:%.*]] = zext i1 [[TMP9]] to i32 +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP10]], 0 +; CHECK-NEXT: br i1 [[CMP]], label [[RETURN]], label [[IF_END:%.*]] +; CHECK: if.end: +; CHECK-NEXT: [[TMP11:%.*]] = bitcast i8* [[STRING]] to i32* +; CHECK-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]] +; CHECK-NEXT: [[TMP13:%.*]] = xor i32 [[TMP12]], 1145258561 +; CHECK-NEXT: [[TMP14:%.*]] = getelementptr i8, i8* [[STRING]], i8 4 +; CHECK-NEXT: [[TMP15:%.*]] = bitcast i8* [[TMP14]] to i16* +; CHECK-NEXT: [[TMP16:%.*]] = load i16, i16* [[TMP15]] +; CHECK-NEXT: [[TMP17:%.*]] = zext i16 [[TMP16]] to i32 +; CHECK-NEXT: [[TMP18:%.*]] = xor i32 [[TMP17]], 17989 +; CHECK-NEXT: [[TMP19:%.*]] = or i32 [[TMP13]], [[TMP18]] +; CHECK-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 +; CHECK-NEXT: [[TMP21:%.*]] = zext i1 [[TMP20]] to i32 +; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[TMP21]], 0 +; CHECK-NEXT: [[DOT:%.*]] = select i1 [[CMP2]], i32 64, i32 0 +; CHECK-NEXT: br label [[RETURN]] +; CHECK: return: +; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ 61, [[SW_BB]] ], [ [[DOT]], [[IF_END]] ], [ 0, [[ENTRY:%.*]] ] +; CHECK-NEXT: ret i32 [[RETVAL_0]] +; +entry: + %cond = icmp eq i32 %len, 6 + br i1 %cond, label %sw.bb, label %return + +sw.bb: ; preds = %entry + %call = tail call i32 @memcmp(i8* %string, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i64 6) + %cmp = icmp eq i32 %call, 0 + br i1 %cmp, label %return, label %if.end + +if.end: ; preds = %sw.bb + %call1 = tail call i32 @memcmp(i8* %string, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i64 6) + %cmp2 = icmp eq i32 %call1, 0 + %. = select i1 %cmp2, i32 64, i32 0 + br label %return + +return: ; preds = %entry, %if.end8, %if.end4, %if.end, %sw.bb + %retval.0 = phi i32 [ 61, %sw.bb ], [ %., %if.end ], [ 0, %entry ] + ret i32 %retval.0 +} + +; Function Attrs: nounwind readonly +declare i32 @memcmp(i8* nocapture, i8* nocapture, i64) local_unnamed_addr #1 + +attributes #0 = { nounwind readonly ssp uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="penryn" "target-features"="+cx16,+fxsr,+mmx,+sse,+sse2,+sse3,+sse4.1,+ssse3,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind readonly "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="penryn" "target-features"="+cx16,+fxsr,+mmx,+sse,+sse2,+sse3,+sse4.1,+ssse3,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } + +!llvm.module.flags = !{!0, !1} +!llvm.ident = !{!2} + +!0 = !{i32 1, !"wchar_size", i32 4} +!1 = !{i32 7, !"PIC Level", i32 2} +!2 = !{!"clang version 7.0.0 (trunk 325350)"} diff --git a/llvm/test/Transforms/PhaseOrdering/PowerPC/lit.local.cfg b/llvm/test/Transforms/PhaseOrdering/PowerPC/lit.local.cfg new file mode 100644 --- /dev/null +++ b/llvm/test/Transforms/PhaseOrdering/PowerPC/lit.local.cfg @@ -0,0 +1,2 @@ +if not 'PowerPC' in config.root.targets: + config.unsupported = True diff --git a/llvm/test/Transforms/PhaseOrdering/PowerPC/memCmpUsedInZeroEqualityComparison.ll b/llvm/test/Transforms/PhaseOrdering/PowerPC/memCmpUsedInZeroEqualityComparison.ll new file mode 100644 --- /dev/null +++ b/llvm/test/Transforms/PhaseOrdering/PowerPC/memCmpUsedInZeroEqualityComparison.ll @@ -0,0 +1,174 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -O2 -S -mcpu=pwr8 < %s | FileCheck %s +target datalayout = "e-m:e-i64:64-n32:64" +target triple = "powerpc64le-unknown-linux-gnu" + +@zeroEqualityTest01.buffer1 = private unnamed_addr constant [3 x i32] [i32 1, i32 2, i32 4], align 4 +@zeroEqualityTest01.buffer2 = private unnamed_addr constant [3 x i32] [i32 1, i32 2, i32 3], align 4 +@zeroEqualityTest02.buffer1 = private unnamed_addr constant [4 x i32] [i32 4, i32 0, i32 0, i32 0], align 4 +@zeroEqualityTest02.buffer2 = private unnamed_addr constant [4 x i32] [i32 3, i32 0, i32 0, i32 0], align 4 +@zeroEqualityTest03.buffer1 = private unnamed_addr constant [4 x i32] [i32 0, i32 0, i32 0, i32 3], align 4 +@zeroEqualityTest03.buffer2 = private unnamed_addr constant [4 x i32] [i32 0, i32 0, i32 0, i32 4], align 4 +@zeroEqualityTest04.buffer1 = private unnamed_addr constant [15 x i32] [i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14], align 4 +@zeroEqualityTest04.buffer2 = private unnamed_addr constant [15 x i32] [i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 13], align 4 + +declare signext i32 @memcmp(i8* nocapture, i8* nocapture, i64) local_unnamed_addr #1 + +; Check 4 bytes - requires 1 load for each param. +define signext i32 @zeroEqualityTest02(i8* %x, i8* %y) { +; CHECK-LABEL: @zeroEqualityTest02( +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32* +; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32* +; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 4 +; CHECK-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP3]], [[TMP4]] +; CHECK-NEXT: [[TMP6:%.*]] = zext i1 [[TMP5]] to i32 +; CHECK-NEXT: ret i32 [[TMP6]] +; + %call = tail call signext i32 @memcmp(i8* %x, i8* %y, i64 4) + %not.cmp = icmp ne i32 %call, 0 + %. = zext i1 %not.cmp to i32 + ret i32 %. +} + +; Check 16 bytes - requires 2 loads for each param (or use vectors?). +define signext i32 @zeroEqualityTest01(i8* %x, i8* %y) { +; CHECK-LABEL: @zeroEqualityTest01( +; CHECK-NEXT: loadbb: +; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i64* +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i64* +; CHECK-NEXT: [[TMP2:%.*]] = load i64, i64* [[TMP0]], align 8 +; CHECK-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 8 +; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[TMP2]], [[TMP3]] +; CHECK-NEXT: br i1 [[TMP4]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]] +; CHECK: res_block: +; CHECK-NEXT: br label [[ENDBLOCK:%.*]] +; CHECK: loadbb1: +; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, i8* [[X]], i64 8 +; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to i64* +; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 8 +; CHECK-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i64* +; CHECK-NEXT: [[TMP9:%.*]] = load i64, i64* [[TMP6]], align 8 +; CHECK-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]], align 8 +; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i64 [[TMP9]], [[TMP10]] +; CHECK-NEXT: br i1 [[TMP11]], label [[ENDBLOCK]], label [[RES_BLOCK]] +; CHECK: endblock: +; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ 1, [[RES_BLOCK]] ] +; CHECK-NEXT: ret i32 [[PHI_RES]] +; + %call = tail call signext i32 @memcmp(i8* %x, i8* %y, i64 16) + %not.tobool = icmp ne i32 %call, 0 + %. = zext i1 %not.tobool to i32 + ret i32 %. +} + +; Check 7 bytes - requires 3 loads for each param. +define signext i32 @zeroEqualityTest03(i8* %x, i8* %y) { +; CHECK-LABEL: @zeroEqualityTest03( +; CHECK-NEXT: loadbb: +; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i32* +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i32* +; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP2]], [[TMP3]] +; CHECK-NEXT: br i1 [[TMP4]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]] +; CHECK: res_block: +; CHECK-NEXT: br label [[ENDBLOCK:%.*]] +; CHECK: loadbb1: +; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, i8* [[X]], i64 4 +; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to i16* +; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 4 +; CHECK-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i16* +; CHECK-NEXT: [[TMP9:%.*]] = load i16, i16* [[TMP6]], align 2 +; CHECK-NEXT: [[TMP10:%.*]] = load i16, i16* [[TMP8]], align 2 +; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i16 [[TMP9]], [[TMP10]] +; CHECK-NEXT: br i1 [[TMP11]], label [[LOADBB2:%.*]], label [[RES_BLOCK]] +; CHECK: loadbb2: +; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, i8* [[X]], i64 6 +; CHECK-NEXT: [[TMP13:%.*]] = getelementptr i8, i8* [[Y]], i64 6 +; CHECK-NEXT: [[TMP14:%.*]] = load i8, i8* [[TMP12]], align 1 +; CHECK-NEXT: [[TMP15:%.*]] = load i8, i8* [[TMP13]], align 1 +; CHECK-NEXT: [[TMP16:%.*]] = icmp eq i8 [[TMP14]], [[TMP15]] +; CHECK-NEXT: br i1 [[TMP16]], label [[ENDBLOCK]], label [[RES_BLOCK]] +; CHECK: endblock: +; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB2]] ], [ 1, [[RES_BLOCK]] ] +; CHECK-NEXT: ret i32 [[PHI_RES]] +; + %call = tail call signext i32 @memcmp(i8* %x, i8* %y, i64 7) + %not.lnot = icmp ne i32 %call, 0 + %cond = zext i1 %not.lnot to i32 + ret i32 %cond +} + +; Validate with > 0 +define signext i32 @zeroEqualityTest04() { +; CHECK-LABEL: @zeroEqualityTest04( +; CHECK-NEXT: endblock: +; CHECK-NEXT: ret i32 0 +; + %call = tail call signext i32 @memcmp(i8* bitcast ([4 x i32]* @zeroEqualityTest02.buffer1 to i8*), i8* bitcast ([4 x i32]* @zeroEqualityTest02.buffer2 to i8*), i64 16) + %not.cmp = icmp slt i32 %call, 1 + %. = zext i1 %not.cmp to i32 + ret i32 %. +} + +; Validate with < 0 +define signext i32 @zeroEqualityTest05() { +; CHECK-LABEL: @zeroEqualityTest05( +; CHECK-NEXT: endblock: +; CHECK-NEXT: ret i32 0 +; + %call = tail call signext i32 @memcmp(i8* bitcast ([4 x i32]* @zeroEqualityTest03.buffer1 to i8*), i8* bitcast ([4 x i32]* @zeroEqualityTest03.buffer2 to i8*), i64 16) + %call.lobit = lshr i32 %call, 31 + %call.lobit.not = xor i32 %call.lobit, 1 + ret i32 %call.lobit.not +} + +; Validate with memcmp()?: +define signext i32 @equalityFoldTwoConstants() { +; CHECK-LABEL: @equalityFoldTwoConstants( +; CHECK-NEXT: endblock: +; CHECK-NEXT: ret i32 1 +; + %call = tail call signext i32 @memcmp(i8* bitcast ([15 x i32]* @zeroEqualityTest04.buffer1 to i8*), i8* bitcast ([15 x i32]* @zeroEqualityTest04.buffer2 to i8*), i64 16) + %not.tobool = icmp eq i32 %call, 0 + %cond = zext i1 %not.tobool to i32 + ret i32 %cond +} + +define signext i32 @equalityFoldOneConstant(i8* %X) { +; CHECK-LABEL: @equalityFoldOneConstant( +; CHECK-NEXT: loadbb: +; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i64* +; CHECK-NEXT: [[TMP1:%.*]] = load i64, i64* [[TMP0]], align 8 +; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 4294967296 +; CHECK-NEXT: br i1 [[TMP2]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]] +; CHECK: res_block: +; CHECK-NEXT: br label [[ENDBLOCK:%.*]] +; CHECK: loadbb1: +; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, i8* [[X]], i64 8 +; CHECK-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to i64* +; CHECK-NEXT: [[TMP5:%.*]] = load i64, i64* [[TMP4]], align 8 +; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[TMP5]], 12884901890 +; CHECK-NEXT: br i1 [[TMP6]], label [[ENDBLOCK]], label [[RES_BLOCK]] +; CHECK: endblock: +; CHECK-NEXT: [[PHI_RES:%.*]] = phi i32 [ 1, [[LOADBB1]] ], [ 0, [[RES_BLOCK]] ] +; CHECK-NEXT: ret i32 [[PHI_RES]] +; + %call = tail call signext i32 @memcmp(i8* bitcast ([15 x i32]* @zeroEqualityTest04.buffer1 to i8*), i8* %X, i64 16) + %not.tobool = icmp eq i32 %call, 0 + %cond = zext i1 %not.tobool to i32 + ret i32 %cond +} + +define i1 @length2_eq_nobuiltin_attr(i8* %X, i8* %Y) { +; CHECK-LABEL: @length2_eq_nobuiltin_attr( +; CHECK-NEXT: [[M:%.*]] = tail call signext i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 2) #1 +; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[M]], 0 +; CHECK-NEXT: ret i1 [[C]] +; + %m = tail call signext i32 @memcmp(i8* %X, i8* %Y, i64 2) nobuiltin + %c = icmp eq i32 %m, 0 + ret i1 %c +} + diff --git a/llvm/test/Transforms/PhaseOrdering/PowerPC/memcmp-mergeexpand.ll b/llvm/test/Transforms/PhaseOrdering/PowerPC/memcmp-mergeexpand.ll new file mode 100644 --- /dev/null +++ b/llvm/test/Transforms/PhaseOrdering/PowerPC/memcmp-mergeexpand.ll @@ -0,0 +1,50 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt -S -mergeicmps -expandmemcmp -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux < %s | FileCheck %s --check-prefix=PPC64LE + +; This tests interaction between MergeICmp and ExpandMemCmp. + +%"struct.std::pair" = type { i32, i32 } + +define zeroext i1 @opeq1( +; PPC64LE-LABEL: @opeq1( +; PPC64LE-NEXT: entry: +; PPC64LE-NEXT: [[FIRST_I:%.*]] = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* [[A:%.*]], i64 0, i32 0 +; PPC64LE-NEXT: [[FIRST1_I:%.*]] = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* [[B:%.*]], i64 0, i32 0 +; PPC64LE-NEXT: [[CSTR:%.*]] = bitcast i32* [[FIRST_I]] to i8* +; PPC64LE-NEXT: [[CSTR1:%.*]] = bitcast i32* [[FIRST1_I]] to i8* +; PPC64LE-NEXT: [[TMP0:%.*]] = bitcast i8* [[CSTR]] to i64* +; PPC64LE-NEXT: [[TMP1:%.*]] = bitcast i8* [[CSTR1]] to i64* +; PPC64LE-NEXT: [[TMP2:%.*]] = load i64, i64* [[TMP0]] +; PPC64LE-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]] +; PPC64LE-NEXT: [[TMP4:%.*]] = icmp ne i64 [[TMP2]], [[TMP3]] +; PPC64LE-NEXT: [[TMP5:%.*]] = zext i1 [[TMP4]] to i32 +; PPC64LE-NEXT: [[TMP6:%.*]] = icmp eq i32 [[TMP5]], 0 +; PPC64LE-NEXT: br label [[OPEQ1_EXIT:%.*]] +; PPC64LE: opeq1.exit: +; PPC64LE-NEXT: [[TMP7:%.*]] = phi i1 [ [[TMP6]], [[ENTRY:%.*]] ] +; PPC64LE-NEXT: ret i1 [[TMP7]] +; + %"struct.std::pair"* nocapture readonly dereferenceable(8) %a, + %"struct.std::pair"* nocapture readonly dereferenceable(8) %b) local_unnamed_addr #0 { +entry: + %first.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %a, i64 0, i32 0 + %0 = load i32, i32* %first.i, align 4 + %first1.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %b, i64 0, i32 0 + %1 = load i32, i32* %first1.i, align 4 + %cmp.i = icmp eq i32 %0, %1 + br i1 %cmp.i, label %land.rhs.i, label %opeq1.exit + +land.rhs.i: + %second.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %a, i64 0, i32 1 + %2 = load i32, i32* %second.i, align 4 + %second2.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %b, i64 0, i32 1 + %3 = load i32, i32* %second2.i, align 4 + %cmp3.i = icmp eq i32 %2, %3 + br label %opeq1.exit + +opeq1.exit: + %4 = phi i1 [ false, %entry ], [ %cmp3.i, %land.rhs.i ] + ret i1 %4 +} + + diff --git a/llvm/test/Transforms/PhaseOrdering/PowerPC/memcmp.ll b/llvm/test/Transforms/PhaseOrdering/PowerPC/memcmp.ll new file mode 100644 --- /dev/null +++ b/llvm/test/Transforms/PhaseOrdering/PowerPC/memcmp.ll @@ -0,0 +1,80 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -O2 -S -mcpu=pwr8 -mtriple=powerpc64le-unknown-gnu-linux | FileCheck %s -check-prefix=CHECK + +define signext i32 @memcmp8(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) { +; CHECK-LABEL: @memcmp8( +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i64* +; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i64* +; CHECK-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 4 +; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP3]]) +; CHECK-NEXT: [[TMP6:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP4]]) +; CHECK-NEXT: [[TMP7:%.*]] = icmp ugt i64 [[TMP5]], [[TMP6]] +; CHECK-NEXT: [[TMP8:%.*]] = icmp ult i64 [[TMP5]], [[TMP6]] +; CHECK-NEXT: [[TMP9:%.*]] = zext i1 [[TMP7]] to i32 +; CHECK-NEXT: [[TMP10:%.*]] = zext i1 [[TMP8]] to i32 +; CHECK-NEXT: [[TMP11:%.*]] = sub nsw i32 [[TMP9]], [[TMP10]] +; CHECK-NEXT: ret i32 [[TMP11]] +; + %t0 = bitcast i32* %buffer1 to i8* + %t1 = bitcast i32* %buffer2 to i8* + %call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 8) + ret i32 %call +} + +define signext i32 @memcmp4(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) { +; CHECK-LABEL: @memcmp4( +; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[BUFFER1:%.*]], align 4 +; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[BUFFER2:%.*]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP1]]) +; CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP2]]) +; CHECK-NEXT: [[TMP5:%.*]] = icmp ugt i32 [[TMP3]], [[TMP4]] +; CHECK-NEXT: [[TMP6:%.*]] = icmp ult i32 [[TMP3]], [[TMP4]] +; CHECK-NEXT: [[TMP7:%.*]] = zext i1 [[TMP5]] to i32 +; CHECK-NEXT: [[TMP8:%.*]] = zext i1 [[TMP6]] to i32 +; CHECK-NEXT: [[TMP9:%.*]] = sub nsw i32 [[TMP7]], [[TMP8]] +; CHECK-NEXT: ret i32 [[TMP9]] +; + %t0 = bitcast i32* %buffer1 to i8* + %t1 = bitcast i32* %buffer2 to i8* + %call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 4) + ret i32 %call +} + +define signext i32 @memcmp2(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) { +; CHECK-LABEL: @memcmp2( +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i16* +; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i16* +; CHECK-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]], align 2 +; CHECK-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP2]], align 2 +; CHECK-NEXT: [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP3]]) +; CHECK-NEXT: [[TMP6:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP4]]) +; CHECK-NEXT: [[TMP7:%.*]] = zext i16 [[TMP5]] to i32 +; CHECK-NEXT: [[TMP8:%.*]] = zext i16 [[TMP6]] to i32 +; CHECK-NEXT: [[TMP9:%.*]] = sub nsw i32 [[TMP7]], [[TMP8]] +; CHECK-NEXT: ret i32 [[TMP9]] +; + %t0 = bitcast i32* %buffer1 to i8* + %t1 = bitcast i32* %buffer2 to i8* + %call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 2) + ret i32 %call +} + +define signext i32 @memcmp1(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) { +; CHECK-LABEL: @memcmp1( +; CHECK-NEXT: [[T0:%.*]] = bitcast i32* [[BUFFER1:%.*]] to i8* +; CHECK-NEXT: [[T1:%.*]] = bitcast i32* [[BUFFER2:%.*]] to i8* +; CHECK-NEXT: [[LHSC:%.*]] = load i8, i8* [[T0]], align 1 +; CHECK-NEXT: [[LHSV:%.*]] = zext i8 [[LHSC]] to i32 +; CHECK-NEXT: [[RHSC:%.*]] = load i8, i8* [[T1]], align 1 +; CHECK-NEXT: [[RHSV:%.*]] = zext i8 [[RHSC]] to i32 +; CHECK-NEXT: [[CHARDIFF:%.*]] = sub nsw i32 [[LHSV]], [[RHSV]] +; CHECK-NEXT: ret i32 [[CHARDIFF]] +; + %t0 = bitcast i32* %buffer1 to i8* + %t1 = bitcast i32* %buffer2 to i8* + %call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 1) #2 + ret i32 %call +} + +declare signext i32 @memcmp(i8*, i8*, i64) diff --git a/llvm/test/Transforms/PhaseOrdering/X86/lit.local.cfg b/llvm/test/Transforms/PhaseOrdering/X86/lit.local.cfg new file mode 100644 --- /dev/null +++ b/llvm/test/Transforms/PhaseOrdering/X86/lit.local.cfg @@ -0,0 +1,2 @@ +if not 'X86' in config.root.targets: + config.unsupported = True diff --git a/llvm/test/Transforms/PhaseOrdering/X86/memcmp-mergeexpand.ll b/llvm/test/Transforms/PhaseOrdering/X86/memcmp-mergeexpand.ll new file mode 100644 --- /dev/null +++ b/llvm/test/Transforms/PhaseOrdering/X86/memcmp-mergeexpand.ll @@ -0,0 +1,78 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt -S -mergeicmps -expandmemcmp -mtriple=i386-unknown-linux < %s | FileCheck %s --check-prefix=X86 +; RUN: opt -S -mergeicmps -expandmemcmp -mtriple=x86_64-unknown-linux < %s | FileCheck %s --check-prefix=X64 + +; This tests interaction between MergeICmp and ExpandMemCmp. + +%"struct.std::pair" = type { i32, i32 } + +define zeroext i1 @opeq1( +; X86-LABEL: @opeq1( +; X86-NEXT: entry: +; X86-NEXT: [[FIRST_I:%.*]] = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* [[A:%.*]], i64 0, i32 0 +; X86-NEXT: [[FIRST1_I:%.*]] = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* [[B:%.*]], i64 0, i32 0 +; X86-NEXT: [[CSTR:%.*]] = bitcast i32* [[FIRST_I]] to i8* +; X86-NEXT: [[CSTR1:%.*]] = bitcast i32* [[FIRST1_I]] to i8* +; X86-NEXT: [[TMP0:%.*]] = bitcast i8* [[CSTR]] to i32* +; X86-NEXT: [[TMP1:%.*]] = bitcast i8* [[CSTR1]] to i32* +; X86-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]] +; X86-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]] +; X86-NEXT: [[TMP4:%.*]] = xor i32 [[TMP2]], [[TMP3]] +; X86-NEXT: [[TMP5:%.*]] = getelementptr i8, i8* [[CSTR]], i8 4 +; X86-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to i32* +; X86-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[CSTR1]], i8 4 +; X86-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* +; X86-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP6]] +; X86-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP8]] +; X86-NEXT: [[TMP11:%.*]] = xor i32 [[TMP9]], [[TMP10]] +; X86-NEXT: [[TMP12:%.*]] = or i32 [[TMP4]], [[TMP11]] +; X86-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 +; X86-NEXT: [[TMP14:%.*]] = zext i1 [[TMP13]] to i32 +; X86-NEXT: [[TMP15:%.*]] = icmp eq i32 [[TMP14]], 0 +; X86-NEXT: br label [[OPEQ1_EXIT:%.*]] +; X86: opeq1.exit: +; X86-NEXT: [[TMP16:%.*]] = phi i1 [ [[TMP15]], [[ENTRY:%.*]] ] +; X86-NEXT: ret i1 [[TMP16]] +; +; X64-LABEL: @opeq1( +; X64-NEXT: entry: +; X64-NEXT: [[FIRST_I:%.*]] = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* [[A:%.*]], i64 0, i32 0 +; X64-NEXT: [[FIRST1_I:%.*]] = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* [[B:%.*]], i64 0, i32 0 +; X64-NEXT: [[CSTR:%.*]] = bitcast i32* [[FIRST_I]] to i8* +; X64-NEXT: [[CSTR1:%.*]] = bitcast i32* [[FIRST1_I]] to i8* +; X64-NEXT: [[TMP0:%.*]] = bitcast i8* [[CSTR]] to i64* +; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[CSTR1]] to i64* +; X64-NEXT: [[TMP2:%.*]] = load i64, i64* [[TMP0]] +; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]] +; X64-NEXT: [[TMP4:%.*]] = icmp ne i64 [[TMP2]], [[TMP3]] +; X64-NEXT: [[TMP5:%.*]] = zext i1 [[TMP4]] to i32 +; X64-NEXT: [[TMP6:%.*]] = icmp eq i32 [[TMP5]], 0 +; X64-NEXT: br label [[OPEQ1_EXIT:%.*]] +; X64: opeq1.exit: +; X64-NEXT: [[TMP7:%.*]] = phi i1 [ [[TMP6]], [[ENTRY:%.*]] ] +; X64-NEXT: ret i1 [[TMP7]] +; + %"struct.std::pair"* nocapture readonly dereferenceable(8) %a, + %"struct.std::pair"* nocapture readonly dereferenceable(8) %b) local_unnamed_addr #0 { +entry: + %first.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %a, i64 0, i32 0 + %0 = load i32, i32* %first.i, align 4 + %first1.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %b, i64 0, i32 0 + %1 = load i32, i32* %first1.i, align 4 + %cmp.i = icmp eq i32 %0, %1 + br i1 %cmp.i, label %land.rhs.i, label %opeq1.exit + +land.rhs.i: + %second.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %a, i64 0, i32 1 + %2 = load i32, i32* %second.i, align 4 + %second2.i = getelementptr inbounds %"struct.std::pair", %"struct.std::pair"* %b, i64 0, i32 1 + %3 = load i32, i32* %second2.i, align 4 + %cmp3.i = icmp eq i32 %2, %3 + br label %opeq1.exit + +opeq1.exit: + %4 = phi i1 [ false, %entry ], [ %cmp3.i, %land.rhs.i ] + ret i1 %4 +} + + diff --git a/llvm/test/Transforms/PhaseOrdering/X86/memcmp.ll b/llvm/test/Transforms/PhaseOrdering/X86/memcmp.ll new file mode 100644 --- /dev/null +++ b/llvm/test/Transforms/PhaseOrdering/X86/memcmp.ll @@ -0,0 +1,1384 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -O2 -S -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=ALL --check-prefix=X86 +; RUN: opt < %s -O2 -S -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=ALL --check-prefix=X64 + +; This tests codegen time inlining/optimization of memcmp +; rdar://6480398 + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" + + +@.str = private constant [65 x i8] c"0123456789012345678901234567890123456789012345678901234567890123\00", align 1 + +declare i32 @memcmp(i8*, i8*, i64) +declare i32 @bcmp(i8*, i8*, i64) + +define i32 @length0(i8* %X, i8* %Y) nounwind { +; ALL-LABEL: @length0( +; ALL-NEXT: ret i32 0 +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 0) nounwind + ret i32 %m +} + +define i1 @length0_eq(i8* %X, i8* %Y) nounwind { +; ALL-LABEL: @length0_eq( +; ALL-NEXT: ret i1 true +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 0) nounwind + %c = icmp eq i32 %m, 0 + ret i1 %c +} + +define i1 @length0_lt(i8* %X, i8* %Y) nounwind { +; ALL-LABEL: @length0_lt( +; ALL-NEXT: ret i1 false +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 0) nounwind + %c = icmp slt i32 %m, 0 + ret i1 %c +} + +define i32 @length2(i8* %X, i8* %Y) nounwind { +; ALL-LABEL: @length2( +; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i16* +; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i16* +; ALL-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]], align 2 +; ALL-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP2]], align 2 +; ALL-NEXT: [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP3]]) +; ALL-NEXT: [[TMP6:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP4]]) +; ALL-NEXT: [[TMP7:%.*]] = zext i16 [[TMP5]] to i32 +; ALL-NEXT: [[TMP8:%.*]] = zext i16 [[TMP6]] to i32 +; ALL-NEXT: [[TMP9:%.*]] = sub nsw i32 [[TMP7]], [[TMP8]] +; ALL-NEXT: ret i32 [[TMP9]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 2) nounwind + ret i32 %m +} + +define i1 @length2_eq(i8* %X, i8* %Y) nounwind { +; ALL-LABEL: @length2_eq( +; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i16* +; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i16* +; ALL-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]], align 2 +; ALL-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP2]], align 2 +; ALL-NEXT: [[TMP5:%.*]] = icmp eq i16 [[TMP3]], [[TMP4]] +; ALL-NEXT: ret i1 [[TMP5]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 2) nounwind + %c = icmp eq i32 %m, 0 + ret i1 %c +} + +define i1 @length2_lt(i8* %X, i8* %Y) nounwind { +; ALL-LABEL: @length2_lt( +; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i16* +; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i16* +; ALL-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]], align 2 +; ALL-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP2]], align 2 +; ALL-NEXT: [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP3]]) +; ALL-NEXT: [[TMP6:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP4]]) +; ALL-NEXT: [[C:%.*]] = icmp ult i16 [[TMP5]], [[TMP6]] +; ALL-NEXT: ret i1 [[C]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 2) nounwind + %c = icmp slt i32 %m, 0 + ret i1 %c +} + +define i1 @length2_gt(i8* %X, i8* %Y) nounwind { +; ALL-LABEL: @length2_gt( +; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i16* +; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i16* +; ALL-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]], align 2 +; ALL-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP2]], align 2 +; ALL-NEXT: [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP3]]) +; ALL-NEXT: [[TMP6:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP4]]) +; ALL-NEXT: [[C:%.*]] = icmp ugt i16 [[TMP5]], [[TMP6]] +; ALL-NEXT: ret i1 [[C]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 2) nounwind + %c = icmp sgt i32 %m, 0 + ret i1 %c +} + +define i1 @length2_eq_const(i8* %X) nounwind { +; ALL-LABEL: @length2_eq_const( +; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i16* +; ALL-NEXT: [[TMP2:%.*]] = load i16, i16* [[TMP1]], align 2 +; ALL-NEXT: [[TMP3:%.*]] = icmp ne i16 [[TMP2]], 12849 +; ALL-NEXT: ret i1 [[TMP3]] +; + %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 1), i64 2) nounwind + %c = icmp ne i32 %m, 0 + ret i1 %c +} + +define i1 @length2_eq_nobuiltin_attr(i8* %X, i8* %Y) nounwind { +; ALL-LABEL: @length2_eq_nobuiltin_attr( +; ALL-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 2) #4 +; ALL-NEXT: [[C:%.*]] = icmp eq i32 [[M]], 0 +; ALL-NEXT: ret i1 [[C]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 2) nounwind nobuiltin + %c = icmp eq i32 %m, 0 + ret i1 %c +} + +define i32 @length3(i8* %X, i8* %Y) nounwind { +; ALL-LABEL: @length3( +; ALL-NEXT: loadbb: +; ALL-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i16* +; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i16* +; ALL-NEXT: [[TMP2:%.*]] = load i16, i16* [[TMP0]], align 2 +; ALL-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]], align 2 +; ALL-NEXT: [[TMP4:%.*]] = icmp eq i16 [[TMP2]], [[TMP3]] +; ALL-NEXT: br i1 [[TMP4]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]] +; ALL: res_block: +; ALL-NEXT: [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP2]]) +; ALL-NEXT: [[TMP6:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP3]]) +; ALL-NEXT: [[TMP7:%.*]] = icmp ult i16 [[TMP5]], [[TMP6]] +; ALL-NEXT: [[TMP8:%.*]] = select i1 [[TMP7]], i32 -1, i32 1 +; ALL-NEXT: br label [[ENDBLOCK:%.*]] +; ALL: loadbb1: +; ALL-NEXT: [[TMP9:%.*]] = getelementptr i8, i8* [[X]], i64 2 +; ALL-NEXT: [[TMP10:%.*]] = getelementptr i8, i8* [[Y]], i64 2 +; ALL-NEXT: [[TMP11:%.*]] = load i8, i8* [[TMP9]], align 1 +; ALL-NEXT: [[TMP12:%.*]] = load i8, i8* [[TMP10]], align 1 +; ALL-NEXT: [[TMP13:%.*]] = zext i8 [[TMP11]] to i32 +; ALL-NEXT: [[TMP14:%.*]] = zext i8 [[TMP12]] to i32 +; ALL-NEXT: [[TMP15:%.*]] = sub nsw i32 [[TMP13]], [[TMP14]] +; ALL-NEXT: br label [[ENDBLOCK]] +; ALL: endblock: +; ALL-NEXT: [[PHI_RES:%.*]] = phi i32 [ [[TMP15]], [[LOADBB1]] ], [ [[TMP8]], [[RES_BLOCK]] ] +; ALL-NEXT: ret i32 [[PHI_RES]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 3) nounwind + ret i32 %m +} + +define i1 @length3_eq(i8* %X, i8* %Y) nounwind { +; ALL-LABEL: @length3_eq( +; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i16* +; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i16* +; ALL-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]], align 2 +; ALL-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP2]], align 2 +; ALL-NEXT: [[TMP5:%.*]] = xor i16 [[TMP3]], [[TMP4]] +; ALL-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 2 +; ALL-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 2 +; ALL-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP6]], align 1 +; ALL-NEXT: [[TMP9:%.*]] = load i8, i8* [[TMP7]], align 1 +; ALL-NEXT: [[TMP10:%.*]] = xor i8 [[TMP8]], [[TMP9]] +; ALL-NEXT: [[TMP11:%.*]] = zext i8 [[TMP10]] to i16 +; ALL-NEXT: [[TMP12:%.*]] = or i16 [[TMP5]], [[TMP11]] +; ALL-NEXT: [[TMP13:%.*]] = icmp ne i16 [[TMP12]], 0 +; ALL-NEXT: ret i1 [[TMP13]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 3) nounwind + %c = icmp ne i32 %m, 0 + ret i1 %c +} + +define i32 @length4(i8* %X, i8* %Y) nounwind { +; ALL-LABEL: @length4( +; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32* +; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32* +; ALL-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4 +; ALL-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 4 +; ALL-NEXT: [[TMP5:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP3]]) +; ALL-NEXT: [[TMP6:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP4]]) +; ALL-NEXT: [[TMP7:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]] +; ALL-NEXT: [[TMP8:%.*]] = icmp ult i32 [[TMP5]], [[TMP6]] +; ALL-NEXT: [[TMP9:%.*]] = zext i1 [[TMP7]] to i32 +; ALL-NEXT: [[TMP10:%.*]] = zext i1 [[TMP8]] to i32 +; ALL-NEXT: [[TMP11:%.*]] = sub nsw i32 [[TMP9]], [[TMP10]] +; ALL-NEXT: ret i32 [[TMP11]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 4) nounwind + ret i32 %m +} + +define i1 @length4_eq(i8* %X, i8* %Y) nounwind { +; ALL-LABEL: @length4_eq( +; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32* +; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32* +; ALL-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4 +; ALL-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 4 +; ALL-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP3]], [[TMP4]] +; ALL-NEXT: ret i1 [[TMP5]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 4) nounwind + %c = icmp ne i32 %m, 0 + ret i1 %c +} + +define i1 @length4_lt(i8* %X, i8* %Y) nounwind { +; ALL-LABEL: @length4_lt( +; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32* +; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32* +; ALL-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4 +; ALL-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 4 +; ALL-NEXT: [[TMP5:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP3]]) +; ALL-NEXT: [[TMP6:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP4]]) +; ALL-NEXT: [[TMP7:%.*]] = icmp ult i32 [[TMP5]], [[TMP6]] +; ALL-NEXT: ret i1 [[TMP7]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 4) nounwind + %c = icmp slt i32 %m, 0 + ret i1 %c +} + +define i1 @length4_gt(i8* %X, i8* %Y) nounwind { +; ALL-LABEL: @length4_gt( +; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32* +; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32* +; ALL-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4 +; ALL-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 4 +; ALL-NEXT: [[TMP5:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP3]]) +; ALL-NEXT: [[TMP6:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP4]]) +; ALL-NEXT: [[TMP7:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]] +; ALL-NEXT: ret i1 [[TMP7]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 4) nounwind + %c = icmp sgt i32 %m, 0 + ret i1 %c +} + +define i1 @length4_eq_const(i8* %X) nounwind { +; ALL-LABEL: @length4_eq_const( +; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32* +; ALL-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 +; ALL-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP2]], 875770417 +; ALL-NEXT: ret i1 [[TMP3]] +; + %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 1), i64 4) nounwind + %c = icmp eq i32 %m, 0 + ret i1 %c +} + +define i32 @length5(i8* %X, i8* %Y) nounwind { +; ALL-LABEL: @length5( +; ALL-NEXT: loadbb: +; ALL-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i32* +; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i32* +; ALL-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 +; ALL-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4 +; ALL-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP2]], [[TMP3]] +; ALL-NEXT: br i1 [[TMP4]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]] +; ALL: res_block: +; ALL-NEXT: [[TMP5:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP2]]) +; ALL-NEXT: [[TMP6:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP3]]) +; ALL-NEXT: [[TMP7:%.*]] = icmp ult i32 [[TMP5]], [[TMP6]] +; ALL-NEXT: [[TMP8:%.*]] = select i1 [[TMP7]], i32 -1, i32 1 +; ALL-NEXT: br label [[ENDBLOCK:%.*]] +; ALL: loadbb1: +; ALL-NEXT: [[TMP9:%.*]] = getelementptr i8, i8* [[X]], i64 4 +; ALL-NEXT: [[TMP10:%.*]] = getelementptr i8, i8* [[Y]], i64 4 +; ALL-NEXT: [[TMP11:%.*]] = load i8, i8* [[TMP9]], align 1 +; ALL-NEXT: [[TMP12:%.*]] = load i8, i8* [[TMP10]], align 1 +; ALL-NEXT: [[TMP13:%.*]] = zext i8 [[TMP11]] to i32 +; ALL-NEXT: [[TMP14:%.*]] = zext i8 [[TMP12]] to i32 +; ALL-NEXT: [[TMP15:%.*]] = sub nsw i32 [[TMP13]], [[TMP14]] +; ALL-NEXT: br label [[ENDBLOCK]] +; ALL: endblock: +; ALL-NEXT: [[PHI_RES:%.*]] = phi i32 [ [[TMP15]], [[LOADBB1]] ], [ [[TMP8]], [[RES_BLOCK]] ] +; ALL-NEXT: ret i32 [[PHI_RES]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 5) nounwind + ret i32 %m +} + +define i1 @length5_eq(i8* %X, i8* %Y) nounwind { +; ALL-LABEL: @length5_eq( +; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32* +; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32* +; ALL-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4 +; ALL-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 4 +; ALL-NEXT: [[TMP5:%.*]] = xor i32 [[TMP3]], [[TMP4]] +; ALL-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 4 +; ALL-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 4 +; ALL-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP6]], align 1 +; ALL-NEXT: [[TMP9:%.*]] = load i8, i8* [[TMP7]], align 1 +; ALL-NEXT: [[TMP10:%.*]] = xor i8 [[TMP8]], [[TMP9]] +; ALL-NEXT: [[TMP11:%.*]] = zext i8 [[TMP10]] to i32 +; ALL-NEXT: [[TMP12:%.*]] = or i32 [[TMP5]], [[TMP11]] +; ALL-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 +; ALL-NEXT: ret i1 [[TMP13]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 5) nounwind + %c = icmp ne i32 %m, 0 + ret i1 %c +} + +define i1 @length5_lt(i8* %X, i8* %Y) nounwind { +; ALL-LABEL: @length5_lt( +; ALL-NEXT: loadbb: +; ALL-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i32* +; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i32* +; ALL-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 +; ALL-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4 +; ALL-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP2]], [[TMP3]] +; ALL-NEXT: br i1 [[TMP4]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]] +; ALL: res_block: +; ALL-NEXT: [[TMP5:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP2]]) +; ALL-NEXT: [[TMP6:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP3]]) +; ALL-NEXT: [[TMP7:%.*]] = icmp ult i32 [[TMP5]], [[TMP6]] +; ALL-NEXT: [[TMP8:%.*]] = select i1 [[TMP7]], i32 -1, i32 1 +; ALL-NEXT: br label [[ENDBLOCK:%.*]] +; ALL: loadbb1: +; ALL-NEXT: [[TMP9:%.*]] = getelementptr i8, i8* [[X]], i64 4 +; ALL-NEXT: [[TMP10:%.*]] = getelementptr i8, i8* [[Y]], i64 4 +; ALL-NEXT: [[TMP11:%.*]] = load i8, i8* [[TMP9]], align 1 +; ALL-NEXT: [[TMP12:%.*]] = load i8, i8* [[TMP10]], align 1 +; ALL-NEXT: [[TMP13:%.*]] = zext i8 [[TMP11]] to i32 +; ALL-NEXT: [[TMP14:%.*]] = zext i8 [[TMP12]] to i32 +; ALL-NEXT: [[TMP15:%.*]] = sub nsw i32 [[TMP13]], [[TMP14]] +; ALL-NEXT: br label [[ENDBLOCK]] +; ALL: endblock: +; ALL-NEXT: [[PHI_RES:%.*]] = phi i32 [ [[TMP15]], [[LOADBB1]] ], [ [[TMP8]], [[RES_BLOCK]] ] +; ALL-NEXT: [[C:%.*]] = icmp slt i32 [[PHI_RES]], 0 +; ALL-NEXT: ret i1 [[C]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 5) nounwind + %c = icmp slt i32 %m, 0 + ret i1 %c +} + +define i1 @length7_eq(i8* %X, i8* %Y) nounwind { +; ALL-LABEL: @length7_eq( +; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32* +; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32* +; ALL-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4 +; ALL-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 4 +; ALL-NEXT: [[TMP5:%.*]] = getelementptr i8, i8* [[X]], i64 3 +; ALL-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to i32* +; ALL-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 3 +; ALL-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* +; ALL-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP6]], align 4 +; ALL-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP8]], align 4 +; ALL-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP3]], [[TMP4]] +; ALL-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP9]], [[TMP10]] +; ALL-NEXT: [[TMP13:%.*]] = or i1 [[TMP11]], [[TMP12]] +; ALL-NEXT: ret i1 [[TMP13]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 7) nounwind + %c = icmp ne i32 %m, 0 + ret i1 %c +} + +define i32 @length8(i8* %X, i8* %Y) nounwind { +; X86-LABEL: @length8( +; X86-NEXT: loadbb: +; X86-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i32* +; X86-NEXT: [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i32* +; X86-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4 +; X86-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4 +; X86-NEXT: [[TMP4:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP2]]) +; X86-NEXT: [[TMP5:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP3]]) +; X86-NEXT: [[TMP6:%.*]] = icmp eq i32 [[TMP2]], [[TMP3]] +; X86-NEXT: br i1 [[TMP6]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]] +; X86: res_block: +; X86-NEXT: [[PHI_SRC1:%.*]] = phi i32 [ [[TMP4]], [[LOADBB:%.*]] ], [ [[TMP15:%.*]], [[LOADBB1]] ] +; X86-NEXT: [[PHI_SRC2:%.*]] = phi i32 [ [[TMP5]], [[LOADBB]] ], [ [[TMP16:%.*]], [[LOADBB1]] ] +; X86-NEXT: [[TMP7:%.*]] = icmp ult i32 [[PHI_SRC1]], [[PHI_SRC2]] +; X86-NEXT: [[TMP8:%.*]] = select i1 [[TMP7]], i32 -1, i32 1 +; X86-NEXT: br label [[ENDBLOCK:%.*]] +; X86: loadbb1: +; X86-NEXT: [[TMP9:%.*]] = getelementptr i8, i8* [[X]], i64 4 +; X86-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i32* +; X86-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[Y]], i64 4 +; X86-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to i32* +; X86-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP10]], align 4 +; X86-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP12]], align 4 +; X86-NEXT: [[TMP15]] = call i32 @llvm.bswap.i32(i32 [[TMP13]]) +; X86-NEXT: [[TMP16]] = call i32 @llvm.bswap.i32(i32 [[TMP14]]) +; X86-NEXT: [[TMP17:%.*]] = icmp eq i32 [[TMP13]], [[TMP14]] +; X86-NEXT: br i1 [[TMP17]], label [[ENDBLOCK]], label [[RES_BLOCK]] +; X86: endblock: +; X86-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP8]], [[RES_BLOCK]] ] +; X86-NEXT: ret i32 [[PHI_RES]] +; +; X64-LABEL: @length8( +; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64* +; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64* +; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 8 +; X64-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 8 +; X64-NEXT: [[TMP5:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP3]]) +; X64-NEXT: [[TMP6:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP4]]) +; X64-NEXT: [[TMP7:%.*]] = icmp ugt i64 [[TMP5]], [[TMP6]] +; X64-NEXT: [[TMP8:%.*]] = icmp ult i64 [[TMP5]], [[TMP6]] +; X64-NEXT: [[TMP9:%.*]] = zext i1 [[TMP7]] to i32 +; X64-NEXT: [[TMP10:%.*]] = zext i1 [[TMP8]] to i32 +; X64-NEXT: [[TMP11:%.*]] = sub nsw i32 [[TMP9]], [[TMP10]] +; X64-NEXT: ret i32 [[TMP11]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 8) nounwind + ret i32 %m +} + +define i1 @length8_eq(i8* %X, i8* %Y) nounwind { +; X86-LABEL: @length8_eq( +; X86-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32* +; X86-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i32* +; X86-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4 +; X86-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]], align 4 +; X86-NEXT: [[TMP5:%.*]] = getelementptr i8, i8* [[X]], i64 4 +; X86-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to i32* +; X86-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 4 +; X86-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* +; X86-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP6]], align 4 +; X86-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP8]], align 4 +; X86-NEXT: [[TMP11:%.*]] = icmp eq i32 [[TMP3]], [[TMP4]] +; X86-NEXT: [[TMP12:%.*]] = icmp eq i32 [[TMP9]], [[TMP10]] +; X86-NEXT: [[C:%.*]] = and i1 [[TMP12]], [[TMP11]] +; X86-NEXT: ret i1 [[C]] +; +; X64-LABEL: @length8_eq( +; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64* +; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64* +; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 8 +; X64-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 8 +; X64-NEXT: [[TMP5:%.*]] = icmp eq i64 [[TMP3]], [[TMP4]] +; X64-NEXT: ret i1 [[TMP5]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 8) nounwind + %c = icmp eq i32 %m, 0 + ret i1 %c +} + +define i1 @length8_eq_const(i8* %X) nounwind { +; X86-LABEL: @length8_eq_const( +; X86-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i32* +; X86-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 +; X86-NEXT: [[TMP3:%.*]] = getelementptr i8, i8* [[X]], i64 4 +; X86-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to i32* +; X86-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 +; X86-NEXT: [[TMP6:%.*]] = icmp ne i32 [[TMP2]], 858927408 +; X86-NEXT: [[TMP7:%.*]] = icmp ne i32 [[TMP5]], 926299444 +; X86-NEXT: [[TMP8:%.*]] = or i1 [[TMP6]], [[TMP7]] +; X86-NEXT: ret i1 [[TMP8]] +; +; X64-LABEL: @length8_eq_const( +; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64* +; X64-NEXT: [[TMP2:%.*]] = load i64, i64* [[TMP1]], align 8 +; X64-NEXT: [[TMP3:%.*]] = icmp ne i64 [[TMP2]], 3978425819141910832 +; X64-NEXT: ret i1 [[TMP3]] +; + %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 8) nounwind + %c = icmp ne i32 %m, 0 + ret i1 %c +} + +define i1 @length9_eq(i8* %X, i8* %Y) nounwind { +; X86-LABEL: @length9_eq( +; X86-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 9) #2 +; X86-NEXT: [[C:%.*]] = icmp eq i32 [[M]], 0 +; X86-NEXT: ret i1 [[C]] +; +; X64-LABEL: @length9_eq( +; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64* +; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64* +; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 8 +; X64-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 8 +; X64-NEXT: [[TMP5:%.*]] = xor i64 [[TMP3]], [[TMP4]] +; X64-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 8 +; X64-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 8 +; X64-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP6]], align 1 +; X64-NEXT: [[TMP9:%.*]] = load i8, i8* [[TMP7]], align 1 +; X64-NEXT: [[TMP10:%.*]] = xor i8 [[TMP8]], [[TMP9]] +; X64-NEXT: [[TMP11:%.*]] = zext i8 [[TMP10]] to i64 +; X64-NEXT: [[TMP12:%.*]] = or i64 [[TMP5]], [[TMP11]] +; X64-NEXT: [[TMP13:%.*]] = icmp eq i64 [[TMP12]], 0 +; X64-NEXT: ret i1 [[TMP13]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 9) nounwind + %c = icmp eq i32 %m, 0 + ret i1 %c +} + +define i1 @length10_eq(i8* %X, i8* %Y) nounwind { +; X86-LABEL: @length10_eq( +; X86-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 10) #2 +; X86-NEXT: [[C:%.*]] = icmp eq i32 [[M]], 0 +; X86-NEXT: ret i1 [[C]] +; +; X64-LABEL: @length10_eq( +; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64* +; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64* +; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 8 +; X64-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 8 +; X64-NEXT: [[TMP5:%.*]] = xor i64 [[TMP3]], [[TMP4]] +; X64-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 8 +; X64-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to i16* +; X64-NEXT: [[TMP8:%.*]] = getelementptr i8, i8* [[Y]], i64 8 +; X64-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to i16* +; X64-NEXT: [[TMP10:%.*]] = load i16, i16* [[TMP7]], align 2 +; X64-NEXT: [[TMP11:%.*]] = load i16, i16* [[TMP9]], align 2 +; X64-NEXT: [[TMP12:%.*]] = xor i16 [[TMP10]], [[TMP11]] +; X64-NEXT: [[TMP13:%.*]] = zext i16 [[TMP12]] to i64 +; X64-NEXT: [[TMP14:%.*]] = or i64 [[TMP5]], [[TMP13]] +; X64-NEXT: [[TMP15:%.*]] = icmp eq i64 [[TMP14]], 0 +; X64-NEXT: ret i1 [[TMP15]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 10) nounwind + %c = icmp eq i32 %m, 0 + ret i1 %c +} + +define i1 @length11_eq(i8* %X, i8* %Y) nounwind { +; X86-LABEL: @length11_eq( +; X86-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 11) #2 +; X86-NEXT: [[C:%.*]] = icmp eq i32 [[M]], 0 +; X86-NEXT: ret i1 [[C]] +; +; X64-LABEL: @length11_eq( +; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64* +; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64* +; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 8 +; X64-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 8 +; X64-NEXT: [[TMP5:%.*]] = getelementptr i8, i8* [[X]], i64 3 +; X64-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to i64* +; X64-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 3 +; X64-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i64* +; X64-NEXT: [[TMP9:%.*]] = load i64, i64* [[TMP6]], align 8 +; X64-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]], align 8 +; X64-NEXT: [[TMP11:%.*]] = icmp eq i64 [[TMP3]], [[TMP4]] +; X64-NEXT: [[TMP12:%.*]] = icmp eq i64 [[TMP9]], [[TMP10]] +; X64-NEXT: [[C:%.*]] = and i1 [[TMP12]], [[TMP11]] +; X64-NEXT: ret i1 [[C]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 11) nounwind + %c = icmp eq i32 %m, 0 + ret i1 %c +} + +define i1 @length12_eq(i8* %X, i8* %Y) nounwind { +; X86-LABEL: @length12_eq( +; X86-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 12) #2 +; X86-NEXT: [[C:%.*]] = icmp ne i32 [[M]], 0 +; X86-NEXT: ret i1 [[C]] +; +; X64-LABEL: @length12_eq( +; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64* +; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64* +; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 8 +; X64-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 8 +; X64-NEXT: [[TMP5:%.*]] = xor i64 [[TMP3]], [[TMP4]] +; X64-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 8 +; X64-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to i32* +; X64-NEXT: [[TMP8:%.*]] = getelementptr i8, i8* [[Y]], i64 8 +; X64-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to i32* +; X64-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP7]], align 4 +; X64-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP9]], align 4 +; X64-NEXT: [[TMP12:%.*]] = xor i32 [[TMP10]], [[TMP11]] +; X64-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64 +; X64-NEXT: [[TMP14:%.*]] = or i64 [[TMP5]], [[TMP13]] +; X64-NEXT: [[TMP15:%.*]] = icmp ne i64 [[TMP14]], 0 +; X64-NEXT: ret i1 [[TMP15]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 12) nounwind + %c = icmp ne i32 %m, 0 + ret i1 %c +} + +define i32 @length12(i8* %X, i8* %Y) nounwind { +; X86-LABEL: @length12( +; X86-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 12) #2 +; X86-NEXT: ret i32 [[M]] +; +; X64-LABEL: @length12( +; X64-NEXT: loadbb: +; X64-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i64* +; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i64* +; X64-NEXT: [[TMP2:%.*]] = load i64, i64* [[TMP0]], align 8 +; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 8 +; X64-NEXT: [[TMP4:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP2]]) +; X64-NEXT: [[TMP5:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP3]]) +; X64-NEXT: [[TMP6:%.*]] = icmp eq i64 [[TMP2]], [[TMP3]] +; X64-NEXT: br i1 [[TMP6]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]] +; X64: res_block: +; X64-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP4]], [[LOADBB:%.*]] ], [ [[TMP17:%.*]], [[LOADBB1]] ] +; X64-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP5]], [[LOADBB]] ], [ [[TMP18:%.*]], [[LOADBB1]] ] +; X64-NEXT: [[TMP7:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]] +; X64-NEXT: [[TMP8:%.*]] = select i1 [[TMP7]], i32 -1, i32 1 +; X64-NEXT: br label [[ENDBLOCK:%.*]] +; X64: loadbb1: +; X64-NEXT: [[TMP9:%.*]] = getelementptr i8, i8* [[X]], i64 8 +; X64-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i32* +; X64-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[Y]], i64 8 +; X64-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to i32* +; X64-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP10]], align 4 +; X64-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP12]], align 4 +; X64-NEXT: [[TMP15:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP13]]) +; X64-NEXT: [[TMP16:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP14]]) +; X64-NEXT: [[TMP17]] = zext i32 [[TMP15]] to i64 +; X64-NEXT: [[TMP18]] = zext i32 [[TMP16]] to i64 +; X64-NEXT: [[TMP19:%.*]] = icmp eq i32 [[TMP13]], [[TMP14]] +; X64-NEXT: br i1 [[TMP19]], label [[ENDBLOCK]], label [[RES_BLOCK]] +; X64: endblock: +; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP8]], [[RES_BLOCK]] ] +; X64-NEXT: ret i32 [[PHI_RES]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 12) nounwind + ret i32 %m +} + +define i1 @length13_eq(i8* %X, i8* %Y) nounwind { +; X86-LABEL: @length13_eq( +; X86-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 13) #2 +; X86-NEXT: [[C:%.*]] = icmp eq i32 [[M]], 0 +; X86-NEXT: ret i1 [[C]] +; +; X64-LABEL: @length13_eq( +; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64* +; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64* +; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 8 +; X64-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 8 +; X64-NEXT: [[TMP5:%.*]] = getelementptr i8, i8* [[X]], i64 5 +; X64-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to i64* +; X64-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 5 +; X64-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i64* +; X64-NEXT: [[TMP9:%.*]] = load i64, i64* [[TMP6]], align 8 +; X64-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]], align 8 +; X64-NEXT: [[TMP11:%.*]] = icmp eq i64 [[TMP3]], [[TMP4]] +; X64-NEXT: [[TMP12:%.*]] = icmp eq i64 [[TMP9]], [[TMP10]] +; X64-NEXT: [[C:%.*]] = and i1 [[TMP12]], [[TMP11]] +; X64-NEXT: ret i1 [[C]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 13) nounwind + %c = icmp eq i32 %m, 0 + ret i1 %c +} + +define i1 @length14_eq(i8* %X, i8* %Y) nounwind { +; X86-LABEL: @length14_eq( +; X86-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 14) #2 +; X86-NEXT: [[C:%.*]] = icmp eq i32 [[M]], 0 +; X86-NEXT: ret i1 [[C]] +; +; X64-LABEL: @length14_eq( +; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64* +; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64* +; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 8 +; X64-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 8 +; X64-NEXT: [[TMP5:%.*]] = getelementptr i8, i8* [[X]], i64 6 +; X64-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to i64* +; X64-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 6 +; X64-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i64* +; X64-NEXT: [[TMP9:%.*]] = load i64, i64* [[TMP6]], align 8 +; X64-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]], align 8 +; X64-NEXT: [[TMP11:%.*]] = icmp eq i64 [[TMP3]], [[TMP4]] +; X64-NEXT: [[TMP12:%.*]] = icmp eq i64 [[TMP9]], [[TMP10]] +; X64-NEXT: [[C:%.*]] = and i1 [[TMP12]], [[TMP11]] +; X64-NEXT: ret i1 [[C]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 14) nounwind + %c = icmp eq i32 %m, 0 + ret i1 %c +} + +define i1 @length15_eq(i8* %X, i8* %Y) nounwind { +; X86-LABEL: @length15_eq( +; X86-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 15) #2 +; X86-NEXT: [[C:%.*]] = icmp eq i32 [[M]], 0 +; X86-NEXT: ret i1 [[C]] +; +; X64-LABEL: @length15_eq( +; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i64* +; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i64* +; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 8 +; X64-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]], align 8 +; X64-NEXT: [[TMP5:%.*]] = getelementptr i8, i8* [[X]], i64 7 +; X64-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to i64* +; X64-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 7 +; X64-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i64* +; X64-NEXT: [[TMP9:%.*]] = load i64, i64* [[TMP6]], align 8 +; X64-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP8]], align 8 +; X64-NEXT: [[TMP11:%.*]] = icmp eq i64 [[TMP3]], [[TMP4]] +; X64-NEXT: [[TMP12:%.*]] = icmp eq i64 [[TMP9]], [[TMP10]] +; X64-NEXT: [[C:%.*]] = and i1 [[TMP12]], [[TMP11]] +; X64-NEXT: ret i1 [[C]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 15) nounwind + %c = icmp eq i32 %m, 0 + ret i1 %c +} + +; PR33329 - https://bugs.llvm.org/show_bug.cgi?id=33329 + +define i32 @length16(i8* %X, i8* %Y) nounwind { +; X86-LABEL: @length16( +; X86-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 16) #2 +; X86-NEXT: ret i32 [[M]] +; +; X64-LABEL: @length16( +; X64-NEXT: loadbb: +; X64-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i64* +; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[Y:%.*]] to i64* +; X64-NEXT: [[TMP2:%.*]] = load i64, i64* [[TMP0]], align 8 +; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]], align 8 +; X64-NEXT: [[TMP4:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP2]]) +; X64-NEXT: [[TMP5:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP3]]) +; X64-NEXT: [[TMP6:%.*]] = icmp eq i64 [[TMP2]], [[TMP3]] +; X64-NEXT: br i1 [[TMP6]], label [[LOADBB1:%.*]], label [[RES_BLOCK:%.*]] +; X64: res_block: +; X64-NEXT: [[PHI_SRC1:%.*]] = phi i64 [ [[TMP4]], [[LOADBB:%.*]] ], [ [[TMP15:%.*]], [[LOADBB1]] ] +; X64-NEXT: [[PHI_SRC2:%.*]] = phi i64 [ [[TMP5]], [[LOADBB]] ], [ [[TMP16:%.*]], [[LOADBB1]] ] +; X64-NEXT: [[TMP7:%.*]] = icmp ult i64 [[PHI_SRC1]], [[PHI_SRC2]] +; X64-NEXT: [[TMP8:%.*]] = select i1 [[TMP7]], i32 -1, i32 1 +; X64-NEXT: br label [[ENDBLOCK:%.*]] +; X64: loadbb1: +; X64-NEXT: [[TMP9:%.*]] = getelementptr i8, i8* [[X]], i64 8 +; X64-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i64* +; X64-NEXT: [[TMP11:%.*]] = getelementptr i8, i8* [[Y]], i64 8 +; X64-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to i64* +; X64-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP10]], align 8 +; X64-NEXT: [[TMP14:%.*]] = load i64, i64* [[TMP12]], align 8 +; X64-NEXT: [[TMP15]] = call i64 @llvm.bswap.i64(i64 [[TMP13]]) +; X64-NEXT: [[TMP16]] = call i64 @llvm.bswap.i64(i64 [[TMP14]]) +; X64-NEXT: [[TMP17:%.*]] = icmp eq i64 [[TMP13]], [[TMP14]] +; X64-NEXT: br i1 [[TMP17]], label [[ENDBLOCK]], label [[RES_BLOCK]] +; X64: endblock: +; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, [[LOADBB1]] ], [ [[TMP8]], [[RES_BLOCK]] ] +; X64-NEXT: ret i32 [[PHI_RES]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 16) nounwind + ret i32 %m +} + +define i1 @length16_eq(i8* %x, i8* %y) nounwind { +; X86-NOSSE-LABEL: length16_eq: +; X86-NOSSE: # %bb.0: +; X86-NOSSE-NEXT: pushl $0 +; X86-NOSSE-NEXT: pushl $16 +; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp) +; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp) +; X86-NOSSE-NEXT: calll memcmp +; X86-NOSSE-NEXT: addl $16, %esp +; X86-NOSSE-NEXT: testl %eax, %eax +; X86-NOSSE-NEXT: setne %al +; X86-NOSSE-NEXT: retl +; +; X86-SSE1-LABEL: length16_eq: +; X86-SSE1: # %bb.0: +; X86-SSE1-NEXT: pushl $0 +; X86-SSE1-NEXT: pushl $16 +; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp) +; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp) +; X86-SSE1-NEXT: calll memcmp +; X86-SSE1-NEXT: addl $16, %esp +; X86-SSE1-NEXT: testl %eax, %eax +; X86-SSE1-NEXT: setne %al +; X86-SSE1-NEXT: retl +; +; X86-SSE2-LABEL: length16_eq: +; X86-SSE2: # %bb.0: +; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-SSE2-NEXT: movdqu (%ecx), %xmm0 +; X86-SSE2-NEXT: movdqu (%eax), %xmm1 +; X86-SSE2-NEXT: pcmpeqb %xmm0, %xmm1 +; X86-SSE2-NEXT: pmovmskb %xmm1, %eax +; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF +; X86-SSE2-NEXT: setne %al +; X86-SSE2-NEXT: retl +; +; X64-SSE2-LABEL: length16_eq: +; X64-SSE2: # %bb.0: +; X64-SSE2-NEXT: movdqu (%rdi), %xmm0 +; X64-SSE2-NEXT: movdqu (%rsi), %xmm1 +; X64-SSE2-NEXT: pcmpeqb %xmm0, %xmm1 +; X64-SSE2-NEXT: pmovmskb %xmm1, %eax +; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF +; X64-SSE2-NEXT: setne %al +; X64-SSE2-NEXT: retq +; +; X64-AVX-LABEL: length16_eq: +; X64-AVX: # %bb.0: +; X64-AVX-NEXT: vmovdqu (%rdi), %xmm0 +; X64-AVX-NEXT: vpcmpeqb (%rsi), %xmm0, %xmm0 +; X64-AVX-NEXT: vpmovmskb %xmm0, %eax +; X64-AVX-NEXT: cmpl $65535, %eax # imm = 0xFFFF +; X64-AVX-NEXT: setne %al +; X64-AVX-NEXT: retq +; X86-LABEL: @length16_eq( +; X86-NEXT: [[CALL:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 16) #2 +; X86-NEXT: [[CMP:%.*]] = icmp ne i32 [[CALL]], 0 +; X86-NEXT: ret i1 [[CMP]] +; +; X64-LABEL: @length16_eq( +; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i128* +; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i128* +; X64-NEXT: [[TMP3:%.*]] = load i128, i128* [[TMP1]], align 8 +; X64-NEXT: [[TMP4:%.*]] = load i128, i128* [[TMP2]], align 8 +; X64-NEXT: [[TMP5:%.*]] = icmp ne i128 [[TMP3]], [[TMP4]] +; X64-NEXT: ret i1 [[TMP5]] +; + %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 16) nounwind + %cmp = icmp ne i32 %call, 0 + ret i1 %cmp +} + +define i1 @length16_eq_const(i8* %X) nounwind { +; X86-NOSSE-LABEL: length16_eq_const: +; X86-NOSSE: # %bb.0: +; X86-NOSSE-NEXT: pushl $0 +; X86-NOSSE-NEXT: pushl $16 +; X86-NOSSE-NEXT: pushl $.L.str +; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp) +; X86-NOSSE-NEXT: calll memcmp +; X86-NOSSE-NEXT: addl $16, %esp +; X86-NOSSE-NEXT: testl %eax, %eax +; X86-NOSSE-NEXT: sete %al +; X86-NOSSE-NEXT: retl +; +; X86-SSE1-LABEL: length16_eq_const: +; X86-SSE1: # %bb.0: +; X86-SSE1-NEXT: pushl $0 +; X86-SSE1-NEXT: pushl $16 +; X86-SSE1-NEXT: pushl $.L.str +; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp) +; X86-SSE1-NEXT: calll memcmp +; X86-SSE1-NEXT: addl $16, %esp +; X86-SSE1-NEXT: testl %eax, %eax +; X86-SSE1-NEXT: sete %al +; X86-SSE1-NEXT: retl +; +; X86-SSE2-LABEL: length16_eq_const: +; X86-SSE2: # %bb.0: +; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-SSE2-NEXT: movdqu (%eax), %xmm0 +; X86-SSE2-NEXT: pcmpeqb {{\.LCPI.*}}, %xmm0 +; X86-SSE2-NEXT: pmovmskb %xmm0, %eax +; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF +; X86-SSE2-NEXT: sete %al +; X86-SSE2-NEXT: retl +; +; X64-SSE2-LABEL: length16_eq_const: +; X64-SSE2: # %bb.0: +; X64-SSE2-NEXT: movdqu (%rdi), %xmm0 +; X64-SSE2-NEXT: pcmpeqb {{.*}}(%rip), %xmm0 +; X64-SSE2-NEXT: pmovmskb %xmm0, %eax +; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF +; X64-SSE2-NEXT: sete %al +; X64-SSE2-NEXT: retq +; +; X64-AVX-LABEL: length16_eq_const: +; X64-AVX: # %bb.0: +; X64-AVX-NEXT: vmovdqu (%rdi), %xmm0 +; X64-AVX-NEXT: vpcmpeqb {{.*}}(%rip), %xmm0, %xmm0 +; X64-AVX-NEXT: vpmovmskb %xmm0, %eax +; X64-AVX-NEXT: cmpl $65535, %eax # imm = 0xFFFF +; X64-AVX-NEXT: sete %al +; X64-AVX-NEXT: retq +; X86-LABEL: @length16_eq_const( +; X86-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i64 0, i64 0), i64 16) #2 +; X86-NEXT: [[C:%.*]] = icmp eq i32 [[M]], 0 +; X86-NEXT: ret i1 [[C]] +; +; X64-LABEL: @length16_eq_const( +; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i128* +; X64-NEXT: [[TMP2:%.*]] = load i128, i128* [[TMP1]], align 8 +; X64-NEXT: [[TMP3:%.*]] = icmp eq i128 [[TMP2]], 70720121592765328381466889075544961328 +; X64-NEXT: ret i1 [[TMP3]] +; + %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 16) nounwind + %c = icmp eq i32 %m, 0 + ret i1 %c +} + +; PR33914 - https://bugs.llvm.org/show_bug.cgi?id=33914 + +define i32 @length24(i8* %X, i8* %Y) nounwind { +; ALL-LABEL: @length24( +; ALL-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 24) #2 +; ALL-NEXT: ret i32 [[M]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 24) nounwind + ret i32 %m +} + +define i1 @length24_eq(i8* %x, i8* %y) nounwind { +; X86-NOSSE-LABEL: length24_eq: +; X86-NOSSE: # %bb.0: +; X86-NOSSE-NEXT: pushl $0 +; X86-NOSSE-NEXT: pushl $24 +; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp) +; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp) +; X86-NOSSE-NEXT: calll memcmp +; X86-NOSSE-NEXT: addl $16, %esp +; X86-NOSSE-NEXT: testl %eax, %eax +; X86-NOSSE-NEXT: sete %al +; X86-NOSSE-NEXT: retl +; +; X86-SSE1-LABEL: length24_eq: +; X86-SSE1: # %bb.0: +; X86-SSE1-NEXT: pushl $0 +; X86-SSE1-NEXT: pushl $24 +; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp) +; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp) +; X86-SSE1-NEXT: calll memcmp +; X86-SSE1-NEXT: addl $16, %esp +; X86-SSE1-NEXT: testl %eax, %eax +; X86-SSE1-NEXT: sete %al +; X86-SSE1-NEXT: retl +; +; X86-SSE2-LABEL: length24_eq: +; X86-SSE2: # %bb.0: +; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-SSE2-NEXT: movdqu (%ecx), %xmm0 +; X86-SSE2-NEXT: movdqu 8(%ecx), %xmm1 +; X86-SSE2-NEXT: movdqu (%eax), %xmm2 +; X86-SSE2-NEXT: pcmpeqb %xmm0, %xmm2 +; X86-SSE2-NEXT: movdqu 8(%eax), %xmm0 +; X86-SSE2-NEXT: pcmpeqb %xmm1, %xmm0 +; X86-SSE2-NEXT: pand %xmm2, %xmm0 +; X86-SSE2-NEXT: pmovmskb %xmm0, %eax +; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF +; X86-SSE2-NEXT: sete %al +; X86-SSE2-NEXT: retl +; +; X86-LABEL: @length24_eq( +; X86-NEXT: [[CALL:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 24) #2 +; X86-NEXT: [[CMP:%.*]] = icmp eq i32 [[CALL]], 0 +; X86-NEXT: ret i1 [[CMP]] +; +; X64-LABEL: @length24_eq( +; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i128* +; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i128* +; X64-NEXT: [[TMP3:%.*]] = load i128, i128* [[TMP1]], align 8 +; X64-NEXT: [[TMP4:%.*]] = load i128, i128* [[TMP2]], align 8 +; X64-NEXT: [[TMP5:%.*]] = xor i128 [[TMP3]], [[TMP4]] +; X64-NEXT: [[TMP6:%.*]] = getelementptr i8, i8* [[X]], i64 16 +; X64-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to i64* +; X64-NEXT: [[TMP8:%.*]] = getelementptr i8, i8* [[Y]], i64 16 +; X64-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to i64* +; X64-NEXT: [[TMP10:%.*]] = load i64, i64* [[TMP7]], align 8 +; X64-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP9]], align 8 +; X64-NEXT: [[TMP12:%.*]] = xor i64 [[TMP10]], [[TMP11]] +; X64-NEXT: [[TMP13:%.*]] = zext i64 [[TMP12]] to i128 +; X64-NEXT: [[TMP14:%.*]] = or i128 [[TMP5]], [[TMP13]] +; X64-NEXT: [[TMP15:%.*]] = icmp eq i128 [[TMP14]], 0 +; X64-NEXT: ret i1 [[TMP15]] +; + %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 24) nounwind + %cmp = icmp eq i32 %call, 0 + ret i1 %cmp +} + +define i1 @length24_eq_const(i8* %X) nounwind { +; X86-NOSSE-LABEL: length24_eq_const: +; X86-NOSSE: # %bb.0: +; X86-NOSSE-NEXT: pushl $0 +; X86-NOSSE-NEXT: pushl $24 +; X86-NOSSE-NEXT: pushl $.L.str +; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp) +; X86-NOSSE-NEXT: calll memcmp +; X86-NOSSE-NEXT: addl $16, %esp +; X86-NOSSE-NEXT: testl %eax, %eax +; X86-NOSSE-NEXT: setne %al +; X86-NOSSE-NEXT: retl +; +; X86-SSE1-LABEL: length24_eq_const: +; X86-SSE1: # %bb.0: +; X86-SSE1-NEXT: pushl $0 +; X86-SSE1-NEXT: pushl $24 +; X86-SSE1-NEXT: pushl $.L.str +; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp) +; X86-SSE1-NEXT: calll memcmp +; X86-SSE1-NEXT: addl $16, %esp +; X86-SSE1-NEXT: testl %eax, %eax +; X86-SSE1-NEXT: setne %al +; X86-SSE1-NEXT: retl +; +; X86-SSE2-LABEL: length24_eq_const: +; X86-SSE2: # %bb.0: +; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-SSE2-NEXT: movdqu (%eax), %xmm0 +; X86-SSE2-NEXT: movdqu 8(%eax), %xmm1 +; X86-SSE2-NEXT: pcmpeqb {{\.LCPI.*}}, %xmm1 +; X86-SSE2-NEXT: pcmpeqb {{\.LCPI.*}}, %xmm0 +; X86-SSE2-NEXT: pand %xmm1, %xmm0 +; X86-SSE2-NEXT: pmovmskb %xmm0, %eax +; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF +; X86-SSE2-NEXT: setne %al +; X86-SSE2-NEXT: retl +; +; X86-LABEL: @length24_eq_const( +; X86-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i64 0, i64 0), i64 24) #2 +; X86-NEXT: [[C:%.*]] = icmp ne i32 [[M]], 0 +; X86-NEXT: ret i1 [[C]] +; +; X64-LABEL: @length24_eq_const( +; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i128* +; X64-NEXT: [[TMP2:%.*]] = load i128, i128* [[TMP1]], align 8 +; X64-NEXT: [[TMP3:%.*]] = xor i128 [[TMP2]], 70720121592765328381466889075544961328 +; X64-NEXT: [[TMP4:%.*]] = getelementptr i8, i8* [[X]], i64 16 +; X64-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to i64* +; X64-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP5]], align 8 +; X64-NEXT: [[TMP7:%.*]] = xor i64 [[TMP6]], 3689065127958034230 +; X64-NEXT: [[TMP8:%.*]] = zext i64 [[TMP7]] to i128 +; X64-NEXT: [[TMP9:%.*]] = or i128 [[TMP3]], [[TMP8]] +; X64-NEXT: [[TMP10:%.*]] = icmp ne i128 [[TMP9]], 0 +; X64-NEXT: ret i1 [[TMP10]] +; + %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 24) nounwind + %c = icmp ne i32 %m, 0 + ret i1 %c +} + +define i32 @length32(i8* %X, i8* %Y) nounwind { +; ALL-LABEL: @length32( +; ALL-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 32) #2 +; ALL-NEXT: ret i32 [[M]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 32) nounwind + ret i32 %m +} + +; PR33325 - https://bugs.llvm.org/show_bug.cgi?id=33325 + +define i1 @length32_eq(i8* %x, i8* %y) nounwind { +; X86-NOSSE-LABEL: length32_eq: +; X86-NOSSE: # %bb.0: +; X86-NOSSE-NEXT: pushl $0 +; X86-NOSSE-NEXT: pushl $32 +; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp) +; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp) +; X86-NOSSE-NEXT: calll memcmp +; X86-NOSSE-NEXT: addl $16, %esp +; X86-NOSSE-NEXT: testl %eax, %eax +; X86-NOSSE-NEXT: sete %al +; X86-NOSSE-NEXT: retl +; +; X86-SSE1-LABEL: length32_eq: +; X86-SSE1: # %bb.0: +; X86-SSE1-NEXT: pushl $0 +; X86-SSE1-NEXT: pushl $32 +; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp) +; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp) +; X86-SSE1-NEXT: calll memcmp +; X86-SSE1-NEXT: addl $16, %esp +; X86-SSE1-NEXT: testl %eax, %eax +; X86-SSE1-NEXT: sete %al +; X86-SSE1-NEXT: retl +; +; X86-SSE2-LABEL: length32_eq: +; X86-SSE2: # %bb.0: +; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-SSE2-NEXT: movdqu (%ecx), %xmm0 +; X86-SSE2-NEXT: movdqu 16(%ecx), %xmm1 +; X86-SSE2-NEXT: movdqu (%eax), %xmm2 +; X86-SSE2-NEXT: pcmpeqb %xmm0, %xmm2 +; X86-SSE2-NEXT: movdqu 16(%eax), %xmm0 +; X86-SSE2-NEXT: pcmpeqb %xmm1, %xmm0 +; X86-SSE2-NEXT: pand %xmm2, %xmm0 +; X86-SSE2-NEXT: pmovmskb %xmm0, %eax +; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF +; X86-SSE2-NEXT: sete %al +; X86-SSE2-NEXT: retl +; +; X64-SSE2-LABEL: length32_eq: +; X64-SSE2: # %bb.0: +; X64-SSE2-NEXT: movdqu (%rdi), %xmm0 +; X64-SSE2-NEXT: movdqu 16(%rdi), %xmm1 +; X64-SSE2-NEXT: movdqu (%rsi), %xmm2 +; X64-SSE2-NEXT: pcmpeqb %xmm0, %xmm2 +; X64-SSE2-NEXT: movdqu 16(%rsi), %xmm0 +; X64-SSE2-NEXT: pcmpeqb %xmm1, %xmm0 +; X64-SSE2-NEXT: pand %xmm2, %xmm0 +; X64-SSE2-NEXT: pmovmskb %xmm0, %eax +; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF +; X64-SSE2-NEXT: sete %al +; X64-SSE2-NEXT: retq +; +; X64-AVX1-LABEL: length32_eq: +; X64-AVX1: # %bb.0: +; X64-AVX1-NEXT: vmovdqu (%rdi), %xmm0 +; X64-AVX1-NEXT: vmovdqu 16(%rdi), %xmm1 +; X64-AVX1-NEXT: vpcmpeqb (%rsi), %xmm0, %xmm0 +; X64-AVX1-NEXT: vpcmpeqb 16(%rsi), %xmm1, %xmm1 +; X64-AVX1-NEXT: vpand %xmm0, %xmm1, %xmm0 +; X64-AVX1-NEXT: vpmovmskb %xmm0, %eax +; X64-AVX1-NEXT: cmpl $65535, %eax # imm = 0xFFFF +; X64-AVX1-NEXT: sete %al +; X64-AVX1-NEXT: retq +; +; X64-AVX2-LABEL: length32_eq: +; X64-AVX2: # %bb.0: +; X64-AVX2-NEXT: vmovdqu (%rdi), %ymm0 +; X64-AVX2-NEXT: vpcmpeqb (%rsi), %ymm0, %ymm0 +; X64-AVX2-NEXT: vpmovmskb %ymm0, %eax +; X64-AVX2-NEXT: cmpl $-1, %eax +; X64-AVX2-NEXT: sete %al +; X64-AVX2-NEXT: vzeroupper +; X64-AVX2-NEXT: retq +; X86-LABEL: @length32_eq( +; X86-NEXT: [[CALL:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 32) #2 +; X86-NEXT: [[CMP:%.*]] = icmp eq i32 [[CALL]], 0 +; X86-NEXT: ret i1 [[CMP]] +; +; X64-LABEL: @length32_eq( +; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i128* +; X64-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i128* +; X64-NEXT: [[TMP3:%.*]] = load i128, i128* [[TMP1]], align 8 +; X64-NEXT: [[TMP4:%.*]] = load i128, i128* [[TMP2]], align 8 +; X64-NEXT: [[TMP5:%.*]] = getelementptr i8, i8* [[X]], i64 16 +; X64-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to i128* +; X64-NEXT: [[TMP7:%.*]] = getelementptr i8, i8* [[Y]], i64 16 +; X64-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i128* +; X64-NEXT: [[TMP9:%.*]] = load i128, i128* [[TMP6]], align 8 +; X64-NEXT: [[TMP10:%.*]] = load i128, i128* [[TMP8]], align 8 +; X64-NEXT: [[TMP11:%.*]] = icmp eq i128 [[TMP3]], [[TMP4]] +; X64-NEXT: [[TMP12:%.*]] = icmp eq i128 [[TMP9]], [[TMP10]] +; X64-NEXT: [[CMP:%.*]] = and i1 [[TMP12]], [[TMP11]] +; X64-NEXT: ret i1 [[CMP]] +; + %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 32) nounwind + %cmp = icmp eq i32 %call, 0 + ret i1 %cmp +} + +define i1 @length32_eq_const(i8* %X) nounwind { +; X86-NOSSE-LABEL: length32_eq_const: +; X86-NOSSE: # %bb.0: +; X86-NOSSE-NEXT: pushl $0 +; X86-NOSSE-NEXT: pushl $32 +; X86-NOSSE-NEXT: pushl $.L.str +; X86-NOSSE-NEXT: pushl {{[0-9]+}}(%esp) +; X86-NOSSE-NEXT: calll memcmp +; X86-NOSSE-NEXT: addl $16, %esp +; X86-NOSSE-NEXT: testl %eax, %eax +; X86-NOSSE-NEXT: setne %al +; X86-NOSSE-NEXT: retl +; +; X86-SSE1-LABEL: length32_eq_const: +; X86-SSE1: # %bb.0: +; X86-SSE1-NEXT: pushl $0 +; X86-SSE1-NEXT: pushl $32 +; X86-SSE1-NEXT: pushl $.L.str +; X86-SSE1-NEXT: pushl {{[0-9]+}}(%esp) +; X86-SSE1-NEXT: calll memcmp +; X86-SSE1-NEXT: addl $16, %esp +; X86-SSE1-NEXT: testl %eax, %eax +; X86-SSE1-NEXT: setne %al +; X86-SSE1-NEXT: retl +; +; X86-SSE2-LABEL: length32_eq_const: +; X86-SSE2: # %bb.0: +; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-SSE2-NEXT: movdqu (%eax), %xmm0 +; X86-SSE2-NEXT: movdqu 16(%eax), %xmm1 +; X86-SSE2-NEXT: pcmpeqb {{\.LCPI.*}}, %xmm1 +; X86-SSE2-NEXT: pcmpeqb {{\.LCPI.*}}, %xmm0 +; X86-SSE2-NEXT: pand %xmm1, %xmm0 +; X86-SSE2-NEXT: pmovmskb %xmm0, %eax +; X86-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF +; X86-SSE2-NEXT: setne %al +; X86-SSE2-NEXT: retl +; +; X64-SSE2-LABEL: length32_eq_const: +; X64-SSE2: # %bb.0: +; X64-SSE2-NEXT: movdqu (%rdi), %xmm0 +; X64-SSE2-NEXT: movdqu 16(%rdi), %xmm1 +; X64-SSE2-NEXT: pcmpeqb {{.*}}(%rip), %xmm1 +; X64-SSE2-NEXT: pcmpeqb {{.*}}(%rip), %xmm0 +; X64-SSE2-NEXT: pand %xmm1, %xmm0 +; X64-SSE2-NEXT: pmovmskb %xmm0, %eax +; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF +; X64-SSE2-NEXT: setne %al +; X64-SSE2-NEXT: retq +; +; X64-AVX1-LABEL: length32_eq_const: +; X64-AVX1: # %bb.0: +; X64-AVX1-NEXT: vmovdqu (%rdi), %xmm0 +; X64-AVX1-NEXT: vmovdqu 16(%rdi), %xmm1 +; X64-AVX1-NEXT: vpcmpeqb {{.*}}(%rip), %xmm1, %xmm1 +; X64-AVX1-NEXT: vpcmpeqb {{.*}}(%rip), %xmm0, %xmm0 +; X64-AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0 +; X64-AVX1-NEXT: vpmovmskb %xmm0, %eax +; X64-AVX1-NEXT: cmpl $65535, %eax # imm = 0xFFFF +; X64-AVX1-NEXT: setne %al +; X64-AVX1-NEXT: retq +; +; X64-AVX2-LABEL: length32_eq_const: +; X64-AVX2: # %bb.0: +; X64-AVX2-NEXT: vmovdqu (%rdi), %ymm0 +; X64-AVX2-NEXT: vpcmpeqb {{.*}}(%rip), %ymm0, %ymm0 +; X64-AVX2-NEXT: vpmovmskb %ymm0, %eax +; X64-AVX2-NEXT: cmpl $-1, %eax +; X64-AVX2-NEXT: setne %al +; X64-AVX2-NEXT: vzeroupper +; X64-AVX2-NEXT: retq +; X86-LABEL: @length32_eq_const( +; X86-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i64 0, i64 0), i64 32) #2 +; X86-NEXT: [[C:%.*]] = icmp ne i32 [[M]], 0 +; X86-NEXT: ret i1 [[C]] +; +; X64-LABEL: @length32_eq_const( +; X64-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i128* +; X64-NEXT: [[TMP2:%.*]] = load i128, i128* [[TMP1]], align 8 +; X64-NEXT: [[TMP3:%.*]] = getelementptr i8, i8* [[X]], i64 16 +; X64-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to i128* +; X64-NEXT: [[TMP5:%.*]] = load i128, i128* [[TMP4]], align 8 +; X64-NEXT: [[TMP6:%.*]] = icmp ne i128 [[TMP2]], 70720121592765328381466889075544961328 +; X64-NEXT: [[TMP7:%.*]] = icmp ne i128 [[TMP5]], 65382562593882267225249597816672106294 +; X64-NEXT: [[TMP8:%.*]] = or i1 [[TMP6]], [[TMP7]] +; X64-NEXT: ret i1 [[TMP8]] +; + %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 32) nounwind + %c = icmp ne i32 %m, 0 + ret i1 %c +} + +define i32 @length64(i8* %X, i8* %Y) nounwind { +; ALL-LABEL: @length64( +; ALL-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 64) #2 +; ALL-NEXT: ret i32 [[M]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 64) nounwind + ret i32 %m +} + +define i1 @length64_eq(i8* %x, i8* %y) nounwind { +; X64-SSE2-LABEL: length64_eq: +; X64-SSE2: # %bb.0: +; X64-SSE2-NEXT: pushq %rax +; X64-SSE2-NEXT: movl $64, %edx +; X64-SSE2-NEXT: callq memcmp +; X64-SSE2-NEXT: testl %eax, %eax +; X64-SSE2-NEXT: setne %al +; X64-SSE2-NEXT: popq %rcx +; X64-SSE2-NEXT: retq +; X64-AVX1-LABEL: length64_eq: +; X64-AVX1: # %bb.0: +; X64-AVX1-NEXT: pushq %rax +; X64-AVX1-NEXT: movl $64, %edx +; X64-AVX1-NEXT: callq memcmp +; X64-AVX1-NEXT: testl %eax, %eax +; X64-AVX1-NEXT: setne %al +; X64-AVX1-NEXT: popq %rcx +; X64-AVX1-NEXT: retq +; X64-AVX2-LABEL: length64_eq: +; X64-AVX2: # %bb.0: +; X64-AVX2-NEXT: vmovdqu (%rdi), %ymm0 +; X64-AVX2-NEXT: vmovdqu 32(%rdi), %ymm1 +; X64-AVX2-NEXT: vpcmpeqb 32(%rsi), %ymm1, %ymm1 +; X64-AVX2-NEXT: vpcmpeqb (%rsi), %ymm0, %ymm0 +; X64-AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0 +; X64-AVX2-NEXT: vpmovmskb %ymm0, %eax +; X64-AVX2-NEXT: cmpl $-1, %eax +; X64-AVX2-NEXT: setne %al +; X64-AVX2-NEXT: vzeroupper +; X64-AVX2-NEXT: retq +; ALL-LABEL: @length64_eq( +; ALL-NEXT: [[CALL:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 64) #2 +; ALL-NEXT: [[CMP:%.*]] = icmp ne i32 [[CALL]], 0 +; ALL-NEXT: ret i1 [[CMP]] +; + %call = tail call i32 @memcmp(i8* %x, i8* %y, i64 64) nounwind + %cmp = icmp ne i32 %call, 0 + ret i1 %cmp +} + +define i1 @length64_eq_const(i8* %X) nounwind { +; X64-SSE2-LABEL: length64_eq_const: +; X64-SSE2: # %bb.0: +; X64-SSE2-NEXT: pushq %rax +; X64-SSE2-NEXT: movl $.L.str, %esi +; X64-SSE2-NEXT: movl $64, %edx +; X64-SSE2-NEXT: callq memcmp +; X64-SSE2-NEXT: testl %eax, %eax +; X64-SSE2-NEXT: sete %al +; X64-SSE2-NEXT: popq %rcx +; X64-SSE2-NEXT: retq +; X64-AVX1-LABEL: length64_eq_const: +; X64-AVX1: # %bb.0: +; X64-AVX1-NEXT: pushq %rax +; X64-AVX1-NEXT: movl $.L.str, %esi +; X64-AVX1-NEXT: movl $64, %edx +; X64-AVX1-NEXT: callq memcmp +; X64-AVX1-NEXT: testl %eax, %eax +; X64-AVX1-NEXT: sete %al +; X64-AVX1-NEXT: popq %rcx +; X64-AVX1-NEXT: retq +; X64-AVX2-LABEL: length64_eq_const: +; X64-AVX2: # %bb.0: +; X64-AVX2-NEXT: vmovdqu (%rdi), %ymm0 +; X64-AVX2-NEXT: vmovdqu 32(%rdi), %ymm1 +; X64-AVX2-NEXT: vpcmpeqb {{.*}}(%rip), %ymm0, %ymm0 +; X64-AVX2-NEXT: vpcmpeqb {{.*}}(%rip), %ymm1, %ymm1 +; X64-AVX2-NEXT: vpand %ymm0, %ymm1, %ymm0 +; X64-AVX2-NEXT: vpmovmskb %ymm0, %eax +; X64-AVX2-NEXT: cmpl $-1, %eax +; X64-AVX2-NEXT: sete %al +; X64-AVX2-NEXT: vzeroupper +; X64-AVX2-NEXT: retq +; ALL-LABEL: @length64_eq_const( +; ALL-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i64 0, i64 0), i64 64) #2 +; ALL-NEXT: [[C:%.*]] = icmp eq i32 [[M]], 0 +; ALL-NEXT: ret i1 [[C]] +; + %m = tail call i32 @memcmp(i8* %X, i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str, i32 0, i32 0), i64 64) nounwind + %c = icmp eq i32 %m, 0 + ret i1 %c +} + +; This checks that we do not do stupid things with huge sizes. +define i32 @huge_length(i8* %X, i8* %Y) nounwind { +; ALL-LABEL: @huge_length( +; ALL-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 9223372036854775807) #2 +; ALL-NEXT: ret i32 [[M]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 9223372036854775807) nounwind + ret i32 %m +} + +define i1 @huge_length_eq(i8* %X, i8* %Y) nounwind { +; ALL-LABEL: @huge_length_eq( +; ALL-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 9223372036854775807) #2 +; ALL-NEXT: [[C:%.*]] = icmp eq i32 [[M]], 0 +; ALL-NEXT: ret i1 [[C]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 9223372036854775807) nounwind + %c = icmp eq i32 %m, 0 + ret i1 %c +} + +; This checks non-constant sizes. +define i32 @nonconst_length(i8* %X, i8* %Y, i64 %size) nounwind { +; ALL-LABEL: @nonconst_length( +; ALL-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 [[SIZE:%.*]]) #2 +; ALL-NEXT: ret i32 [[M]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 %size) nounwind + ret i32 %m +} + +define i1 @nonconst_length_eq(i8* %X, i8* %Y, i64 %size) nounwind { +; ALL-LABEL: @nonconst_length_eq( +; ALL-NEXT: [[M:%.*]] = tail call i32 @memcmp(i8* [[X:%.*]], i8* [[Y:%.*]], i64 [[SIZE:%.*]]) #2 +; ALL-NEXT: [[C:%.*]] = icmp eq i32 [[M]], 0 +; ALL-NEXT: ret i1 [[C]] +; + %m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 %size) nounwind + %c = icmp eq i32 %m, 0 + ret i1 %c +} + +define i1 @bcmp_length2(i8* %X, i8* %Y) nounwind { +; ALL-LABEL: @bcmp_length2( +; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* [[X:%.*]] to i16* +; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* [[Y:%.*]] to i16* +; ALL-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]], align 2 +; ALL-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP2]], align 2 +; ALL-NEXT: [[TMP5:%.*]] = icmp eq i16 [[TMP3]], [[TMP4]] +; ALL-NEXT: ret i1 [[TMP5]] +; + %m = tail call i32 @bcmp(i8* %X, i8* %Y, i64 2) nounwind + %c = icmp eq i32 %m, 0 + ret i1 %c +} + diff --git a/llvm/test/Transforms/PhaseOrdering/X86/pr36421.ll b/llvm/test/Transforms/PhaseOrdering/X86/pr36421.ll new file mode 100644 --- /dev/null +++ b/llvm/test/Transforms/PhaseOrdering/X86/pr36421.ll @@ -0,0 +1,68 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -O2 -S | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-unknown-unknown" + +@.str = private unnamed_addr constant [7 x i8] c"abcdef\00", align 1 +@.str.1 = private unnamed_addr constant [7 x i8] c"ABCDEF\00", align 1 + +define i32 @test(i8* nocapture readonly %string, i32 %len) local_unnamed_addr #0 { +; CHECK-LABEL: @test( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[LEN:%.*]], 6 +; CHECK-NEXT: br i1 [[COND]], label [[SW_BB:%.*]], label [[RETURN:%.*]] +; CHECK: sw.bb: +; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[STRING:%.*]] to i32* +; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 +; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[STRING]], i64 4 +; CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i16* +; CHECK-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 2 +; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP1]], 1684234849 +; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i16 [[TMP4]], 26213 +; CHECK-NEXT: [[CMP:%.*]] = and i1 [[TMP6]], [[TMP5]] +; CHECK-NEXT: br i1 [[CMP]], label [[RETURN]], label [[IF_END:%.*]] +; CHECK: if.end: +; CHECK-NEXT: [[TMP7:%.*]] = xor i32 [[TMP1]], 1145258561 +; CHECK-NEXT: [[TMP8:%.*]] = xor i16 [[TMP4]], 17989 +; CHECK-NEXT: [[TMP9:%.*]] = zext i16 [[TMP8]] to i32 +; CHECK-NEXT: [[TMP10:%.*]] = or i32 [[TMP7]], [[TMP9]] +; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i32 [[TMP10]], 0 +; CHECK-NEXT: [[DOT:%.*]] = select i1 [[TMP11]], i32 64, i32 0 +; CHECK-NEXT: br label [[RETURN]] +; CHECK: return: +; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ 61, [[SW_BB]] ], [ [[DOT]], [[IF_END]] ], [ 0, [[ENTRY:%.*]] ] +; CHECK-NEXT: ret i32 [[RETVAL_0]] +; +entry: + %cond = icmp eq i32 %len, 6 + br i1 %cond, label %sw.bb, label %return + +sw.bb: ; preds = %entry + %call = tail call i32 @memcmp(i8* %string, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i64 6) + %cmp = icmp eq i32 %call, 0 + br i1 %cmp, label %return, label %if.end + +if.end: ; preds = %sw.bb + %call1 = tail call i32 @memcmp(i8* %string, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i64 6) + %cmp2 = icmp eq i32 %call1, 0 + %. = select i1 %cmp2, i32 64, i32 0 + br label %return + +return: ; preds = %entry, %if.end8, %if.end4, %if.end, %sw.bb + %retval.0 = phi i32 [ 61, %sw.bb ], [ %., %if.end ], [ 0, %entry ] + ret i32 %retval.0 +} + +; Function Attrs: nounwind readonly +declare i32 @memcmp(i8* nocapture, i8* nocapture, i64) local_unnamed_addr #1 + +attributes #0 = { nounwind readonly ssp uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="penryn" "target-features"="+cx16,+fxsr,+mmx,+sse,+sse2,+sse3,+sse4.1,+ssse3,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind readonly "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="penryn" "target-features"="+cx16,+fxsr,+mmx,+sse,+sse2,+sse3,+sse4.1,+ssse3,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } + +!llvm.module.flags = !{!0, !1} +!llvm.ident = !{!2} + +!0 = !{i32 1, !"wchar_size", i32 4} +!1 = !{i32 7, !"PIC Level", i32 2} +!2 = !{!"clang version 7.0.0 (trunk 325350)"} diff --git a/llvm/tools/opt/opt.cpp b/llvm/tools/opt/opt.cpp --- a/llvm/tools/opt/opt.cpp +++ b/llvm/tools/opt/opt.cpp @@ -508,7 +508,6 @@ initializeTarget(Registry); // For codegen passes, only passes that do IR to IR transformation are // supported. - initializeExpandMemCmpPassPass(Registry); initializeScalarizeMaskedMemIntrinPass(Registry); initializeCodeGenPreparePass(Registry); initializeAtomicExpandPass(Registry); diff --git a/llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn --- a/llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn @@ -40,7 +40,6 @@ "EdgeBundles.cpp", "ExecutionDomainFix.cpp", "ExpandISelPseudos.cpp", - "ExpandMemCmp.cpp", "ExpandPostRAPseudos.cpp", "ExpandReductions.cpp", "FEntryInserter.cpp", diff --git a/llvm/utils/gn/secondary/llvm/lib/Transforms/Scalar/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Transforms/Scalar/BUILD.gn --- a/llvm/utils/gn/secondary/llvm/lib/Transforms/Scalar/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Transforms/Scalar/BUILD.gn @@ -21,6 +21,7 @@ "DeadStoreElimination.cpp", "DivRemPairs.cpp", "EarlyCSE.cpp", + "ExpandMemCmp.cpp", "FlattenCFGPass.cpp", "Float2Int.cpp", "GVN.cpp",