Index: llvm/lib/Target/PowerPC/PPC.h =================================================================== --- llvm/lib/Target/PowerPC/PPC.h +++ llvm/lib/Target/PowerPC/PPC.h @@ -56,12 +56,26 @@ MCOperand &OutMO, AsmPrinter &AP, bool isDarwin); + void initializePPCCTRLoopsPass(PassRegistry&); +#ifndef NDEBUG + void initializePPCCTRLoopsVerifyPass(PassRegistry&); +#endif + void initializePPCLoopPreIncPrepPass(PassRegistry&); + void initializePPCTOCRegDepsPass(PassRegistry&); + void initializePPCEarlyReturnPass(PassRegistry&); + void initializePPCVSXCopyPass(PassRegistry&); void initializePPCVSXFMAMutatePass(PassRegistry&); + void initializePPCVSXSwapRemovalPass(PassRegistry&); + void initializePPCReduceCRLogicalsPass(PassRegistry&); + void initializePPCBSelPass(PassRegistry&); + void initializePPCBranchCoalescingPass(PassRegistry&); + void initializePPCQPXLoadSplatPass(PassRegistry&); void initializePPCBoolRetToIntPass(PassRegistry&); void initializePPCExpandISELPass(PassRegistry &); void initializePPCPreEmitPeepholePass(PassRegistry &); void initializePPCTLSDynamicCallPass(PassRegistry &); void initializePPCMIPeepholePass(PassRegistry&); + extern char &PPCVSXFMAMutateID; namespace PPCII { Index: llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp =================================================================== --- llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp +++ llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp @@ -33,10 +33,6 @@ STATISTIC(NumPHINotMoved, "Number of PHI Nodes that cannot be merged"); STATISTIC(NumBlocksNotCoalesced, "Number of blocks not coalesced"); -namespace llvm { - void initializePPCBranchCoalescingPass(PassRegistry&); -} - //===----------------------------------------------------------------------===// // PPCBranchCoalescing //===----------------------------------------------------------------------===// Index: llvm/lib/Target/PowerPC/PPCBranchSelector.cpp =================================================================== --- llvm/lib/Target/PowerPC/PPCBranchSelector.cpp +++ llvm/lib/Target/PowerPC/PPCBranchSelector.cpp @@ -32,10 +32,6 @@ STATISTIC(NumExpanded, "Number of branches expanded to long format"); -namespace llvm { - void initializePPCBSelPass(PassRegistry&); -} - namespace { struct PPCBSel : public MachineFunctionPass { static char ID; Index: llvm/lib/Target/PowerPC/PPCCTRLoops.cpp =================================================================== --- llvm/lib/Target/PowerPC/PPCCTRLoops.cpp +++ llvm/lib/Target/PowerPC/PPCCTRLoops.cpp @@ -80,13 +80,6 @@ STATISTIC(NumCTRLoops, "Number of loops converted to CTR loops"); -namespace llvm { - void initializePPCCTRLoopsPass(PassRegistry&); -#ifndef NDEBUG - void initializePPCCTRLoopsVerifyPass(PassRegistry&); -#endif -} - namespace { struct PPCCTRLoops : public FunctionPass { Index: llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp =================================================================== --- llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp +++ llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp @@ -36,10 +36,6 @@ STATISTIC(NumBCLR, "Number of early conditional returns"); STATISTIC(NumBLR, "Number of early returns"); -namespace llvm { - void initializePPCEarlyReturnPass(PassRegistry&); -} - namespace { // PPCEarlyReturn pass - For simple functions without epilogue code, move // returns up, and create conditional returns, to avoid unnecessary Index: llvm/lib/Target/PowerPC/PPCLoopPreIncPrep.cpp =================================================================== --- llvm/lib/Target/PowerPC/PPCLoopPreIncPrep.cpp +++ llvm/lib/Target/PowerPC/PPCLoopPreIncPrep.cpp @@ -64,12 +64,6 @@ STATISTIC(PHINodeAlreadyExists, "PHI node already in pre-increment form"); -namespace llvm { - - void initializePPCLoopPreIncPrepPass(PassRegistry&); - -} // end namespace llvm - namespace { class PPCLoopPreIncPrep : public FunctionPass { Index: llvm/lib/Target/PowerPC/PPCQPXLoadSplat.cpp =================================================================== --- llvm/lib/Target/PowerPC/PPCQPXLoadSplat.cpp +++ llvm/lib/Target/PowerPC/PPCQPXLoadSplat.cpp @@ -30,10 +30,6 @@ STATISTIC(NumSimplified, "Number of QPX load splats simplified"); -namespace llvm { - void initializePPCQPXLoadSplatPass(PassRegistry&); -} - namespace { struct PPCQPXLoadSplat : public MachineFunctionPass { static char ID; Index: llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp =================================================================== --- llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp +++ llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp @@ -48,10 +48,6 @@ STATISTIC(NumNotSplitWrongOpcode, "Number of blocks not split due to the wrong opcode."); -namespace llvm { - void initializePPCReduceCRLogicalsPass(PassRegistry&); -} - /// Given a basic block \p Successor that potentially contains PHIs, this /// function will look for any incoming values in the PHIs that are supposed to /// be coming from \p OrigMBB but whose definition is actually in \p NewMBB. Index: llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp =================================================================== --- llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp +++ llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp @@ -34,10 +34,6 @@ #define DEBUG_TYPE "ppc-tls-dynamic-call" -namespace llvm { - void initializePPCTLSDynamicCallPass(PassRegistry&); -} - namespace { struct PPCTLSDynamicCall : public MachineFunctionPass { static char ID; Index: llvm/lib/Target/PowerPC/PPCTOCRegDeps.cpp =================================================================== --- llvm/lib/Target/PowerPC/PPCTOCRegDeps.cpp +++ llvm/lib/Target/PowerPC/PPCTOCRegDeps.cpp @@ -82,10 +82,6 @@ #define DEBUG_TYPE "ppc-toc-reg-deps" -namespace llvm { - void initializePPCTOCRegDepsPass(PassRegistry&); -} - namespace { // PPCTOCRegDeps pass - For simple functions without epilogue code, move // returns up, and create conditional returns, to avoid unnecessary Index: llvm/lib/Target/PowerPC/PPCTargetMachine.cpp =================================================================== --- llvm/lib/Target/PowerPC/PPCTargetMachine.cpp +++ llvm/lib/Target/PowerPC/PPCTargetMachine.cpp @@ -100,6 +100,20 @@ RegisterTargetMachine C(getThePPC64LETarget()); PassRegistry &PR = *PassRegistry::getPassRegistry(); + initializePPCCTRLoopsPass(PR); +#ifndef NDEBUG + initializePPCCTRLoopsVerifyPass(PR); +#endif + initializePPCLoopPreIncPrepPass(PR); + initializePPCTOCRegDepsPass(PR); + initializePPCEarlyReturnPass(PR); + initializePPCVSXCopyPass(PR); + initializePPCVSXFMAMutatePass(PR); + initializePPCVSXSwapRemovalPass(PR); + initializePPCReduceCRLogicalsPass(PR); + initializePPCBSelPass(PR); + initializePPCBranchCoalescingPass(PR); + initializePPCQPXLoadSplatPass(PR); initializePPCBoolRetToIntPass(PR); initializePPCExpandISELPass(PR); initializePPCPreEmitPeepholePass(PR); Index: llvm/lib/Target/PowerPC/PPCVSXCopy.cpp =================================================================== --- llvm/lib/Target/PowerPC/PPCVSXCopy.cpp +++ llvm/lib/Target/PowerPC/PPCVSXCopy.cpp @@ -36,10 +36,6 @@ #define DEBUG_TYPE "ppc-vsx-copy" -namespace llvm { - void initializePPCVSXCopyPass(PassRegistry&); -} - namespace { // PPCVSXCopy pass - For copies between VSX registers and non-VSX registers // (Altivec and scalar floating-point registers), we need to transform the Index: llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp =================================================================== --- llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp +++ llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp @@ -59,10 +59,6 @@ #define DEBUG_TYPE "ppc-vsx-swaps" -namespace llvm { - void initializePPCVSXSwapRemovalPass(PassRegistry&); -} - namespace { // A PPCVSXSwapEntry is created for each machine instruction that Index: llvm/test/CodeGen/PowerPC/ppc-passname-assert.ll =================================================================== --- /dev/null +++ llvm/test/CodeGen/PowerPC/ppc-passname-assert.ll @@ -0,0 +1,12 @@ +; REQUIRES: asserts + +; Test pass name: ppc-ctr-loops-verify. +; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-before=ppc-ctr-loops-verify -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-BEFORE-CTR-LOOPS-VERIFY +; STOP-BEFORE-CTR-LOOPS-VERIFY-NOT: -ppc-ctr-loops-verify +; STOP-BEFORE-CTR-LOOPS-VERIFY-NOT: "ppc-ctr-loops-verify" pass is not registered. +; STOP-BEFORE-CTR-LOOPS-VERIFY-NOT: PowerPC CTR Loops Verify + +; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-after=ppc-ctr-loops-verify -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-AFTER-CTR-LOOPS-VERIFY +; STOP-AFTER-CTR-LOOPS-VERIFY: -ppc-ctr-loops-verify +; STOP-AFTER-CTR-LOOPS-VERIFY-NOT: "ppc-ctr-loops-verify" pass is not registered. +; STOP-AFTER-CTR-LOOPS-VERIFY: PowerPC CTR Loops Verify Index: llvm/test/CodeGen/PowerPC/ppc-passname.ll =================================================================== --- /dev/null +++ llvm/test/CodeGen/PowerPC/ppc-passname.ll @@ -0,0 +1,130 @@ +; Test pass name: ppc-ctr-loops. +; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-before=ppc-ctr-loops -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-BEFORE-CTR-LOOPS +; STOP-BEFORE-CTR-LOOPS-NOT: -ppc-ctr-loops +; STOP-BEFORE-CTR-LOOPS-NOT: "ppc-ctr-loops" pass is not registered. +; STOP-BEFORE-CTR-LOOPS-NOT: PowerPC CTR Loops + +; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-after=ppc-ctr-loops -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-AFTER-CTR-LOOPS +; STOP-AFTER-CTR-LOOPS: -ppc-ctr-loops +; STOP-AFTER-CTR-LOOPS-NOT: "ppc-ctr-loops" pass is not registered. +; STOP-AFTER-CTR-LOOPS: PowerPC CTR Loops + + +; Test pass name: ppc-loop-preinc-prep. +; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-before=ppc-loop-preinc-prep -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-BEFORE-LOOP-PREINC-PREP +; STOP-BEFORE-LOOP-PREINC-PREP-NOT: -ppc-loop-preinc-prep +; STOP-BEFORE-LOOP-PREINC-PREP-NOT: "ppc-loop-preinc-prep" pass is not registered. +; STOP-BEFORE-LOOP-PREINC-PREP-NOT: Prepare loop for pre-inc. addressing modes + +; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-after=ppc-loop-preinc-prep -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-AFTER-LOOP-PREINC-PREP +; STOP-AFTER-LOOP-PREINC-PREP: -ppc-loop-preinc-prep +; STOP-AFTER-LOOP-PREINC-PREP-NOT: "ppc-loop-preinc-prep" pass is not registered. +; STOP-AFTER-LOOP-PREINC-PREP: Prepare loop for pre-inc. addressing modes + + +; Test pass name: ppc-toc-reg-deps. +; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-before=ppc-toc-reg-deps -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-BEFORE-TOC-REG-DEPS +; STOP-BEFORE-TOC-REG-DEPS-NOT: -ppc-toc-reg-deps +; STOP-BEFORE-TOC-REG-DEPS-NOT: "ppc-toc-reg-deps" pass is not registered. +; STOP-BEFORE-TOC-REG-DEPS-NOT: PowerPC TOC Register Dependencies + +; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-after=ppc-toc-reg-deps -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-AFTER-TOC-REG-DEPS +; STOP-AFTER-TOC-REG-DEPS: -ppc-toc-reg-deps +; STOP-AFTER-TOC-REG-DEPS-NOT: "ppc-toc-reg-deps" pass is not registered. +; STOP-AFTER-TOC-REG-DEPS: PowerPC TOC Register Dependencies + + +; Test pass name: ppc-vsx-copy. +; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-before=ppc-vsx-copy -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-BEFORE-VSX-COPY +; STOP-BEFORE-VSX-COPY-NOT: -ppc-vsx-copy +; STOP-BEFORE-VSX-COPY-NOT: "ppc-vsx-copy" pass is not registered. +; STOP-BEFORE-VSX-COPY-NOT: PowerPC VSX Copy Legalization + +; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-after=ppc-vsx-copy -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-AFTER-VSX-COPY +; STOP-AFTER-VSX-COPY: -ppc-vsx-copy +; STOP-AFTER-VSX-COPY-NOT: "ppc-vsx-copy" pass is not registered. +; STOP-AFTER-VSX-COPY: PowerPC VSX Copy Legalization + + +; Test pass name: ppc-early-ret. +; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-before=ppc-early-ret -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-BEFORE-EARLY-RET +; STOP-BEFORE-EARLY-RET-NOT: -ppc-early-ret +; STOP-BEFORE-EARLY-RET-NOT: "ppc-early-ret" pass is not registered. +; STOP-BEFORE-EARLY-RET-NOT: PowerPC Early-Return Creation + +; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-after=ppc-early-ret -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-AFTER-EARLY-RET +; STOP-AFTER-EARLY-RET: -ppc-early-ret +; STOP-AFTER-ERALY-RET-NOT: "ppc-early-ret" pass is not registered. +; STOP-AFTER-EARLY-RET: PowerPC Early-Return Creation + + +; Test pass name: ppc-vsx-fma-mutate. +; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-before=ppc-vsx-fma-mutate -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-BEFORE-VSX-FMA-MUTATE +; STOP-BEFORE-VSX-FMA-MUTATE-NOT: -ppc-vsx-fma-mutate +; STOP-BEFORE-VSX-FMA-MUTATE-NOT: "ppc-vsx-fma-mutate" pass is not registered. +; STOP-BEFORE-VSX-FMA-MUTATE-NOT: PowerPC VSX FMA Mutation + +; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-after=ppc-vsx-fma-mutate -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-AFTER-VSX-FMA-MUTATE +; STOP-AFTER-VSX-FMA-MUTATE: -ppc-vsx-fma-mutate +; STOP-AFTER-VSX-FMA-MUTATE-NOT: "ppc-vsx-fma-mutate" pass is not registered. +; STOP-AFTER-VSX-FMA-MUTATE: PowerPC VSX FMA Mutation + + +; Test pass name: ppc-vsx-swaps. +; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-before=ppc-vsx-swaps -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-BEFORE-VSX-SWAPS +; STOP-BEFORE-VSX-SWAPS-NOT: -ppc-vsx-swaps +; STOP-BEFORE-VSX-SWAPS-NOT: "ppc-vsx-swaps" pass is not registered. +; STOP-BEFORE-VSX-SWAPS-NOT: PowerPC VSX Swap Removal + +; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-after=ppc-vsx-swaps -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-AFTER-VSX-SWAPS +; STOP-AFTER-VSX-SWAPS: -ppc-vsx-swaps +; STOP-AFTER-VSX-SWAPS-NOT: "ppc-vsx-swaps" pass is not registered. +; STOP-AFTER-VSX-SWAPS: PowerPC VSX Swap Removal + + +; Test pass name: ppc-reduce-cr-ops. +; RUN: llc -ppc-reduce-cr-logicals -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-before=ppc-reduce-cr-ops -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-BEFORE-REDUCE-CR-OPS +; STOP-BEFORE-REDUCE-CR-OPS-NOT: -ppc-reduce-cr-ops +; STOP-BEFORE-REDUCE-CR-OPS-NOT: "ppc-reduce-cr-ops" pass is not registered. +; STOP-BEFORE-REDUCE-CR-OPS-NOT: PowerPC Reduce CR logical Operation + +; RUN: llc -ppc-reduce-cr-logicals -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-after=ppc-reduce-cr-ops -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-AFTER-REDUCE-CR-OPS +; STOP-AFTER-REDUCE-CR-OPS: -ppc-reduce-cr-ops +; STOP-AFTER-REDUCE-CR-OPS-NOT: "ppc-reduce-cr-ops" pass is not registered. +; STOP-AFTER-REDUCE-CR-OPS: PowerPC Reduce CR logical Operation + + +; Test pass name: ppc-branch-select. +; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-before=ppc-branch-select -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-BEFORE-BRANCH-SELECT +; STOP-BEFORE-BRANCH-SELECT-NOT: -ppc-branch-select +; STOP-BEFORE-BRANCH-SELECT-NOT: "ppc-branch-select" pass is not registered. +; STOP-BEFORE-BRANCH-SELECT-NOT: PowerPC Branch Selector + +; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-after=ppc-branch-select -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-AFTER-BRANCH-SELECT +; STOP-AFTER-BRANCH-SELECT: -ppc-branch-select +; STOP-AFTER-BRANCH-SELECT-NOT: "ppc-branch-select" pass is not registered. +; STOP-AFTER-BRANCH-SELECT: PowerPC Branch Selector + + +; Test pass name: ppc-branch-coalescing. +; RUN: llc -enable-ppc-branch-coalesce -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-before=ppc-branch-coalescing -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-BEFORE-BRANCH-COALESCING +; STOP-BEFORE-BRANCH-COALESCING-NOT: -ppc-branch-coalescing +; STOP-BEFORE-BRANCH-COALESCING-NOT: "ppc-branch-coalescing" pass is not registered. +; STOP-BEFORE-BRANCH-COALESCING-NOT: Branch Coalescing + +; RUN: llc -enable-ppc-branch-coalesce -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-after=ppc-branch-coalescing -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-AFTER-BRANCH-COALESCING +; STOP-AFTER-BRANCH-COALESCING: -ppc-branch-coalescing +; STOP-AFTER-BRANCH-COALESCING-NOT: "ppc-branch-coalescing" pass is not registered. +; STOP-AFTER-BRANCH-COALESCING: Branch Coalescing + + +; Test pass name: ppc-qpx-load-splat. +; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-before=ppc-qpx-load-splat -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-BEFORE-QPX-LOAD-SPLAT +; STOP-BEFORE-QPX-LOAD-SPLAT-NOT: -ppc-qpx-load-splat +; STOP-BEFORE-QPX-LOAD-SPLAT-NOT: "ppc-qpx-load-splat" pass is not registered. +; STOP-BEFORE-QPX-LOAD-SPLAT-NOT: PowerPC QPX Load Splat Simplification + +; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-after=ppc-qpx-load-splat -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-AFTER-QPX-LOAD-SPLAT +; STOP-AFTER-QPX-LOAD-SPLAT: -ppc-qpx-load-splat +; STOP-AFTER-QPX-LOAD-SPLAT-NOT: "ppc-qpx-load-splat" pass is not registered. +; STOP-AFTER-QPX-LOAD-SPLAT: PowerPC QPX Load Splat Simplification