Index: lib/CodeGen/SelectionDAG/TargetLowering.cpp =================================================================== --- lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -3561,7 +3561,16 @@ return; } else if ((C = dyn_cast(Op)) && ConstraintLetter != 's') { - Ops.push_back(DAG.getTargetConstant(Offset + C->getSExtValue(), + // gcc prints these as sign extended. Sign extend value to 64 bits + // now; without this it would get ZExt'd later in + // ScheduleDAGSDNodes::EmitNode, which is very generic. + bool IsBool = C->getConstantIntValue()->getBitWidth() == 1; + BooleanContent BCont = getBooleanContents(MVT::i64); + ISD::NodeType ExtOpc = IsBool ? getExtendForContent(BCont) + : ISD::SIGN_EXTEND; + int64_t ExtVal = ExtOpc == ISD::ZERO_EXTEND ? C->getZExtValue() + : C->getSExtValue(); + Ops.push_back(DAG.getTargetConstant(Offset + ExtVal, SDLoc(C), MVT::i64)); return; } else { Index: test/CodeGen/AArch64/inline-asm-i-constraint-i1.ll =================================================================== --- /dev/null +++ test/CodeGen/AArch64/inline-asm-i-constraint-i1.ll @@ -0,0 +1,14 @@ +; RUN: llc -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s + +; Make sure that boolean immediates are properly (zero) extended. +; CHECK: TEST 42 + 1 - . + +target triple = "aarch64-unknown-linux-gnu" + +define i32 @foo() #0 { +entry: + tail call void asm sideeffect "#TEST 42 + ${0:c} - .\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i1 true) #0 + ret i32 1 +} + +attributes #0 = { nounwind } Index: test/CodeGen/ARM/inline-asm-i-constraint-i1.ll =================================================================== --- /dev/null +++ test/CodeGen/ARM/inline-asm-i-constraint-i1.ll @@ -0,0 +1,14 @@ +; RUN: llc -mtriple=armv7-unknown-linux-gnueabi < %s | FileCheck %s + +; Make sure that boolean immediates are properly (zero) extended. +; CHECK: TEST 42 + 1 - . + +target triple = "armv7-unknown-linux-gnueabi" + +define i32 @foo() #0 { +entry: + tail call void asm sideeffect "#TEST 42 + ${0:c} - .\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i1 true) #0 + ret i32 1 +} + +attributes #0 = { nounwind } Index: test/CodeGen/Mips/inline-asm-i-constraint-i1.ll =================================================================== --- /dev/null +++ test/CodeGen/Mips/inline-asm-i-constraint-i1.ll @@ -0,0 +1,14 @@ +; RUN: llc -mtriple=mips64el-unknown-linux-gnu < %s | FileCheck %s + +; Make sure that boolean immediates are properly (zero) extended. +; CHECK: TEST 42 + 1 - . + +target triple = "mips64el-unknown-linux-gnu" + +define i32 @foo() #0 { +entry: + tail call void asm sideeffect "#TEST 42 + ${0:c} - .\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i1 true) #0 + ret i32 1 +} + +attributes #0 = { nounwind } Index: test/CodeGen/PowerPC/inline-asm-i-constraint-i1.ll =================================================================== --- /dev/null +++ test/CodeGen/PowerPC/inline-asm-i-constraint-i1.ll @@ -0,0 +1,14 @@ +; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s + +; Make sure that boolean immediates are properly (zero) extended. +; CHECK: TEST 42 + 1 - . + +target triple = "powerpc64le-unknown-linux-gnu" + +define i32 @foo() #0 { +entry: + tail call void asm sideeffect "#TEST 42 + ${0:c} - .\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i1 true) #0 + ret i32 1 +} + +attributes #0 = { nounwind } Index: test/CodeGen/RISCV/inline-asm-i-constraint-i1.ll =================================================================== --- /dev/null +++ test/CodeGen/RISCV/inline-asm-i-constraint-i1.ll @@ -0,0 +1,14 @@ +; RUN: llc -mtriple=riscv64-unknown-linux-gnu < %s | FileCheck %s + +; Make sure that boolean immediates are properly (zero) extended. +; CHECK: TEST 42 + 1 - . + +target triple = "riscv64-unknown-linux-gnu" + +define i32 @foo() #0 { +entry: + tail call void asm sideeffect "#TEST 42 + ${0:c} - .\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i1 true) #0 + ret i32 1 +} + +attributes #0 = { nounwind } Index: test/CodeGen/SPARC/inline-asm-i-constraint-i1.ll =================================================================== --- /dev/null +++ test/CodeGen/SPARC/inline-asm-i-constraint-i1.ll @@ -0,0 +1,14 @@ +; RUN: llc -mtriple=sparc64-unknown-linux-gnu < %s | FileCheck %s + +; Make sure that boolean immediates are properly (zero) extended. +; CHECK: TEST 42 + 1 - . + +target triple = "sparc64-unknown-linux-gnu" + +define i32 @foo() #0 { +entry: + tail call void asm sideeffect "#TEST 42 + ${0:c} - .\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i1 true) #0 + ret i32 1 +} + +attributes #0 = { nounwind } Index: test/CodeGen/SystemZ/inline-asm-i-constraint-i1.ll =================================================================== --- /dev/null +++ test/CodeGen/SystemZ/inline-asm-i-constraint-i1.ll @@ -0,0 +1,14 @@ +; RUN: llc -mtriple=s390x-linux-gnu < %s | FileCheck %s + +; Make sure that boolean immediates are properly (zero) extended. +; CHECK: TEST 42 + 1 - . + +target triple = "s390x-linux-gnu" + +define i32 @foo() #0 { +entry: + tail call void asm sideeffect "#TEST 42 + ${0:c} - .\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i1 true) #0 + ret i32 1 +} + +attributes #0 = { nounwind } Index: test/CodeGen/Thumb/inline-asm-i-constraint-i1.ll =================================================================== --- /dev/null +++ test/CodeGen/Thumb/inline-asm-i-constraint-i1.ll @@ -0,0 +1,14 @@ +; RUN: llc -mtriple=thumbv7-linux-gnueabi < %s | FileCheck %s + +; Make sure that boolean immediates are properly (zero) extended. +; CHECK: TEST 42 + 1 - . + +target triple = "thumbv7-linux-gnueabi" + +define i32 @foo() #0 { +entry: + tail call void asm sideeffect "#TEST 42 + ${0:c} - .\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i1 true) #0 + ret i32 1 +} + +attributes #0 = { nounwind } Index: test/CodeGen/Thumb2/inline-asm-i-constraint-i1.ll =================================================================== --- /dev/null +++ test/CodeGen/Thumb2/inline-asm-i-constraint-i1.ll @@ -0,0 +1,14 @@ +; RUN: llc -mtriple=thumbv8-none-linux-gnueabi < %s | FileCheck %s + +; Make sure that boolean immediates are properly (zero) extended. +; CHECK: TEST 42 + 1 - . + +target triple = "thumbv8-none-linux-gnueabi" + +define i32 @foo() #0 { +entry: + tail call void asm sideeffect "#TEST 42 + ${0:c} - .\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i1 true) #0 + ret i32 1 +} + +attributes #0 = { nounwind }