Index: llvm/trunk/lib/Target/AArch64/AArch64InstrFormats.td =================================================================== --- llvm/trunk/lib/Target/AArch64/AArch64InstrFormats.td +++ llvm/trunk/lib/Target/AArch64/AArch64InstrFormats.td @@ -4034,8 +4034,9 @@ } class MemTagLoad - : BaseMemTag<0b01, 0b00, asm_insn, asm_opnds, "", (outs GPR64:$Rt), - (ins GPR64sp:$Rn, simm9s16:$offset)> { + : BaseMemTag<0b01, 0b00, asm_insn, asm_opnds, "$Rt = $wback", + (outs GPR64:$wback), + (ins GPR64:$Rt, GPR64sp:$Rn, simm9s16:$offset)> { bits<5> Rt; bits<9> offset; @@ -4052,29 +4053,28 @@ bits<9> offset; let Inst{20-12} = offset; - let Inst{4-0} = 0b11111; - let Unpredictable{4-0} = 0b11111; + let Inst{4-0} = Rt; let mayStore = 1; } multiclass MemTagStore opc1, string insn> { def Offset : - BaseMemTagStore; + BaseMemTagStore; def PreIndex : - BaseMemTagStore; + (ins GPR64sp:$Rt, GPR64sp:$Rn, simm9s16:$offset)>; def PostIndex : - BaseMemTagStore; + (ins GPR64sp:$Rt, GPR64sp:$Rn, simm9s16:$offset)>; - def : InstAlias(NAME # "Offset") GPR64sp:$Rn, 0)>; + def : InstAlias(NAME # "Offset") GPR64sp:$Rt, GPR64sp:$Rn, 0)>; } //--- Index: llvm/trunk/test/MC/AArch64/armv8.5a-mte-error.s =================================================================== --- llvm/trunk/test/MC/AArch64/armv8.5a-mte-error.s +++ llvm/trunk/test/MC/AArch64/armv8.5a-mte-error.s @@ -184,22 +184,29 @@ // CHECK-NEXT: gmi x0, #1, x2 // CHECK: invalid operand for instruction // CHECK-NEXT: gmi x0, x1, #1 - stg stg x0 -stg [xzr] -stg [x0, #-4112] -stg [x0, #4096] -stg [x0, #8] -stg [x0, x1] -stg [w0] +stg w0 +stg sp +stg #1 +stg x0, [x0, #-4112] +stg x0, [x0, #4096] +stg x0, [x0, #8] +stg x0, [x0, x1] +stg x0, [w0] +stg x0, [xzr] +stg x0, [#1] // CHECK: too few operands for instruction // CHECK-NEXT: stg -// CHECK: invalid operand for instruction +// CHECK: too few operands for instruction // CHECK-NEXT: stg x0 // CHECK: invalid operand for instruction -// CHECK-NEXT: [xzr] +// CHECK-NEXT: stg w0 +// CHECK: too few operands for instruction +// CHECK-NEXT: stg sp +// CHECK: invalid operand for instruction +// CHECK-NEXT: stg #1 // CHECK: index must be a multiple of 16 in range [-4096, 4080] // CHECK-NEXT: #-4112 // CHECK: index must be a multiple of 16 in range [-4096, 4080] @@ -207,25 +214,37 @@ // CHECK: index must be a multiple of 16 in range [-4096, 4080] // CHECK-NEXT: #8 // CHECK: invalid operand for instruction -// CHECK-NEXT: stg [x0, x1] +// CHECK-NEXT: stg x0, [x0, x1] // CHECK: invalid operand for instruction -// CHECK-NEXT: stg [w0] +// CHECK-NEXT: stg x0, [w0] +// CHECK: invalid operand for instruction +// CHECK-NEXT: stg x0, [xzr] +// CHECK: invalid operand for instruction +// CHECK-NEXT: stg x0, [#1] stzg stzg x0 -stzg [xzr] -stzg [x0, #-4112] -stzg [x0, #4096] -stzg [x0, #8] -stzg [x0, x1] -stzg [w0] +stzg w0 +stzg sp +stzg #1 +stzg x0, [x0, #-4112] +stzg x0, [x0, #4096] +stzg x0, [x0, #8] +stzg x0, [x0, x1] +stzg x0, [w0] +stzg x0, [xzr] +stzg x0, [#1] // CHECK: too few operands for instruction // CHECK-NEXT: stzg -// CHECK: invalid operand for instruction +// CHECK: too few operands for instruction // CHECK-NEXT: stzg x0 // CHECK: invalid operand for instruction -// CHECK-NEXT: [xzr] +// CHECK-NEXT: stzg w0 +// CHECK: too few operands for instruction +// CHECK-NEXT: stzg sp +// CHECK: invalid operand for instruction +// CHECK-NEXT: stzg #1 // CHECK: index must be a multiple of 16 in range [-4096, 4080] // CHECK-NEXT: #-4112 // CHECK: index must be a multiple of 16 in range [-4096, 4080] @@ -233,15 +252,21 @@ // CHECK: index must be a multiple of 16 in range [-4096, 4080] // CHECK-NEXT: #8 // CHECK: invalid operand for instruction -// CHECK-NEXT: stzg [x0, x1] +// CHECK-NEXT: stzg x0, [x0, x1] +// CHECK: invalid operand for instruction +// CHECK-NEXT: stzg x0, [w0] +// CHECK: invalid operand for instruction +// CHECK-NEXT: stzg x0, [xzr] // CHECK: invalid operand for instruction -// CHECK-NEXT: stzg [w0] +// CHECK-NEXT: stzg x0, [#1] -stg [x0, #-4112]! -stg [x0, #4096]! -stg [x0, #8]! -stg [x0, x1]! -stg [w0, #255]! +stg x0, [x0, #-4112]! +stg x0, [x0, #4096]! +stg x0, [x0, #8]! +stg x0, [x0, x1]! +stg x0, [w0]! +stg x0, [xzr]! +stg x0, [#1]! // CHECK: index must be a multiple of 16 in range [-4096, 4080] // CHECK-NEXT: #-4112 @@ -250,15 +275,21 @@ // CHECK: index must be a multiple of 16 in range [-4096, 4080] // CHECK-NEXT: #8 // CHECK: invalid operand for instruction -// CHECK-NEXT: stg [x0, x1]! +// CHECK-NEXT: stg x0, [x0, x1]! +// CHECK: invalid operand for instruction +// CHECK-NEXT: stg x0, [w0]! +// CHECK: invalid operand for instruction +// CHECK-NEXT: stg x0, [xzr]! // CHECK: invalid operand for instruction -// CHECK-NEXT: stg [w0, #255]! +// CHECK-NEXT: stg x0, [#1]! -stzg [x0, #-4112]! -stzg [x0, #4096]! -stzg [x0, #8]! -stzg [x0, x1]! -stzg [w0, #255]! +stzg x0, [x0, #-4112]! +stzg x0, [x0, #4096]! +stzg x0, [x0, #8]! +stzg x0, [x0, x1]! +stzg x0, [w0]! +stzg x0, [xzr]! +stzg x0, [#1]! // CHECK: index must be a multiple of 16 in range [-4096, 4080] // CHECK-NEXT: #-4112 @@ -267,15 +298,21 @@ // CHECK: index must be a multiple of 16 in range [-4096, 4080] // CHECK-NEXT: #8 // CHECK: invalid operand for instruction -// CHECK-NEXT: stzg [x0, x1]! +// CHECK-NEXT: stzg x0, [x0, x1]! // CHECK: invalid operand for instruction -// CHECK-NEXT: stzg [w0, #255]! +// CHECK-NEXT: stzg x0, [w0]! +// CHECK: invalid operand for instruction +// CHECK-NEXT: stzg x0, [xzr]! +// CHECK: invalid operand for instruction +// CHECK-NEXT: stzg x0, [#1]! -stg [x0], #-4112 -stg [x0], #4096 -stg [x0], #8 -stg [x0], x1 -stg [w0], #255 +stg x0, [x0], #-4112 +stg x0, [x0], #4096 +stg x0, [x0], #8 +stg x0, [x0], x1 +stg x0, [w0], #255 +stg x0, [xzr], #255 +stg x0, [#1], #255 // CHECK: index must be a multiple of 16 in range [-4096, 4080] // CHECK-NEXT: #-4112 @@ -284,15 +321,21 @@ // CHECK: index must be a multiple of 16 in range [-4096, 4080] // CHECK-NEXT: #8 // CHECK: invalid operand for instruction -// CHECK-NEXT: stg [x0], x1 +// CHECK-NEXT: stg x0, [x0], x1 +// CHECK: invalid operand for instruction +// CHECK-NEXT: stg x0, [w0], #255 // CHECK: invalid operand for instruction -// CHECK-NEXT: stg [w0], #255 +// CHECK-NEXT: stg x0, [xzr], #255 +// CHECK: invalid operand for instruction +// CHECK-NEXT: stg x0, [#1], #255 -stzg [x0], #-4112 -stzg [x0], #4096 -stzg [x0], #8 -stzg [x0], x1 -stzg [w0], #255 +stzg x0, [x0], #-4112 +stzg x0, [x0], #4096 +stzg x0, [x0], #8 +stzg x0, [x0], x1 +stzg x0, [w0], #255 +stzg x0, [xzr], #255 +stzg x0, [#1], #255 // CHECK: index must be a multiple of 16 in range [-4096, 4080] // CHECK-NEXT: #-4112 @@ -301,25 +344,37 @@ // CHECK: index must be a multiple of 16 in range [-4096, 4080] // CHECK-NEXT: #8 // CHECK: invalid operand for instruction -// CHECK-NEXT: stzg [x0], x1 +// CHECK-NEXT: stzg x0, [x0], x1 +// CHECK: invalid operand for instruction +// CHECK-NEXT: stzg x0, [w0], #255 // CHECK: invalid operand for instruction -// CHECK-NEXT: stzg [w0], #255 +// CHECK-NEXT: stzg x0, [xzr], #255 +// CHECK: invalid operand for instruction +// CHECK-NEXT: stzg x0, [#1], #255 st2g st2g x0 -st2g [xzr] -st2g [x0, #-4112] -st2g [x0, #4096] -st2g [x0, #8] -st2g [x0, x1] -st2g [w0] +st2g w0 +st2g sp +st2g #1 +st2g x0, [x0, #-4112] +st2g x0, [x0, #4096] +st2g x0, [x0, #8] +st2g x0, [x0, x1] +st2g x0, [w0] +st2g x0, [xzr] +st2g x0, [#1] // CHECK: too few operands for instruction // CHECK-NEXT: st2g -// CHECK: invalid operand for instruction +// CHECK: too few operands for instruction // CHECK-NEXT: st2g x0 // CHECK: invalid operand for instruction -// CHECK-NEXT: [xzr] +// CHECK-NEXT: st2g w0 +// CHECK: too few operands for instruction +// CHECK-NEXT: st2g sp +// CHECK: invalid operand for instruction +// CHECK-NEXT: st2g #1 // CHECK: index must be a multiple of 16 in range [-4096, 4080] // CHECK-NEXT: #-4112 // CHECK: index must be a multiple of 16 in range [-4096, 4080] @@ -327,22 +382,37 @@ // CHECK: index must be a multiple of 16 in range [-4096, 4080] // CHECK-NEXT: #8 // CHECK: invalid operand for instruction -// CHECK-NEXT: st2g [x0, x1] +// CHECK-NEXT: st2g x0, [x0, x1] // CHECK: invalid operand for instruction -// CHECK-NEXT: st2g [w0] +// CHECK-NEXT: st2g x0, [w0] +// CHECK: invalid operand for instruction +// CHECK-NEXT: st2g x0, [xzr] +// CHECK: invalid operand for instruction +// CHECK-NEXT: st2g x0, [#1] stz2g -stz2g [xzr] -stz2g [x0, #-4112] -stz2g [x0, #4096] -stz2g [x0, #8] -stz2g [x0, x1] -stz2g [w0] +stz2g x0 +stz2g w0 +stz2g sp +stz2g #1 +stz2g x0, [x0, #-4112] +stz2g x0, [x0, #4096] +stz2g x0, [x0, #8] +stz2g x0, [x0, x1] +stz2g x0, [w0] +stz2g x0, [xzr] +stz2g x0, [#1] // CHECK: too few operands for instruction // CHECK-NEXT: stz2g +// CHECK: too few operands for instruction +// CHECK-NEXT: stz2g x0 +// CHECK: invalid operand for instruction +// CHECK-NEXT: stz2g w0 +// CHECK: too few operands for instruction +// CHECK-NEXT: stz2g sp // CHECK: invalid operand for instruction -// CHECK-NEXT: [xzr] +// CHECK-NEXT: stz2g #1 // CHECK: index must be a multiple of 16 in range [-4096, 4080] // CHECK-NEXT: #-4112 // CHECK: index must be a multiple of 16 in range [-4096, 4080] @@ -350,15 +420,21 @@ // CHECK: index must be a multiple of 16 in range [-4096, 4080] // CHECK-NEXT: #8 // CHECK: invalid operand for instruction -// CHECK-NEXT: stz2g [x0, x1] +// CHECK-NEXT: stz2g x0, [x0, x1] // CHECK: invalid operand for instruction -// CHECK-NEXT: stz2g [w0] +// CHECK-NEXT: stz2g x0, [w0] +// CHECK: invalid operand for instruction +// CHECK-NEXT: stz2g x0, [xzr] +// CHECK: invalid operand for instruction +// CHECK-NEXT: stz2g x0, [#1] -st2g [x0, #-4112]! -st2g [x0, #4096]! -st2g [x0, #8]! -st2g [x0, x1]! -st2g [w0, #255]! +st2g x0, [x0, #-4112]! +st2g x0, [x0, #4096]! +st2g x0, [x0, #8]! +st2g x0, [x0, x1]! +st2g x0, [w0, #256]! +st2g x0, [xzr, #256]! +st2g x0, [#1, #256]! // CHECK: index must be a multiple of 16 in range [-4096, 4080] // CHECK-NEXT: #-4112 @@ -367,15 +443,21 @@ // CHECK: index must be a multiple of 16 in range [-4096, 4080] // CHECK-NEXT: #8 // CHECK: invalid operand for instruction -// CHECK-NEXT: st2g [x0, x1]! +// CHECK-NEXT: st2g x0, [x0, x1]! +// CHECK: invalid operand for instruction +// CHECK-NEXT: st2g x0, [w0, #256]! // CHECK: invalid operand for instruction -// CHECK-NEXT: st2g [w0, #255]! +// CHECK-NEXT: st2g x0, [xzr, #256]! +// CHECK: invalid operand for instruction +// CHECK-NEXT: st2g x0, [#1, #256]! -stz2g [x0, #-4112]! -stz2g [x0, #4096]! -stz2g [x0, #8]! -stz2g [x0, x1]! -stz2g [w0, #255]! +stz2g x0, [x0, #-4112]! +stz2g x0, [x0, #4096]! +stz2g x0, [x0, #8]! +stz2g x0, [x0, x1]! +stz2g x0, [w0, #255]! +stz2g x0, [xzr, #255]! +stz2g x0, [#1, #255]! // CHECK: index must be a multiple of 16 in range [-4096, 4080] // CHECK-NEXT: #-4112 @@ -384,15 +466,21 @@ // CHECK: index must be a multiple of 16 in range [-4096, 4080] // CHECK-NEXT: #8 // CHECK: invalid operand for instruction -// CHECK-NEXT: stz2g [x0, x1]! +// CHECK-NEXT: stz2g x0, [x0, x1]! +// CHECK: invalid operand for instruction +// CHECK-NEXT: stz2g x0, [w0, #255]! // CHECK: invalid operand for instruction -// CHECK-NEXT: stz2g [w0, #255]! +// CHECK-NEXT: stz2g x0, [xzr, #255]! +// CHECK: invalid operand for instruction +// CHECK-NEXT: stz2g x0, [#1, #255]! -st2g [x0], #-4112 -st2g [x0], #4096 -st2g [x0], #8 -st2g [x0], x1 -st2g [#1], #255 +st2g x0, [x0], #-4112 +st2g x0, [x0], #4096 +st2g x0, [x0], #8 +st2g x0, [x0], x1 +st2g x0, [w0], #255 +st2g x0, [xzr], #255 +st2g x0, [#1], #255 // CHECK: index must be a multiple of 16 in range [-4096, 4080] // CHECK-NEXT: #-4112 @@ -401,15 +489,21 @@ // CHECK: index must be a multiple of 16 in range [-4096, 4080] // CHECK-NEXT: #8 // CHECK: invalid operand for instruction -// CHECK-NEXT: st2g [x0], x1 +// CHECK-NEXT: st2g x0, [x0], x1 +// CHECK: invalid operand for instruction +// CHECK-NEXT: st2g x0, [w0], #255 +// CHECK: invalid operand for instruction +// CHECK-NEXT: st2g x0, [xzr], #255 // CHECK: invalid operand for instruction -// CHECK-NEXT: st2g [#1], #255 +// CHECK-NEXT: st2g x0, [#1], #255 -stz2g [x0], #-4112 -stz2g [x0], #4096 -stz2g [x0], #8 -stz2g [x0], x1 -stz2g [#0], x1 +stz2g x0, [x0], #-4112 +stz2g x0, [x0], #4096 +stz2g x0, [x0], #8 +stz2g x0, [x0], x1 +stz2g x0, [w0], #255 +stz2g x0, [xzr], #255 +stz2g x0, [#1], #255 // CHECK: index must be a multiple of 16 in range [-4096, 4080] // CHECK-NEXT: #-4112 @@ -418,9 +512,13 @@ // CHECK: index must be a multiple of 16 in range [-4096, 4080] // CHECK-NEXT: #8 // CHECK: invalid operand for instruction -// CHECK-NEXT: stz2g [x0], x1 +// CHECK-NEXT: stz2g x0, [x0], x1 +// CHECK: invalid operand for instruction +// CHECK-NEXT: stz2g x0, [w0], #255 +// CHECK: invalid operand for instruction +// CHECK-NEXT: stz2g x0, [xzr], #255 // CHECK: invalid operand for instruction -// CHECK-NEXT: stz2g [#0], x1 +// CHECK-NEXT: stz2g x0, [#1], #255 stgp sp, x1, [x2, #16] stgp x0, sp, [x2, #16] @@ -678,6 +776,7 @@ msr tfsr_el3, #5 msr tfsr_el12, #6 msr tfsre0_el1, #7 +// Is read only msr gmid_el1, #7 // CHECK: invalid operand for instruction Index: llvm/trunk/test/MC/AArch64/armv8.5a-mte.s =================================================================== --- llvm/trunk/test/MC/AArch64/armv8.5a-mte.s +++ llvm/trunk/test/MC/AArch64/armv8.5a-mte.s @@ -90,15 +90,17 @@ // NOMTE: instruction requires: mte // NOMTE-NEXT: gmi x30, x0, xzr -stg [x1] -stg [x1, #-4096] -stg [x2, #4080] -stg [sp, #16] - -// CHECK: stg [x1] // encoding: [0x3f,0x08,0x20,0xd9] -// CHECK: stg [x1, #-4096] // encoding: [0x3f,0x08,0x30,0xd9] -// CHECK: stg [x2, #4080] // encoding: [0x5f,0xf8,0x2f,0xd9] -// CHECK: stg [sp, #16] // encoding: [0xff,0x1b,0x20,0xd9] +stg x0, [x1] +stg x1, [x1, #-4096] +stg x2, [x2, #4080] +stg x3, [sp, #16] +stg sp, [sp, #16] + +// CHECK: stg x0, [x1] // encoding: [0x20,0x08,0x20,0xd9] +// CHECK: stg x1, [x1, #-4096] // encoding: [0x21,0x08,0x30,0xd9] +// CHECK: stg x2, [x2, #4080] // encoding: [0x42,0xf8,0x2f,0xd9] +// CHECK: stg x3, [sp, #16] // encoding: [0xe3,0x1b,0x20,0xd9] +// CHECK: stg sp, [sp, #16] // encoding: [0xff,0x1b,0x20,0xd9] // NOMTE: instruction requires: mte // NOMTE-NEXT: stg @@ -108,16 +110,20 @@ // NOMTE-NEXT: stg // NOMTE: instruction requires: mte // NOMTE-NEXT: stg +// NOMTE: instruction requires: mte +// NOMTE-NEXT: stg -stzg [x1] -stzg [x1, #-4096] -stzg [x2, #4080] -stzg [sp, #16] - -// CHECK: stzg [x1] // encoding: [0x3f,0x08,0x60,0xd9] -// CHECK: stzg [x1, #-4096] // encoding: [0x3f,0x08,0x70,0xd9] -// CHECK: stzg [x2, #4080] // encoding: [0x5f,0xf8,0x6f,0xd9] -// CHECK: stzg [sp, #16] // encoding: [0xff,0x1b,0x60,0xd9] +stzg x0, [x1] +stzg x1, [x1, #-4096] +stzg x2, [x2, #4080] +stzg x3, [sp, #16] +stzg sp, [sp, #16] + +// CHECK: stzg x0, [x1] // encoding: [0x20,0x08,0x60,0xd9] +// CHECK: stzg x1, [x1, #-4096] // encoding: [0x21,0x08,0x70,0xd9] +// CHECK: stzg x2, [x2, #4080] // encoding: [0x42,0xf8,0x6f,0xd9] +// CHECK: stzg x3, [sp, #16] // encoding: [0xe3,0x1b,0x60,0xd9] +// CHECK: stzg sp, [sp, #16] // encoding: [0xff,0x1b,0x60,0xd9] // NOMTE: instruction requires: mte // NOMTE-NEXT: stzg @@ -127,14 +133,18 @@ // NOMTE-NEXT: stzg // NOMTE: instruction requires: mte // NOMTE-NEXT: stzg +// NOMTE: instruction requires: mte +// NOMTE-NEXT: stzg -stg [x1, #-4096]! -stg [x2, #4080]! -stg [sp, #16]! - -// CHECK: stg [x1, #-4096]! // encoding: [0x3f,0x0c,0x30,0xd9] -// CHECK: stg [x2, #4080]! // encoding: [0x5f,0xfc,0x2f,0xd9] -// CHECK: stg [sp, #16]! // encoding: [0xff,0x1f,0x20,0xd9] +stg x0, [x1, #-4096]! +stg x1, [x2, #4080]! +stg x2, [sp, #16]! +stg sp, [sp, #16]! + +// CHECK: stg x0, [x1, #-4096]! // encoding: [0x20,0x0c,0x30,0xd9] +// CHECK: stg x1, [x2, #4080]! // encoding: [0x41,0xfc,0x2f,0xd9] +// CHECK: stg x2, [sp, #16]! // encoding: [0xe2,0x1f,0x20,0xd9] +// CHECK: stg sp, [sp, #16]! // encoding: [0xff,0x1f,0x20,0xd9] // NOMTE: instruction requires: mte // NOMTE-NEXT: stg @@ -142,14 +152,18 @@ // NOMTE-NEXT: stg // NOMTE: instruction requires: mte // NOMTE-NEXT: stg +// NOMTE: instruction requires: mte +// NOMTE-NEXT: stg -stzg [x1, #-4096]! -stzg [x2, #4080]! -stzg [sp, #16]! - -// CHECK: stzg [x1, #-4096]! // encoding: [0x3f,0x0c,0x70,0xd9] -// CHECK: stzg [x2, #4080]! // encoding: [0x5f,0xfc,0x6f,0xd9] -// CHECK: stzg [sp, #16]! // encoding: [0xff,0x1f,0x60,0xd9] +stzg x0, [x1, #-4096]! +stzg x1, [x2, #4080]! +stzg x2, [sp, #16]! +stzg sp, [sp, #16]! + +// CHECK: stzg x0, [x1, #-4096]! // encoding: [0x20,0x0c,0x70,0xd9] +// CHECK: stzg x1, [x2, #4080]! // encoding: [0x41,0xfc,0x6f,0xd9] +// CHECK: stzg x2, [sp, #16]! // encoding: [0xe2,0x1f,0x60,0xd9] +// CHECK: stzg sp, [sp, #16]! // encoding: [0xff,0x1f,0x60,0xd9] // NOMTE: instruction requires: mte // NOMTE-NEXT: stzg @@ -157,14 +171,18 @@ // NOMTE-NEXT: stzg // NOMTE: instruction requires: mte // NOMTE-NEXT: stzg +// NOMTE: instruction requires: mte +// NOMTE-NEXT: stzg -stg [x1], #-4096 -stg [x2], #4080 -stg [sp], #16 - -// CHECK: stg [x1], #-4096 // encoding: [0x3f,0x04,0x30,0xd9] -// CHECK: stg [x2], #4080 // encoding: [0x5f,0xf4,0x2f,0xd9] -// CHECK: stg [sp], #16 // encoding: [0xff,0x17,0x20,0xd9] +stg x0, [x1], #-4096 +stg x1, [x2], #4080 +stg x2, [sp], #16 +stg sp, [sp], #16 + +// CHECK: stg x0, [x1], #-4096 // encoding: [0x20,0x04,0x30,0xd9] +// CHECK: stg x1, [x2], #4080 // encoding: [0x41,0xf4,0x2f,0xd9] +// CHECK: stg x2, [sp], #16 // encoding: [0xe2,0x17,0x20,0xd9] +// CHECK: stg sp, [sp], #16 // encoding: [0xff,0x17,0x20,0xd9] // NOMTE: instruction requires: mte // NOMTE-NEXT: stg @@ -172,14 +190,18 @@ // NOMTE-NEXT: stg // NOMTE: instruction requires: mte // NOMTE-NEXT: stg +// NOMTE: instruction requires: mte +// NOMTE-NEXT: stg -stzg [x1], #-4096 -stzg [x2], #4080 -stzg [sp], #16 - -// CHECK: stzg [x1], #-4096 // encoding: [0x3f,0x04,0x70,0xd9] -// CHECK: stzg [x2], #4080 // encoding: [0x5f,0xf4,0x6f,0xd9] -// CHECK: stzg [sp], #16 // encoding: [0xff,0x17,0x60,0xd9] +stzg x0, [x1], #-4096 +stzg x1, [x2], #4080 +stzg x2, [sp], #16 +stzg sp, [sp], #16 + +// CHECK: stzg x0, [x1], #-4096 // encoding: [0x20,0x04,0x70,0xd9] +// CHECK: stzg x1, [x2], #4080 // encoding: [0x41,0xf4,0x6f,0xd9] +// CHECK: stzg x2, [sp], #16 // encoding: [0xe2,0x17,0x60,0xd9] +// CHECK: stzg sp, [sp], #16 // encoding: [0xff,0x17,0x60,0xd9] // NOMTE: instruction requires: mte // NOMTE-NEXT: stzg @@ -187,16 +209,20 @@ // NOMTE-NEXT: stzg // NOMTE: instruction requires: mte // NOMTE-NEXT: stzg +// NOMTE: instruction requires: mte +// NOMTE-NEXT: stzg -st2g [x1] -st2g [x1, #-4096] -st2g [x2, #4080] -st2g [sp, #16] - -// CHECK: st2g [x1] // encoding: [0x3f,0x08,0xa0,0xd9] -// CHECK: st2g [x1, #-4096] // encoding: [0x3f,0x08,0xb0,0xd9] -// CHECK: st2g [x2, #4080] // encoding: [0x5f,0xf8,0xaf,0xd9] -// CHECK: st2g [sp, #16] // encoding: [0xff,0x1b,0xa0,0xd9] +st2g x0, [x1] +st2g x1, [x1, #-4096] +st2g x2, [x2, #4080] +st2g x3, [sp, #16] +st2g sp, [sp, #16] + +// CHECK: st2g x0, [x1] // encoding: [0x20,0x08,0xa0,0xd9] +// CHECK: st2g x1, [x1, #-4096] // encoding: [0x21,0x08,0xb0,0xd9] +// CHECK: st2g x2, [x2, #4080] // encoding: [0x42,0xf8,0xaf,0xd9] +// CHECK: st2g x3, [sp, #16] // encoding: [0xe3,0x1b,0xa0,0xd9] +// CHECK: st2g sp, [sp, #16] // encoding: [0xff,0x1b,0xa0,0xd9] // NOMTE: instruction requires: mte // NOMTE-NEXT: st2g @@ -206,16 +232,20 @@ // NOMTE-NEXT: st2g // NOMTE: instruction requires: mte // NOMTE-NEXT: st2g +// NOMTE: instruction requires: mte +// NOMTE-NEXT: st2g -stz2g [x1] -stz2g [x1, #-4096] -stz2g [x2, #4080] -stz2g [sp, #16] - -// CHECK: stz2g [x1] // encoding: [0x3f,0x08,0xe0,0xd9] -// CHECK: stz2g [x1, #-4096] // encoding: [0x3f,0x08,0xf0,0xd9] -// CHECK: stz2g [x2, #4080] // encoding: [0x5f,0xf8,0xef,0xd9] -// CHECK: stz2g [sp, #16] // encoding: [0xff,0x1b,0xe0,0xd9] +stz2g x0, [x1] +stz2g x1, [x1, #-4096] +stz2g x2, [x2, #4080] +stz2g x3, [sp, #16] +stz2g sp, [sp, #16] + +// CHECK: stz2g x0, [x1] // encoding: [0x20,0x08,0xe0,0xd9] +// CHECK: stz2g x1, [x1, #-4096] // encoding: [0x21,0x08,0xf0,0xd9] +// CHECK: stz2g x2, [x2, #4080] // encoding: [0x42,0xf8,0xef,0xd9] +// CHECK: stz2g x3, [sp, #16] // encoding: [0xe3,0x1b,0xe0,0xd9] +// CHECK: stz2g sp, [sp, #16] // encoding: [0xff,0x1b,0xe0,0xd9] // NOMTE: instruction requires: mte // NOMTE-NEXT: stz2g @@ -225,14 +255,18 @@ // NOMTE-NEXT: stz2g // NOMTE: instruction requires: mte // NOMTE-NEXT: stz2g +// NOMTE: instruction requires: mte +// NOMTE-NEXT: stz2g -st2g [x1, #-4096]! -st2g [x2, #4080]! -st2g [sp, #16]! - -// CHECK: st2g [x1, #-4096]! // encoding: [0x3f,0x0c,0xb0,0xd9] -// CHECK: st2g [x2, #4080]! // encoding: [0x5f,0xfc,0xaf,0xd9] -// CHECK: st2g [sp, #16]! // encoding: [0xff,0x1f,0xa0,0xd9] +st2g x0, [x1, #-4096]! +st2g x1, [x2, #4080]! +st2g x2, [sp, #16]! +st2g sp, [sp, #16]! + +// CHECK: st2g x0, [x1, #-4096]! // encoding: [0x20,0x0c,0xb0,0xd9] +// CHECK: st2g x1, [x2, #4080]! // encoding: [0x41,0xfc,0xaf,0xd9] +// CHECK: st2g x2, [sp, #16]! // encoding: [0xe2,0x1f,0xa0,0xd9] +// CHECK: st2g sp, [sp, #16]! // encoding: [0xff,0x1f,0xa0,0xd9] // NOMTE: instruction requires: mte // NOMTE-NEXT: st2g @@ -240,14 +274,18 @@ // NOMTE-NEXT: st2g // NOMTE: instruction requires: mte // NOMTE-NEXT: st2g +// NOMTE: instruction requires: mte +// NOMTE-NEXT: st2g -stz2g [x1, #-4096]! -stz2g [x2, #4080]! -stz2g [sp, #16]! - -// CHECK: stz2g [x1, #-4096]! // encoding: [0x3f,0x0c,0xf0,0xd9] -// CHECK: stz2g [x2, #4080]! // encoding: [0x5f,0xfc,0xef,0xd9] -// CHECK: stz2g [sp, #16]! // encoding: [0xff,0x1f,0xe0,0xd9] +stz2g x0, [x1, #-4096]! +stz2g x1, [x2, #4080]! +stz2g x2, [sp, #16]! +stz2g sp, [sp, #16]! + +// CHECK: stz2g x0, [x1, #-4096]! // encoding: [0x20,0x0c,0xf0,0xd9] +// CHECK: stz2g x1, [x2, #4080]! // encoding: [0x41,0xfc,0xef,0xd9] +// CHECK: stz2g x2, [sp, #16]! // encoding: [0xe2,0x1f,0xe0,0xd9] +// CHECK: stz2g sp, [sp, #16]! // encoding: [0xff,0x1f,0xe0,0xd9] // NOMTE: instruction requires: mte // NOMTE-NEXT: stz2g @@ -255,14 +293,18 @@ // NOMTE-NEXT: stz2g // NOMTE: instruction requires: mte // NOMTE-NEXT: stz2g +// NOMTE: instruction requires: mte +// NOMTE-NEXT: stz2g -st2g [x1], #-4096 -st2g [x2], #4080 -st2g [sp], #16 - -// CHECK: st2g [x1], #-4096 // encoding: [0x3f,0x04,0xb0,0xd9] -// CHECK: st2g [x2], #4080 // encoding: [0x5f,0xf4,0xaf,0xd9] -// CHECK: st2g [sp], #16 // encoding: [0xff,0x17,0xa0,0xd9] +st2g x0, [x1], #-4096 +st2g x1, [x2], #4080 +st2g x2, [sp], #16 +st2g sp, [sp], #16 + +// CHECK: st2g x0, [x1], #-4096 // encoding: [0x20,0x04,0xb0,0xd9] +// CHECK: st2g x1, [x2], #4080 // encoding: [0x41,0xf4,0xaf,0xd9] +// CHECK: st2g x2, [sp], #16 // encoding: [0xe2,0x17,0xa0,0xd9] +// CHECK: st2g sp, [sp], #16 // encoding: [0xff,0x17,0xa0,0xd9] // NOMTE: instruction requires: mte // NOMTE-NEXT: st2g @@ -270,14 +312,18 @@ // NOMTE-NEXT: st2g // NOMTE: instruction requires: mte // NOMTE-NEXT: st2g +// NOMTE: instruction requires: mte +// NOMTE-NEXT: st2g -stz2g [x1], #-4096 -stz2g [x2], #4080 -stz2g [sp], #16 - -// CHECK: stz2g [x1], #-4096 // encoding: [0x3f,0x04,0xf0,0xd9] -// CHECK: stz2g [x2], #4080 // encoding: [0x5f,0xf4,0xef,0xd9] -// CHECK: stz2g [sp], #16 // encoding: [0xff,0x17,0xe0,0xd9] +stz2g x0, [x1], #-4096 +stz2g x1, [x2], #4080 +stz2g x2, [sp], #16 +stz2g sp, [sp], #16 + +// CHECK: stz2g x0, [x1], #-4096 // encoding: [0x20,0x04,0xf0,0xd9] +// CHECK: stz2g x1, [x2], #4080 // encoding: [0x41,0xf4,0xef,0xd9] +// CHECK: stz2g x2, [sp], #16 // encoding: [0xe2,0x17,0xe0,0xd9] +// CHECK: stz2g sp, [sp], #16 // encoding: [0xff,0x17,0xe0,0xd9] // NOMTE: instruction requires: mte // NOMTE-NEXT: stz2g @@ -285,6 +331,8 @@ // NOMTE-NEXT: stz2g // NOMTE: instruction requires: mte // NOMTE-NEXT: stz2g +// NOMTE: instruction requires: mte +// NOMTE-NEXT: stz2g stgp x0, x1, [x2] stgp x0, x1, [x2, #-1024] Index: llvm/trunk/test/MC/Disassembler/AArch64/armv8.5a-mte.txt =================================================================== --- llvm/trunk/test/MC/Disassembler/AArch64/armv8.5a-mte.txt +++ llvm/trunk/test/MC/Disassembler/AArch64/armv8.5a-mte.txt @@ -117,199 +117,248 @@ # NOMTE: warning: invalid instruction encoding # NOMTE-NEXT: [0xff,0x03,0xdf,0xba] -[0x3f,0x08,0x30,0xd9] -[0x5f,0xf8,0x2f,0xd9] -[0xff,0x1b,0x20,0xd9] +[0x20,0x08,0x30,0xd9] +[0x41,0xf8,0x2f,0xd9] +[0xe2,0x1b,0x20,0xd9] +[0x23,0x08,0x20,0xd9] [0x3f,0x08,0x20,0xd9] -# CHECK: stg [x1, #-4096] -# CHECK: stg [x2, #4080] -# CHECK: stg [sp, #16] -# CHECK: stg [x1] +# CHECK: stg x0, [x1, #-4096] +# CHECK: stg x1, [x2, #4080] +# CHECK: stg x2, [sp, #16] +# CHECK: stg x3, [x1] +# CHECK: stg sp, [x1] + +# NOMTE: warning: invalid instruction encoding +# NOMTE-NEXT: [0x20,0x08,0x30,0xd9] # NOMTE: warning: invalid instruction encoding -# NOMTE-NEXT: [0x3f,0x08,0x30,0xd9] +# NOMTE-NEXT: [0x41,0xf8,0x2f,0xd9] # NOMTE: warning: invalid instruction encoding -# NOMTE-NEXT: [0x5f,0xf8,0x2f,0xd9] +# NOMTE-NEXT: [0xe2,0x1b,0x20,0xd9] # NOMTE: warning: invalid instruction encoding -# NOMTE-NEXT: [0xff,0x1b,0x20,0xd9] +# NOMTE-NEXT: [0x23,0x08,0x20,0xd9] # NOMTE: warning: invalid instruction encoding # NOMTE-NEXT: [0x3f,0x08,0x20,0xd9] -[0x3f,0x08,0x70,0xd9] -[0x5f,0xf8,0x6f,0xd9] -[0xff,0x1b,0x60,0xd9] +[0x20,0x08,0x70,0xd9] +[0x41,0xf8,0x6f,0xd9] +[0xe2,0x1b,0x60,0xd9] +[0x23,0x08,0x60,0xd9] [0x3f,0x08,0x60,0xd9] -# CHECK: stzg [x1, #-4096] -# CHECK: stzg [x2, #4080] -# CHECK: stzg [sp, #16] -# CHECK: stzg [x1] +# CHECK: stzg x0, [x1, #-4096] +# CHECK: stzg x1, [x2, #4080] +# CHECK: stzg x2, [sp, #16] +# CHECK: stzg x3, [x1] +# CHECK: stzg sp, [x1] # NOMTE: warning: invalid instruction encoding -# NOMTE-NEXT: [0x3f,0x08,0x70,0xd9] +# NOMTE-NEXT: [0x20,0x08,0x70,0xd9] # NOMTE: warning: invalid instruction encoding -# NOMTE-NEXT: [0x5f,0xf8,0x6f,0xd9] +# NOMTE-NEXT: [0x41,0xf8,0x6f,0xd9] # NOMTE: warning: invalid instruction encoding -# NOMTE-NEXT: [0xff,0x1b,0x60,0xd9] +# NOMTE-NEXT: [0xe2,0x1b,0x60,0xd9] +# NOMTE: warning: invalid instruction encoding +# NOMTE-NEXT: [0x23,0x08,0x60,0xd9] # NOMTE: warning: invalid instruction encoding # NOMTE-NEXT: [0x3f,0x08,0x60,0xd9] -[0x3f,0x0c,0x30,0xd9] -[0x5f,0xfc,0x2f,0xd9] +[0x20,0x0c,0x30,0xd9] +[0x41,0xfc,0x2f,0xd9] +[0xe2,0x1f,0x20,0xd9] [0xff,0x1f,0x20,0xd9] -# CHECK: stg [x1, #-4096]! -# CHECK: stg [x2, #4080]! -# CHECK: stg [sp, #16]! +# CHECK: stg x0, [x1, #-4096]! +# CHECK: stg x1, [x2, #4080]! +# CHECK: stg x2, [sp, #16]! +# CHECK: stg sp, [sp, #16]! # NOMTE: warning: invalid instruction encoding -# NOMTE-NEXT: [0x3f,0x0c,0x30,0xd9] +# NOMTE-NEXT: [0x20,0x0c,0x30,0xd9] +# NOMTE: warning: invalid instruction encoding +# NOMTE-NEXT: [0x41,0xfc,0x2f,0xd9] # NOMTE: warning: invalid instruction encoding -# NOMTE-NEXT: [0x5f,0xfc,0x2f,0xd9] +# NOMTE-NEXT: [0xe2,0x1f,0x20,0xd9] # NOMTE: warning: invalid instruction encoding # NOMTE-NEXT: [0xff,0x1f,0x20,0xd9] -[0x3f,0x0c,0x70,0xd9] -[0x5f,0xfc,0x6f,0xd9] +[0x20,0x0c,0x70,0xd9] +[0x41,0xfc,0x6f,0xd9] +[0xe2,0x1f,0x60,0xd9] [0xff,0x1f,0x60,0xd9] -# CHECK: stzg [x1, #-4096]! -# CHECK: stzg [x2, #4080]! -# CHECK: stzg [sp, #16]! +# CHECK: stzg x0, [x1, #-4096]! +# CHECK: stzg x1, [x2, #4080]! +# CHECK: stzg x2, [sp, #16]! +# CHECK: stzg sp, [sp, #16]! # NOMTE: warning: invalid instruction encoding -# NOMTE-NEXT: [0x3f,0x0c,0x70,0xd9] +# NOMTE-NEXT: [0x20,0x0c,0x70,0xd9] # NOMTE: warning: invalid instruction encoding -# NOMTE-NEXT: [0x5f,0xfc,0x6f,0xd9] +# NOMTE-NEXT: [0x41,0xfc,0x6f,0xd9] +# NOMTE: warning: invalid instruction encoding +# NOMTE-NEXT: [0xe2,0x1f,0x60,0xd9] # NOMTE: warning: invalid instruction encoding # NOMTE-NEXT: [0xff,0x1f,0x60,0xd9] -[0x3f,0x04,0x30,0xd9] -[0x5f,0xf4,0x2f,0xd9] +[0x20,0x04,0x30,0xd9] +[0x41,0xf4,0x2f,0xd9] +[0xe2,0x17,0x20,0xd9] [0xff,0x17,0x20,0xd9] -# CHECK: stg [x1], #-4096 -# CHECK: stg [x2], #4080 -# CHECK: stg [sp], #16 +# CHECK: stg x0, [x1], #-4096 +# CHECK: stg x1, [x2], #4080 +# CHECK: stg x2, [sp], #16 +# CHECK: stg sp, [sp], #16 # NOMTE: warning: invalid instruction encoding -# NOMTE-NEXT: [0x3f,0x04,0x30,0xd9] +# NOMTE-NEXT: [0x20,0x04,0x30,0xd9] +# NOMTE: warning: invalid instruction encoding +# NOMTE-NEXT: [0x41,0xf4,0x2f,0xd9] # NOMTE: warning: invalid instruction encoding -# NOMTE-NEXT: [0x5f,0xf4,0x2f,0xd9] +# NOMTE-NEXT: [0xe2,0x17,0x20,0xd9] # NOMTE: warning: invalid instruction encoding # NOMTE-NEXT: [0xff,0x17,0x20,0xd9] -[0x3f,0x04,0x70,0xd9] -[0x5f,0xf4,0x6f,0xd9] +[0x20,0x04,0x70,0xd9] +[0x41,0xf4,0x6f,0xd9] +[0xe2,0x17,0x60,0xd9] [0xff,0x17,0x60,0xd9] -# CHECK: stzg [x1], #-4096 -# CHECK: stzg [x2], #4080 -# CHECK: stzg [sp], #16 +# CHECK: stzg x0, [x1], #-4096 +# CHECK: stzg x1, [x2], #4080 +# CHECK: stzg x2, [sp], #16 +# CHECK: stzg sp, [sp], #16 # NOMTE: warning: invalid instruction encoding -# NOMTE-NEXT: [0x3f,0x04,0x70,0xd9] +# NOMTE-NEXT: [0x20,0x04,0x70,0xd9] +# NOMTE: warning: invalid instruction encoding +# NOMTE-NEXT: [0x41,0xf4,0x6f,0xd9] # NOMTE: warning: invalid instruction encoding -# NOMTE-NEXT: [0x5f,0xf4,0x6f,0xd9] +# NOMTE-NEXT: [0xe2,0x17,0x60,0xd9] # NOMTE: warning: invalid instruction encoding # NOMTE-NEXT: [0xff,0x17,0x60,0xd9] -[0x3f,0x08,0xb0,0xd9] -[0x5f,0xf8,0xaf,0xd9] -[0xff,0x1b,0xa0,0xd9] +[0x20,0x08,0xb0,0xd9] +[0x41,0xf8,0xaf,0xd9] +[0xe2,0x1b,0xa0,0xd9] +[0x23,0x08,0xa0,0xd9] [0x3f,0x08,0xa0,0xd9] -# CHECK: st2g [x1, #-4096] -# CHECK: st2g [x2, #4080] -# CHECK: st2g [sp, #16] -# CHECK: st2g [x1] +# CHECK: st2g x0, [x1, #-4096] +# CHECK: st2g x1, [x2, #4080] +# CHECK: st2g x2, [sp, #16] +# CHECK: st2g x3, [x1] +# CHECK: st2g sp, [x1] # NOMTE: warning: invalid instruction encoding -# NOMTE-NEXT: [0x3f,0x08,0xb0,0xd9] +# NOMTE-NEXT: [0x20,0x08,0xb0,0xd9] # NOMTE: warning: invalid instruction encoding -# NOMTE-NEXT: [0x5f,0xf8,0xaf,0xd9] +# NOMTE-NEXT: [0x41,0xf8,0xaf,0xd9] # NOMTE: warning: invalid instruction encoding -# NOMTE-NEXT: [0xff,0x1b,0xa0,0xd9] +# NOMTE-NEXT: [0xe2,0x1b,0xa0,0xd9] +# NOMTE: warning: invalid instruction encoding +# NOMTE-NEXT: [0x23,0x08,0xa0,0xd9] # NOMTE: warning: invalid instruction encoding # NOMTE-NEXT: [0x3f,0x08,0xa0,0xd9] -[0x3f,0x08,0xf0,0xd9] -[0x5f,0xf8,0xef,0xd9] -[0xff,0x1b,0xe0,0xd9] +[0x20,0x08,0xf0,0xd9] +[0x41,0xf8,0xef,0xd9] +[0xe2,0x1b,0xe0,0xd9] +[0x23,0x08,0xe0,0xd9] [0x3f,0x08,0xe0,0xd9] -# CHECK: stz2g [x1, #-4096] -# CHECK: stz2g [x2, #4080] -# CHECK: stz2g [sp, #16] -# CHECK: stz2g [x1] +# CHECK: stz2g x0, [x1, #-4096] +# CHECK: stz2g x1, [x2, #4080] +# CHECK: stz2g x2, [sp, #16] +# CHECK: stz2g x3, [x1] +# CHECK: stz2g sp, [x1] # NOMTE: warning: invalid instruction encoding -# NOMTE-NEXT: [0x3f,0x08,0xf0,0xd9] +# NOMTE-NEXT: [0x20,0x08,0xf0,0xd9] +# NOMTE: warning: invalid instruction encoding +# NOMTE-NEXT: [0x41,0xf8,0xef,0xd9] # NOMTE: warning: invalid instruction encoding -# NOMTE-NEXT: [0x5f,0xf8,0xef,0xd9] +# NOMTE-NEXT: [0xe2,0x1b,0xe0,0xd9] # NOMTE: warning: invalid instruction encoding -# NOMTE-NEXT: [0xff,0x1b,0xe0,0xd9] +# NOMTE-NEXT: [0x23,0x08,0xe0,0xd9] # NOMTE: warning: invalid instruction encoding # NOMTE-NEXT: [0x3f,0x08,0xe0,0xd9] -[0x3f,0x0c,0xb0,0xd9] -[0x5f,0xfc,0xaf,0xd9] +[0x20,0x0c,0xb0,0xd9] +[0x41,0xfc,0xaf,0xd9] +[0xe2,0x1f,0xa0,0xd9] [0xff,0x1f,0xa0,0xd9] -# CHECK: st2g [x1, #-4096]! -# CHECK: st2g [x2, #4080]! -# CHECK: st2g [sp, #16]! +# CHECK: st2g x0, [x1, #-4096]! +# CHECK: st2g x1, [x2, #4080]! +# CHECK: st2g x2, [sp, #16]! +# CHECK: st2g sp, [sp, #16]! # NOMTE: warning: invalid instruction encoding -# NOMTE-NEXT: [0x3f,0x0c,0xb0,0xd9] +# NOMTE-NEXT: [0x20,0x0c,0xb0,0xd9] +# NOMTE: warning: invalid instruction encoding +# NOMTE-NEXT: [0x41,0xfc,0xaf,0xd9] # NOMTE: warning: invalid instruction encoding -# NOMTE-NEXT: [0x5f,0xfc,0xaf,0xd9] +# NOMTE-NEXT: [0xe2,0x1f,0xa0,0xd9] # NOMTE: warning: invalid instruction encoding # NOMTE-NEXT: [0xff,0x1f,0xa0,0xd9] -[0x3f,0x0c,0xf0,0xd9] -[0x5f,0xfc,0xef,0xd9] +[0x20,0x0c,0xf0,0xd9] +[0x41,0xfc,0xef,0xd9] +[0xe2,0x1f,0xe0,0xd9] [0xff,0x1f,0xe0,0xd9] -# CHECK: stz2g [x1, #-4096]! -# CHECK: stz2g [x2, #4080]! -# CHECK: stz2g [sp, #16]! +# CHECK: stz2g x0, [x1, #-4096]! +# CHECK: stz2g x1, [x2, #4080]! +# CHECK: stz2g x2, [sp, #16]! +# CHECK: stz2g sp, [sp, #16]! # NOMTE: warning: invalid instruction encoding -# NOMTE-NEXT: [0x3f,0x0c,0xf0,0xd9] +# NOMTE-NEXT: [0x20,0x0c,0xf0,0xd9] # NOMTE: warning: invalid instruction encoding -# NOMTE-NEXT: [0x5f,0xfc,0xef,0xd9] +# NOMTE-NEXT: [0x41,0xfc,0xef,0xd9] +# NOMTE: warning: invalid instruction encoding +# NOMTE-NEXT: [0xe2,0x1f,0xe0,0xd9] # NOMTE: warning: invalid instruction encoding # NOMTE-NEXT: [0xff,0x1f,0xe0,0xd9] -[0x3f,0x04,0xb0,0xd9] -[0x5f,0xf4,0xaf,0xd9] +[0x20,0x04,0xb0,0xd9] +[0x41,0xf4,0xaf,0xd9] +[0xe2,0x17,0xa0,0xd9] [0xff,0x17,0xa0,0xd9] -# CHECK: st2g [x1], #-4096 -# CHECK: st2g [x2], #4080 -# CHECK: st2g [sp], #16 +# CHECK: st2g x0, [x1], #-4096 +# CHECK: st2g x1, [x2], #4080 +# CHECK: st2g x2, [sp], #16 +# CHECK: st2g sp, [sp], #16 # NOMTE: warning: invalid instruction encoding -# NOMTE-NEXT: [0x3f,0x04,0xb0,0xd9] +# NOMTE-NEXT: [0x20,0x04,0xb0,0xd9] +# NOMTE: warning: invalid instruction encoding +# NOMTE-NEXT: [0x41,0xf4,0xaf,0xd9] # NOMTE: warning: invalid instruction encoding -# NOMTE-NEXT: [0x5f,0xf4,0xaf,0xd9] +# NOMTE-NEXT: [0xe2,0x17,0xa0,0xd9] # NOMTE: warning: invalid instruction encoding # NOMTE-NEXT: [0xff,0x17,0xa0,0xd9] -[0x3f,0x04,0xf0,0xd9] -[0x5f,0xf4,0xef,0xd9] +[0x20,0x04,0xf0,0xd9] +[0x41,0xf4,0xef,0xd9] +[0xe2,0x17,0xe0,0xd9] [0xff,0x17,0xe0,0xd9] -# CHECK: stz2g [x1], #-4096 -# CHECK: stz2g [x2], #4080 -# CHECK: stz2g [sp], #16 +# CHECK: stz2g x0, [x1], #-4096 +# CHECK: stz2g x1, [x2], #4080 +# CHECK: stz2g x2, [sp], #16 +# CHECK: stz2g sp, [sp], #16 # NOMTE: warning: invalid instruction encoding -# NOMTE-NEXT: [0x3f,0x04,0xf0,0xd9] +# NOMTE-NEXT: [0x20,0x04,0xf0,0xd9] +# NOMTE: warning: invalid instruction encoding +# NOMTE-NEXT: [0x41,0xf4,0xef,0xd9] # NOMTE: warning: invalid instruction encoding -# NOMTE-NEXT: [0x5f,0xf4,0xef,0xd9] +# NOMTE-NEXT: [0xe2,0x17,0xe0,0xd9] # NOMTE: warning: invalid instruction encoding # NOMTE-NEXT: [0xff,0x17,0xe0,0xd9]