Index: llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h =================================================================== --- llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h +++ llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h @@ -287,6 +287,9 @@ case MachineOperand::MO_GlobalAddress: return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off, TargetFlags); + case MachineOperand::MO_BlockAddress: + return addBlockAddress(Disp.getBlockAddress(), Disp.getOffset() + off, + TargetFlags); } } Index: llvm/trunk/test/CodeGen/RISCV/codemodel-lowering.ll =================================================================== --- llvm/trunk/test/CodeGen/RISCV/codemodel-lowering.ll +++ llvm/trunk/test/CodeGen/RISCV/codemodel-lowering.ll @@ -52,14 +52,88 @@ unreachable } +; Check lowering of blockaddress that forces a displacement to be added + +define signext i32 @lower_blockaddress_displ(i32 signext %w) nounwind { +; RV32I-SMALL-LABEL: lower_blockaddress_displ: +; RV32I-SMALL: # %bb.0: # %entry +; RV32I-SMALL-NEXT: addi sp, sp, -16 +; RV32I-SMALL-NEXT: sw ra, 12(sp) +; RV32I-SMALL-NEXT: lui a1, %hi(.Ltmp0) +; RV32I-SMALL-NEXT: addi a1, a1, %lo(.Ltmp0) +; RV32I-SMALL-NEXT: sw a1, 8(sp) +; RV32I-SMALL-NEXT: addi a1, zero, 101 +; RV32I-SMALL-NEXT: blt a0, a1, .LBB2_3 +; RV32I-SMALL-NEXT: # %bb.1: # %if.then +; RV32I-SMALL-NEXT: lw a0, 8(sp) +; RV32I-SMALL-NEXT: jr a0 +; RV32I-SMALL-NEXT: .Ltmp0: # Block address taken +; RV32I-SMALL-NEXT: .LBB2_2: # %return +; RV32I-SMALL-NEXT: addi a0, zero, 4 +; RV32I-SMALL-NEXT: j .LBB2_4 +; RV32I-SMALL-NEXT: .LBB2_3: # %return.clone +; RV32I-SMALL-NEXT: addi a0, zero, 3 +; RV32I-SMALL-NEXT: .LBB2_4: # %.split +; RV32I-SMALL-NEXT: lw ra, 12(sp) +; RV32I-SMALL-NEXT: addi sp, sp, 16 +; RV32I-SMALL-NEXT: ret +; +; RV32I-MEDIUM-LABEL: lower_blockaddress_displ: +; RV32I-MEDIUM: # %bb.0: # %entry +; RV32I-MEDIUM-NEXT: addi sp, sp, -16 +; RV32I-MEDIUM-NEXT: sw ra, 12(sp) +; RV32I-MEDIUM-NEXT: .LBB2_5: # %entry +; RV32I-MEDIUM-NEXT: # Label of block must be emitted +; RV32I-MEDIUM-NEXT: auipc a1, %pcrel_hi(.Ltmp0) +; RV32I-MEDIUM-NEXT: addi a1, a1, %pcrel_lo(.LBB2_5) +; RV32I-MEDIUM-NEXT: sw a1, 8(sp) +; RV32I-MEDIUM-NEXT: addi a1, zero, 101 +; RV32I-MEDIUM-NEXT: blt a0, a1, .LBB2_3 +; RV32I-MEDIUM-NEXT: # %bb.1: # %if.then +; RV32I-MEDIUM-NEXT: lw a0, 8(sp) +; RV32I-MEDIUM-NEXT: jr a0 +; RV32I-MEDIUM-NEXT: .Ltmp0: # Block address taken +; RV32I-MEDIUM-NEXT: .LBB2_2: # %return +; RV32I-MEDIUM-NEXT: addi a0, zero, 4 +; RV32I-MEDIUM-NEXT: j .LBB2_4 +; RV32I-MEDIUM-NEXT: .LBB2_3: # %return.clone +; RV32I-MEDIUM-NEXT: addi a0, zero, 3 +; RV32I-MEDIUM-NEXT: .LBB2_4: # %.split +; RV32I-MEDIUM-NEXT: lw ra, 12(sp) +; RV32I-MEDIUM-NEXT: addi sp, sp, 16 +; RV32I-MEDIUM-NEXT: ret +entry: + %x = alloca i8*, align 8 + store i8* blockaddress(@lower_blockaddress_displ, %test_block), i8** %x, align 8 + %cmp = icmp sgt i32 %w, 100 + br i1 %cmp, label %if.then, label %if.end + +if.then: + %addr = load i8*, i8** %x, align 8 + br label %indirectgoto + +if.end: + br label %return + +test_block: + br label %return + +return: + %retval = phi i32 [ 3, %if.end ], [ 4, %test_block ] + ret i32 %retval + +indirectgoto: + indirectbr i8* %addr, [ label %test_block ] +} + ; Check lowering of constantpools define float @lower_constantpool(float %a) nounwind { ; RV32I-SMALL-LABEL: lower_constantpool: ; RV32I-SMALL: # %bb.0: ; RV32I-SMALL-NEXT: fmv.w.x ft0, a0 -; RV32I-SMALL-NEXT: lui a0, %hi(.LCPI2_0) -; RV32I-SMALL-NEXT: addi a0, a0, %lo(.LCPI2_0) +; RV32I-SMALL-NEXT: lui a0, %hi(.LCPI3_0) +; RV32I-SMALL-NEXT: addi a0, a0, %lo(.LCPI3_0) ; RV32I-SMALL-NEXT: flw ft1, 0(a0) ; RV32I-SMALL-NEXT: fadd.s ft0, ft0, ft1 ; RV32I-SMALL-NEXT: fmv.x.w a0, ft0 @@ -67,9 +141,9 @@ ; ; RV32I-MEDIUM-LABEL: lower_constantpool: ; RV32I-MEDIUM: # %bb.0: -; RV32I-MEDIUM-NEXT: .LBB2_1: # Label of block must be emitted -; RV32I-MEDIUM-NEXT: auipc a1, %pcrel_hi(.LCPI2_0) -; RV32I-MEDIUM-NEXT: addi a1, a1, %pcrel_lo(.LBB2_1) +; RV32I-MEDIUM-NEXT: .LBB3_1: # Label of block must be emitted +; RV32I-MEDIUM-NEXT: auipc a1, %pcrel_hi(.LCPI3_0) +; RV32I-MEDIUM-NEXT: addi a1, a1, %pcrel_lo(.LBB3_1) ; RV32I-MEDIUM-NEXT: flw ft0, 0(a1) ; RV32I-MEDIUM-NEXT: fmv.w.x ft1, a0 ; RV32I-MEDIUM-NEXT: fadd.s ft0, ft1, ft0