Index: lib/Transforms/Vectorize/LoopVectorize.cpp
===================================================================
--- lib/Transforms/Vectorize/LoopVectorize.cpp
+++ lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -264,17 +264,6 @@
     cl::desc("Enable VPlan-native vectorization path predicator with "
              "support for outer loop vectorization."));
 
-// This flag enables the stress testing of the VPlan H-CFG construction in the
-// VPlan-native vectorization path. It must be used in conjuction with
-// -enable-vplan-native-path. -vplan-verify-hcfg can also be used to enable the
-// verification of the H-CFGs built.
-static cl::opt<bool> VPlanBuildStressTest(
-    "vplan-build-stress-test", cl::init(false), cl::Hidden,
-    cl::desc(
-        "Build VPlan for every supported loop nest in the function and bail "
-        "out right after the build (stress test the VPlan H-CFG construction "
-        "in the VPlan-native vectorization path)."));
-
 /// A helper function for converting Scalar types to vector types.
 /// If the incoming type is void, we return void. If the VF is 1, we return
 /// the scalar type.
@@ -1397,12 +1386,10 @@
 static void collectSupportedLoops(Loop &L, LoopInfo *LI,
                                   OptimizationRemarkEmitter *ORE,
                                   SmallVectorImpl<Loop *> &V) {
-  // Collect inner loops and outer loops without irreducible control flow. For
-  // now, only collect outer loops that have explicit vectorization hints. If we
-  // are stress testing the VPlan H-CFG construction, we collect the outermost
-  // loop of every loop nest.
-  if (L.empty() || VPlanBuildStressTest ||
-      (EnableVPlanNativePath && isExplicitVecOuterLoop(&L, ORE))) {
+  // Collect inner loops and outer loops without irreducible control
+  // flow. For now, only collect outer loops that have explicit
+  // vectorization hints.
+  if (L.empty() || (EnableVPlanNativePath && isExplicitVecOuterLoop(&L, ORE))) {
     LoopBlocksRPO RPOT(&L);
     RPOT.perform(LI);
     if (!containsIrreducibleCFG<const BasicBlock *>(RPOT, *LI)) {
@@ -6098,13 +6085,8 @@
   if (!OrigLoop->empty()) {
     // If the user doesn't provide a vectorization factor, determine a
     // reasonable one.
-    if (!UserVF) {
-      // We set VF to 4 for stress testing.
-      if (VPlanBuildStressTest)
-        VF = 4;
-      else
-        VF = determineVPlanVF(TTI->getRegisterBitWidth(true /* Vector*/), CM);
-    }
+    if (!UserVF)
+      VF = determineVPlanVF(TTI->getRegisterBitWidth(true /* Vector*/), CM);
 
     assert(EnableVPlanNativePath && "VPlan-native path is not enabled.");
     assert(isPowerOf2_32(VF) && "VF needs to be a power of two");
@@ -6112,10 +6094,6 @@
                       << VF << " to build VPlans.\n");
     buildVPlans(VF, VF);
 
-    // For VPlan build stress testing, we bail out after VPlan construction.
-    if (VPlanBuildStressTest)
-      return VectorizationFactor::Disabled();
-
     return {VF, 0};
   }
 
@@ -7149,11 +7127,10 @@
   // Plan how to best vectorize, return the best VF and its cost.
   const VectorizationFactor VF = LVP.planInVPlanNativePath(OptForSize, UserVF);
 
-  // If we are stress testing VPlan builds, do not attempt to generate vector
-  // code. Masked vector code generation support will follow soon.
-  // Also, do not attempt to vectorize if no vector code will be produced.
-  if (VPlanBuildStressTest || EnableVPlanPredication ||
-      VectorizationFactor::Disabled() == VF)
+  // Do not attempt to generate vector code for masked vector code
+  // (support will follow).  Also, do not attempt to vectorize if no
+  // vector code will be produced.
+  if (EnableVPlanPredication || VectorizationFactor::Disabled() == VF)
     return false;
 
   LVP.setBestPlan(VF.Width, 1);
Index: test/Transforms/LoopVectorize/vplan_hcfg_stress_test.ll
===================================================================
--- test/Transforms/LoopVectorize/vplan_hcfg_stress_test.ll
+++ /dev/null
@@ -1,51 +0,0 @@
-; RUN: opt < %s -loop-vectorize -enable-vplan-native-path -vplan-build-stress-test -vplan-verify-hcfg -debug-only=loop-vectorize -disable-output 2>&1 | FileCheck %s -check-prefix=VERIFIER
-; RUN: opt < %s -loop-vectorize -enable-vplan-native-path -vplan-build-stress-test -debug-only=loop-vectorize -disable-output 2>&1 | FileCheck %s -check-prefix=NO-VERIFIER -allow-empty
-; REQUIRES: asserts
-
-; Verify that the stress testing flag for the VPlan H-CFG builder works as
-; expected with and without enabling the VPlan H-CFG Verifier.
-
-; VERIFIER: Verifying VPlan H-CFG.
-; NO-VERIFIER-NOT: Verifying VPlan H-CFG.
-
-target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
-
-define void @foo(i32* nocapture %a, i32* nocapture readonly %b, i32 %N, i32 %M) {
-entry:
-  %cmp32 = icmp sgt i32 %N, 0
-  br i1 %cmp32, label %outer.ph, label %for.end15
-
-outer.ph:
-  %cmp230 = icmp sgt i32 %M, 0
-  %0 = sext i32 %M to i64
-  %wide.trip.count = zext i32 %M to i64
-  %wide.trip.count38 = zext i32 %N to i64
-  br label %outer.body
-
-outer.body:
-  %indvars.iv35 = phi i64 [ 0, %outer.ph ], [ %indvars.iv.next36, %outer.inc ]
-  br i1 %cmp230, label %inner.ph, label %outer.inc
-
-inner.ph:
-  %1 = mul nsw i64 %indvars.iv35, %0
-  br label %inner.body
-
-inner.body:
-  %indvars.iv = phi i64 [ 0, %inner.ph ], [ %indvars.iv.next, %inner.body ]
-  %2 = add nsw i64 %indvars.iv, %1
-  %arrayidx = getelementptr inbounds i32, i32* %b, i64 %2
-  %3 = load i32, i32* %arrayidx, align 4
-  %arrayidx12 = getelementptr inbounds i32, i32* %a, i64 %2
-  store i32 %3, i32* %arrayidx12, align 4
-  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
-  %exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count
-  br i1 %exitcond, label %outer.inc, label %inner.body
-
-outer.inc:
-  %indvars.iv.next36 = add nuw nsw i64 %indvars.iv35, 1
-  %exitcond39 = icmp eq i64 %indvars.iv.next36, %wide.trip.count38
-  br i1 %exitcond39, label %for.end15, label %outer.body
-
-for.end15:
-  ret void
-}