diff --git a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp --- a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp +++ b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp @@ -147,7 +147,6 @@ // no bits are set in the fixup range. // // name offset bits flags - {"FIXUP_LANAI_NONE", 0, 32, 0}, {"FIXUP_LANAI_21", 16, 16 /*21*/, 0}, {"FIXUP_LANAI_21_F", 16, 16 /*21*/, 0}, {"FIXUP_LANAI_25", 7, 25, 0}, diff --git a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiELFObjectWriter.cpp b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiELFObjectWriter.cpp --- a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiELFObjectWriter.cpp +++ b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiELFObjectWriter.cpp @@ -62,9 +62,6 @@ case Lanai::FIXUP_LANAI_LO16: Type = ELF::R_LANAI_LO16; break; - case Lanai::FIXUP_LANAI_NONE: - Type = ELF::R_LANAI_NONE; - break; default: llvm_unreachable("Invalid fixup kind!"); diff --git a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiFixupKinds.h b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiFixupKinds.h --- a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiFixupKinds.h +++ b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiFixupKinds.h @@ -22,10 +22,7 @@ // in LanaiAsmBackend.cpp. // enum Fixups { - // Results in R_Lanai_NONE - FIXUP_LANAI_NONE = FirstTargetFixupKind, - - FIXUP_LANAI_21, // 21-bit symbol relocation + FIXUP_LANAI_21 = FirstTargetFixupKind, // 21-bit symbol relocation FIXUP_LANAI_21_F, // 21-bit symbol relocation, last two bits masked to 0 FIXUP_LANAI_25, // 25-bit branch targets FIXUP_LANAI_32, // general 32-bit relocation diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp --- a/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp +++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp @@ -302,7 +302,6 @@ Optional MipsAsmBackend::getFixupKind(StringRef Name) const { return StringSwitch>(Name) - .Case("R_MIPS_NONE", (MCFixupKind)Mips::fixup_Mips_NONE) .Case("R_MIPS_32", FK_Data_4) .Case("R_MIPS_GOT_PAGE", (MCFixupKind)Mips::fixup_Mips_GOT_PAGE) .Case("R_MIPS_CALL_HI16", (MCFixupKind)Mips::fixup_Mips_CALL_HI16) @@ -350,7 +349,6 @@ // MipsFixupKinds.h. // // name offset bits flags - { "fixup_Mips_NONE", 0, 0, 0 }, { "fixup_Mips_16", 0, 16, 0 }, { "fixup_Mips_32", 0, 32, 0 }, { "fixup_Mips_REL32", 0, 32, 0 }, @@ -430,7 +428,6 @@ // MipsFixupKinds.h. // // name offset bits flags - { "fixup_Mips_NONE", 0, 0, 0 }, { "fixup_Mips_16", 16, 16, 0 }, { "fixup_Mips_32", 0, 32, 0 }, { "fixup_Mips_REL32", 0, 32, 0 }, diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp --- a/llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp +++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp @@ -222,8 +222,6 @@ unsigned Kind = (unsigned)Fixup.getKind(); switch (Kind) { - case Mips::fixup_Mips_NONE: - return ELF::R_MIPS_NONE; case FK_Data_1: Ctx.reportError(Fixup.getLoc(), "MIPS does not support one byte relocations"); diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h b/llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h --- a/llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h +++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h @@ -22,11 +22,8 @@ // in MipsAsmBackend.cpp. // enum Fixups { - // Branch fixups resulting in R_MIPS_NONE. - fixup_Mips_NONE = FirstTargetFixupKind, - // Branch fixups resulting in R_MIPS_16. - fixup_Mips_16, + fixup_Mips_16 = FirstTargetFixupKind, // Pure 32 bit data fixup resulting in - R_MIPS_32. fixup_Mips_32,