Index: lib/Target/X86/AsmParser/X86AsmParser.cpp =================================================================== --- lib/Target/X86/AsmParser/X86AsmParser.cpp +++ lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -2387,13 +2387,15 @@ } } + unsigned ComparisonCode = ~0U; + // FIXME: Hack to recognize vpcmp{ub,uw,ud,uq,b,w,d,q}. if (PatchedName.startswith("vpcmp") && - (PatchedName.endswith("b") || PatchedName.endswith("w") || - PatchedName.endswith("d") || PatchedName.endswith("q"))) { - unsigned CCIdx = PatchedName.drop_back().back() == 'u' ? 2 : 1; - unsigned ComparisonCode = StringSwitch( - PatchedName.slice(5, PatchedName.size() - CCIdx)) + (PatchedName.back() == 'b' || PatchedName.back() == 'w' || + PatchedName.back() == 'd' || PatchedName.back() == 'q')) { + unsigned SuffixSize = PatchedName.drop_back().back() == 'u' ? 2 : 1; + unsigned CC = StringSwitch( + PatchedName.slice(5, PatchedName.size() - SuffixSize)) .Case("eq", 0x0) // Only allowed on unsigned. Checked below. .Case("lt", 0x1) .Case("le", 0x2) @@ -2403,24 +2405,26 @@ .Case("nle", 0x6) //.Case("true", 0x7) // Not a documented alias. .Default(~0U); - if (ComparisonCode != ~0U && (ComparisonCode != 0 || CCIdx == 2)) { - Operands.push_back(X86Operand::CreateToken("vpcmp", NameLoc)); - - const MCExpr *ImmOp = MCConstantExpr::create(ComparisonCode, - getParser().getContext()); - Operands.push_back(X86Operand::CreateImm(ImmOp, NameLoc, NameLoc)); - - PatchedName = PatchedName.substr(PatchedName.size() - CCIdx); + if (CC != ~0U && (CC != 0 || SuffixSize == 2)) { + switch (PatchedName.back()) { + default: llvm_unreachable("Unexpected character!"); + case 'b': PatchedName = SuffixSize == 2 ? "vpcmpub" : "vpcmpb"; break; + case 'w': PatchedName = SuffixSize == 2 ? "vpcmpuw" : "vpcmpw"; break; + case 'd': PatchedName = SuffixSize == 2 ? "vpcmpud" : "vpcmpd"; break; + case 'q': PatchedName = SuffixSize == 2 ? "vpcmpuq" : "vpcmpq"; break; + } + // Set up the immediate to push into the operands later. + ComparisonCode = CC; } } // FIXME: Hack to recognize vpcom{ub,uw,ud,uq,b,w,d,q}. if (PatchedName.startswith("vpcom") && - (PatchedName.endswith("b") || PatchedName.endswith("w") || - PatchedName.endswith("d") || PatchedName.endswith("q"))) { - unsigned CCIdx = PatchedName.drop_back().back() == 'u' ? 2 : 1; - unsigned ComparisonCode = StringSwitch( - PatchedName.slice(5, PatchedName.size() - CCIdx)) + (PatchedName.back() == 'b' || PatchedName.back() == 'w' || + PatchedName.back() == 'd' || PatchedName.back() == 'q')) { + unsigned SuffixSize = PatchedName.drop_back().back() == 'u' ? 2 : 1; + ComparisonCode = StringSwitch( + PatchedName.slice(5, PatchedName.size() - SuffixSize)) .Case("lt", 0x0) .Case("le", 0x1) .Case("gt", 0x2) @@ -2431,13 +2435,14 @@ .Case("true", 0x7) .Default(~0U); if (ComparisonCode != ~0U) { - Operands.push_back(X86Operand::CreateToken("vpcom", NameLoc)); - - const MCExpr *ImmOp = MCConstantExpr::create(ComparisonCode, - getParser().getContext()); - Operands.push_back(X86Operand::CreateImm(ImmOp, NameLoc, NameLoc)); - - PatchedName = PatchedName.substr(PatchedName.size() - CCIdx); + switch (PatchedName.back()) { + default: llvm_unreachable("Unexpected character!"); + case 'b': PatchedName = SuffixSize == 2 ? "vpcomub" : "vpcomb"; break; + case 'w': PatchedName = SuffixSize == 2 ? "vpcomuw" : "vpcomw"; break; + case 'd': PatchedName = SuffixSize == 2 ? "vpcomud" : "vpcomd"; break; + case 'q': PatchedName = SuffixSize == 2 ? "vpcomuq" : "vpcomq"; break; + } + // Immediate will be pushed into stream later. } } @@ -2510,6 +2515,13 @@ Operands.push_back(X86Operand::CreateToken(PatchedName, NameLoc)); + // Push the immediate if we extracted one from the mnemonic. + if (ComparisonCode != ~0U && !isParsingIntelSyntax()) { + const MCExpr *ImmOp = MCConstantExpr::create(ComparisonCode, + getParser().getContext()); + Operands.push_back(X86Operand::CreateImm(ImmOp, NameLoc, NameLoc)); + } + // This does the actual operand parsing. Don't parse any more if we have a // prefix juxtaposed with an operation like "lock incl 4(%rax)", because we // just want to parse the "lock" as the first instruction and the "incl" as @@ -2544,6 +2556,13 @@ return TokError("unexpected token in argument list"); } + // Push the immediate if we extracted one from the mnemonic. + if (ComparisonCode != ~0U && isParsingIntelSyntax()) { + const MCExpr *ImmOp = MCConstantExpr::create(ComparisonCode, + getParser().getContext()); + Operands.push_back(X86Operand::CreateImm(ImmOp, NameLoc, NameLoc)); + } + // Consume the EndOfStatement or the prefix separator Slash if (getLexer().is(AsmToken::EndOfStatement) || (isPrefix && getLexer().is(AsmToken::Slash))) Index: lib/Target/X86/Disassembler/X86Disassembler.cpp =================================================================== --- lib/Target/X86/Disassembler/X86Disassembler.cpp +++ lib/Target/X86/Disassembler/X86Disassembler.cpp @@ -459,22 +459,6 @@ case X86::CMPSDrr: NewOpc = X86::CMPSDrr_alt; break; case X86::CMPSSrm: NewOpc = X86::CMPSSrm_alt; break; case X86::CMPSSrr: NewOpc = X86::CMPSSrr_alt; break; - case X86::VPCOMBri: NewOpc = X86::VPCOMBri_alt; break; - case X86::VPCOMBmi: NewOpc = X86::VPCOMBmi_alt; break; - case X86::VPCOMWri: NewOpc = X86::VPCOMWri_alt; break; - case X86::VPCOMWmi: NewOpc = X86::VPCOMWmi_alt; break; - case X86::VPCOMDri: NewOpc = X86::VPCOMDri_alt; break; - case X86::VPCOMDmi: NewOpc = X86::VPCOMDmi_alt; break; - case X86::VPCOMQri: NewOpc = X86::VPCOMQri_alt; break; - case X86::VPCOMQmi: NewOpc = X86::VPCOMQmi_alt; break; - case X86::VPCOMUBri: NewOpc = X86::VPCOMUBri_alt; break; - case X86::VPCOMUBmi: NewOpc = X86::VPCOMUBmi_alt; break; - case X86::VPCOMUWri: NewOpc = X86::VPCOMUWri_alt; break; - case X86::VPCOMUWmi: NewOpc = X86::VPCOMUWmi_alt; break; - case X86::VPCOMUDri: NewOpc = X86::VPCOMUDri_alt; break; - case X86::VPCOMUDmi: NewOpc = X86::VPCOMUDmi_alt; break; - case X86::VPCOMUQri: NewOpc = X86::VPCOMUQri_alt; break; - case X86::VPCOMUQmi: NewOpc = X86::VPCOMUQmi_alt; break; } // Switch opcode to the one that doesn't get special printing. mcInst.setOpcode(NewOpc); @@ -521,135 +505,6 @@ // Switch opcode to the one that doesn't get special printing. mcInst.setOpcode(NewOpc); } - } else if (type == TYPE_AVX512ICC) { - if (immediate >= 8 || ((immediate & 0x3) == 3)) { - unsigned NewOpc; - switch (mcInst.getOpcode()) { - default: llvm_unreachable("unexpected opcode"); - case X86::VPCMPBZ128rmi: NewOpc = X86::VPCMPBZ128rmi_alt; break; - case X86::VPCMPBZ128rmik: NewOpc = X86::VPCMPBZ128rmik_alt; break; - case X86::VPCMPBZ128rri: NewOpc = X86::VPCMPBZ128rri_alt; break; - case X86::VPCMPBZ128rrik: NewOpc = X86::VPCMPBZ128rrik_alt; break; - case X86::VPCMPBZ256rmi: NewOpc = X86::VPCMPBZ256rmi_alt; break; - case X86::VPCMPBZ256rmik: NewOpc = X86::VPCMPBZ256rmik_alt; break; - case X86::VPCMPBZ256rri: NewOpc = X86::VPCMPBZ256rri_alt; break; - case X86::VPCMPBZ256rrik: NewOpc = X86::VPCMPBZ256rrik_alt; break; - case X86::VPCMPBZrmi: NewOpc = X86::VPCMPBZrmi_alt; break; - case X86::VPCMPBZrmik: NewOpc = X86::VPCMPBZrmik_alt; break; - case X86::VPCMPBZrri: NewOpc = X86::VPCMPBZrri_alt; break; - case X86::VPCMPBZrrik: NewOpc = X86::VPCMPBZrrik_alt; break; - case X86::VPCMPDZ128rmi: NewOpc = X86::VPCMPDZ128rmi_alt; break; - case X86::VPCMPDZ128rmib: NewOpc = X86::VPCMPDZ128rmib_alt; break; - case X86::VPCMPDZ128rmibk: NewOpc = X86::VPCMPDZ128rmibk_alt; break; - case X86::VPCMPDZ128rmik: NewOpc = X86::VPCMPDZ128rmik_alt; break; - case X86::VPCMPDZ128rri: NewOpc = X86::VPCMPDZ128rri_alt; break; - case X86::VPCMPDZ128rrik: NewOpc = X86::VPCMPDZ128rrik_alt; break; - case X86::VPCMPDZ256rmi: NewOpc = X86::VPCMPDZ256rmi_alt; break; - case X86::VPCMPDZ256rmib: NewOpc = X86::VPCMPDZ256rmib_alt; break; - case X86::VPCMPDZ256rmibk: NewOpc = X86::VPCMPDZ256rmibk_alt; break; - case X86::VPCMPDZ256rmik: NewOpc = X86::VPCMPDZ256rmik_alt; break; - case X86::VPCMPDZ256rri: NewOpc = X86::VPCMPDZ256rri_alt; break; - case X86::VPCMPDZ256rrik: NewOpc = X86::VPCMPDZ256rrik_alt; break; - case X86::VPCMPDZrmi: NewOpc = X86::VPCMPDZrmi_alt; break; - case X86::VPCMPDZrmib: NewOpc = X86::VPCMPDZrmib_alt; break; - case X86::VPCMPDZrmibk: NewOpc = X86::VPCMPDZrmibk_alt; break; - case X86::VPCMPDZrmik: NewOpc = X86::VPCMPDZrmik_alt; break; - case X86::VPCMPDZrri: NewOpc = X86::VPCMPDZrri_alt; break; - case X86::VPCMPDZrrik: NewOpc = X86::VPCMPDZrrik_alt; break; - case X86::VPCMPQZ128rmi: NewOpc = X86::VPCMPQZ128rmi_alt; break; - case X86::VPCMPQZ128rmib: NewOpc = X86::VPCMPQZ128rmib_alt; break; - case X86::VPCMPQZ128rmibk: NewOpc = X86::VPCMPQZ128rmibk_alt; break; - case X86::VPCMPQZ128rmik: NewOpc = X86::VPCMPQZ128rmik_alt; break; - case X86::VPCMPQZ128rri: NewOpc = X86::VPCMPQZ128rri_alt; break; - case X86::VPCMPQZ128rrik: NewOpc = X86::VPCMPQZ128rrik_alt; break; - case X86::VPCMPQZ256rmi: NewOpc = X86::VPCMPQZ256rmi_alt; break; - case X86::VPCMPQZ256rmib: NewOpc = X86::VPCMPQZ256rmib_alt; break; - case X86::VPCMPQZ256rmibk: NewOpc = X86::VPCMPQZ256rmibk_alt; break; - case X86::VPCMPQZ256rmik: NewOpc = X86::VPCMPQZ256rmik_alt; break; - case X86::VPCMPQZ256rri: NewOpc = X86::VPCMPQZ256rri_alt; break; - case X86::VPCMPQZ256rrik: NewOpc = X86::VPCMPQZ256rrik_alt; break; - case X86::VPCMPQZrmi: NewOpc = X86::VPCMPQZrmi_alt; break; - case X86::VPCMPQZrmib: NewOpc = X86::VPCMPQZrmib_alt; break; - case X86::VPCMPQZrmibk: NewOpc = X86::VPCMPQZrmibk_alt; break; - case X86::VPCMPQZrmik: NewOpc = X86::VPCMPQZrmik_alt; break; - case X86::VPCMPQZrri: NewOpc = X86::VPCMPQZrri_alt; break; - case X86::VPCMPQZrrik: NewOpc = X86::VPCMPQZrrik_alt; break; - case X86::VPCMPUBZ128rmi: NewOpc = X86::VPCMPUBZ128rmi_alt; break; - case X86::VPCMPUBZ128rmik: NewOpc = X86::VPCMPUBZ128rmik_alt; break; - case X86::VPCMPUBZ128rri: NewOpc = X86::VPCMPUBZ128rri_alt; break; - case X86::VPCMPUBZ128rrik: NewOpc = X86::VPCMPUBZ128rrik_alt; break; - case X86::VPCMPUBZ256rmi: NewOpc = X86::VPCMPUBZ256rmi_alt; break; - case X86::VPCMPUBZ256rmik: NewOpc = X86::VPCMPUBZ256rmik_alt; break; - case X86::VPCMPUBZ256rri: NewOpc = X86::VPCMPUBZ256rri_alt; break; - case X86::VPCMPUBZ256rrik: NewOpc = X86::VPCMPUBZ256rrik_alt; break; - case X86::VPCMPUBZrmi: NewOpc = X86::VPCMPUBZrmi_alt; break; - case X86::VPCMPUBZrmik: NewOpc = X86::VPCMPUBZrmik_alt; break; - case X86::VPCMPUBZrri: NewOpc = X86::VPCMPUBZrri_alt; break; - case X86::VPCMPUBZrrik: NewOpc = X86::VPCMPUBZrrik_alt; break; - case X86::VPCMPUDZ128rmi: NewOpc = X86::VPCMPUDZ128rmi_alt; break; - case X86::VPCMPUDZ128rmib: NewOpc = X86::VPCMPUDZ128rmib_alt; break; - case X86::VPCMPUDZ128rmibk: NewOpc = X86::VPCMPUDZ128rmibk_alt; break; - case X86::VPCMPUDZ128rmik: NewOpc = X86::VPCMPUDZ128rmik_alt; break; - case X86::VPCMPUDZ128rri: NewOpc = X86::VPCMPUDZ128rri_alt; break; - case X86::VPCMPUDZ128rrik: NewOpc = X86::VPCMPUDZ128rrik_alt; break; - case X86::VPCMPUDZ256rmi: NewOpc = X86::VPCMPUDZ256rmi_alt; break; - case X86::VPCMPUDZ256rmib: NewOpc = X86::VPCMPUDZ256rmib_alt; break; - case X86::VPCMPUDZ256rmibk: NewOpc = X86::VPCMPUDZ256rmibk_alt; break; - case X86::VPCMPUDZ256rmik: NewOpc = X86::VPCMPUDZ256rmik_alt; break; - case X86::VPCMPUDZ256rri: NewOpc = X86::VPCMPUDZ256rri_alt; break; - case X86::VPCMPUDZ256rrik: NewOpc = X86::VPCMPUDZ256rrik_alt; break; - case X86::VPCMPUDZrmi: NewOpc = X86::VPCMPUDZrmi_alt; break; - case X86::VPCMPUDZrmib: NewOpc = X86::VPCMPUDZrmib_alt; break; - case X86::VPCMPUDZrmibk: NewOpc = X86::VPCMPUDZrmibk_alt; break; - case X86::VPCMPUDZrmik: NewOpc = X86::VPCMPUDZrmik_alt; break; - case X86::VPCMPUDZrri: NewOpc = X86::VPCMPUDZrri_alt; break; - case X86::VPCMPUDZrrik: NewOpc = X86::VPCMPUDZrrik_alt; break; - case X86::VPCMPUQZ128rmi: NewOpc = X86::VPCMPUQZ128rmi_alt; break; - case X86::VPCMPUQZ128rmib: NewOpc = X86::VPCMPUQZ128rmib_alt; break; - case X86::VPCMPUQZ128rmibk: NewOpc = X86::VPCMPUQZ128rmibk_alt; break; - case X86::VPCMPUQZ128rmik: NewOpc = X86::VPCMPUQZ128rmik_alt; break; - case X86::VPCMPUQZ128rri: NewOpc = X86::VPCMPUQZ128rri_alt; break; - case X86::VPCMPUQZ128rrik: NewOpc = X86::VPCMPUQZ128rrik_alt; break; - case X86::VPCMPUQZ256rmi: NewOpc = X86::VPCMPUQZ256rmi_alt; break; - case X86::VPCMPUQZ256rmib: NewOpc = X86::VPCMPUQZ256rmib_alt; break; - case X86::VPCMPUQZ256rmibk: NewOpc = X86::VPCMPUQZ256rmibk_alt; break; - case X86::VPCMPUQZ256rmik: NewOpc = X86::VPCMPUQZ256rmik_alt; break; - case X86::VPCMPUQZ256rri: NewOpc = X86::VPCMPUQZ256rri_alt; break; - case X86::VPCMPUQZ256rrik: NewOpc = X86::VPCMPUQZ256rrik_alt; break; - case X86::VPCMPUQZrmi: NewOpc = X86::VPCMPUQZrmi_alt; break; - case X86::VPCMPUQZrmib: NewOpc = X86::VPCMPUQZrmib_alt; break; - case X86::VPCMPUQZrmibk: NewOpc = X86::VPCMPUQZrmibk_alt; break; - case X86::VPCMPUQZrmik: NewOpc = X86::VPCMPUQZrmik_alt; break; - case X86::VPCMPUQZrri: NewOpc = X86::VPCMPUQZrri_alt; break; - case X86::VPCMPUQZrrik: NewOpc = X86::VPCMPUQZrrik_alt; break; - case X86::VPCMPUWZ128rmi: NewOpc = X86::VPCMPUWZ128rmi_alt; break; - case X86::VPCMPUWZ128rmik: NewOpc = X86::VPCMPUWZ128rmik_alt; break; - case X86::VPCMPUWZ128rri: NewOpc = X86::VPCMPUWZ128rri_alt; break; - case X86::VPCMPUWZ128rrik: NewOpc = X86::VPCMPUWZ128rrik_alt; break; - case X86::VPCMPUWZ256rmi: NewOpc = X86::VPCMPUWZ256rmi_alt; break; - case X86::VPCMPUWZ256rmik: NewOpc = X86::VPCMPUWZ256rmik_alt; break; - case X86::VPCMPUWZ256rri: NewOpc = X86::VPCMPUWZ256rri_alt; break; - case X86::VPCMPUWZ256rrik: NewOpc = X86::VPCMPUWZ256rrik_alt; break; - case X86::VPCMPUWZrmi: NewOpc = X86::VPCMPUWZrmi_alt; break; - case X86::VPCMPUWZrmik: NewOpc = X86::VPCMPUWZrmik_alt; break; - case X86::VPCMPUWZrri: NewOpc = X86::VPCMPUWZrri_alt; break; - case X86::VPCMPUWZrrik: NewOpc = X86::VPCMPUWZrrik_alt; break; - case X86::VPCMPWZ128rmi: NewOpc = X86::VPCMPWZ128rmi_alt; break; - case X86::VPCMPWZ128rmik: NewOpc = X86::VPCMPWZ128rmik_alt; break; - case X86::VPCMPWZ128rri: NewOpc = X86::VPCMPWZ128rri_alt; break; - case X86::VPCMPWZ128rrik: NewOpc = X86::VPCMPWZ128rrik_alt; break; - case X86::VPCMPWZ256rmi: NewOpc = X86::VPCMPWZ256rmi_alt; break; - case X86::VPCMPWZ256rmik: NewOpc = X86::VPCMPWZ256rmik_alt; break; - case X86::VPCMPWZ256rri: NewOpc = X86::VPCMPWZ256rri_alt; break; - case X86::VPCMPWZ256rrik: NewOpc = X86::VPCMPWZ256rrik_alt; break; - case X86::VPCMPWZrmi: NewOpc = X86::VPCMPWZrmi_alt; break; - case X86::VPCMPWZrmik: NewOpc = X86::VPCMPWZrmik_alt; break; - case X86::VPCMPWZrri: NewOpc = X86::VPCMPWZrri_alt; break; - case X86::VPCMPWZrrik: NewOpc = X86::VPCMPWZrrik_alt; break; - } - // Switch opcode to the one that doesn't get special printing. - mcInst.setOpcode(NewOpc); - } } switch (type) { Index: lib/Target/X86/InstPrinter/X86ATTInstPrinter.h =================================================================== --- lib/Target/X86/InstPrinter/X86ATTInstPrinter.h +++ lib/Target/X86/InstPrinter/X86ATTInstPrinter.h @@ -26,6 +26,7 @@ void printRegName(raw_ostream &OS, unsigned RegNo) const override; void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot, const MCSubtargetInfo &STI) override; + bool printVecCompareInstr(const MCInst *MI, raw_ostream &OS); // Autogenerated by tblgen, returns true if we successfully printed an // alias. Index: lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp =================================================================== --- lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp +++ lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp @@ -67,13 +67,164 @@ OS << "\tdata32"; } // Try to print any aliases first. - else if (!printAliasInstr(MI, OS)) + else if (!printAliasInstr(MI, OS) && + !printVecCompareInstr(MI, OS)) printInstruction(MI, OS); // Next always print the annotation. printAnnotation(OS, Annot); } +bool X86ATTInstPrinter::printVecCompareInstr(const MCInst *MI, + raw_ostream &OS) { + if (MI->getNumOperands() == 0 || + !MI->getOperand(MI->getNumOperands() - 1).isImm()) + return false; + + unsigned Imm = MI->getOperand(MI->getNumOperands() - 1).getImm(); + + const MCInstrDesc &Desc = MII.get(MI->getOpcode()); + + // Custom print the vector compare instructions to get the immediate + // translated into the mnemonic. + switch (MI->getOpcode()) { + case X86::VPCOMBmi: case X86::VPCOMBri: + case X86::VPCOMDmi: case X86::VPCOMDri: + case X86::VPCOMQmi: case X86::VPCOMQri: + case X86::VPCOMUBmi: case X86::VPCOMUBri: + case X86::VPCOMUDmi: case X86::VPCOMUDri: + case X86::VPCOMUQmi: case X86::VPCOMUQri: + case X86::VPCOMUWmi: case X86::VPCOMUWri: + case X86::VPCOMWmi: case X86::VPCOMWri: + if (Imm >= 0 && Imm <= 7) { + printVPCOMMnemonic(MI, OS); + + if ((Desc.TSFlags & X86II::FormMask) == X86II::MRMSrcMem) + printi128mem(MI, 2, OS); + else + printOperand(MI, 2, OS); + + OS << ", "; + printOperand(MI, 1, OS); + OS << ", "; + printOperand(MI, 0, OS); + return true; + } + break; + case X86::VPCMPBZ128rmi: case X86::VPCMPBZ128rri: + case X86::VPCMPBZ256rmi: case X86::VPCMPBZ256rri: + case X86::VPCMPBZrmi: case X86::VPCMPBZrri: + case X86::VPCMPDZ128rmi: case X86::VPCMPDZ128rri: + case X86::VPCMPDZ256rmi: case X86::VPCMPDZ256rri: + case X86::VPCMPDZrmi: case X86::VPCMPDZrri: + case X86::VPCMPQZ128rmi: case X86::VPCMPQZ128rri: + case X86::VPCMPQZ256rmi: case X86::VPCMPQZ256rri: + case X86::VPCMPQZrmi: case X86::VPCMPQZrri: + case X86::VPCMPUBZ128rmi: case X86::VPCMPUBZ128rri: + case X86::VPCMPUBZ256rmi: case X86::VPCMPUBZ256rri: + case X86::VPCMPUBZrmi: case X86::VPCMPUBZrri: + case X86::VPCMPUDZ128rmi: case X86::VPCMPUDZ128rri: + case X86::VPCMPUDZ256rmi: case X86::VPCMPUDZ256rri: + case X86::VPCMPUDZrmi: case X86::VPCMPUDZrri: + case X86::VPCMPUQZ128rmi: case X86::VPCMPUQZ128rri: + case X86::VPCMPUQZ256rmi: case X86::VPCMPUQZ256rri: + case X86::VPCMPUQZrmi: case X86::VPCMPUQZrri: + case X86::VPCMPUWZ128rmi: case X86::VPCMPUWZ128rri: + case X86::VPCMPUWZ256rmi: case X86::VPCMPUWZ256rri: + case X86::VPCMPUWZrmi: case X86::VPCMPUWZrri: + case X86::VPCMPWZ128rmi: case X86::VPCMPWZ128rri: + case X86::VPCMPWZ256rmi: case X86::VPCMPWZ256rri: + case X86::VPCMPWZrmi: case X86::VPCMPWZrri: + case X86::VPCMPBZ128rmik: case X86::VPCMPBZ128rrik: + case X86::VPCMPBZ256rmik: case X86::VPCMPBZ256rrik: + case X86::VPCMPBZrmik: case X86::VPCMPBZrrik: + case X86::VPCMPDZ128rmik: case X86::VPCMPDZ128rrik: + case X86::VPCMPDZ256rmik: case X86::VPCMPDZ256rrik: + case X86::VPCMPDZrmik: case X86::VPCMPDZrrik: + case X86::VPCMPQZ128rmik: case X86::VPCMPQZ128rrik: + case X86::VPCMPQZ256rmik: case X86::VPCMPQZ256rrik: + case X86::VPCMPQZrmik: case X86::VPCMPQZrrik: + case X86::VPCMPUBZ128rmik: case X86::VPCMPUBZ128rrik: + case X86::VPCMPUBZ256rmik: case X86::VPCMPUBZ256rrik: + case X86::VPCMPUBZrmik: case X86::VPCMPUBZrrik: + case X86::VPCMPUDZ128rmik: case X86::VPCMPUDZ128rrik: + case X86::VPCMPUDZ256rmik: case X86::VPCMPUDZ256rrik: + case X86::VPCMPUDZrmik: case X86::VPCMPUDZrrik: + case X86::VPCMPUQZ128rmik: case X86::VPCMPUQZ128rrik: + case X86::VPCMPUQZ256rmik: case X86::VPCMPUQZ256rrik: + case X86::VPCMPUQZrmik: case X86::VPCMPUQZrrik: + case X86::VPCMPUWZ128rmik: case X86::VPCMPUWZ128rrik: + case X86::VPCMPUWZ256rmik: case X86::VPCMPUWZ256rrik: + case X86::VPCMPUWZrmik: case X86::VPCMPUWZrrik: + case X86::VPCMPWZ128rmik: case X86::VPCMPWZ128rrik: + case X86::VPCMPWZ256rmik: case X86::VPCMPWZ256rrik: + case X86::VPCMPWZrmik: case X86::VPCMPWZrrik: + case X86::VPCMPDZ128rmib: case X86::VPCMPDZ128rmibk: + case X86::VPCMPDZ256rmib: case X86::VPCMPDZ256rmibk: + case X86::VPCMPDZrmib: case X86::VPCMPDZrmibk: + case X86::VPCMPQZ128rmib: case X86::VPCMPQZ128rmibk: + case X86::VPCMPQZ256rmib: case X86::VPCMPQZ256rmibk: + case X86::VPCMPQZrmib: case X86::VPCMPQZrmibk: + case X86::VPCMPUDZ128rmib: case X86::VPCMPUDZ128rmibk: + case X86::VPCMPUDZ256rmib: case X86::VPCMPUDZ256rmibk: + case X86::VPCMPUDZrmib: case X86::VPCMPUDZrmibk: + case X86::VPCMPUQZ128rmib: case X86::VPCMPUQZ128rmibk: + case X86::VPCMPUQZ256rmib: case X86::VPCMPUQZ256rmibk: + case X86::VPCMPUQZrmib: case X86::VPCMPUQZrmibk: + if ((Imm >= 0 && Imm <= 2) || (Imm >= 4 && Imm <= 6)) { + printVPCMPMnemonic(MI, OS); + + unsigned CurOp = (Desc.TSFlags & X86II::EVEX_K) ? 3 : 2; + + if ((Desc.TSFlags & X86II::FormMask) == X86II::MRMSrcMem) { + if (Desc.TSFlags & X86II::EVEX_B) { + // Broadcast form. + // Load size is based on W-bit as only D and Q are supported. + if (Desc.TSFlags & X86II::VEX_W) + printi64mem(MI, CurOp--, OS); + else + printi32mem(MI, CurOp--, OS); + + // Print the number of elements broadcasted. + unsigned NumElts; + if (Desc.TSFlags & X86II::EVEX_L2) + NumElts = (Desc.TSFlags & X86II::VEX_W) ? 8 : 16; + else if (Desc.TSFlags & X86II::VEX_L) + NumElts = (Desc.TSFlags & X86II::VEX_W) ? 4 : 8; + else + NumElts = (Desc.TSFlags & X86II::VEX_W) ? 2 : 4; + OS << "{1to" << NumElts << "}"; + } else { + if (Desc.TSFlags & X86II::EVEX_L2) + printi512mem(MI, CurOp--, OS); + else if (Desc.TSFlags & X86II::VEX_L) + printi256mem(MI, CurOp--, OS); + else + printi128mem(MI, CurOp--, OS); + } + } else { + printOperand(MI, CurOp--, OS); + } + + OS << ", "; + printOperand(MI, CurOp--, OS); + OS << ", "; + printOperand(MI, 0, OS); + if (CurOp > 0) { + // Print mask operand. + OS << " {"; + printOperand(MI, CurOp--, OS); + OS << "}"; + } + + return true; + } + break; + } + + return false; +} + void X86ATTInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) { const MCOperand &Op = MI->getOperand(OpNo); Index: lib/Target/X86/InstPrinter/X86InstPrinterCommon.h =================================================================== --- lib/Target/X86/InstPrinter/X86InstPrinterCommon.h +++ lib/Target/X86/InstPrinter/X86InstPrinterCommon.h @@ -24,7 +24,8 @@ virtual void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) = 0; void printSSEAVXCC(const MCInst *MI, unsigned Op, raw_ostream &OS); - void printXOPCC(const MCInst *MI, unsigned Op, raw_ostream &OS); + void printVPCOMMnemonic(const MCInst *MI, raw_ostream &OS); + void printVPCMPMnemonic(const MCInst *MI, raw_ostream &OS); void printRoundingControl(const MCInst *MI, unsigned Op, raw_ostream &O); void printPCRelImm(const MCInst *MI, unsigned OpNo, raw_ostream &O); protected: Index: lib/Target/X86/InstPrinter/X86InstPrinterCommon.cpp =================================================================== --- lib/Target/X86/InstPrinter/X86InstPrinterCommon.cpp +++ lib/Target/X86/InstPrinter/X86InstPrinterCommon.cpp @@ -64,19 +64,120 @@ } } -void X86InstPrinterCommon::printXOPCC(const MCInst *MI, unsigned Op, - raw_ostream &O) { - int64_t Imm = MI->getOperand(Op).getImm(); +void X86InstPrinterCommon::printVPCOMMnemonic(const MCInst *MI, + raw_ostream &OS) { + OS << "vpcom"; + + int64_t Imm = MI->getOperand(MI->getNumOperands() - 1).getImm(); switch (Imm) { - default: llvm_unreachable("Invalid xopcc argument!"); - case 0: O << "lt"; break; - case 1: O << "le"; break; - case 2: O << "gt"; break; - case 3: O << "ge"; break; - case 4: O << "eq"; break; - case 5: O << "neq"; break; - case 6: O << "false"; break; - case 7: O << "true"; break; + default: llvm_unreachable("Invalid vpcom argument!"); + case 0: OS << "lt"; break; + case 1: OS << "le"; break; + case 2: OS << "gt"; break; + case 3: OS << "ge"; break; + case 4: OS << "eq"; break; + case 5: OS << "neq"; break; + case 6: OS << "false"; break; + case 7: OS << "true"; break; + } + + switch (MI->getOpcode()) { + default: llvm_unreachable("Unexpected opcode!"); + case X86::VPCOMBmi: case X86::VPCOMBri: OS << "b\t"; break; + case X86::VPCOMDmi: case X86::VPCOMDri: OS << "d\t"; break; + case X86::VPCOMQmi: case X86::VPCOMQri: OS << "q\t"; break; + case X86::VPCOMUBmi: case X86::VPCOMUBri: OS << "ub\t"; break; + case X86::VPCOMUDmi: case X86::VPCOMUDri: OS << "ud\t"; break; + case X86::VPCOMUQmi: case X86::VPCOMUQri: OS << "uq\t"; break; + case X86::VPCOMUWmi: case X86::VPCOMUWri: OS << "uw\t"; break; + case X86::VPCOMWmi: case X86::VPCOMWri: OS << "w\t"; break; + } +} + +void X86InstPrinterCommon::printVPCMPMnemonic(const MCInst *MI, + raw_ostream &OS) { + OS << "vpcmp"; + + printSSEAVXCC(MI, MI->getNumOperands() - 1, OS); + + switch (MI->getOpcode()) { + default: llvm_unreachable("Unexpected opcode!"); + case X86::VPCMPBZ128rmi: case X86::VPCMPBZ128rri: + case X86::VPCMPBZ256rmi: case X86::VPCMPBZ256rri: + case X86::VPCMPBZrmi: case X86::VPCMPBZrri: + case X86::VPCMPBZ128rmik: case X86::VPCMPBZ128rrik: + case X86::VPCMPBZ256rmik: case X86::VPCMPBZ256rrik: + case X86::VPCMPBZrmik: case X86::VPCMPBZrrik: + OS << "b\t"; + break; + case X86::VPCMPDZ128rmi: case X86::VPCMPDZ128rri: + case X86::VPCMPDZ256rmi: case X86::VPCMPDZ256rri: + case X86::VPCMPDZrmi: case X86::VPCMPDZrri: + case X86::VPCMPDZ128rmik: case X86::VPCMPDZ128rrik: + case X86::VPCMPDZ256rmik: case X86::VPCMPDZ256rrik: + case X86::VPCMPDZrmik: case X86::VPCMPDZrrik: + case X86::VPCMPDZ128rmib: case X86::VPCMPDZ128rmibk: + case X86::VPCMPDZ256rmib: case X86::VPCMPDZ256rmibk: + case X86::VPCMPDZrmib: case X86::VPCMPDZrmibk: + OS << "d\t"; + break; + case X86::VPCMPQZ128rmi: case X86::VPCMPQZ128rri: + case X86::VPCMPQZ256rmi: case X86::VPCMPQZ256rri: + case X86::VPCMPQZrmi: case X86::VPCMPQZrri: + case X86::VPCMPQZ128rmik: case X86::VPCMPQZ128rrik: + case X86::VPCMPQZ256rmik: case X86::VPCMPQZ256rrik: + case X86::VPCMPQZrmik: case X86::VPCMPQZrrik: + case X86::VPCMPQZ128rmib: case X86::VPCMPQZ128rmibk: + case X86::VPCMPQZ256rmib: case X86::VPCMPQZ256rmibk: + case X86::VPCMPQZrmib: case X86::VPCMPQZrmibk: + OS << "q\t"; + break; + case X86::VPCMPUBZ128rmi: case X86::VPCMPUBZ128rri: + case X86::VPCMPUBZ256rmi: case X86::VPCMPUBZ256rri: + case X86::VPCMPUBZrmi: case X86::VPCMPUBZrri: + case X86::VPCMPUBZ128rmik: case X86::VPCMPUBZ128rrik: + case X86::VPCMPUBZ256rmik: case X86::VPCMPUBZ256rrik: + case X86::VPCMPUBZrmik: case X86::VPCMPUBZrrik: + OS << "ub\t"; + break; + case X86::VPCMPUDZ128rmi: case X86::VPCMPUDZ128rri: + case X86::VPCMPUDZ256rmi: case X86::VPCMPUDZ256rri: + case X86::VPCMPUDZrmi: case X86::VPCMPUDZrri: + case X86::VPCMPUDZ128rmik: case X86::VPCMPUDZ128rrik: + case X86::VPCMPUDZ256rmik: case X86::VPCMPUDZ256rrik: + case X86::VPCMPUDZrmik: case X86::VPCMPUDZrrik: + case X86::VPCMPUDZ128rmib: case X86::VPCMPUDZ128rmibk: + case X86::VPCMPUDZ256rmib: case X86::VPCMPUDZ256rmibk: + case X86::VPCMPUDZrmib: case X86::VPCMPUDZrmibk: + OS << "ud\t"; + break; + case X86::VPCMPUQZ128rmi: case X86::VPCMPUQZ128rri: + case X86::VPCMPUQZ256rmi: case X86::VPCMPUQZ256rri: + case X86::VPCMPUQZrmi: case X86::VPCMPUQZrri: + case X86::VPCMPUQZ128rmik: case X86::VPCMPUQZ128rrik: + case X86::VPCMPUQZ256rmik: case X86::VPCMPUQZ256rrik: + case X86::VPCMPUQZrmik: case X86::VPCMPUQZrrik: + case X86::VPCMPUQZ128rmib: case X86::VPCMPUQZ128rmibk: + case X86::VPCMPUQZ256rmib: case X86::VPCMPUQZ256rmibk: + case X86::VPCMPUQZrmib: case X86::VPCMPUQZrmibk: + OS << "uq\t"; + break; + case X86::VPCMPUWZ128rmi: case X86::VPCMPUWZ128rri: + case X86::VPCMPUWZ256rri: case X86::VPCMPUWZ256rmi: + case X86::VPCMPUWZrmi: case X86::VPCMPUWZrri: + case X86::VPCMPUWZ128rmik: case X86::VPCMPUWZ128rrik: + case X86::VPCMPUWZ256rrik: case X86::VPCMPUWZ256rmik: + case X86::VPCMPUWZrmik: case X86::VPCMPUWZrrik: + OS << "uw\t"; + break; + case X86::VPCMPWZ128rmi: case X86::VPCMPWZ128rri: + case X86::VPCMPWZ256rmi: case X86::VPCMPWZ256rri: + case X86::VPCMPWZrmi: case X86::VPCMPWZrri: + case X86::VPCMPWZ128rmik: case X86::VPCMPWZ128rrik: + case X86::VPCMPWZ256rmik: case X86::VPCMPWZ256rrik: + case X86::VPCMPWZrmik: case X86::VPCMPWZrrik: + OS << "w\t"; + break; } } Index: lib/Target/X86/InstPrinter/X86IntelInstPrinter.h =================================================================== --- lib/Target/X86/InstPrinter/X86IntelInstPrinter.h +++ lib/Target/X86/InstPrinter/X86IntelInstPrinter.h @@ -27,6 +27,7 @@ void printRegName(raw_ostream &OS, unsigned RegNo) const override; void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot, const MCSubtargetInfo &STI) override; + bool printVecCompareInstr(const MCInst *MI, raw_ostream &OS); // Autogenerated by tblgen, returns true if we successfully printed an // alias. Index: lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp =================================================================== --- lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp +++ lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp @@ -45,7 +45,8 @@ if (MI->getOpcode() == X86::DATA16_PREFIX && STI.getFeatureBits()[X86::Mode16Bit]) { OS << "\tdata32"; - } else if (!printAliasInstr(MI, OS)) + } else if (!printAliasInstr(MI, OS) && + !printVecCompareInstr(MI, OS)) printInstruction(MI, OS); // Next always print the annotation. @@ -56,6 +57,153 @@ EmitAnyX86InstComments(MI, *CommentStream, MII); } +bool X86IntelInstPrinter::printVecCompareInstr(const MCInst *MI, raw_ostream &OS) { + if (MI->getNumOperands() == 0 || + !MI->getOperand(MI->getNumOperands() - 1).isImm()) + return false; + + unsigned Imm = MI->getOperand(MI->getNumOperands() - 1).getImm(); + + const MCInstrDesc &Desc = MII.get(MI->getOpcode()); + + // Custom print the vector compare instructions to get the immediate + // translated into the mnemonic. + switch (MI->getOpcode()) { + case X86::VPCOMBmi: case X86::VPCOMBri: + case X86::VPCOMDmi: case X86::VPCOMDri: + case X86::VPCOMQmi: case X86::VPCOMQri: + case X86::VPCOMUBmi: case X86::VPCOMUBri: + case X86::VPCOMUDmi: case X86::VPCOMUDri: + case X86::VPCOMUQmi: case X86::VPCOMUQri: + case X86::VPCOMUWmi: case X86::VPCOMUWri: + case X86::VPCOMWmi: case X86::VPCOMWri: + if (Imm >= 0 && Imm <= 7) { + printVPCOMMnemonic(MI, OS); + printOperand(MI, 0, OS); + OS << ", "; + printOperand(MI, 1, OS); + OS << ", "; + if ((Desc.TSFlags & X86II::FormMask) == X86II::MRMSrcMem) + printi128mem(MI, 2, OS); + else + printOperand(MI, 2, OS); + return true; + } + break; + case X86::VPCMPBZ128rmi: case X86::VPCMPBZ128rri: + case X86::VPCMPBZ256rmi: case X86::VPCMPBZ256rri: + case X86::VPCMPBZrmi: case X86::VPCMPBZrri: + case X86::VPCMPDZ128rmi: case X86::VPCMPDZ128rri: + case X86::VPCMPDZ256rmi: case X86::VPCMPDZ256rri: + case X86::VPCMPDZrmi: case X86::VPCMPDZrri: + case X86::VPCMPQZ128rmi: case X86::VPCMPQZ128rri: + case X86::VPCMPQZ256rmi: case X86::VPCMPQZ256rri: + case X86::VPCMPQZrmi: case X86::VPCMPQZrri: + case X86::VPCMPUBZ128rmi: case X86::VPCMPUBZ128rri: + case X86::VPCMPUBZ256rmi: case X86::VPCMPUBZ256rri: + case X86::VPCMPUBZrmi: case X86::VPCMPUBZrri: + case X86::VPCMPUDZ128rmi: case X86::VPCMPUDZ128rri: + case X86::VPCMPUDZ256rmi: case X86::VPCMPUDZ256rri: + case X86::VPCMPUDZrmi: case X86::VPCMPUDZrri: + case X86::VPCMPUQZ128rmi: case X86::VPCMPUQZ128rri: + case X86::VPCMPUQZ256rmi: case X86::VPCMPUQZ256rri: + case X86::VPCMPUQZrmi: case X86::VPCMPUQZrri: + case X86::VPCMPUWZ128rmi: case X86::VPCMPUWZ128rri: + case X86::VPCMPUWZ256rmi: case X86::VPCMPUWZ256rri: + case X86::VPCMPUWZrmi: case X86::VPCMPUWZrri: + case X86::VPCMPWZ128rmi: case X86::VPCMPWZ128rri: + case X86::VPCMPWZ256rmi: case X86::VPCMPWZ256rri: + case X86::VPCMPWZrmi: case X86::VPCMPWZrri: + case X86::VPCMPBZ128rmik: case X86::VPCMPBZ128rrik: + case X86::VPCMPBZ256rmik: case X86::VPCMPBZ256rrik: + case X86::VPCMPBZrmik: case X86::VPCMPBZrrik: + case X86::VPCMPDZ128rmik: case X86::VPCMPDZ128rrik: + case X86::VPCMPDZ256rmik: case X86::VPCMPDZ256rrik: + case X86::VPCMPDZrmik: case X86::VPCMPDZrrik: + case X86::VPCMPQZ128rmik: case X86::VPCMPQZ128rrik: + case X86::VPCMPQZ256rmik: case X86::VPCMPQZ256rrik: + case X86::VPCMPQZrmik: case X86::VPCMPQZrrik: + case X86::VPCMPUBZ128rmik: case X86::VPCMPUBZ128rrik: + case X86::VPCMPUBZ256rmik: case X86::VPCMPUBZ256rrik: + case X86::VPCMPUBZrmik: case X86::VPCMPUBZrrik: + case X86::VPCMPUDZ128rmik: case X86::VPCMPUDZ128rrik: + case X86::VPCMPUDZ256rmik: case X86::VPCMPUDZ256rrik: + case X86::VPCMPUDZrmik: case X86::VPCMPUDZrrik: + case X86::VPCMPUQZ128rmik: case X86::VPCMPUQZ128rrik: + case X86::VPCMPUQZ256rmik: case X86::VPCMPUQZ256rrik: + case X86::VPCMPUQZrmik: case X86::VPCMPUQZrrik: + case X86::VPCMPUWZ128rmik: case X86::VPCMPUWZ128rrik: + case X86::VPCMPUWZ256rmik: case X86::VPCMPUWZ256rrik: + case X86::VPCMPUWZrmik: case X86::VPCMPUWZrrik: + case X86::VPCMPWZ128rmik: case X86::VPCMPWZ128rrik: + case X86::VPCMPWZ256rmik: case X86::VPCMPWZ256rrik: + case X86::VPCMPWZrmik: case X86::VPCMPWZrrik: + case X86::VPCMPDZ128rmib: case X86::VPCMPDZ128rmibk: + case X86::VPCMPDZ256rmib: case X86::VPCMPDZ256rmibk: + case X86::VPCMPDZrmib: case X86::VPCMPDZrmibk: + case X86::VPCMPQZ128rmib: case X86::VPCMPQZ128rmibk: + case X86::VPCMPQZ256rmib: case X86::VPCMPQZ256rmibk: + case X86::VPCMPQZrmib: case X86::VPCMPQZrmibk: + case X86::VPCMPUDZ128rmib: case X86::VPCMPUDZ128rmibk: + case X86::VPCMPUDZ256rmib: case X86::VPCMPUDZ256rmibk: + case X86::VPCMPUDZrmib: case X86::VPCMPUDZrmibk: + case X86::VPCMPUQZ128rmib: case X86::VPCMPUQZ128rmibk: + case X86::VPCMPUQZ256rmib: case X86::VPCMPUQZ256rmibk: + case X86::VPCMPUQZrmib: case X86::VPCMPUQZrmibk: + if ((Imm >= 0 && Imm <= 2) || (Imm >= 4 && Imm <= 6)) { + printVPCMPMnemonic(MI, OS); + + unsigned CurOp = 0; + printOperand(MI, CurOp++, OS); + + if (Desc.TSFlags & X86II::EVEX_K) { + // Print mask operand. + OS << " {"; + printOperand(MI, CurOp++, OS); + OS << "}"; + } + OS << ", "; + printOperand(MI, CurOp++, OS); + OS << ", "; + + if ((Desc.TSFlags & X86II::FormMask) == X86II::MRMSrcMem) { + if (Desc.TSFlags & X86II::EVEX_B) { + // Broadcast form. + // Load size is based on W-bit as only D and Q are supported. + if (Desc.TSFlags & X86II::VEX_W) + printi64mem(MI, CurOp++, OS); + else + printi32mem(MI, CurOp++, OS); + + // Print the number of elements broadcasted. + unsigned NumElts; + if (Desc.TSFlags & X86II::EVEX_L2) + NumElts = (Desc.TSFlags & X86II::VEX_W) ? 8 : 16; + else if (Desc.TSFlags & X86II::VEX_L) + NumElts = (Desc.TSFlags & X86II::VEX_W) ? 4 : 8; + else + NumElts = (Desc.TSFlags & X86II::VEX_W) ? 2 : 4; + OS << "{1to" << NumElts << "}"; + } else { + if (Desc.TSFlags & X86II::EVEX_L2) + printi512mem(MI, CurOp++, OS); + else if (Desc.TSFlags & X86II::VEX_L) + printi256mem(MI, CurOp++, OS); + else + printi128mem(MI, CurOp++, OS); + } + } else { + printOperand(MI, CurOp++, OS); + } + + return true; + } + break; + } + + return false; +} + void X86IntelInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) { const MCOperand &Op = MI->getOperand(OpNo); Index: lib/Target/X86/X86InstrAVX512.td =================================================================== --- lib/Target/X86/X86InstrAVX512.td +++ lib/Target/X86/X86InstrAVX512.td @@ -2254,17 +2254,17 @@ X86VectorVTInfo _, string Name> { let isCommutable = 1 in def rri : AVX512AIi8, EVEX_4V, Sched<[sched]>; def rmi : AVX512AIi8; def rmik : AVX512AIi8, EVEX_4V, EVEX_K, Sched<[sched.Folded, sched.ReadAfterFold]>; - // Accept explicit immediate argument form instead of comparison code. - let isAsmParserOnly = 1, hasSideEffects = 0 in { - def rri_alt : AVX512AIi8, - EVEX_4V, Sched<[sched]>, NotMemoryFoldable; - let mayLoad = 1 in - def rmi_alt : AVX512AIi8, - EVEX_4V, Sched<[sched.Folded, sched.ReadAfterFold]>, NotMemoryFoldable; - def rrik_alt : AVX512AIi8, - EVEX_4V, EVEX_K, Sched<[sched]>, NotMemoryFoldable; - let mayLoad = 1 in - def rmik_alt : AVX512AIi8, - EVEX_4V, EVEX_K, Sched<[sched.Folded, sched.ReadAfterFold]>, - NotMemoryFoldable; - } - def : Pat<(_.KVT (CommFrag:$cc (_.LdFrag addr:$src2), (_.VT _.RC:$src1), cond)), (!cast(Name#_.ZSuffix#"rmi") @@ -2347,10 +2316,10 @@ avx512_icmp_cc { def rmib : AVX512AIi8; def rmibk : AVX512AIi8, EVEX_4V, EVEX_K, EVEX_B, Sched<[sched.Folded, sched.ReadAfterFold]>; - // Accept explicit immediate argument form instead of comparison code. - let isAsmParserOnly = 1, hasSideEffects = 0, mayLoad = 1 in { - def rmib_alt : AVX512AIi8, - EVEX_4V, EVEX_B, Sched<[sched.Folded, sched.ReadAfterFold]>, - NotMemoryFoldable; - def rmibk_alt : AVX512AIi8, - EVEX_4V, EVEX_K, EVEX_B, Sched<[sched.Folded, sched.ReadAfterFold]>, - NotMemoryFoldable; - } - def : Pat<(_.KVT (CommFrag:$cc (X86VBroadcast (_.ScalarLdFrag addr:$src2)), (_.VT _.RC:$src1), cond)), (!cast(Name#_.ZSuffix#"rmib") Index: lib/Target/X86/X86InstrInfo.td =================================================================== --- lib/Target/X86/X86InstrInfo.td +++ lib/Target/X86/X86InstrInfo.td @@ -612,16 +612,6 @@ let OperandType = "OPERAND_IMMEDIATE"; } -def AVX512ICC : Operand { - let PrintMethod = "printSSEAVXCC"; - let OperandType = "OPERAND_IMMEDIATE"; -} - -def XOPCC : Operand { - let PrintMethod = "printXOPCC"; - let OperandType = "OPERAND_IMMEDIATE"; -} - class ImmSExtAsmOperandClass : AsmOperandClass { let SuperClasses = [ImmAsmOperand]; let RenderMethod = "addImmOperands"; Index: lib/Target/X86/X86InstrXOP.td =================================================================== --- lib/Target/X86/X86InstrXOP.td +++ lib/Target/X86/X86InstrXOP.td @@ -246,36 +246,22 @@ let ExeDomain = SSEPackedInt in { // SSE integer instructions let isCommutable = 1 in def ri : IXOPi8, XOP_4V, Sched<[sched]>; def mi : IXOPi8, XOP_4V, Sched<[sched.Folded, sched.ReadAfterFold]>; - let isAsmParserOnly = 1, hasSideEffects = 0 in { - def ri_alt : IXOPi8, XOP_4V, Sched<[sched]>, NotMemoryFoldable; - let mayLoad = 1 in - def mi_alt : IXOPi8, XOP_4V, Sched<[sched.Folded, sched.ReadAfterFold]>, - NotMemoryFoldable; - } } def : Pat<(OpNode (load addr:$src2), Index: test/MC/X86/avx512-encodings.s =================================================================== --- test/MC/X86/avx512-encodings.s +++ test/MC/X86/avx512-encodings.s @@ -6052,11 +6052,11 @@ // CHECK: encoding: [0x62,0xd1,0xf5,0x40,0xc2,0x76,0x02,0x0d] vcmpgepd 0x80(%r14), %zmm17, %k6 -// CHECK: vpcmpd $1, +// CHECK: vpcmpltd %zmm24, %zmm7, %k5 {%k4} // CHECK: encoding: [0x62,0x93,0x45,0x4c,0x1f,0xe8,0x01] vpcmpd $1, %zmm24, %zmm7, %k5{%k4} -// CHECK: vpcmpuq $2, +// CHECK: vpcmpleuq 64(%rdx), %zmm17, %k6 {%k7} // CHECK: encoding: [0x62,0xf3,0xf5,0x47,0x1e,0x72,0x01,0x02] vpcmpuq $2, 0x40(%rdx), %zmm17, %k6{%k7} Index: test/tools/llvm-mca/X86/BdVer2/resources-xop.s =================================================================== --- test/tools/llvm-mca/X86/BdVer2/resources-xop.s +++ test/tools/llvm-mca/X86/BdVer2/resources-xop.s @@ -239,22 +239,22 @@ # CHECK-NEXT: 2 2 0.50 vpcmov %ymm0, %ymm1, %ymm2, %ymm3 # CHECK-NEXT: 2 7 1.00 * vpcmov (%rax), %ymm0, %ymm1, %ymm3 # CHECK-NEXT: 2 7 1.00 * vpcmov %ymm0, (%rax), %ymm1, %ymm3 -# CHECK-NEXT: 1 2 0.50 vpcomb $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 1 7 0.50 * vpcomb $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 1 2 0.50 vpcomd $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 1 7 0.50 * vpcomd $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 1 2 0.50 vpcomq $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 1 7 0.50 * vpcomq $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 1 2 0.50 vpcomub $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 1 7 0.50 * vpcomub $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 1 2 0.50 vpcomud $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 1 7 0.50 * vpcomud $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 1 2 0.50 vpcomuq $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 1 7 0.50 * vpcomuq $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 1 2 0.50 vpcomuw $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 1 7 0.50 * vpcomuw $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 1 2 0.50 vpcomw $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 1 7 0.50 * vpcomw $0, (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 2 0.50 vpcomltb %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vpcomltb (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 2 0.50 vpcomltd %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vpcomltd (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 2 0.50 vpcomltq %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vpcomltq (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 2 0.50 vpcomltub %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vpcomltub (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 2 0.50 vpcomltud %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vpcomltud (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 2 0.50 vpcomltuq %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vpcomltuq (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 2 0.50 vpcomltuw %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vpcomltuw (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 2 0.50 vpcomltw %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 1 7 0.50 * vpcomltw (%rax), %xmm0, %xmm3 # CHECK-NEXT: 1 3 2.00 vpermil2pd $0, %xmm0, %xmm1, %xmm2, %xmm3 # CHECK-NEXT: 1 8 2.00 * vpermil2pd $0, (%rax), %xmm0, %xmm1, %xmm3 # CHECK-NEXT: 1 8 2.00 * vpermil2pd $0, %xmm0, (%rax), %xmm1, %xmm3 @@ -418,22 +418,22 @@ # CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - - - - vpcmov %ymm0, %ymm1, %ymm2, %ymm3 # CHECK-NEXT: 1.00 1.00 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - 1.00 1.00 - - vpcmov (%rax), %ymm0, %ymm1, %ymm3 # CHECK-NEXT: 1.00 1.00 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - 1.00 1.00 - - vpcmov %ymm0, (%rax), %ymm1, %ymm3 -# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - - - - vpcomb $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - 0.50 0.50 - - vpcomb $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - - - - vpcomd $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - 0.50 0.50 - - vpcomd $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - - - - vpcomq $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - 0.50 0.50 - - vpcomq $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - - - - vpcomub $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - 0.50 0.50 - - vpcomub $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - - - - vpcomud $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - 0.50 0.50 - - vpcomud $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - - - - vpcomuq $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - 0.50 0.50 - - vpcomuq $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - - - - vpcomuw $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - 0.50 0.50 - - vpcomuw $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - - - - vpcomw $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - 0.50 0.50 - - vpcomw $0, (%rax), %xmm0, %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - - - - vpcomltb %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - 0.50 0.50 - - vpcomltb (%rax), %xmm0, %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - - - - vpcomltd %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - 0.50 0.50 - - vpcomltd (%rax), %xmm0, %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - - - - vpcomltq %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - 0.50 0.50 - - vpcomltq (%rax), %xmm0, %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - - - - vpcomltub %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - 0.50 0.50 - - vpcomltub (%rax), %xmm0, %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - - - - vpcomltud %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - 0.50 0.50 - - vpcomltud (%rax), %xmm0, %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - - - - vpcomltuq %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - 0.50 0.50 - - vpcomltuq (%rax), %xmm0, %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - - - - vpcomltuw %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - 0.50 0.50 - - vpcomltuw (%rax), %xmm0, %xmm3 +# CHECK-NEXT: - - - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - - - - - vpcomltw %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 0.50 0.50 - - - - - - - - 0.50 0.50 - - 0.50 0.50 - - - 0.50 0.50 - - vpcomltw (%rax), %xmm0, %xmm3 # CHECK-NEXT: - - - - - - - - 2.00 2.00 - - - - 0.50 0.50 - - - - - - - vpermil2pd $0, %xmm0, %xmm1, %xmm2, %xmm3 # CHECK-NEXT: 0.50 0.50 - - - - - - 2.00 2.00 - - - - 0.50 0.50 - - - 0.50 0.50 - - vpermil2pd $0, (%rax), %xmm0, %xmm1, %xmm3 # CHECK-NEXT: 0.50 0.50 - - - - - - 2.00 2.00 - - - - 0.50 0.50 - - - 0.50 0.50 - - vpermil2pd $0, %xmm0, (%rax), %xmm1, %xmm3 Index: test/tools/llvm-mca/X86/Generic/resources-xop.s =================================================================== --- test/tools/llvm-mca/X86/Generic/resources-xop.s +++ test/tools/llvm-mca/X86/Generic/resources-xop.s @@ -239,22 +239,22 @@ # CHECK-NEXT: 1 1 1.00 vpcmov %ymm0, %ymm1, %ymm2, %ymm3 # CHECK-NEXT: 2 8 1.00 * vpcmov (%rax), %ymm0, %ymm1, %ymm3 # CHECK-NEXT: 2 8 1.00 * vpcmov %ymm0, (%rax), %ymm1, %ymm3 -# CHECK-NEXT: 1 1 0.50 vpcomb $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 0.50 * vpcomb $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 1 1 0.50 vpcomd $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 0.50 * vpcomd $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 1 1 0.50 vpcomq $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 0.50 * vpcomq $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 1 1 0.50 vpcomub $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 0.50 * vpcomub $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 1 1 0.50 vpcomud $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 0.50 * vpcomud $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 1 1 0.50 vpcomuq $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 0.50 * vpcomuq $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 1 1 0.50 vpcomuw $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 0.50 * vpcomuw $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: 1 1 0.50 vpcomw $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: 2 7 0.50 * vpcomw $0, (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 1 0.50 vpcomltb %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 2 7 0.50 * vpcomltb (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 1 0.50 vpcomltd %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 2 7 0.50 * vpcomltd (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 1 0.50 vpcomltq %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 2 7 0.50 * vpcomltq (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 1 0.50 vpcomltub %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 2 7 0.50 * vpcomltub (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 1 0.50 vpcomltud %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 2 7 0.50 * vpcomltud (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 1 0.50 vpcomltuq %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 2 7 0.50 * vpcomltuq (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 1 0.50 vpcomltuw %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 2 7 0.50 * vpcomltuw (%rax), %xmm0, %xmm3 +# CHECK-NEXT: 1 1 0.50 vpcomltw %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: 2 7 0.50 * vpcomltw (%rax), %xmm0, %xmm3 # CHECK-NEXT: 1 1 1.00 vpermil2pd $0, %xmm0, %xmm1, %xmm2, %xmm3 # CHECK-NEXT: 2 7 1.00 * vpermil2pd $0, (%rax), %xmm0, %xmm1, %xmm3 # CHECK-NEXT: 2 7 1.00 * vpermil2pd $0, %xmm0, (%rax), %xmm1, %xmm3 @@ -403,22 +403,22 @@ # CHECK-NEXT: - - - - - 1.00 - - vpcmov %ymm0, %ymm1, %ymm2, %ymm3 # CHECK-NEXT: - - - - - 1.00 0.50 0.50 vpcmov (%rax), %ymm0, %ymm1, %ymm3 # CHECK-NEXT: - - - - - 1.00 0.50 0.50 vpcmov %ymm0, (%rax), %ymm1, %ymm3 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcomb $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcomb $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcomd $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcomd $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcomq $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcomq $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcomub $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcomub $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcomud $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcomud $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcomuq $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcomuq $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcomuw $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcomuw $0, (%rax), %xmm0, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcomw $0, %xmm0, %xmm1, %xmm3 -# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcomw $0, (%rax), %xmm0, %xmm3 +# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcomltb %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcomltb (%rax), %xmm0, %xmm3 +# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcomltd %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcomltd (%rax), %xmm0, %xmm3 +# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcomltq %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcomltq (%rax), %xmm0, %xmm3 +# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcomltub %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcomltub (%rax), %xmm0, %xmm3 +# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcomltud %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcomltud (%rax), %xmm0, %xmm3 +# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcomltuq %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcomltuq (%rax), %xmm0, %xmm3 +# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcomltuw %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcomltuw (%rax), %xmm0, %xmm3 +# CHECK-NEXT: - - - 0.50 - 0.50 - - vpcomltw %xmm0, %xmm1, %xmm3 +# CHECK-NEXT: - - - 0.50 - 0.50 0.50 0.50 vpcomltw (%rax), %xmm0, %xmm3 # CHECK-NEXT: - - - - - 1.00 - - vpermil2pd $0, %xmm0, %xmm1, %xmm2, %xmm3 # CHECK-NEXT: - - - - - 1.00 0.50 0.50 vpermil2pd $0, (%rax), %xmm0, %xmm1, %xmm3 # CHECK-NEXT: - - - - - 1.00 0.50 0.50 vpermil2pd $0, %xmm0, (%rax), %xmm1, %xmm3 Index: utils/TableGen/X86RecognizableInstr.cpp =================================================================== --- utils/TableGen/X86RecognizableInstr.cpp +++ utils/TableGen/X86RecognizableInstr.cpp @@ -849,9 +849,7 @@ TYPE("i16imm_pcrel", TYPE_REL) TYPE("i32imm_pcrel", TYPE_REL) TYPE("SSECC", TYPE_IMM3) - TYPE("XOPCC", TYPE_IMM3) TYPE("AVXCC", TYPE_IMM5) - TYPE("AVX512ICC", TYPE_AVX512ICC) TYPE("AVX512RC", TYPE_IMM) TYPE("brtarget32", TYPE_REL) TYPE("brtarget16", TYPE_REL) @@ -932,9 +930,7 @@ } ENCODING("i32i8imm", ENCODING_IB) ENCODING("SSECC", ENCODING_IB) - ENCODING("XOPCC", ENCODING_IB) ENCODING("AVXCC", ENCODING_IB) - ENCODING("AVX512ICC", ENCODING_IB) ENCODING("AVX512RC", ENCODING_IRC) ENCODING("i16imm", ENCODING_Iv) ENCODING("i16i8imm", ENCODING_IB)