Index: lib/Transforms/Utils/Local.cpp
===================================================================
--- lib/Transforms/Utils/Local.cpp
+++ lib/Transforms/Utils/Local.cpp
@@ -1283,6 +1283,29 @@
   return false;
 }
 
+// Determine what DebugLoc to use for each dbg.declare/inst pair that are
+// promoted to a dbg.value.
+static DebugLoc getDebugValueLoc(DbgVariableIntrinsic *DII, Instruction *Src) {
+  // Original dbg.declare must have a location.
+  DebugLoc DeclareLoc = DII->getDebugLoc();
+  assert(DeclareLoc);
+  MDNode *Scope = DeclareLoc.getScope();
+  DILocation *InlinedAt = DeclareLoc.getInlinedAt();
+
+  // Can we use the source location of the instruction causing the debug
+  // promotion? If it's in the same scope and inlining instance, then yes.
+  if (Src)
+    if (DebugLoc SrcLoc = Src->getDebugLoc())
+      if (SrcLoc.getScope() == Scope && InlinedAt == SrcLoc.getInlinedAt())
+        return SrcLoc;
+
+  // Otherwise, we will be generating a debug intrinsic for a variable accessed
+  // by code not in the original scope, likely due to inlining. Neither the
+  // accessing instruction nor the place the variable was declared would make
+  // sense: use an unknown location instead.
+  return DebugLoc::get(0, 0, Scope, InlinedAt);
+}
+
 /// Inserts a llvm.dbg.value intrinsic before a store to an alloca'd value
 /// that has an associated llvm.dbg.declare or llvm.dbg.addr intrinsic.
 void llvm::ConvertDebugDeclareToDebugValue(DbgVariableIntrinsic *DII,
@@ -1293,6 +1316,8 @@
   auto *DIExpr = DII->getExpression();
   Value *DV = SI->getOperand(0);
 
+  DebugLoc NewLoc = getDebugValueLoc(DII, SI);
+
   if (!valueCoversEntireFragment(SI->getValueOperand()->getType(), DII)) {
     // FIXME: If storing to a part of the variable described by the dbg.declare,
     // then we want to insert a dbg.value for the corresponding fragment.
@@ -1303,14 +1328,12 @@
     // know nothing about the variable's content.
     DV = UndefValue::get(DV->getType());
     if (!LdStHasDebugValue(DIVar, DIExpr, SI))
-      Builder.insertDbgValueIntrinsic(DV, DIVar, DIExpr, DII->getDebugLoc(),
-                                      SI);
+      Builder.insertDbgValueIntrinsic(DV, DIVar, DIExpr, NewLoc, SI);
     return;
   }
 
   if (!LdStHasDebugValue(DIVar, DIExpr, SI))
-    Builder.insertDbgValueIntrinsic(DV, DIVar, DIExpr, DII->getDebugLoc(),
-                                    SI);
+    Builder.insertDbgValueIntrinsic(DV, DIVar, DIExpr, NewLoc, SI);
 }
 
 /// Inserts a llvm.dbg.value intrinsic before a load of an alloca'd value
@@ -1333,12 +1356,14 @@
     return;
   }
 
+  DebugLoc NewLoc = getDebugValueLoc(DII, nullptr);
+
   // We are now tracking the loaded value instead of the address. In the
   // future if multi-location support is added to the IR, it might be
   // preferable to keep tracking both the loaded value and the original
   // address in case the alloca can not be elided.
   Instruction *DbgValue = Builder.insertDbgValueIntrinsic(
-      LI, DIVar, DIExpr, DII->getDebugLoc(), (Instruction *)nullptr);
+      LI, DIVar, DIExpr, NewLoc, (Instruction *)nullptr);
   DbgValue->insertAfter(LI);
 }
 
@@ -1365,12 +1390,13 @@
   BasicBlock *BB = APN->getParent();
   auto InsertionPt = BB->getFirstInsertionPt();
 
+  DebugLoc NewLoc = getDebugValueLoc(DII, APN);
+
   // The block may be a catchswitch block, which does not have a valid
   // insertion point.
   // FIXME: Insert dbg.value markers in the successors when appropriate.
   if (InsertionPt != BB->end())
-    Builder.insertDbgValueIntrinsic(APN, DIVar, DIExpr, DII->getDebugLoc(),
-                                    &*InsertionPt);
+    Builder.insertDbgValueIntrinsic(APN, DIVar, DIExpr, NewLoc, &*InsertionPt);
 }
 
 /// Determine whether this alloca is either a VLA or an array.
Index: test/DebugInfo/Generic/dbg-value-lower-linenos.ll
===================================================================
--- /dev/null
+++ test/DebugInfo/Generic/dbg-value-lower-linenos.ll
@@ -0,0 +1,73 @@
+; RUN: opt < %s -S -mem2reg | FileCheck %s
+
+; The '%bar' alloca will be promoted to an SSA register by mem2reg: test that
+; sane line number are assigned to the dbg.value intrinsics that are inserted
+; to represent changes in variable value. There are three flavours:
+;  * bb1 will start with a PHI node that has no line number. The associated
+;    dbg.value should have an 'unknown' line number as a result.
+;  * The mid-bb1 store will have a representative dbg.value created, and should
+;    take on the line number of the store that it replaces.
+;  * The store in bb2 deliberately has a line number in a different scope, with
+;    an inlinedAt record. The dbg.value that will be created should get an
+;    unknown line number.
+
+; CHECK-LABEL: bb1:
+; CHECK-NEXT:  %bar.0 = phi i32
+; CHECK-NEXT:  dbg.value(metadata i32 %bar.0,{{.*}}), !dbg ![[UNKNOWN:[0-9]+]]
+; CHECK-NEXT:  %totest = load
+; CHECK-NEXT:  %add = add i32 %bar.0
+; CHECK-NEXT:  dbg.value(metadata i32 %add, {{.*}}), !dbg ![[STORELINE:[0-9]+]]
+; CHECK-NEXT:  %toret = add i32 %add
+; CHECK-NEXT:  %cond = icmp ult
+; CHECK-NEXT:  br i1 %cond, label %bb1, label %bb2
+;
+; CHECK-LABEL: bb2:
+; CHECK-NEXT:  dbg.value(metadata i32 %toret, {{.*}}), !dbg ![[UNKNOWN]]
+; CHECK-NEXT:  ret i32 %toret
+
+; CHECK: ![[SUBPROG:[0-9]+]] = distinct !DISubprogram(name: "nope",
+; CHECK: ![[UNKNOWN]] = !DILocation(line: 0, scope: ![[SUBPROG]])
+; CHECK: ![[STORELINE]] = !DILocation(line: 5, scope: ![[SUBPROG]])
+
+define i32 @foo(i32 *%bees, i32 *%output) {
+entry:
+  %bar = alloca i32
+  call void @llvm.dbg.declare(metadata i32 *%bar, metadata !7, metadata !DIExpression()), !dbg !6
+  store i32 0, i32 *%bar
+  br label %bb1, !dbg !6
+
+bb1:
+  %totest = load i32, i32 *%bees, !dbg !8
+  %load1 = load i32, i32 *%bar, !dbg !9
+  %add = add i32 %load1, 1, !dbg !10
+  store i32 %add, i32 *%bar, !dbg !11
+  %toret = add i32 %add, 2, !dbg !12
+  %cond = icmp ult i32 %totest, %load1, !dbg !13
+  br i1 %cond, label %bb1, label %bb2, !dbg !14
+
+bb2:
+  store i32 %toret, i32 *%bar, !dbg !16
+  ret i32 %toret
+}
+
+declare void @llvm.dbg.value(metadata, metadata, metadata)
+declare void @llvm.dbg.declare(metadata, metadata, metadata)
+
+!llvm.module.flags = !{!4}
+!llvm.dbg.cu = !{!2}
+!1 = !DILocalVariable(name: "bees", scope: !5, type: null)
+!2 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !3, producer: "beards", isOptimized: true, runtimeVersion: 4, emissionKind: FullDebug)
+!3 = !DIFile(filename: "bees.cpp", directory: "")
+!4 = !{i32 2, !"Debug Info Version", i32 3}
+!5 = distinct !DISubprogram(name: "nope", scope: !2, file: !3, line: 1, unit: !2)
+!6 = !DILocation(line: 1, scope: !5)
+!7 = !DILocalVariable(name: "flannel", scope: !5, type: null)
+!8 = !DILocation(line: 2, scope: !5)
+!9 = !DILocation(line: 3, scope: !5)
+!10 = !DILocation(line: 4, scope: !5)
+!11 = !DILocation(line: 5, scope: !5)
+!12 = !DILocation(line: 6, scope: !5)
+!13 = !DILocation(line: 7, scope: !5)
+!14 = !DILocation(line: 8, scope: !5)
+!15 = distinct !DISubprogram(name: "wat", scope: !2, file: !3, line: 10, unit: !2)
+!16 = !DILocation(line: 9, scope: !15, inlinedAt: !14)
Index: test/DebugInfo/X86/formal_parameter.ll
===================================================================
--- test/DebugInfo/X86/formal_parameter.ll
+++ test/DebugInfo/X86/formal_parameter.ll
@@ -34,13 +34,16 @@
   ; LowerDbgDeclare is finished with them.
   ;
   ; LOWERING: call void @llvm.dbg.value{{.*}}, !dbg ![[LOC:.*]]
-  ; LOWERING: call void @llvm.dbg.value{{.*}}, !dbg ![[LOC]]
+  ; LOWERING: call void @llvm.dbg.value{{.*}}, !dbg ![[LOC2:.*]]
   ; LOWERING: call void @llvm.dbg.value{{.*}}, !dbg ![[LOC]]
 %0 = load i32, i32* %map.addr, align 4, !dbg !20, !tbaa !15
   %call1 = call i32 (i32, ...) bitcast (i32 (...)* @verify to i32 (i32, ...)*)(i32 %0) #3, !dbg !20
   ret void, !dbg !22
 }
 
+; LOWERING: ![[LOC]] = !DILocation({{.*}} scope: ![[SCOPE:[0-9]+]]
+; LOWERING: ![[LOC2]] = !DILocation({{.*}} scope: ![[SCOPE]]
+
 ; Function Attrs: nounwind readnone
 declare void @llvm.dbg.declare(metadata, metadata, metadata) #1