Index: llvm/trunk/include/llvm/CodeGen/ValueTypes.td =================================================================== --- llvm/trunk/include/llvm/CodeGen/ValueTypes.td +++ llvm/trunk/include/llvm/CodeGen/ValueTypes.td @@ -64,87 +64,91 @@ def v1i32 : ValueType<32 , 41>; // 1 x i32 vector value def v2i32 : ValueType<64 , 42>; // 2 x i32 vector value -def v4i32 : ValueType<128, 43>; // 4 x i32 vector value -def v8i32 : ValueType<256, 44>; // 8 x i32 vector value -def v16i32 : ValueType<512, 45>; // 16 x i32 vector value -def v32i32 : ValueType<1024,46>; // 32 x i32 vector value -def v64i32 : ValueType<2048,47>; // 64 x i32 vector value - -def v1i64 : ValueType<64 , 48>; // 1 x i64 vector value -def v2i64 : ValueType<128, 49>; // 2 x i64 vector value -def v4i64 : ValueType<256, 50>; // 4 x i64 vector value -def v8i64 : ValueType<512, 51>; // 8 x i64 vector value -def v16i64 : ValueType<1024,52>; // 16 x i64 vector value -def v32i64 : ValueType<2048,53>; // 32 x i64 vector value - -def v1i128 : ValueType<128, 54>; // 1 x i128 vector value - -def nxv1i1 : ValueType<1, 55>; // n x 1 x i1 vector value -def nxv2i1 : ValueType<2, 56>; // n x 2 x i1 vector value -def nxv4i1 : ValueType<4, 57>; // n x 4 x i1 vector value -def nxv8i1 : ValueType<8, 58>; // n x 8 x i1 vector value -def nxv16i1 : ValueType<16, 59>; // n x 16 x i1 vector value -def nxv32i1 : ValueType<32, 60>; // n x 32 x i1 vector value - -def nxv1i8 : ValueType<8, 61>; // n x 1 x i8 vector value -def nxv2i8 : ValueType<16, 62>; // n x 2 x i8 vector value -def nxv4i8 : ValueType<32, 63>; // n x 4 x i8 vector value -def nxv8i8 : ValueType<64, 64>; // n x 8 x i8 vector value -def nxv16i8 : ValueType<128, 65>; // n x 16 x i8 vector value -def nxv32i8 : ValueType<256, 66>; // n x 32 x i8 vector value - -def nxv1i16 : ValueType<16, 67>; // n x 1 x i16 vector value -def nxv2i16 : ValueType<32, 68>; // n x 2 x i16 vector value -def nxv4i16 : ValueType<64, 69>; // n x 4 x i16 vector value -def nxv8i16 : ValueType<128, 70>; // n x 8 x i16 vector value -def nxv16i16: ValueType<256, 71>; // n x 16 x i16 vector value -def nxv32i16: ValueType<512, 72>; // n x 32 x i16 vector value - -def nxv1i32 : ValueType<32, 73>; // n x 1 x i32 vector value -def nxv2i32 : ValueType<64, 74>; // n x 2 x i32 vector value -def nxv4i32 : ValueType<128, 75>; // n x 4 x i32 vector value -def nxv8i32 : ValueType<256, 76>; // n x 8 x i32 vector value -def nxv16i32: ValueType<512, 77>; // n x 16 x i32 vector value -def nxv32i32: ValueType<1024,78>; // n x 32 x i32 vector value - -def nxv1i64 : ValueType<64, 79>; // n x 1 x i64 vector value -def nxv2i64 : ValueType<128, 80>; // n x 2 x i64 vector value -def nxv4i64 : ValueType<256, 81>; // n x 4 x i64 vector value -def nxv8i64 : ValueType<512, 82>; // n x 8 x i64 vector value -def nxv16i64: ValueType<1024,83>; // n x 16 x i64 vector value -def nxv32i64: ValueType<2048,84>; // n x 32 x i64 vector value - -def v2f16 : ValueType<32 , 85>; // 2 x f16 vector value -def v4f16 : ValueType<64 , 86>; // 4 x f16 vector value -def v8f16 : ValueType<128, 87>; // 8 x f16 vector value -def v1f32 : ValueType<32 , 88>; // 1 x f32 vector value -def v2f32 : ValueType<64 , 89>; // 2 x f32 vector value -def v4f32 : ValueType<128, 90>; // 4 x f32 vector value -def v8f32 : ValueType<256, 91>; // 8 x f32 vector value -def v16f32 : ValueType<512, 92>; // 16 x f32 vector value -def v1f64 : ValueType<64, 93>; // 1 x f64 vector value -def v2f64 : ValueType<128, 94>; // 2 x f64 vector value -def v4f64 : ValueType<256, 95>; // 4 x f64 vector value -def v8f64 : ValueType<512, 96>; // 8 x f64 vector value - -def nxv2f16 : ValueType<32 , 97>; // n x 2 x f16 vector value -def nxv4f16 : ValueType<64 , 98>; // n x 4 x f16 vector value -def nxv8f16 : ValueType<128, 99>; // n x 8 x f16 vector value -def nxv1f32 : ValueType<32 , 100>; // n x 1 x f32 vector value -def nxv2f32 : ValueType<64 , 101>; // n x 2 x f32 vector value -def nxv4f32 : ValueType<128, 102>; // n x 4 x f32 vector value -def nxv8f32 : ValueType<256, 103>; // n x 8 x f32 vector value -def nxv16f32 : ValueType<512, 104>; // n x 16 x f32 vector value -def nxv1f64 : ValueType<64, 105>; // n x 1 x f64 vector value -def nxv2f64 : ValueType<128, 106>; // n x 2 x f64 vector value -def nxv4f64 : ValueType<256, 107>; // n x 4 x f64 vector value -def nxv8f64 : ValueType<512, 108>; // n x 8 x f64 vector value - -def x86mmx : ValueType<64 , 109>; // X86 MMX value -def FlagVT : ValueType<0 , 110>; // Pre-RA sched glue -def isVoid : ValueType<0 , 111>; // Produces no value -def untyped: ValueType<8 , 112>; // Produces an untyped value -def ExceptRef: ValueType<0, 113>; // WebAssembly's except_ref type +def v3i32 : ValueType<96 , 43>; // 3 x i32 vector value +def v4i32 : ValueType<128, 44>; // 4 x i32 vector value +def v5i32 : ValueType<160, 45>; // 5 x i32 vector value +def v8i32 : ValueType<256, 46>; // 8 x i32 vector value +def v16i32 : ValueType<512, 47>; // 16 x i32 vector value +def v32i32 : ValueType<1024,48>; // 32 x i32 vector value +def v64i32 : ValueType<2048,49>; // 64 x i32 vector value + +def v1i64 : ValueType<64 , 50>; // 1 x i64 vector value +def v2i64 : ValueType<128, 51>; // 2 x i64 vector value +def v4i64 : ValueType<256, 52>; // 4 x i64 vector value +def v8i64 : ValueType<512, 53>; // 8 x i64 vector value +def v16i64 : ValueType<1024,54>; // 16 x i64 vector value +def v32i64 : ValueType<2048,55>; // 32 x i64 vector value + +def v1i128 : ValueType<128, 56>; // 1 x i128 vector value + +def nxv1i1 : ValueType<1, 57>; // n x 1 x i1 vector value +def nxv2i1 : ValueType<2, 58>; // n x 2 x i1 vector value +def nxv4i1 : ValueType<4, 59>; // n x 4 x i1 vector value +def nxv8i1 : ValueType<8, 60>; // n x 8 x i1 vector value +def nxv16i1 : ValueType<16, 61>; // n x 16 x i1 vector value +def nxv32i1 : ValueType<32, 62>; // n x 32 x i1 vector value + +def nxv1i8 : ValueType<8, 63>; // n x 1 x i8 vector value +def nxv2i8 : ValueType<16, 64>; // n x 2 x i8 vector value +def nxv4i8 : ValueType<32, 65>; // n x 4 x i8 vector value +def nxv8i8 : ValueType<64, 66>; // n x 8 x i8 vector value +def nxv16i8 : ValueType<128, 67>; // n x 16 x i8 vector value +def nxv32i8 : ValueType<256, 68>; // n x 32 x i8 vector value + +def nxv1i16 : ValueType<16, 69>; // n x 1 x i16 vector value +def nxv2i16 : ValueType<32, 70>; // n x 2 x i16 vector value +def nxv4i16 : ValueType<64, 71>; // n x 4 x i16 vector value +def nxv8i16 : ValueType<128, 72>; // n x 8 x i16 vector value +def nxv16i16: ValueType<256, 73>; // n x 16 x i16 vector value +def nxv32i16: ValueType<512, 74>; // n x 32 x i16 vector value + +def nxv1i32 : ValueType<32, 75>; // n x 1 x i32 vector value +def nxv2i32 : ValueType<64, 76>; // n x 2 x i32 vector value +def nxv4i32 : ValueType<128, 77>; // n x 4 x i32 vector value +def nxv8i32 : ValueType<256, 78>; // n x 8 x i32 vector value +def nxv16i32: ValueType<512, 79>; // n x 16 x i32 vector value +def nxv32i32: ValueType<1024,80>; // n x 32 x i32 vector value + +def nxv1i64 : ValueType<64, 81>; // n x 1 x i64 vector value +def nxv2i64 : ValueType<128, 82>; // n x 2 x i64 vector value +def nxv4i64 : ValueType<256, 83>; // n x 4 x i64 vector value +def nxv8i64 : ValueType<512, 84>; // n x 8 x i64 vector value +def nxv16i64: ValueType<1024,85>; // n x 16 x i64 vector value +def nxv32i64: ValueType<2048,86>; // n x 32 x i64 vector value + +def v2f16 : ValueType<32 , 87>; // 2 x f16 vector value +def v4f16 : ValueType<64 , 88>; // 4 x f16 vector value +def v8f16 : ValueType<128, 89>; // 8 x f16 vector value +def v1f32 : ValueType<32 , 90>; // 1 x f32 vector value +def v2f32 : ValueType<64 , 91>; // 2 x f32 vector value +def v3f32 : ValueType<96 , 92>; // 3 x f32 vector value +def v4f32 : ValueType<128, 93>; // 4 x f32 vector value +def v5f32 : ValueType<160, 94>; // 5 x f32 vector value +def v8f32 : ValueType<256, 95>; // 8 x f32 vector value +def v16f32 : ValueType<512, 96>; // 16 x f32 vector value +def v1f64 : ValueType<64, 97>; // 1 x f64 vector value +def v2f64 : ValueType<128, 98>; // 2 x f64 vector value +def v4f64 : ValueType<256, 99>; // 4 x f64 vector value +def v8f64 : ValueType<512,100>; // 8 x f64 vector value + +def nxv2f16 : ValueType<32 , 101>; // n x 2 x f16 vector value +def nxv4f16 : ValueType<64 , 102>; // n x 4 x f16 vector value +def nxv8f16 : ValueType<128, 103>; // n x 8 x f16 vector value +def nxv1f32 : ValueType<32 , 104>; // n x 1 x f32 vector value +def nxv2f32 : ValueType<64 , 105>; // n x 2 x f32 vector value +def nxv4f32 : ValueType<128, 106>; // n x 4 x f32 vector value +def nxv8f32 : ValueType<256, 107>; // n x 8 x f32 vector value +def nxv16f32 : ValueType<512, 108>; // n x 16 x f32 vector value +def nxv1f64 : ValueType<64, 109>; // n x 1 x f64 vector value +def nxv2f64 : ValueType<128, 110>; // n x 2 x f64 vector value +def nxv4f64 : ValueType<256, 111>; // n x 4 x f64 vector value +def nxv8f64 : ValueType<512, 112>; // n x 8 x f64 vector value + +def x86mmx : ValueType<64 , 113>; // X86 MMX value +def FlagVT : ValueType<0 , 114>; // Pre-RA sched glue +def isVoid : ValueType<0 , 115>; // Produces no value +def untyped: ValueType<8 , 116>; // Produces an untyped value +def ExceptRef: ValueType<0, 117>; // WebAssembly's except_ref type def token : ValueType<0 , 248>; // TokenTy def MetadataVT: ValueType<0, 249>; // Metadata Index: llvm/trunk/include/llvm/Support/MachineValueType.h =================================================================== --- llvm/trunk/include/llvm/Support/MachineValueType.h +++ llvm/trunk/include/llvm/Support/MachineValueType.h @@ -88,56 +88,58 @@ v1i32 = 41, // 1 x i32 v2i32 = 42, // 2 x i32 - v4i32 = 43, // 4 x i32 - v8i32 = 44, // 8 x i32 - v16i32 = 45, // 16 x i32 - v32i32 = 46, // 32 x i32 - v64i32 = 47, // 64 x i32 - - v1i64 = 48, // 1 x i64 - v2i64 = 49, // 2 x i64 - v4i64 = 50, // 4 x i64 - v8i64 = 51, // 8 x i64 - v16i64 = 52, // 16 x i64 - v32i64 = 53, // 32 x i64 + v3i32 = 43, // 4 x i32 + v4i32 = 44, // 4 x i32 + v5i32 = 45, // 4 x i32 + v8i32 = 46, // 8 x i32 + v16i32 = 47, // 16 x i32 + v32i32 = 48, // 32 x i32 + v64i32 = 49, // 64 x i32 + + v1i64 = 50, // 1 x i64 + v2i64 = 51, // 2 x i64 + v4i64 = 52, // 4 x i64 + v8i64 = 53, // 8 x i64 + v16i64 = 54, // 16 x i64 + v32i64 = 55, // 32 x i64 - v1i128 = 54, // 1 x i128 + v1i128 = 56, // 1 x i128 // Scalable integer types - nxv1i1 = 55, // n x 1 x i1 - nxv2i1 = 56, // n x 2 x i1 - nxv4i1 = 57, // n x 4 x i1 - nxv8i1 = 58, // n x 8 x i1 - nxv16i1 = 59, // n x 16 x i1 - nxv32i1 = 60, // n x 32 x i1 - - nxv1i8 = 61, // n x 1 x i8 - nxv2i8 = 62, // n x 2 x i8 - nxv4i8 = 63, // n x 4 x i8 - nxv8i8 = 64, // n x 8 x i8 - nxv16i8 = 65, // n x 16 x i8 - nxv32i8 = 66, // n x 32 x i8 - - nxv1i16 = 67, // n x 1 x i16 - nxv2i16 = 68, // n x 2 x i16 - nxv4i16 = 69, // n x 4 x i16 - nxv8i16 = 70, // n x 8 x i16 - nxv16i16 = 71, // n x 16 x i16 - nxv32i16 = 72, // n x 32 x i16 - - nxv1i32 = 73, // n x 1 x i32 - nxv2i32 = 74, // n x 2 x i32 - nxv4i32 = 75, // n x 4 x i32 - nxv8i32 = 76, // n x 8 x i32 - nxv16i32 = 77, // n x 16 x i32 - nxv32i32 = 78, // n x 32 x i32 - - nxv1i64 = 79, // n x 1 x i64 - nxv2i64 = 80, // n x 2 x i64 - nxv4i64 = 81, // n x 4 x i64 - nxv8i64 = 82, // n x 8 x i64 - nxv16i64 = 83, // n x 16 x i64 - nxv32i64 = 84, // n x 32 x i64 + nxv1i1 = 57, // n x 1 x i1 + nxv2i1 = 58, // n x 2 x i1 + nxv4i1 = 59, // n x 4 x i1 + nxv8i1 = 60, // n x 8 x i1 + nxv16i1 = 61, // n x 16 x i1 + nxv32i1 = 62, // n x 32 x i1 + + nxv1i8 = 63, // n x 1 x i8 + nxv2i8 = 64, // n x 2 x i8 + nxv4i8 = 65, // n x 4 x i8 + nxv8i8 = 66, // n x 8 x i8 + nxv16i8 = 67, // n x 16 x i8 + nxv32i8 = 68, // n x 32 x i8 + + nxv1i16 = 69, // n x 1 x i16 + nxv2i16 = 70, // n x 2 x i16 + nxv4i16 = 71, // n x 4 x i16 + nxv8i16 = 72, // n x 8 x i16 + nxv16i16 = 73, // n x 16 x i16 + nxv32i16 = 74, // n x 32 x i16 + + nxv1i32 = 75, // n x 1 x i32 + nxv2i32 = 76, // n x 2 x i32 + nxv4i32 = 77, // n x 4 x i32 + nxv8i32 = 78, // n x 8 x i32 + nxv16i32 = 79, // n x 16 x i32 + nxv32i32 = 80, // n x 32 x i32 + + nxv1i64 = 81, // n x 1 x i64 + nxv2i64 = 82, // n x 2 x i64 + nxv4i64 = 83, // n x 4 x i64 + nxv8i64 = 84, // n x 8 x i64 + nxv16i64 = 85, // n x 16 x i64 + nxv32i64 = 86, // n x 32 x i64 FIRST_INTEGER_VECTOR_VALUETYPE = v1i1, LAST_INTEGER_VECTOR_VALUETYPE = nxv32i64, @@ -145,31 +147,33 @@ FIRST_INTEGER_SCALABLE_VALUETYPE = nxv1i1, LAST_INTEGER_SCALABLE_VALUETYPE = nxv32i64, - v2f16 = 85, // 2 x f16 - v4f16 = 86, // 4 x f16 - v8f16 = 87, // 8 x f16 - v1f32 = 88, // 1 x f32 - v2f32 = 89, // 2 x f32 - v4f32 = 90, // 4 x f32 - v8f32 = 91, // 8 x f32 - v16f32 = 92, // 16 x f32 - v1f64 = 93, // 1 x f64 - v2f64 = 94, // 2 x f64 - v4f64 = 95, // 4 x f64 - v8f64 = 96, // 8 x f64 - - nxv2f16 = 97, // n x 2 x f16 - nxv4f16 = 98, // n x 4 x f16 - nxv8f16 = 99, // n x 8 x f16 - nxv1f32 = 100, // n x 1 x f32 - nxv2f32 = 101, // n x 2 x f32 - nxv4f32 = 102, // n x 4 x f32 - nxv8f32 = 103, // n x 8 x f32 - nxv16f32 = 104, // n x 16 x f32 - nxv1f64 = 105, // n x 1 x f64 - nxv2f64 = 106, // n x 2 x f64 - nxv4f64 = 107, // n x 4 x f64 - nxv8f64 = 108, // n x 8 x f64 + v2f16 = 87, // 2 x f16 + v4f16 = 88, // 4 x f16 + v8f16 = 89, // 8 x f16 + v1f32 = 90, // 1 x f32 + v2f32 = 91, // 2 x f32 + v3f32 = 92, // 4 x f32 + v4f32 = 93, // 4 x f32 + v5f32 = 94, // 4 x f32 + v8f32 = 95, // 8 x f32 + v16f32 = 96, // 16 x f32 + v1f64 = 97, // 1 x f64 + v2f64 = 98, // 2 x f64 + v4f64 = 99, // 4 x f64 + v8f64 = 100, // 8 x f64 + + nxv2f16 = 101, // n x 2 x f16 + nxv4f16 = 102, // n x 4 x f16 + nxv8f16 = 103, // n x 8 x f16 + nxv1f32 = 104, // n x 1 x f32 + nxv2f32 = 105, // n x 2 x f32 + nxv4f32 = 106, // n x 4 x f32 + nxv8f32 = 107, // n x 8 x f32 + nxv16f32 = 108, // n x 16 x f32 + nxv1f64 = 109, // n x 1 x f64 + nxv2f64 = 110, // n x 2 x f64 + nxv4f64 = 111, // n x 4 x f64 + nxv8f64 = 112, // n x 8 x f64 FIRST_FP_VECTOR_VALUETYPE = v2f16, LAST_FP_VECTOR_VALUETYPE = nxv8f64, @@ -180,20 +184,20 @@ FIRST_VECTOR_VALUETYPE = v1i1, LAST_VECTOR_VALUETYPE = nxv8f64, - x86mmx = 109, // This is an X86 MMX value + x86mmx = 113, // This is an X86 MMX value - Glue = 110, // This glues nodes together during pre-RA sched + Glue = 114, // This glues nodes together during pre-RA sched - isVoid = 111, // This has no value + isVoid = 115, // This has no value - Untyped = 112, // This value takes a register, but has + Untyped = 116, // This value takes a register, but has // unspecified type. The register class // will be determined by the opcode. - ExceptRef = 113, // WebAssembly's except_ref type + ExceptRef = 117, // WebAssembly's except_ref type FIRST_VALUETYPE = 1, // This is always the beginning of the list. - LAST_VALUETYPE = 114, // This always remains at the end of the list. + LAST_VALUETYPE = 118, // This always remains at the end of the list. // This is the current maximum for LAST_VALUETYPE. // MVT::MAX_ALLOWED_VALUETYPE is used for asserts and to size bit vectors @@ -463,7 +467,9 @@ case nxv32i16: return i16; case v1i32: case v2i32: + case v3i32: case v4i32: + case v5i32: case v8i32: case v16i32: case v32i32: @@ -495,7 +501,9 @@ case nxv8f16: return f16; case v1f32: case v2f32: + case v3f32: case v4f32: + case v5f32: case v8f32: case v16f32: case nxv1f32: @@ -566,6 +574,8 @@ case nxv8f16: case nxv8f32: case nxv8f64: return 8; + case v5i32: + case v5f32: return 5; case v4i1: case v4i8: case v4i16: @@ -582,6 +592,8 @@ case nxv4f16: case nxv4f32: case nxv4f64: return 4; + case v3i32: + case v3f32: return 3; case v2i1: case v2i8: case v2i16: @@ -692,6 +704,8 @@ case nxv2f32: case nxv1f64: return 64; case f80 : return 80; + case v3i32: + case v3f32: return 96; case f128: case ppcf128: case i128: @@ -711,6 +725,8 @@ case nxv8f16: case nxv4f32: case nxv2f64: return 128; + case v5i32: + case v5f32: return 160; case v32i8: case v16i16: case v8i32: @@ -863,7 +879,9 @@ case MVT::i32: if (NumElements == 1) return MVT::v1i32; if (NumElements == 2) return MVT::v2i32; + if (NumElements == 3) return MVT::v3i32; if (NumElements == 4) return MVT::v4i32; + if (NumElements == 5) return MVT::v5i32; if (NumElements == 8) return MVT::v8i32; if (NumElements == 16) return MVT::v16i32; if (NumElements == 32) return MVT::v32i32; @@ -888,7 +906,9 @@ case MVT::f32: if (NumElements == 1) return MVT::v1f32; if (NumElements == 2) return MVT::v2f32; + if (NumElements == 3) return MVT::v3f32; if (NumElements == 4) return MVT::v4f32; + if (NumElements == 5) return MVT::v5f32; if (NumElements == 8) return MVT::v8f32; if (NumElements == 16) return MVT::v16f32; break; Index: llvm/trunk/lib/CodeGen/ValueTypes.cpp =================================================================== --- llvm/trunk/lib/CodeGen/ValueTypes.cpp +++ llvm/trunk/lib/CodeGen/ValueTypes.cpp @@ -165,7 +165,9 @@ case MVT::v128i16: return "v128i16"; case MVT::v1i32: return "v1i32"; case MVT::v2i32: return "v2i32"; + case MVT::v3i32: return "v3i32"; case MVT::v4i32: return "v4i32"; + case MVT::v5i32: return "v5i32"; case MVT::v8i32: return "v8i32"; case MVT::v16i32: return "v16i32"; case MVT::v32i32: return "v32i32"; @@ -182,7 +184,9 @@ case MVT::v2f16: return "v2f16"; case MVT::v4f16: return "v4f16"; case MVT::v8f16: return "v8f16"; + case MVT::v3f32: return "v3f32"; case MVT::v4f32: return "v4f32"; + case MVT::v5f32: return "v5f32"; case MVT::v8f32: return "v8f32"; case MVT::v16f32: return "v16f32"; case MVT::v1f64: return "v1f64"; @@ -246,7 +250,9 @@ case MVT::v128i16: return VectorType::get(Type::getInt16Ty(Context), 128); case MVT::v1i32: return VectorType::get(Type::getInt32Ty(Context), 1); case MVT::v2i32: return VectorType::get(Type::getInt32Ty(Context), 2); + case MVT::v3i32: return VectorType::get(Type::getInt32Ty(Context), 3); case MVT::v4i32: return VectorType::get(Type::getInt32Ty(Context), 4); + case MVT::v5i32: return VectorType::get(Type::getInt32Ty(Context), 5); case MVT::v8i32: return VectorType::get(Type::getInt32Ty(Context), 8); case MVT::v16i32: return VectorType::get(Type::getInt32Ty(Context), 16); case MVT::v32i32: return VectorType::get(Type::getInt32Ty(Context), 32); @@ -263,7 +269,9 @@ case MVT::v8f16: return VectorType::get(Type::getHalfTy(Context), 8); case MVT::v1f32: return VectorType::get(Type::getFloatTy(Context), 1); case MVT::v2f32: return VectorType::get(Type::getFloatTy(Context), 2); + case MVT::v3f32: return VectorType::get(Type::getFloatTy(Context), 3); case MVT::v4f32: return VectorType::get(Type::getFloatTy(Context), 4); + case MVT::v5f32: return VectorType::get(Type::getFloatTy(Context), 5); case MVT::v8f32: return VectorType::get(Type::getFloatTy(Context), 8); case MVT::v16f32: return VectorType::get(Type::getFloatTy(Context), 16); case MVT::v1f64: return VectorType::get(Type::getDoubleTy(Context), 1); Index: llvm/trunk/test/TableGen/intrinsic-varargs.td =================================================================== --- llvm/trunk/test/TableGen/intrinsic-varargs.td +++ llvm/trunk/test/TableGen/intrinsic-varargs.td @@ -25,7 +25,7 @@ } // isVoid needs to match the definition in ValueTypes.td -def isVoid : ValueType<0, 111>; // Produces no value +def isVoid : ValueType<0, 115>; // Produces no value def llvm_vararg_ty : LLVMType; // this means vararg here // CHECK: /* 0 */ 0, 29, 0, Index: llvm/trunk/utils/TableGen/CodeGenTarget.cpp =================================================================== --- llvm/trunk/utils/TableGen/CodeGenTarget.cpp +++ llvm/trunk/utils/TableGen/CodeGenTarget.cpp @@ -106,7 +106,9 @@ case MVT::v128i16: return "MVT::v128i16"; case MVT::v1i32: return "MVT::v1i32"; case MVT::v2i32: return "MVT::v2i32"; + case MVT::v3i32: return "MVT::v3i32"; case MVT::v4i32: return "MVT::v4i32"; + case MVT::v5i32: return "MVT::v5i32"; case MVT::v8i32: return "MVT::v8i32"; case MVT::v16i32: return "MVT::v16i32"; case MVT::v32i32: return "MVT::v32i32"; @@ -123,7 +125,9 @@ case MVT::v8f16: return "MVT::v8f16"; case MVT::v1f32: return "MVT::v1f32"; case MVT::v2f32: return "MVT::v2f32"; + case MVT::v3f32: return "MVT::v3f32"; case MVT::v4f32: return "MVT::v4f32"; + case MVT::v5f32: return "MVT::v5f32"; case MVT::v8f32: return "MVT::v8f32"; case MVT::v16f32: return "MVT::v16f32"; case MVT::v1f64: return "MVT::v1f64";