Index: llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp
===================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp
+++ llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp
@@ -503,6 +503,7 @@
           !TargetRegisterInfo::isPhysicalRegister(I.getOperand(1).getReg()))) &&
         "No phys reg on generic operator!");
     assert(KnownValid || isValidCopy(I, DstRegBank, MRI, TRI, RBI));
+    (void)KnownValid;
     return true;
   };
 
Index: llvm/trunk/lib/Target/ARM/ARMInstructionSelector.cpp
===================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstructionSelector.cpp
+++ llvm/trunk/lib/Target/ARM/ARMInstructionSelector.cpp
@@ -665,11 +665,12 @@
 
     // FIXME: Taking advantage of MOVT for ELF is pretty involved, so we don't
     // support it yet. See PR28229.
-    unsigned Opc = UseMovt && !STI.isTargetELF()
-                       ? (UseOpcodeThatLoads ? ARM::MOV_ga_pcrel_ldr
-                                             : Opcodes.MOV_ga_pcrel)
-                       : (UseOpcodeThatLoads ? ARM::LDRLIT_ga_pcrel_ldr
-                                             : Opcodes.LDRLIT_ga_pcrel);
+    unsigned Opc =
+        UseMovt && !STI.isTargetELF()
+            ? (UseOpcodeThatLoads ? (unsigned)ARM::MOV_ga_pcrel_ldr
+                                  : Opcodes.MOV_ga_pcrel)
+            : (UseOpcodeThatLoads ? (unsigned)ARM::LDRLIT_ga_pcrel_ldr
+                                  : Opcodes.LDRLIT_ga_pcrel);
     MIB->setDesc(TII.get(Opc));
 
     int TargetFlags = ARMII::MO_NO_FLAG;