Index: lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp =================================================================== --- lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp +++ lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp @@ -4654,14 +4654,27 @@ OperandMatchResultTy AMDGPUAsmParser::parseSOppBrTarget(OperandVector &Operands) { - SMLoc S = Parser.getTok().getLoc(); + bool Minus = false; + if (getLexer().getKind() == AsmToken::Minus) { + if (!getLexer().peekTok().is(AsmToken::Integer)) + return MatchOperand_ParseFail; + Minus = true; + Parser.Lex(); + } + SMLoc S = Parser.getTok().getLoc(); switch (getLexer().getKind()) { default: return MatchOperand_ParseFail; case AsmToken::Integer: { int64_t Imm; if (getParser().parseAbsoluteExpression(Imm)) return MatchOperand_ParseFail; + if (Minus) + Imm *= -1; + if (!isInt<16>(Imm)) { + Error(S, "simm16 out of range."); + return MatchOperand_ParseFail; + } Operands.push_back(AMDGPUOperand::CreateImm(this, Imm, S)); return MatchOperand_Success; } Index: lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp =================================================================== --- lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp +++ lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp @@ -76,12 +76,14 @@ uint64_t Addr, const void *Decoder) { auto DAsm = static_cast(Decoder); + // Our branches take a simm16, but we need two extra bits to account for the + // factor of 4. APInt SignedOffset(18, Imm * 4, true); int64_t Offset = (SignedOffset.sext(64) + 4 + Addr).getSExtValue(); if (DAsm->tryAddingSymbolicOperand(Inst, Offset, Addr, true, 2, 2)) return MCDisassembler::Success; - return addOperand(Inst, MCOperand::createImm(Imm)); + return addOperand(Inst, MCOperand::createImm(SignExtend64<16>(Imm))); } #define DECODE_OPERAND(StaticDecoderName, DecoderName) \ Index: lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.h =================================================================== --- lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.h +++ lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.h @@ -144,6 +144,8 @@ const MCSubtargetInfo &STI, raw_ostream &O); void printInterpAttrChan(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O); + void printSoppBrTarget(const MCInst *MI, unsigned OpNo, + const MCSubtargetInfo &STI, raw_ostream &O); void printVGPRIndexMode(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O); Index: lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp =================================================================== --- lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp +++ lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp @@ -961,6 +961,19 @@ printOperand(MI, OpNo + 1, STI, O); } +void AMDGPUInstPrinter::printSoppBrTarget(const MCInst *MI, unsigned OpNo, + const MCSubtargetInfo &STI, + raw_ostream &O) { + const MCOperand &Op = MI->getOperand(OpNo); + if (Op.isImm()) { + int64_t Val = Op.getImm(); + assert(isInt<16>(Val) && "branch immediate must be simm16"); + O << formatDec(Val); + } else { + printOperand(MI, OpNo, STI, O); + } +} + void AMDGPUInstPrinter::printIfSet(const MCInst *MI, unsigned OpNo, raw_ostream &O, StringRef Asm, StringRef Default) { Index: lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp =================================================================== --- lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp +++ lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp @@ -20,6 +20,7 @@ #include "llvm/MC/MCAsmBackend.h" #include "llvm/MC/MCCodeEmitter.h" #include "llvm/MC/MCContext.h" +#include "llvm/MC/MCInstrAnalysis.h" #include "llvm/MC/MCInstrInfo.h" #include "llvm/MC/MCObjectWriter.h" #include "llvm/MC/MCRegisterInfo.h" @@ -103,6 +104,35 @@ std::move(Emitter), RelaxAll); } +namespace { + +class AMDGPUMCInstrAnalysis : public MCInstrAnalysis { +public: + explicit AMDGPUMCInstrAnalysis(const MCInstrInfo *Info) + : MCInstrAnalysis(Info) {} + + bool evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size, + uint64_t &Target) const override { + if (Inst.getNumOperands() == 0 || !Inst.getOperand(0).isImm() || + Info->get(Inst.getOpcode()).OpInfo[0].OperandType != + MCOI::OPERAND_PCREL) + return false; + + int64_t Imm = Inst.getOperand(0).getImm(); + // Our branches take a simm16, but we need two extra bits to account for + // the factor of 4. + APInt SignedOffset(18, Imm * 4, true); + Target = (SignedOffset.sext(64) + Addr + Size).getZExtValue(); + return true; + } +}; + +} // end anonymous namespace + +static MCInstrAnalysis *createAMDGPUMCInstrAnalysis(const MCInstrInfo *Info) { + return new AMDGPUMCInstrAnalysis(Info); +} + extern "C" void LLVMInitializeAMDGPUTargetMC() { TargetRegistry::RegisterMCInstrInfo(getTheGCNTarget(), createAMDGPUMCInstrInfo); @@ -113,6 +143,7 @@ TargetRegistry::RegisterMCRegInfo(*T, createAMDGPUMCRegisterInfo); TargetRegistry::RegisterMCSubtargetInfo(*T, createAMDGPUMCSubtargetInfo); TargetRegistry::RegisterMCInstPrinter(*T, createAMDGPUMCInstPrinter); + TargetRegistry::RegisterMCInstrAnalysis(*T, createAMDGPUMCInstrAnalysis); TargetRegistry::RegisterMCAsmBackend(*T, createAMDGPUAsmBackend); TargetRegistry::RegisterELFStreamer(*T, createMCStreamer); } Index: lib/Target/AMDGPU/SIInstrInfo.td =================================================================== --- lib/Target/AMDGPU/SIInstrInfo.td +++ lib/Target/AMDGPU/SIInstrInfo.td @@ -529,6 +529,7 @@ let DecoderMethod = "decodeSoppBrTarget"; let OperandType = "OPERAND_PCREL"; let ParserMatchClass = SoppBrTarget; + let PrintMethod = "printSoppBrTarget"; } def si_ga : Operand; Index: test/MC/AMDGPU/branch-comment-fail.s =================================================================== --- /dev/null +++ test/MC/AMDGPU/branch-comment-fail.s @@ -0,0 +1,9 @@ +// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji -filetype=obj -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s + +s_branch -32769 +// ERROR: branch-comment-fail.s:3:11: error: simm16 out of range. +// ERROR: branch-comment-fail.s:3:16: error: failed parsing operand. + +s_branch 32768 +// ERROR: branch-comment-fail.s:7:10: error: simm16 out of range. +// ERROR: branch-comment-fail.s:7:15: error: failed parsing operand. Index: test/MC/AMDGPU/branch-comment.s =================================================================== --- /dev/null +++ test/MC/AMDGPU/branch-comment.s @@ -0,0 +1,35 @@ +// RUN: llvm-mc -arch=amdgcn -mcpu=fiji -filetype=obj %s | llvm-objcopy -S -K keep_symbol - | llvm-objdump -disassemble -mcpu=fiji - | FileCheck %s --check-prefix=BIN + +loop_start_nosym: +s_branch loop_start_nosym +// BIN-NOT: loop_start_nosym: +// BIN: s_branch -1 // 000000000000: BF82FFFF <.text> + +s_branch loop_end_nosym +// BIN: s_branch 0 // 000000000004: BF820000 <.text+0x8> +// BIN-NOT: loop_end_nosym: +loop_end_nosym: + s_nop 0 + +keep_symbol: + s_nop 0 + +loop_start_sym: +s_branch loop_start_sym +// BIN-NOT: loop_start_sym: +// BIN: s_branch -1 // 000000000010: BF82FFFF + +s_branch loop_end_sym +// BIN: s_branch 0 // 000000000014: BF820000 +// BIN-NOT: loop_end_sym: +loop_end_sym: + s_nop 0 + +s_branch -1 +// BIN: s_branch -1 // 00000000001C: BF82FFFF + +s_branch -32768 +// BIN: s_branch -32768 // 000000000020: BF828000 + +s_branch 32767 +// BIN: s_branch 32767 // 000000000024: BF827FFF Index: test/MC/AMDGPU/gfx7_asm_all.s =================================================================== --- test/MC/AMDGPU/gfx7_asm_all.s +++ test/MC/AMDGPU/gfx7_asm_all.s @@ -23010,7 +23010,7 @@ s_cbranch_i_fork exec, 12609 // CHECK: [0x41,0x31,0xfe,0xb8] -s_cbranch_i_fork s[2:3], 49617 +s_cbranch_i_fork s[2:3], -15919 // CHECK: [0xd1,0xc1,0x82,0xb8] s_getreg_b32 s5, 0x3141 @@ -23124,43 +23124,43 @@ s_branch 12609 // CHECK: [0x41,0x31,0x82,0xbf] -s_branch 49617 +s_branch -15919 // CHECK: [0xd1,0xc1,0x82,0xbf] s_cbranch_scc0 12609 // CHECK: [0x41,0x31,0x84,0xbf] -s_cbranch_scc0 49617 +s_cbranch_scc0 -15919 // CHECK: [0xd1,0xc1,0x84,0xbf] s_cbranch_scc1 12609 // CHECK: [0x41,0x31,0x85,0xbf] -s_cbranch_scc1 49617 +s_cbranch_scc1 -15919 // CHECK: [0xd1,0xc1,0x85,0xbf] s_cbranch_vccz 12609 // CHECK: [0x41,0x31,0x86,0xbf] -s_cbranch_vccz 49617 +s_cbranch_vccz -15919 // CHECK: [0xd1,0xc1,0x86,0xbf] s_cbranch_vccnz 12609 // CHECK: [0x41,0x31,0x87,0xbf] -s_cbranch_vccnz 49617 +s_cbranch_vccnz -15919 // CHECK: [0xd1,0xc1,0x87,0xbf] s_cbranch_execz 12609 // CHECK: [0x41,0x31,0x88,0xbf] -s_cbranch_execz 49617 +s_cbranch_execz -15919 // CHECK: [0xd1,0xc1,0x88,0xbf] s_cbranch_execnz 12609 // CHECK: [0x41,0x31,0x89,0xbf] -s_cbranch_execnz 49617 +s_cbranch_execnz -15919 // CHECK: [0xd1,0xc1,0x89,0xbf] s_barrier @@ -23235,25 +23235,25 @@ s_cbranch_cdbgsys 12609 // CHECK: [0x41,0x31,0x97,0xbf] -s_cbranch_cdbgsys 49617 +s_cbranch_cdbgsys -15919 // CHECK: [0xd1,0xc1,0x97,0xbf] s_cbranch_cdbguser 12609 // CHECK: [0x41,0x31,0x98,0xbf] -s_cbranch_cdbguser 49617 +s_cbranch_cdbguser -15919 // CHECK: [0xd1,0xc1,0x98,0xbf] s_cbranch_cdbgsys_or_user 12609 // CHECK: [0x41,0x31,0x99,0xbf] -s_cbranch_cdbgsys_or_user 49617 +s_cbranch_cdbgsys_or_user -15919 // CHECK: [0xd1,0xc1,0x99,0xbf] s_cbranch_cdbgsys_and_user 12609 // CHECK: [0x41,0x31,0x9a,0xbf] -s_cbranch_cdbgsys_and_user 49617 +s_cbranch_cdbgsys_and_user -15919 // CHECK: [0xd1,0xc1,0x9a,0xbf] v_interp_p1_f32 v5, v1, attr0.x Index: test/MC/AMDGPU/gfx8_asm_all.s =================================================================== --- test/MC/AMDGPU/gfx8_asm_all.s +++ test/MC/AMDGPU/gfx8_asm_all.s @@ -24018,7 +24018,7 @@ s_cbranch_i_fork exec, 12609 // CHECK: [0x41,0x31,0x7e,0xb8] -s_cbranch_i_fork s[2:3], 49617 +s_cbranch_i_fork s[2:3], -15919 // CHECK: [0xd1,0xc1,0x02,0xb8] s_getreg_b32 s5, 0x3141 @@ -24132,7 +24132,7 @@ s_branch 12609 // CHECK: [0x41,0x31,0x82,0xbf] -s_branch 49617 +s_branch -15919 // CHECK: [0xd1,0xc1,0x82,0xbf] s_wakeup @@ -24141,37 +24141,37 @@ s_cbranch_scc0 12609 // CHECK: [0x41,0x31,0x84,0xbf] -s_cbranch_scc0 49617 +s_cbranch_scc0 -15919 // CHECK: [0xd1,0xc1,0x84,0xbf] s_cbranch_scc1 12609 // CHECK: [0x41,0x31,0x85,0xbf] -s_cbranch_scc1 49617 +s_cbranch_scc1 -15919 // CHECK: [0xd1,0xc1,0x85,0xbf] s_cbranch_vccz 12609 // CHECK: [0x41,0x31,0x86,0xbf] -s_cbranch_vccz 49617 +s_cbranch_vccz -15919 // CHECK: [0xd1,0xc1,0x86,0xbf] s_cbranch_vccnz 12609 // CHECK: [0x41,0x31,0x87,0xbf] -s_cbranch_vccnz 49617 +s_cbranch_vccnz -15919 // CHECK: [0xd1,0xc1,0x87,0xbf] s_cbranch_execz 12609 // CHECK: [0x41,0x31,0x88,0xbf] -s_cbranch_execz 49617 +s_cbranch_execz -15919 // CHECK: [0xd1,0xc1,0x88,0xbf] s_cbranch_execnz 12609 // CHECK: [0x41,0x31,0x89,0xbf] -s_cbranch_execnz 49617 +s_cbranch_execnz -15919 // CHECK: [0xd1,0xc1,0x89,0xbf] s_barrier @@ -24246,25 +24246,25 @@ s_cbranch_cdbgsys 12609 // CHECK: [0x41,0x31,0x97,0xbf] -s_cbranch_cdbgsys 49617 +s_cbranch_cdbgsys -15919 // CHECK: [0xd1,0xc1,0x97,0xbf] s_cbranch_cdbguser 12609 // CHECK: [0x41,0x31,0x98,0xbf] -s_cbranch_cdbguser 49617 +s_cbranch_cdbguser -15919 // CHECK: [0xd1,0xc1,0x98,0xbf] s_cbranch_cdbgsys_or_user 12609 // CHECK: [0x41,0x31,0x99,0xbf] -s_cbranch_cdbgsys_or_user 49617 +s_cbranch_cdbgsys_or_user -15919 // CHECK: [0xd1,0xc1,0x99,0xbf] s_cbranch_cdbgsys_and_user 12609 // CHECK: [0x41,0x31,0x9a,0xbf] -s_cbranch_cdbgsys_and_user 49617 +s_cbranch_cdbgsys_and_user -15919 // CHECK: [0xd1,0xc1,0x9a,0xbf] s_endpgm_saved Index: test/MC/AMDGPU/gfx9_asm_all.s =================================================================== --- test/MC/AMDGPU/gfx9_asm_all.s +++ test/MC/AMDGPU/gfx9_asm_all.s @@ -21148,7 +21148,7 @@ s_cbranch_i_fork exec, 12609 // CHECK: [0x41,0x31,0x7e,0xb8] -s_cbranch_i_fork s[2:3], 49617 +s_cbranch_i_fork s[2:3], -15919 // CHECK: [0xd1,0xc1,0x02,0xb8] s_getreg_b32 s5, 0x3141 @@ -21232,7 +21232,7 @@ s_branch 12609 // CHECK: [0x41,0x31,0x82,0xbf] -s_branch 49617 +s_branch -15919 // CHECK: [0xd1,0xc1,0x82,0xbf] s_wakeup @@ -21241,37 +21241,37 @@ s_cbranch_scc0 12609 // CHECK: [0x41,0x31,0x84,0xbf] -s_cbranch_scc0 49617 +s_cbranch_scc0 -15919 // CHECK: [0xd1,0xc1,0x84,0xbf] s_cbranch_scc1 12609 // CHECK: [0x41,0x31,0x85,0xbf] -s_cbranch_scc1 49617 +s_cbranch_scc1 -15919 // CHECK: [0xd1,0xc1,0x85,0xbf] s_cbranch_vccz 12609 // CHECK: [0x41,0x31,0x86,0xbf] -s_cbranch_vccz 49617 +s_cbranch_vccz -15919 // CHECK: [0xd1,0xc1,0x86,0xbf] s_cbranch_vccnz 12609 // CHECK: [0x41,0x31,0x87,0xbf] -s_cbranch_vccnz 49617 +s_cbranch_vccnz -15919 // CHECK: [0xd1,0xc1,0x87,0xbf] s_cbranch_execz 12609 // CHECK: [0x41,0x31,0x88,0xbf] -s_cbranch_execz 49617 +s_cbranch_execz -15919 // CHECK: [0xd1,0xc1,0x88,0xbf] s_cbranch_execnz 12609 // CHECK: [0x41,0x31,0x89,0xbf] -s_cbranch_execnz 49617 +s_cbranch_execnz -15919 // CHECK: [0xd1,0xc1,0x89,0xbf] s_barrier @@ -21346,25 +21346,25 @@ s_cbranch_cdbgsys 12609 // CHECK: [0x41,0x31,0x97,0xbf] -s_cbranch_cdbgsys 49617 +s_cbranch_cdbgsys -15919 // CHECK: [0xd1,0xc1,0x97,0xbf] s_cbranch_cdbguser 12609 // CHECK: [0x41,0x31,0x98,0xbf] -s_cbranch_cdbguser 49617 +s_cbranch_cdbguser -15919 // CHECK: [0xd1,0xc1,0x98,0xbf] s_cbranch_cdbgsys_or_user 12609 // CHECK: [0x41,0x31,0x99,0xbf] -s_cbranch_cdbgsys_or_user 49617 +s_cbranch_cdbgsys_or_user -15919 // CHECK: [0xd1,0xc1,0x99,0xbf] s_cbranch_cdbgsys_and_user 12609 // CHECK: [0x41,0x31,0x9a,0xbf] -s_cbranch_cdbgsys_and_user 49617 +s_cbranch_cdbgsys_and_user -15919 // CHECK: [0xd1,0xc1,0x9a,0xbf] s_endpgm_saved Index: test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt =================================================================== --- test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt +++ test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt @@ -20679,7 +20679,7 @@ # CHECK: s_branch 12609 ; encoding: [0x41,0x31,0x82,0xbf] 0x41,0x31,0x82,0xbf -# CHECK: s_branch 49617 ; encoding: [0xd1,0xc1,0x82,0xbf] +# CHECK: s_branch -15919 ; encoding: [0xd1,0xc1,0x82,0xbf] 0xd1,0xc1,0x82,0xbf # CHECK: s_wakeup ; encoding: [0x00,0x00,0x83,0xbf] @@ -20688,37 +20688,37 @@ # CHECK: s_cbranch_scc0 12609 ; encoding: [0x41,0x31,0x84,0xbf] 0x41,0x31,0x84,0xbf -# CHECK: s_cbranch_scc0 49617 ; encoding: [0xd1,0xc1,0x84,0xbf] +# CHECK: s_cbranch_scc0 -15919 ; encoding: [0xd1,0xc1,0x84,0xbf] 0xd1,0xc1,0x84,0xbf # CHECK: s_cbranch_scc1 12609 ; encoding: [0x41,0x31,0x85,0xbf] 0x41,0x31,0x85,0xbf -# CHECK: s_cbranch_scc1 49617 ; encoding: [0xd1,0xc1,0x85,0xbf] +# CHECK: s_cbranch_scc1 -15919 ; encoding: [0xd1,0xc1,0x85,0xbf] 0xd1,0xc1,0x85,0xbf # CHECK: s_cbranch_vccz 12609 ; encoding: [0x41,0x31,0x86,0xbf] 0x41,0x31,0x86,0xbf -# CHECK: s_cbranch_vccz 49617 ; encoding: [0xd1,0xc1,0x86,0xbf] +# CHECK: s_cbranch_vccz -15919 ; encoding: [0xd1,0xc1,0x86,0xbf] 0xd1,0xc1,0x86,0xbf # CHECK: s_cbranch_vccnz 12609 ; encoding: [0x41,0x31,0x87,0xbf] 0x41,0x31,0x87,0xbf -# CHECK: s_cbranch_vccnz 49617 ; encoding: [0xd1,0xc1,0x87,0xbf] +# CHECK: s_cbranch_vccnz -15919 ; encoding: [0xd1,0xc1,0x87,0xbf] 0xd1,0xc1,0x87,0xbf # CHECK: s_cbranch_execz 12609 ; encoding: [0x41,0x31,0x88,0xbf] 0x41,0x31,0x88,0xbf -# CHECK: s_cbranch_execz 49617 ; encoding: [0xd1,0xc1,0x88,0xbf] +# CHECK: s_cbranch_execz -15919 ; encoding: [0xd1,0xc1,0x88,0xbf] 0xd1,0xc1,0x88,0xbf # CHECK: s_cbranch_execnz 12609 ; encoding: [0x41,0x31,0x89,0xbf] 0x41,0x31,0x89,0xbf -# CHECK: s_cbranch_execnz 49617 ; encoding: [0xd1,0xc1,0x89,0xbf] +# CHECK: s_cbranch_execnz -15919 ; encoding: [0xd1,0xc1,0x89,0xbf] 0xd1,0xc1,0x89,0xbf # CHECK: s_barrier ; encoding: [0x00,0x00,0x8a,0xbf] @@ -20775,25 +20775,25 @@ # CHECK: s_cbranch_cdbgsys 12609 ; encoding: [0x41,0x31,0x97,0xbf] 0x41,0x31,0x97,0xbf -# CHECK: s_cbranch_cdbgsys 49617 ; encoding: [0xd1,0xc1,0x97,0xbf] +# CHECK: s_cbranch_cdbgsys -15919 ; encoding: [0xd1,0xc1,0x97,0xbf] 0xd1,0xc1,0x97,0xbf # CHECK: s_cbranch_cdbguser 12609 ; encoding: [0x41,0x31,0x98,0xbf] 0x41,0x31,0x98,0xbf -# CHECK: s_cbranch_cdbguser 49617 ; encoding: [0xd1,0xc1,0x98,0xbf] +# CHECK: s_cbranch_cdbguser -15919 ; encoding: [0xd1,0xc1,0x98,0xbf] 0xd1,0xc1,0x98,0xbf # CHECK: s_cbranch_cdbgsys_or_user 12609 ; encoding: [0x41,0x31,0x99,0xbf] 0x41,0x31,0x99,0xbf -# CHECK: s_cbranch_cdbgsys_or_user 49617 ; encoding: [0xd1,0xc1,0x99,0xbf] +# CHECK: s_cbranch_cdbgsys_or_user -15919 ; encoding: [0xd1,0xc1,0x99,0xbf] 0xd1,0xc1,0x99,0xbf # CHECK: s_cbranch_cdbgsys_and_user 12609 ; encoding: [0x41,0x31,0x9a,0xbf] 0x41,0x31,0x9a,0xbf -# CHECK: s_cbranch_cdbgsys_and_user 49617 ; encoding: [0xd1,0xc1,0x9a,0xbf] +# CHECK: s_cbranch_cdbgsys_and_user -15919 ; encoding: [0xd1,0xc1,0x9a,0xbf] 0xd1,0xc1,0x9a,0xbf # CHECK: s_endpgm_saved ; encoding: [0x00,0x00,0x9b,0xbf] Index: test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt =================================================================== --- test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt +++ test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt @@ -18726,7 +18726,7 @@ # CHECK: s_branch 12609 ; encoding: [0x41,0x31,0x82,0xbf] 0x41,0x31,0x82,0xbf -# CHECK: s_branch 49617 ; encoding: [0xd1,0xc1,0x82,0xbf] +# CHECK: s_branch -15919 ; encoding: [0xd1,0xc1,0x82,0xbf] 0xd1,0xc1,0x82,0xbf # CHECK: s_wakeup ; encoding: [0x00,0x00,0x83,0xbf] @@ -18735,37 +18735,37 @@ # CHECK: s_cbranch_scc0 12609 ; encoding: [0x41,0x31,0x84,0xbf] 0x41,0x31,0x84,0xbf -# CHECK: s_cbranch_scc0 49617 ; encoding: [0xd1,0xc1,0x84,0xbf] +# CHECK: s_cbranch_scc0 -15919 ; encoding: [0xd1,0xc1,0x84,0xbf] 0xd1,0xc1,0x84,0xbf # CHECK: s_cbranch_scc1 12609 ; encoding: [0x41,0x31,0x85,0xbf] 0x41,0x31,0x85,0xbf -# CHECK: s_cbranch_scc1 49617 ; encoding: [0xd1,0xc1,0x85,0xbf] +# CHECK: s_cbranch_scc1 -15919 ; encoding: [0xd1,0xc1,0x85,0xbf] 0xd1,0xc1,0x85,0xbf # CHECK: s_cbranch_vccz 12609 ; encoding: [0x41,0x31,0x86,0xbf] 0x41,0x31,0x86,0xbf -# CHECK: s_cbranch_vccz 49617 ; encoding: [0xd1,0xc1,0x86,0xbf] +# CHECK: s_cbranch_vccz -15919 ; encoding: [0xd1,0xc1,0x86,0xbf] 0xd1,0xc1,0x86,0xbf # CHECK: s_cbranch_vccnz 12609 ; encoding: [0x41,0x31,0x87,0xbf] 0x41,0x31,0x87,0xbf -# CHECK: s_cbranch_vccnz 49617 ; encoding: [0xd1,0xc1,0x87,0xbf] +# CHECK: s_cbranch_vccnz -15919 ; encoding: [0xd1,0xc1,0x87,0xbf] 0xd1,0xc1,0x87,0xbf # CHECK: s_cbranch_execz 12609 ; encoding: [0x41,0x31,0x88,0xbf] 0x41,0x31,0x88,0xbf -# CHECK: s_cbranch_execz 49617 ; encoding: [0xd1,0xc1,0x88,0xbf] +# CHECK: s_cbranch_execz -15919 ; encoding: [0xd1,0xc1,0x88,0xbf] 0xd1,0xc1,0x88,0xbf # CHECK: s_cbranch_execnz 12609 ; encoding: [0x41,0x31,0x89,0xbf] 0x41,0x31,0x89,0xbf -# CHECK: s_cbranch_execnz 49617 ; encoding: [0xd1,0xc1,0x89,0xbf] +# CHECK: s_cbranch_execnz -15919 ; encoding: [0xd1,0xc1,0x89,0xbf] 0xd1,0xc1,0x89,0xbf # CHECK: s_barrier ; encoding: [0x00,0x00,0x8a,0xbf] @@ -18822,25 +18822,25 @@ # CHECK: s_cbranch_cdbgsys 12609 ; encoding: [0x41,0x31,0x97,0xbf] 0x41,0x31,0x97,0xbf -# CHECK: s_cbranch_cdbgsys 49617 ; encoding: [0xd1,0xc1,0x97,0xbf] +# CHECK: s_cbranch_cdbgsys -15919 ; encoding: [0xd1,0xc1,0x97,0xbf] 0xd1,0xc1,0x97,0xbf # CHECK: s_cbranch_cdbguser 12609 ; encoding: [0x41,0x31,0x98,0xbf] 0x41,0x31,0x98,0xbf -# CHECK: s_cbranch_cdbguser 49617 ; encoding: [0xd1,0xc1,0x98,0xbf] +# CHECK: s_cbranch_cdbguser -15919 ; encoding: [0xd1,0xc1,0x98,0xbf] 0xd1,0xc1,0x98,0xbf # CHECK: s_cbranch_cdbgsys_or_user 12609 ; encoding: [0x41,0x31,0x99,0xbf] 0x41,0x31,0x99,0xbf -# CHECK: s_cbranch_cdbgsys_or_user 49617 ; encoding: [0xd1,0xc1,0x99,0xbf] +# CHECK: s_cbranch_cdbgsys_or_user -15919 ; encoding: [0xd1,0xc1,0x99,0xbf] 0xd1,0xc1,0x99,0xbf # CHECK: s_cbranch_cdbgsys_and_user 12609 ; encoding: [0x41,0x31,0x9a,0xbf] 0x41,0x31,0x9a,0xbf -# CHECK: s_cbranch_cdbgsys_and_user 49617 ; encoding: [0xd1,0xc1,0x9a,0xbf] +# CHECK: s_cbranch_cdbgsys_and_user -15919 ; encoding: [0xd1,0xc1,0x9a,0xbf] 0xd1,0xc1,0x9a,0xbf # CHECK: s_endpgm_saved ; encoding: [0x00,0x00,0x9b,0xbf]