Index: lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp =================================================================== --- lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp +++ lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp @@ -20,6 +20,7 @@ #include "llvm/MC/MCAsmBackend.h" #include "llvm/MC/MCCodeEmitter.h" #include "llvm/MC/MCContext.h" +#include "llvm/MC/MCInstrAnalysis.h" #include "llvm/MC/MCInstrInfo.h" #include "llvm/MC/MCObjectWriter.h" #include "llvm/MC/MCRegisterInfo.h" @@ -103,6 +104,33 @@ std::move(Emitter), RelaxAll); } +namespace { + +class AMDGPUMCInstrAnalysis : public MCInstrAnalysis { +public: + explicit AMDGPUMCInstrAnalysis(const MCInstrInfo *Info) + : MCInstrAnalysis(Info) {} + + bool evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size, + uint64_t &Target) const override { + if (Inst.getNumOperands() == 0 || !Inst.getOperand(0).isImm() || + Info->get(Inst.getOpcode()).OpInfo[0].OperandType != + MCOI::OPERAND_PCREL) + return false; + + int64_t Imm = Inst.getOperand(0).getImm(); + APInt SignedOffset(18, Imm * 4, true); + Target = (SignedOffset.sext(64) + Addr + Size).getZExtValue(); + return true; + } +}; + +} // end anonymous namespace + +static MCInstrAnalysis *createAMDGPUMCInstrAnalysis(const MCInstrInfo *Info) { + return new AMDGPUMCInstrAnalysis(Info); +} + extern "C" void LLVMInitializeAMDGPUTargetMC() { TargetRegistry::RegisterMCInstrInfo(getTheGCNTarget(), createAMDGPUMCInstrInfo); @@ -113,6 +141,7 @@ TargetRegistry::RegisterMCRegInfo(*T, createAMDGPUMCRegisterInfo); TargetRegistry::RegisterMCSubtargetInfo(*T, createAMDGPUMCSubtargetInfo); TargetRegistry::RegisterMCInstPrinter(*T, createAMDGPUMCInstPrinter); + TargetRegistry::RegisterMCInstrAnalysis(*T, createAMDGPUMCInstrAnalysis); TargetRegistry::RegisterMCAsmBackend(*T, createAMDGPUAsmBackend); TargetRegistry::RegisterELFStreamer(*T, createMCStreamer); } Index: test/MC/AMDGPU/branch-comment.s =================================================================== --- /dev/null +++ test/MC/AMDGPU/branch-comment.s @@ -0,0 +1,15 @@ +// RUN: llvm-mc -arch=amdgcn -mcpu=fiji -filetype=obj %s | llvm-objcopy -S -K keep_symbol - | llvm-objdump -disassemble -mcpu=fiji - | FileCheck %s --check-prefix=BIN + +keep_symbol: + s_nop 0 + +loop_start: +s_branch loop_start +// BIN-NOT: loop_start: +// BIN: s_branch 65535 // 000000000004: BF82FFFF + +s_branch loop_end +// BIN: s_branch 0 // 000000000008: BF820000 +// BIN-NOT: loop_end: +loop_end: + s_nop 0