Index: test/MachineVerifier/test_g_build_vector.mir
===================================================================
--- test/MachineVerifier/test_g_build_vector.mir
+++ test/MachineVerifier/test_g_build_vector.mir
@@ -1,9 +1,9 @@
 #RUN: not llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
-# REQUIRES: global-isel, aarch64-registered-target
+# REQUIRES: aarch64-registered-target
 --- |
   target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
   target triple = "aarch64-unknown-unknown"
-  
+
   define i32 @g_build_vector() {
     ret i32 0
   }
@@ -15,9 +15,9 @@
 regBankSelected: false
 selected:        false
 tracksRegLiveness: true
-registers:       
+registers:
   - { id: 0, class: _, preferred-register: '' }
-liveins:         
+liveins:
 body:             |
   bb.0:
     ; CHECK: Bad machine code: G_BUILD_VECTOR src operands total size don't match dest size
Index: test/MachineVerifier/test_g_build_vector_trunc.mir
===================================================================
--- test/MachineVerifier/test_g_build_vector_trunc.mir
+++ test/MachineVerifier/test_g_build_vector_trunc.mir
@@ -1,9 +1,9 @@
 #RUN: not llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
-# REQUIRES: global-isel, aarch64-registered-target
+# REQUIRES: aarch64-registered-target
 --- |
   target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
   target triple = "aarch64-unknown-unknown"
-  
+
   define i32 @g_build_vector_trunc() {
     ret i32 0
   }
@@ -15,9 +15,9 @@
 regBankSelected: false
 selected:        false
 tracksRegLiveness: true
-registers:       
+registers:
   - { id: 0, class: _, preferred-register: '' }
-liveins:         
+liveins:
 body:             |
   bb.0:
     ; CHECK: Bad machine code: G_BUILD_VECTOR_TRUNC source operand types are not larger than dest elt type
Index: test/MachineVerifier/verifier-generic-extend-truncate.mir
===================================================================
--- test/MachineVerifier/verifier-generic-extend-truncate.mir
+++ test/MachineVerifier/verifier-generic-extend-truncate.mir
@@ -1,4 +1,5 @@
 # RUN: not llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s
+# REQUIRES: x86-registered-target
 
 # CHECK: Bad machine code: Generic extend/truncate can not operate on pointers
 # CHECK-NEXT: - function:    bad_generic_extends_and_truncates
Index: test/MachineVerifier/verifier-generic-types-1.mir
===================================================================
--- test/MachineVerifier/verifier-generic-types-1.mir
+++ test/MachineVerifier/verifier-generic-types-1.mir
@@ -1,4 +1,5 @@
 # RUN: not llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s
+# REQUIRES: x86-registered-target
 
 # CHECK-NOT: Type mismatch
 
Index: test/MachineVerifier/verifier-generic-types-2.mir
===================================================================
--- test/MachineVerifier/verifier-generic-types-2.mir
+++ test/MachineVerifier/verifier-generic-types-2.mir
@@ -1,4 +1,5 @@
 # RUN: not llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s
+# REQUIRES: x86-registered-target
 
 # CHECK: Bad machine code: Generic instruction is missing a virtual register type
 # CHECK-NEXT: - function:    first_type_of_a_type_index_missing_and_a_mismatch
Index: test/MachineVerifier/verifier-implicit-virtreg-invalid-physreg-liveness.mir
===================================================================
--- test/MachineVerifier/verifier-implicit-virtreg-invalid-physreg-liveness.mir
+++ test/MachineVerifier/verifier-implicit-virtreg-invalid-physreg-liveness.mir
@@ -1,4 +1,5 @@
 # RUN: not llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s
+# REQUIRES: amdgpu-registered-target
 
 # When the verifier was detecting the invalid liveness for vcc, it would assert when trying to iterate the subregisters of the implicit virtual register use.
 
Index: test/MachineVerifier/verifier-phi-fail0.mir
===================================================================
--- test/MachineVerifier/verifier-phi-fail0.mir
+++ test/MachineVerifier/verifier-phi-fail0.mir
@@ -1,4 +1,6 @@
 # RUN: not llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s
+# REQUIRES: x86-registered-target
+
 ---
 # CHECK: Bad machine code: PHI operand is not live-out from predecessor
 # CHECK: - function:    func0
Index: test/MachineVerifier/verifier-phi.mir
===================================================================
--- test/MachineVerifier/verifier-phi.mir
+++ test/MachineVerifier/verifier-phi.mir
@@ -1,4 +1,6 @@
 # RUN: llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none | FileCheck %s
+# REQUIRES: x86-registered-target
+
 # This should cleanly pass the machine verifier
 ---
 # CHECK-LABEL: name: func0
Index: test/MachineVerifier/verifier-pseudo-terminators.mir
===================================================================
--- test/MachineVerifier/verifier-pseudo-terminators.mir
+++ test/MachineVerifier/verifier-pseudo-terminators.mir
@@ -1,4 +1,6 @@
 # RUN: not llc -march=amdgcn -run-pass=verify %s 2>&1 | FileCheck %s
+# REQUIRES: amdgpu-registered-target
+
 # Make sure that mismatched successors are caught when a _term
 # instruction is used
 
Index: test/MachineVerifier/verify-regbankselected.mir
===================================================================
--- test/MachineVerifier/verify-regbankselected.mir
+++ test/MachineVerifier/verify-regbankselected.mir
@@ -1,4 +1,5 @@
 # RUN: not llc -verify-machineinstrs -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
+# REQUIRES: aarch64-registered-target
 
 --- |
 
Index: test/MachineVerifier/verify-selected.mir
===================================================================
--- test/MachineVerifier/verify-selected.mir
+++ test/MachineVerifier/verify-selected.mir
@@ -1,4 +1,5 @@
 # RUN: not llc -verify-machineinstrs -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
+# REQUIRES: aarch64-registered-target
 
 --- |